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1f673135 1\input texinfo @c -*- texinfo -*-
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2@c %**start of header
3@setfilename qemu-tech.info
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4
5@documentlanguage en
6@documentencoding UTF-8
7
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8@settitle QEMU Internals
9@exampleindent 0
10@paragraphindent 0
11@c %**end of header
1f673135 12
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13@ifinfo
14@direntry
15* QEMU Internals: (qemu-tech). The QEMU Emulator Internals.
16@end direntry
17@end ifinfo
18
1f673135 19@iftex
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20@titlepage
21@sp 7
22@center @titlefont{QEMU Internals}
23@sp 3
24@end titlepage
25@end iftex
26
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27@ifnottex
28@node Top
29@top
30
31@menu
32* Introduction::
33* QEMU Internals::
34* Regression Tests::
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35@end menu
36@end ifnottex
37
38@contents
39
40@node Introduction
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41@chapter Introduction
42
debc7065 43@menu
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44* intro_features:: Features
45* intro_x86_emulation:: x86 and x86-64 emulation
46* intro_arm_emulation:: ARM emulation
47* intro_mips_emulation:: MIPS emulation
48* intro_ppc_emulation:: PowerPC emulation
49* intro_sparc_emulation:: Sparc32 and Sparc64 emulation
50* intro_xtensa_emulation:: Xtensa emulation
51* intro_other_emulation:: Other CPU emulation
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52@end menu
53
54@node intro_features
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55@section Features
56
57QEMU is a FAST! processor emulator using a portable dynamic
58translator.
59
60QEMU has two operating modes:
61
62@itemize @minus
63
5fafdf24 64@item
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65Full system emulation. In this mode (full platform virtualization),
66QEMU emulates a full system (usually a PC), including a processor and
67various peripherals. It can be used to launch several different
68Operating Systems at once without rebooting the host machine or to
69debug system code.
1f673135 70
5fafdf24 71@item
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72User mode emulation. In this mode (application level virtualization),
73QEMU can launch processes compiled for one CPU on another CPU, however
74the Operating Systems must match. This can be used for example to ease
75cross-compilation and cross-debugging.
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76@end itemize
77
78As QEMU requires no host kernel driver to run, it is very safe and
79easy to use.
80
81QEMU generic features:
82
5fafdf24 83@itemize
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84
85@item User space only or full system emulation.
86
debc7065 87@item Using dynamic translation to native code for reasonable speed.
1f673135 88
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89@item
90Working on x86, x86_64 and PowerPC32/64 hosts. Being tested on ARM,
d41f3c3c 91S390x, Sparc32 and Sparc64.
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92
93@item Self-modifying code support.
94
95@item Precise exceptions support.
96
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97@item
98Floating point library supporting both full software emulation and
99native host FPU instructions.
100
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101@end itemize
102
103QEMU user mode emulation features:
5fafdf24 104@itemize
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105@item Generic Linux system call converter, including most ioctls.
106
107@item clone() emulation using native CPU clone() to use Linux scheduler for threads.
108
5fafdf24 109@item Accurate signal handling by remapping host signals to target signals.
1f673135 110@end itemize
1f673135 111
998a0501 112Linux user emulator (Linux host only) can be used to launch the Wine
0adb1246 113Windows API emulator (@url{http://www.winehq.org}). A BSD user emulator for BSD
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114hosts is under development. It would also be possible to develop a
115similar user emulator for Solaris.
116
1f673135 117QEMU full system emulation features:
5fafdf24 118@itemize
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119@item
120QEMU uses a full software MMU for maximum portability.
121
122@item
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123QEMU can optionally use an in-kernel accelerator, like kvm. The accelerators
124execute some of the guest code natively, while
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125continuing to emulate the rest of the machine.
126
127@item
128Various hardware devices can be emulated and in some cases, host
129devices (e.g. serial and parallel ports, USB, drives) can be used
130transparently by the guest Operating System. Host device passthrough
131can be used for talking to external physical peripherals (e.g. a
132webcam, modem or tape drive).
133
134@item
135Symmetric multiprocessing (SMP) even on a host with a single CPU. On a
136SMP host system, QEMU can use only one CPU fully due to difficulty in
137implementing atomic memory accesses efficiently.
138
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139@end itemize
140
debc7065 141@node intro_x86_emulation
998a0501 142@section x86 and x86-64 emulation
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143
144QEMU x86 target features:
145
5fafdf24 146@itemize
1f673135 147
5fafdf24 148@item The virtual x86 CPU supports 16 bit and 32 bit addressing with segmentation.
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149LDT/GDT and IDT are emulated. VM86 mode is also supported to run
150DOSEMU. There is some support for MMX/3DNow!, SSE, SSE2, SSE3, SSSE3,
151and SSE4 as well as x86-64 SVM.
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152
153@item Support of host page sizes bigger than 4KB in user mode emulation.
154
155@item QEMU can emulate itself on x86.
156
5fafdf24 157@item An extensive Linux x86 CPU test program is included @file{tests/test-i386}.
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158It can be used to test other x86 virtual CPUs.
159
160@end itemize
161
162Current QEMU limitations:
163
5fafdf24 164@itemize
1f673135 165
998a0501 166@item Limited x86-64 support.
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167
168@item IPC syscalls are missing.
169
5fafdf24 170@item The x86 segment limits and access rights are not tested at every
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171memory access (yet). Hopefully, very few OSes seem to rely on that for
172normal use.
173
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174@end itemize
175
debc7065 176@node intro_arm_emulation
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177@section ARM emulation
178
179@itemize
180
181@item Full ARM 7 user emulation.
182
183@item NWFPE FPU support included in user Linux emulation.
184
185@item Can run most ARM Linux binaries.
186
187@end itemize
188
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189@node intro_mips_emulation
190@section MIPS emulation
191
192@itemize
193
194@item The system emulation allows full MIPS32/MIPS64 Release 2 emulation,
195including privileged instructions, FPU and MMU, in both little and big
196endian modes.
197
198@item The Linux userland emulation can run many 32 bit MIPS Linux binaries.
199
200@end itemize
201
202Current QEMU limitations:
203
204@itemize
205
206@item Self-modifying code is not always handled correctly.
207
208@item 64 bit userland emulation is not implemented.
209
210@item The system emulation is not complete enough to run real firmware.
211
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212@item The watchpoint debug facility is not implemented.
213
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214@end itemize
215
debc7065 216@node intro_ppc_emulation
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217@section PowerPC emulation
218
219@itemize
220
5fafdf24 221@item Full PowerPC 32 bit emulation, including privileged instructions,
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222FPU and MMU.
223
224@item Can run most PowerPC Linux binaries.
225
226@end itemize
227
debc7065 228@node intro_sparc_emulation
998a0501 229@section Sparc32 and Sparc64 emulation
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230
231@itemize
232
f6b647cd 233@item Full SPARC V8 emulation, including privileged
3475187d 234instructions, FPU and MMU. SPARC V9 emulation includes most privileged
a785e42e 235and VIS instructions, FPU and I/D MMU. Alignment is fully enforced.
1f673135 236
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237@item Can run most 32-bit SPARC Linux binaries, SPARC32PLUS Linux binaries and
238some 64-bit SPARC Linux binaries.
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239
240@end itemize
241
242Current QEMU limitations:
243
5fafdf24 244@itemize
3475187d 245
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246@item IPC syscalls are missing.
247
1f587329 248@item Floating point exception support is buggy.
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249
250@item Atomic instructions are not correctly implemented.
251
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252@item There are still some problems with Sparc64 emulators.
253
254@end itemize
255
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256@node intro_xtensa_emulation
257@section Xtensa emulation
258
259@itemize
260
261@item Core Xtensa ISA emulation, including most options: code density,
262loop, extended L32R, 16- and 32-bit multiplication, 32-bit division,
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263MAC16, miscellaneous operations, boolean, FP coprocessor, coprocessor
264context, debug, multiprocessor synchronization,
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265conditional store, exceptions, relocatable vectors, unaligned exception,
266interrupts (including high priority and timer), hardware alignment,
267region protection, region translation, MMU, windowed registers, thread
268pointer, processor ID.
269
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270@item Not implemented options: data/instruction cache (including cache
271prefetch and locking), XLMI, processor interface. Also options not
272covered by the core ISA (e.g. FLIX, wide branches) are not implemented.
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273
274@item Can run most Xtensa Linux binaries.
275
276@item New core configuration that requires no additional instructions
277may be created from overlay with minimal amount of hand-written code.
278
279@end itemize
280
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281@node intro_other_emulation
282@section Other CPU emulation
1f673135 283
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284In addition to the above, QEMU supports emulation of other CPUs with
285varying levels of success. These are:
286
287@itemize
288
289@item
290Alpha
291@item
292CRIS
293@item
294M68k
295@item
296SH4
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297@end itemize
298
debc7065 299@node QEMU Internals
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300@chapter QEMU Internals
301
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302@menu
303* QEMU compared to other emulators::
304* Portable dynamic translation::
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305* Condition code optimisations::
306* CPU state optimisations::
307* Translation cache::
308* Direct block chaining::
309* Self-modifying code and translated code invalidation::
310* Exception support::
311* MMU emulation::
998a0501 312* Device emulation::
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313* Hardware interrupts::
314* User emulation specific details::
315* Bibliography::
316@end menu
317
318@node QEMU compared to other emulators
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319@section QEMU compared to other emulators
320
8e9620a6 321Like bochs [1], QEMU emulates an x86 CPU. But QEMU is much faster than
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322bochs as it uses dynamic compilation. Bochs is closely tied to x86 PC
323emulation while QEMU can emulate several processors.
324
325Like Valgrind [2], QEMU does user space emulation and dynamic
326translation. Valgrind is mainly a memory debugger while QEMU has no
327support for it (QEMU could be used to detect out of bound memory
328accesses as Valgrind, but it has no support to track uninitialised data
329as Valgrind does). The Valgrind dynamic translator generates better code
330than QEMU (in particular it does register allocation) but it is closely
331tied to an x86 host and target and has no support for precise exceptions
332and system emulation.
333
8e9620a6 334EM86 [3] is the closest project to user space QEMU (and QEMU still uses
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335some of its code, in particular the ELF file loader). EM86 was limited
336to an alpha host and used a proprietary and slow interpreter (the
8e9620a6 337interpreter part of the FX!32 Digital Win32 code translator [4]).
1f673135 338
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339TWIN from Willows Software was a Windows API emulator like Wine. It is less
340accurate than Wine but includes a protected mode x86 interpreter to launch
341x86 Windows executables. Such an approach has greater potential because most
342of the Windows API is executed natively but it is far more difficult to
343develop because all the data structures and function parameters exchanged
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344between the API and the x86 code must be converted.
345
8e9620a6 346User mode Linux [5] was the only solution before QEMU to launch a
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347Linux kernel as a process while not needing any host kernel
348patches. However, user mode Linux requires heavy kernel patches while
349QEMU accepts unpatched Linux kernels. The price to pay is that QEMU is
350slower.
351
8e9620a6 352The Plex86 [6] PC virtualizer is done in the same spirit as the now
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353obsolete qemu-fast system emulator. It requires a patched Linux kernel
354to work (you cannot launch the same kernel on your PC), but the
355patches are really small. As it is a PC virtualizer (no emulation is
356done except for some privileged instructions), it has the potential of
357being faster than QEMU. The downside is that a complicated (and
358potentially unsafe) host kernel patch is needed.
1f673135 359
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360The commercial PC Virtualizers (VMWare [7], VirtualPC [8]) are faster
361than QEMU (without virtualization), but they all need specific, proprietary
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362and potentially unsafe host drivers. Moreover, they are unable to
363provide cycle exact simulation as an emulator can.
364
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365VirtualBox [9], Xen [10] and KVM [11] are based on QEMU. QEMU-SystemC
366[12] uses QEMU to simulate a system where some hardware devices are
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367developed in SystemC.
368
debc7065 369@node Portable dynamic translation
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370@section Portable dynamic translation
371
372QEMU is a dynamic translator. When it first encounters a piece of code,
373it converts it to the host instruction set. Usually dynamic translators
374are very complicated and highly CPU dependent. QEMU uses some tricks
375which make it relatively easily portable and simple while achieving good
376performances.
377
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378After the release of version 0.9.1, QEMU switched to a new method of
379generating code, Tiny Code Generator or TCG. TCG relaxes the
380dependency on the exact version of the compiler used. The basic idea
381is to split every target instruction into a couple of RISC-like TCG
382ops (see @code{target-i386/translate.c}). Some optimizations can be
383performed at this stage, including liveness analysis and trivial
384constant expression evaluation. TCG ops are then implemented in the
385host CPU back end, also known as TCG target (see
ce151109 386@code{tcg/i386/tcg-target.inc.c}). For more information, please take a
998a0501 387look at @code{tcg/README}.
1f673135 388
debc7065 389@node Condition code optimisations
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390@section Condition code optimisations
391
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392Lazy evaluation of CPU condition codes (@code{EFLAGS} register on x86)
393is important for CPUs where every instruction sets the condition
394codes. It tends to be less important on conventional RISC systems
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395where condition codes are only updated when explicitly requested. On
396Sparc64, costly update of both 32 and 64 bit condition codes can be
397avoided with lazy evaluation.
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398
399Instead of computing the condition codes after each x86 instruction,
400QEMU just stores one operand (called @code{CC_SRC}), the result
401(called @code{CC_DST}) and the type of operation (called
402@code{CC_OP}). When the condition codes are needed, the condition
403codes can be calculated using this information. In addition, an
404optimized calculation can be performed for some instruction types like
405conditional branches.
1f673135 406
1235fc06 407@code{CC_OP} is almost never explicitly set in the generated code
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408because it is known at translation time.
409
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410The lazy condition code evaluation is used on x86, m68k, cris and
411Sparc. ARM uses a simplified variant for the N and Z flags.
1f673135 412
debc7065 413@node CPU state optimisations
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414@section CPU state optimisations
415
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416The target CPUs have many internal states which change the way it
417evaluates instructions. In order to achieve a good speed, the
418translation phase considers that some state information of the virtual
419CPU cannot change in it. The state is recorded in the Translation
420Block (TB). If the state changes (e.g. privilege level), a new TB will
421be generated and the previous TB won't be used anymore until the state
422matches the state recorded in the previous TB. For example, if the SS,
423DS and ES segments have a zero base, then the translator does not even
424generate an addition for the segment base.
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425
426[The FPU stack pointer register is not handled that way yet].
427
debc7065 428@node Translation cache
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429@section Translation cache
430
27c8efcb 431A 32 MByte cache holds the most recently used translations. For
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432simplicity, it is completely flushed when it is full. A translation unit
433contains just a single basic block (a block of x86 instructions
434terminated by a jump or by a virtual CPU state change which the
435translator cannot deduce statically).
436
debc7065 437@node Direct block chaining
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438@section Direct block chaining
439
440After each translated basic block is executed, QEMU uses the simulated
d274e07c 441Program Counter (PC) and other cpu state information (such as the CS
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442segment base value) to find the next basic block.
443
444In order to accelerate the most common cases where the new simulated PC
445is known, QEMU can patch a basic block so that it jumps directly to the
446next one.
447
448The most portable code uses an indirect jump. An indirect jump makes
449it easier to make the jump target modification atomic. On some host
450architectures (such as x86 or PowerPC), the @code{JUMP} opcode is
451directly patched so that the block chaining has no overhead.
452
debc7065 453@node Self-modifying code and translated code invalidation
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454@section Self-modifying code and translated code invalidation
455
456Self-modifying code is a special challenge in x86 emulation because no
457instruction cache invalidation is signaled by the application when code
458is modified.
459
460When translated code is generated for a basic block, the corresponding
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461host page is write protected if it is not already read-only. Then, if
462a write access is done to the page, Linux raises a SEGV signal. QEMU
463then invalidates all the translated code in the page and enables write
464accesses to the page.
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465
466Correct translated code invalidation is done efficiently by maintaining
467a linked list of every translated block contained in a given page. Other
5fafdf24 468linked lists are also maintained to undo direct block chaining.
1f673135 469
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470On RISC targets, correctly written software uses memory barriers and
471cache flushes, so some of the protection above would not be
472necessary. However, QEMU still requires that the generated code always
473matches the target instructions in memory in order to handle
474exceptions correctly.
1f673135 475
debc7065 476@node Exception support
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477@section Exception support
478
479longjmp() is used when an exception such as division by zero is
5fafdf24 480encountered.
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481
482The host SIGSEGV and SIGBUS signal handlers are used to get invalid
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483memory accesses. The simulated program counter is found by
484retranslating the corresponding basic block and by looking where the
485host program counter was at the exception point.
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486
487The virtual CPU cannot retrieve the exact @code{EFLAGS} register because
488in some cases it is not computed because of condition code
489optimisations. It is not a big concern because the emulated code can
490still be restarted in any cases.
491
debc7065 492@node MMU emulation
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493@section MMU emulation
494
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495For system emulation QEMU supports a soft MMU. In that mode, the MMU
496virtual to physical address translation is done at every memory
497access. QEMU uses an address translation cache to speed up the
498translation.
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499
500In order to avoid flushing the translated code each time the MMU
501mappings change, QEMU uses a physically indexed translation cache. It
5fafdf24 502means that each basic block is indexed with its physical address.
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503
504When MMU mappings change, only the chaining of the basic blocks is
505reset (i.e. a basic block can no longer jump directly to another one).
506
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507@node Device emulation
508@section Device emulation
509
510Systems emulated by QEMU are organized by boards. At initialization
511phase, each board instantiates a number of CPUs, devices, RAM and
512ROM. Each device in turn can assign I/O ports or memory areas (for
513MMIO) to its handlers. When the emulation starts, an access to the
514ports or MMIO memory areas assigned to the device causes the
515corresponding handler to be called.
516
517RAM and ROM are handled more optimally, only the offset to the host
518memory needs to be added to the guest address.
519
520The video RAM of VGA and other display cards is special: it can be
521read or written directly like RAM, but write accesses cause the memory
522to be marked with VGA_DIRTY flag as well.
523
524QEMU supports some device classes like serial and parallel ports, USB,
525drives and network devices, by providing APIs for easier connection to
526the generic, higher level implementations. The API hides the
527implementation details from the devices, like native device use or
528advanced block device formats like QCOW.
529
530Usually the devices implement a reset method and register support for
531saving and loading of the device state. The devices can also use
532timers, especially together with the use of bottom halves (BHs).
533
debc7065 534@node Hardware interrupts
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535@section Hardware interrupts
536
e1b4382c 537In order to be faster, QEMU does not check at every basic block if a
e8dc0938 538hardware interrupt is pending. Instead, the user must asynchronously
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539call a specific function to tell that an interrupt is pending. This
540function resets the chaining of the currently executing basic
541block. It ensures that the execution will return soon in the main loop
542of the CPU emulator. Then the main loop can test if the interrupt is
543pending and handle it.
544
debc7065 545@node User emulation specific details
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546@section User emulation specific details
547
548@subsection Linux system call translation
549
550QEMU includes a generic system call translator for Linux. It means that
551the parameters of the system calls can be converted to fix the
552endianness and 32/64 bit issues. The IOCTLs are converted with a generic
553type description system (see @file{ioctls.h} and @file{thunk.c}).
554
555QEMU supports host CPUs which have pages bigger than 4KB. It records all
556the mappings the process does and try to emulated the @code{mmap()}
557system calls in cases where the host @code{mmap()} call would fail
558because of bad page alignment.
559
560@subsection Linux signals
561
562Normal and real-time signals are queued along with their information
563(@code{siginfo_t}) as it is done in the Linux kernel. Then an interrupt
564request is done to the virtual CPU. When it is interrupted, one queued
565signal is handled by generating a stack frame in the virtual CPU as the
566Linux kernel does. The @code{sigreturn()} system call is emulated to return
567from the virtual signal handler.
568
569Some signals (such as SIGALRM) directly come from the host. Other
e8dc0938 570signals are synthesized from the virtual CPU exceptions such as SIGFPE
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571when a division by zero is done (see @code{main.c:cpu_loop()}).
572
573The blocked signal mask is still handled by the host Linux kernel so
574that most signal system calls can be redirected directly to the host
575Linux kernel. Only the @code{sigaction()} and @code{sigreturn()} system
576calls need to be fully emulated (see @file{signal.c}).
577
578@subsection clone() system call and threads
579
580The Linux clone() system call is usually used to create a thread. QEMU
581uses the host clone() system call so that real host threads are created
582for each emulated thread. One virtual CPU instance is created for each
583thread.
584
585The virtual x86 CPU atomic operations are emulated with a global lock so
586that their semantic is preserved.
587
588Note that currently there are still some locking issues in QEMU. In
589particular, the translated cache flush is not protected yet against
590reentrancy.
591
592@subsection Self-virtualization
593
594QEMU was conceived so that ultimately it can emulate itself. Although
595it is not very useful, it is an important test to show the power of the
596emulator.
597
598Achieving self-virtualization is not easy because there may be address
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599space conflicts. QEMU user emulators solve this problem by being an
600executable ELF shared object as the ld-linux.so ELF interpreter. That
601way, it can be relocated at load time.
1f673135 602
debc7065 603@node Bibliography
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604@section Bibliography
605
606@table @asis
607
5fafdf24 608@item [1]
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609@url{http://bochs.sourceforge.net/}, the Bochs IA-32 Emulator Project,
610by Kevin Lawton et al.
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611
612@item [2]
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613@url{http://www.valgrind.org/}, Valgrind, an open-source memory debugger
614for GNU/Linux.
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615
616@item [3]
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617@url{http://ftp.dreamtime.org/pub/linux/Linux-Alpha/em86/v0.2/docs/em86.html},
618the EM86 x86 emulator on Alpha-Linux.
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619
620@item [4]
debc7065 621@url{http://www.usenix.org/publications/library/proceedings/usenix-nt97/@/full_papers/chernoff/chernoff.pdf},
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622DIGITAL FX!32: Running 32-Bit x86 Applications on Alpha NT, by Anton
623Chernoff and Ray Hookway.
624
8e9620a6 625@item [5]
5fafdf24 626@url{http://user-mode-linux.sourceforge.net/},
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627The User-mode Linux Kernel.
628
8e9620a6 629@item [6]
5fafdf24 630@url{http://www.plex86.org/},
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631The new Plex86 project.
632
8e9620a6 633@item [7]
5fafdf24 634@url{http://www.vmware.com/},
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635The VMWare PC virtualizer.
636
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637@item [8]
638@url{https://www.microsoft.com/download/details.aspx?id=3702},
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639The VirtualPC PC virtualizer.
640
8e9620a6 641@item [9]
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642@url{http://virtualbox.org/},
643The VirtualBox PC virtualizer.
644
8e9620a6 645@item [10]
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646@url{http://www.xen.org/},
647The Xen hypervisor.
648
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649@item [11]
650@url{http://www.linux-kvm.org/},
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651Kernel Based Virtual Machine (KVM).
652
8e9620a6 653@item [12]
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654@url{http://www.greensocs.com/projects/QEMUSystemC},
655QEMU-SystemC, a hardware co-simulator.
656
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657@end table
658
debc7065 659@node Regression Tests
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660@chapter Regression Tests
661
662In the directory @file{tests/}, various interesting testing programs
b1f45238 663are available. They are used for regression testing.
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665@menu
666* test-i386::
667* linux-test::
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668@end menu
669
670@node test-i386
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671@section @file{test-i386}
672
673This program executes most of the 16 bit and 32 bit x86 instructions and
674generates a text output. It can be compared with the output obtained with
675a real CPU or another emulator. The target @code{make test} runs this
676program and a @code{diff} on the generated output.
677
678The Linux system call @code{modify_ldt()} is used to create x86 selectors
679to test some 16 bit addressing and 32 bit with segmentation cases.
680
681The Linux system call @code{vm86()} is used to test vm86 emulation.
682
683Various exceptions are raised to test most of the x86 user space
684exception reporting.
685
debc7065 686@node linux-test
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687@section @file{linux-test}
688
689This program tests various Linux system calls. It is used to verify
690that the system call parameters are correctly converted between target
691and host CPUs.
692
debc7065 693@bye