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sim: cpu: change default init to handle all cpus
[thirdparty/binutils-gdb.git] / sim / Makefile.in
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6bddc3e8
MF		 1# Makefile.in generated by automake 1.15.1 from Makefile.am.
2# @configure_input@
3
dc4e1fde 4# Copyright (C) 1994-2017 Free Software Foundation, Inc.
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MF		 5
6# This Makefile.in is free software; the Free Software Foundation
7# gives unlimited permission to copy and/or distribute it,
8# with or without modifications, as long as this notice is preserved.
9
10# This program is distributed in the hope that it will be useful,
11# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
12# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
13# PARTICULAR PURPOSE.
14
15@SET_MAKE@
16
dc4e1fde 17# Copyright (C) 1993-2022 Free Software Foundation, Inc.
6bddc3e8 18#
c906108c
SS		 19# This program is free software; you can redistribute it and/or modify
20# it under the terms of the GNU General Public License as published by
4744ac1b 21# the Free Software Foundation; either version 3 of the License, or
c906108c 22# (at your option) any later version.
4744ac1b 23#
c906108c
SS		 24# This program is distributed in the hope that it will be useful,
25# but WITHOUT ANY WARRANTY; without even the implied warranty of
26# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27# GNU General Public License for more details.
4744ac1b 28#
c906108c 29# You should have received a copy of the GNU General Public License
4744ac1b 30# along with this program. If not, see <http://www.gnu.org/licenses/>.
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MF		 126@ENABLE_SIM_TRUE@am__append_1 = \
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MF		 139TESTS = testsuite/common/bits32m0$(EXEEXT) \
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MF		 148@SIM_ENABLE_ARCH_bfin_TRUE@am__append_12 = bfin_SIM_EXTRA_HW_DEVICES="$(bfin_SIM_EXTRA_HW_DEVICES)"
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d47ea1b9 162@SIM_ENABLE_ARCH_d10v_TRUE@am__append_26 = $(d10v_BUILD_OUTPUTS)
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MF		 163@SIM_ENABLE_ARCH_d10v_TRUE@am__append_27 = d10v/gencode
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MF		 185@SIM_ENABLE_ARCH_m32c_TRUE@ $(m32c_BUILD_OUTPUTS) \
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MF		 189@SIM_ENABLE_ARCH_m32r_TRUE@am__append_49 = m32r/run
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MF		 201@SIM_ENABLE_ARCH_mips_TRUE@am__append_61 = $(IGEN)
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MF		 206@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_66 = $(mn10300_BUILD_OUTPUTS)
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MF		 211@SIM_ENABLE_ARCH_or1k_TRUE@am__append_71 = $(or1k_BUILD_OUTPUTS)
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3d042117 222@SIM_ENABLE_ARCH_v850_TRUE@am__append_82 = $(v850_BUILD_OUTPUTS)
a449d2c2 223@SIM_ENABLE_ARCH_v850_TRUE@am__append_83 = $(v850_BUILD_OUTPUTS)
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MF		 224subdir = .
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MF		 226am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
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MF		 231 $(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
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MF		 244 $(top_srcdir)/m4/sim_ac_option_stdio.m4 \
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MF		 252am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
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MF		 256am__CONFIG_DISTCLEAN_FILES = config.status config.cache config.log \
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b15c5d7a 259CONFIG_HEADER = config.h
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MF		 260CONFIG_CLEAN_FILES = Make-common.sim aarch64/Makefile.sim \
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MF		 263 bpf/Makefile.sim bpf/.gdbinit cr16/Makefile.sim cr16/.gdbinit \
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MF		 271 microblaze/Makefile.sim microblaze/.gdbinit mips/Makefile.sim \
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274 msp430/.gdbinit or1k/Makefile.sim or1k/.gdbinit ppc/.gdbinit \
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278 erc32/.gdbinit v850/Makefile.sim v850/.gdbinit \
279 example-synacor/Makefile.sim example-synacor/.gdbinit \
280 arch-subdir.mk .gdbinit
6bddc3e8 281CONFIG_CLEAN_VPATH_FILES =
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MF		 282LIBRARIES = $(noinst_LIBRARIES)
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MF		 288common_libcommon_a_AR = $(AR) $(ARFLAGS)
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MF		 291am_common_libcommon_a_OBJECTS = common/callback.$(OBJEXT) \
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MF		 299igen_libigen_a_AR = $(AR) $(ARFLAGS)
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MF		 301@SIM_ENABLE_IGEN_TRUE@am_igen_libigen_a_OBJECTS = \
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MF		 318@SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) \
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MF		 320@SIM_ENABLE_IGEN_TRUE@ igen/ld-decode$(EXEEXT) \
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MF		 324@SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_3 = cr16/gencode$(EXEEXT)
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MF		 330 testsuite/common/bits32m31$(EXEEXT) \
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MF		 335@SIM_ENABLE_ARCH_aarch64_TRUE@am__EXEEXT_10 = aarch64/run$(EXEEXT)
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662 $(sh_run_SOURCES) testsuite/common/alu-tst.c \
cb9bdc02
MF		 663 testsuite/common/bits-gen.c testsuite/common/bits32m0.c \
664 testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
c0c25232
MF		 665 testsuite/common/bits64m63.c testsuite/common/fpu-tst.c \
666 $(v850_run_SOURCES)
6bddc3e8
MF		 667RECURSIVE_TARGETS = all-recursive check-recursive cscopelist-recursive \
668 ctags-recursive dvi-recursive html-recursive info-recursive \
669 install-data-recursive install-dvi-recursive \
670 install-exec-recursive install-html-recursive \
671 install-info-recursive install-pdf-recursive \
672 install-ps-recursive install-recursive installcheck-recursive \
673 installdirs-recursive pdf-recursive ps-recursive \
674 tags-recursive uninstall-recursive
675am__can_run_installinfo = \
676 case $$AM_UPDATE_INFO_DIR in \
677 n|no|NO) false;; \
678 *) (install-info --version) >/dev/null 2>&1;; \
679 esac
92bc001e
MF		 680am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`;
681am__vpath_adj = case $$p in \
682 $(srcdir)/*) f=`echo "$$p" | sed "s|^$$srcdirstrip/||"`;; \
683 *) f=$$p;; \
684 esac;
685am__strip_dir = f=`echo $$p | sed -e 's|^.*/||'`;
686am__install_max = 40
687am__nobase_strip_setup = \
688 srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*|]/\\\\&/g'`
689am__nobase_strip = \
690 for p in $$list; do echo "$$p"; done | sed -e "s|$$srcdirstrip/||"
691am__nobase_list = $(am__nobase_strip_setup); \
692 for p in $$list; do echo "$$p $$p"; done | \
693 sed "s| $$srcdirstrip/| |;"' / .*\//!s/ .*/ ./; s,\( .*\)/[^/]*$$,\1,' | \
694 $(AWK) 'BEGIN { files["."] = "" } { files[$$2] = files[$$2] " " $$1; \
695 if (++n[$$2] == $(am__install_max)) \
696 { print $$2, files[$$2]; n[$$2] = 0; files[$$2] = "" } } \
697 END { for (dir in files) print dir, files[dir] }'
698am__base_list = \
699 sed '$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;s/\n/ /g' | \
700 sed '$$!N;$$!N;$$!N;$$!N;s/\n/ /g'
701am__uninstall_files_from_dir = { \
702 test -z "$$files" \
703 || { test ! -d "$$dir" && test ! -f "$$dir" && test ! -r "$$dir"; } \
704 || { echo " ( cd '$$dir' && rm -f" $$files ")"; \
705 $(am__cd) "$$dir" && rm -f $$files; }; \
706 }
94f5dfed
MF		 707am__installdirs = "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" \
708 "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" \
709 "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" \
710 "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"
711DATA = $(armdoc_DATA) $(dtb_DATA) $(erc32doc_DATA) $(frvdoc_DATA) \
712 $(or1kdoc_DATA) $(ppcdoc_DATA) $(rxdoc_DATA)
ed939535
MF		 713am__pkginclude_HEADERS_DIST = $(srcroot)/include/sim/callback.h \
714 $(srcroot)/include/sim/sim.h
92bc001e 715HEADERS = $(pkginclude_HEADERS)
6bddc3e8
MF		 716RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
717 distclean-recursive maintainer-clean-recursive
718am__recursive_targets = \
719 $(RECURSIVE_TARGETS) \
720 $(RECURSIVE_CLEAN_TARGETS) \
721 $(am__extra_recursive_targets)
722AM_RECURSIVE_TARGETS = $(am__recursive_targets:-recursive=) TAGS CTAGS \
a389375f 723 cscope check recheck
b15c5d7a
MF		 724am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) \
725 $(LISP)config.h.in
6bddc3e8
MF		 726# Read a list of newline-separated strings from the standard input,
727# and print each of them once, without duplicates. Input order is
728# *not* preserved.
729am__uniquify_input = $(AWK) '\
730 BEGIN { nonempty = 0; } \
731 { items[$$0] = 1; nonempty = 1; } \
732 END { if (nonempty) { for (i in items) print i; }; } \
733'
734# Make sure the list of sources is unique. This is necessary because,
735# e.g., the same source file might be shared among _SOURCES variables
736# for different programs/libraries.
737am__define_uniq_tagged_files = \
738 list='$(am__tagged_files)'; \
739 unique=`for i in $$list; do \
740 if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
741 done | $(am__uniquify_input)`
742ETAGS = etags
743CTAGS = ctags
744CSCOPE = cscope
6c57b87f
MF		 745DEJATOOL = $(PACKAGE)
746RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
747EXPECT = expect
748RUNTEST = runtest
a389375f
MF		 749am__tty_colors_dummy = \
750 mgn= red= grn= lgn= blu= brg= std=; \
751 am__color_tests=no
752am__tty_colors = { \
753 $(am__tty_colors_dummy); \
754 if test "X$(AM_COLOR_TESTS)" = Xno; then \
755 am__color_tests=no; \
756 elif test "X$(AM_COLOR_TESTS)" = Xalways; then \
757 am__color_tests=yes; \
758 elif test "X$$TERM" != Xdumb && { test -t 1; } 2>/dev/null; then \
759 am__color_tests=yes; \
760 fi; \
761 if test $$am__color_tests = yes; then \
762 red='\e[0;31m'; \
763 grn='\e[0;32m'; \
764 lgn='\e[1;32m'; \
765 blu='\e[1;34m'; \
766 mgn='\e[0;35m'; \
767 brg='\e[1m'; \
768 std='\e[m'; \
769 fi; \
770}
a389375f
MF		 771am__recheck_rx = ^[ ]*:recheck:[ ]*
772am__global_test_result_rx = ^[ ]*:global-test-result:[ ]*
773am__copy_in_global_log_rx = ^[ ]*:copy-in-global-log:[ ]*
774# A command that, given a newline-separated list of test names on the
775# standard input, print the name of the tests that are to be re-run
776# upon "make recheck".
777am__list_recheck_tests = $(AWK) '{ \
778 recheck = 1; \
779 while ((rc = (getline line < ($$0 ".trs"))) != 0) \
780 { \
781 if (rc < 0) \
782 { \
783 if ((getline line2 < ($$0 ".log")) < 0) \
784 recheck = 0; \
785 break; \
786 } \
787 else if (line ~ /$(am__recheck_rx)[nN][Oo]/) \
788 { \
789 recheck = 0; \
790 break; \
791 } \
792 else if (line ~ /$(am__recheck_rx)[yY][eE][sS]/) \
793 { \
794 break; \
795 } \
796 }; \
797 if (recheck) \
798 print $$0; \
799 close ($$0 ".trs"); \
800 close ($$0 ".log"); \
801}'
802# A command that, given a newline-separated list of test names on the
803# standard input, create the global log from their .trs and .log files.
804am__create_global_log = $(AWK) ' \
805function fatal(msg) \
806{ \
807 print "fatal: making $@: " msg | "cat >&2"; \
808 exit 1; \
809} \
810function rst_section(header) \
811{ \
812 print header; \
813 len = length(header); \
814 for (i = 1; i <= len; i = i + 1) \
815 printf "="; \
816 printf "\n\n"; \
817} \
818{ \
819 copy_in_global_log = 1; \
820 global_test_result = "RUN"; \
821 while ((rc = (getline line < ($$0 ".trs"))) != 0) \
822 { \
823 if (rc < 0) \
824 fatal("failed to read from " $$0 ".trs"); \
825 if (line ~ /$(am__global_test_result_rx)/) \
826 { \
827 sub("$(am__global_test_result_rx)", "", line); \
828 sub("[ ]*$$", "", line); \
829 global_test_result = line; \
830 } \
831 else if (line ~ /$(am__copy_in_global_log_rx)[nN][oO]/) \
832 copy_in_global_log = 0; \
833 }; \
834 if (copy_in_global_log) \
835 { \
836 rst_section(global_test_result ": " $$0); \
837 while ((rc = (getline line < ($$0 ".log"))) != 0) \
838 { \
839 if (rc < 0) \
840 fatal("failed to read from " $$0 ".log"); \
841 print line; \
842 }; \
843 printf "\n"; \
844 }; \
845 close ($$0 ".trs"); \
846 close ($$0 ".log"); \
847}'
848# Restructured Text title.
849am__rst_title = { sed 's/.*/ & /;h;s/./=/g;p;x;s/ *$$//;p;g' && echo; }
850# Solaris 10 'make', and several other traditional 'make' implementations,
851# pass "-e" to $(SHELL), and POSIX 2008 even requires this. Work around it
852# by disabling -e (using the XSI extension "set +e") if it's set.
853am__sh_e_setup = case $$- in *e*) set +e;; esac
854# Default flags passed to test drivers.
855am__common_driver_flags = \
856 --color-tests "$$am__color_tests" \
857 --enable-hard-errors "$$am__enable_hard_errors" \
858 --expect-failure "$$am__expect_failure"
859# To be inserted before the command running the test. Creates the
860# directory for the log if needed. Stores in $dir the directory
861# containing $f, in $tst the test, in $log the log. Executes the
862# developer- defined test setup AM_TESTS_ENVIRONMENT (if any), and
863# passes TESTS_ENVIRONMENT. Set up options for the wrapper that
864# will run the test scripts (or their associated LOG_COMPILER, if
865# thy have one).
866am__check_pre = \
867$(am__sh_e_setup); \
868$(am__vpath_adj_setup) $(am__vpath_adj) \
869$(am__tty_colors); \
870srcdir=$(srcdir); export srcdir; \
871case "$@" in \
872 */*) am__odir=`echo "./$@" | sed 's|/[^/]*$$||'`;; \
873 *) am__odir=.;; \
874esac; \
875test "x$$am__odir" = x"." || test -d "$$am__odir" \
876 || $(MKDIR_P) "$$am__odir" || exit $$?; \
877if test -f "./$$f"; then dir=./; \
878elif test -f "$$f"; then dir=; \
879else dir="$(srcdir)/"; fi; \
880tst=$$dir$$f; log='$@'; \
881if test -n '$(DISABLE_HARD_ERRORS)'; then \
882 am__enable_hard_errors=no; \
883else \
884 am__enable_hard_errors=yes; \
885fi; \
886case " $(XFAIL_TESTS) " in \
887 *[\ \ ]$$f[\ \ ]* | *[\ \ ]$$dir$$f[\ \ ]*) \
888 am__expect_failure=yes;; \
889 *) \
890 am__expect_failure=no;; \
891esac; \
892$(AM_TESTS_ENVIRONMENT) $(TESTS_ENVIRONMENT)
893# A shell command to get the names of the tests scripts with any registered
894# extension removed (i.e., equivalently, the names of the test logs, with
895# the '.log' extension removed). The result is saved in the shell variable
896# '$bases'. This honors runtime overriding of TESTS and TEST_LOGS. Sadly,
897# we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)",
898# since that might cause problem with VPATH rewrites for suffix-less tests.
899# See also 'test-harness-vpath-rewrite.sh' and 'test-trs-basic.sh'.
900am__set_TESTS_bases = \
901 bases='$(TEST_LOGS)'; \
902 bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \
903 bases=`echo $$bases`
904RECHECK_LOGS = $(TEST_LOGS)
905TEST_SUITE_LOG = test-suite.log
906TEST_EXTENSIONS = @EXEEXT@ .test
907LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
908LOG_COMPILE = $(LOG_COMPILER) $(AM_LOG_FLAGS) $(LOG_FLAGS)
909am__set_b = \
910 case '$@' in \
911 */*) \
912 case '$*' in \
913 */*) b='$*';; \
914 *) b=`echo '$@' | sed 's/\.log$$//'`; \
915 esac;; \
916 *) \
917 b='$*';; \
918 esac
919am__test_logs1 = $(TESTS:=.log)
920am__test_logs2 = $(am__test_logs1:@EXEEXT@.log=.log)
921TEST_LOGS = $(am__test_logs2:.test.log=.log)
922TEST_LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
923TEST_LOG_COMPILE = $(TEST_LOG_COMPILER) $(AM_TEST_LOG_FLAGS) \
924 $(TEST_LOG_FLAGS)
6bddc3e8
MF		 925DIST_SUBDIRS = $(SUBDIRS)
926ACLOCAL = @ACLOCAL@
927AMTAR = @AMTAR@
928AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
929AR = @AR@
aa0fca16 930AR_FOR_BUILD = @AR_FOR_BUILD@
dc4e1fde 931AS_FOR_TARGET = @AS_FOR_TARGET@
8996c210
MF		 932AS_FOR_TARGET_AARCH64 = @AS_FOR_TARGET_AARCH64@
933AS_FOR_TARGET_ARM = @AS_FOR_TARGET_ARM@
934AS_FOR_TARGET_AVR = @AS_FOR_TARGET_AVR@
935AS_FOR_TARGET_BFIN = @AS_FOR_TARGET_BFIN@
936AS_FOR_TARGET_BPF = @AS_FOR_TARGET_BPF@
937AS_FOR_TARGET_CR16 = @AS_FOR_TARGET_CR16@
938AS_FOR_TARGET_CRIS = @AS_FOR_TARGET_CRIS@
939AS_FOR_TARGET_D10V = @AS_FOR_TARGET_D10V@
940AS_FOR_TARGET_ERC32 = @AS_FOR_TARGET_ERC32@
941AS_FOR_TARGET_EXAMPLE_SYNACOR = @AS_FOR_TARGET_EXAMPLE_SYNACOR@
942AS_FOR_TARGET_FRV = @AS_FOR_TARGET_FRV@
943AS_FOR_TARGET_FT32 = @AS_FOR_TARGET_FT32@
944AS_FOR_TARGET_H8300 = @AS_FOR_TARGET_H8300@
945AS_FOR_TARGET_IQ2000 = @AS_FOR_TARGET_IQ2000@
946AS_FOR_TARGET_LM32 = @AS_FOR_TARGET_LM32@
947AS_FOR_TARGET_M32C = @AS_FOR_TARGET_M32C@
948AS_FOR_TARGET_M32R = @AS_FOR_TARGET_M32R@
949AS_FOR_TARGET_M68HC11 = @AS_FOR_TARGET_M68HC11@
950AS_FOR_TARGET_MCORE = @AS_FOR_TARGET_MCORE@
951AS_FOR_TARGET_MICROBLAZE = @AS_FOR_TARGET_MICROBLAZE@
952AS_FOR_TARGET_MIPS = @AS_FOR_TARGET_MIPS@
953AS_FOR_TARGET_MN10300 = @AS_FOR_TARGET_MN10300@
954AS_FOR_TARGET_MOXIE = @AS_FOR_TARGET_MOXIE@
955AS_FOR_TARGET_MSP430 = @AS_FOR_TARGET_MSP430@
956AS_FOR_TARGET_OR1K = @AS_FOR_TARGET_OR1K@
957AS_FOR_TARGET_PPC = @AS_FOR_TARGET_PPC@
958AS_FOR_TARGET_PRU = @AS_FOR_TARGET_PRU@
959AS_FOR_TARGET_RISCV = @AS_FOR_TARGET_RISCV@
960AS_FOR_TARGET_RL78 = @AS_FOR_TARGET_RL78@
961AS_FOR_TARGET_RX = @AS_FOR_TARGET_RX@
962AS_FOR_TARGET_SH = @AS_FOR_TARGET_SH@
963AS_FOR_TARGET_V850 = @AS_FOR_TARGET_V850@
6bddc3e8
MF		 964AUTOCONF = @AUTOCONF@
965AUTOHEADER = @AUTOHEADER@
966AUTOMAKE = @AUTOMAKE@
967AWK = @AWK@
968CC = @CC@
969CCDEPMODE = @CCDEPMODE@
970CC_FOR_BUILD = @CC_FOR_BUILD@
dc4e1fde 971CC_FOR_TARGET = @CC_FOR_TARGET@
8996c210
MF		 972CC_FOR_TARGET_AARCH64 = @CC_FOR_TARGET_AARCH64@
973CC_FOR_TARGET_ARM = @CC_FOR_TARGET_ARM@
974CC_FOR_TARGET_AVR = @CC_FOR_TARGET_AVR@
975CC_FOR_TARGET_BFIN = @CC_FOR_TARGET_BFIN@
976CC_FOR_TARGET_BPF = @CC_FOR_TARGET_BPF@
977CC_FOR_TARGET_CR16 = @CC_FOR_TARGET_CR16@
978CC_FOR_TARGET_CRIS = @CC_FOR_TARGET_CRIS@
979CC_FOR_TARGET_D10V = @CC_FOR_TARGET_D10V@
980CC_FOR_TARGET_ERC32 = @CC_FOR_TARGET_ERC32@
981CC_FOR_TARGET_EXAMPLE_SYNACOR = @CC_FOR_TARGET_EXAMPLE_SYNACOR@
982CC_FOR_TARGET_FRV = @CC_FOR_TARGET_FRV@
983CC_FOR_TARGET_FT32 = @CC_FOR_TARGET_FT32@
984CC_FOR_TARGET_H8300 = @CC_FOR_TARGET_H8300@
985CC_FOR_TARGET_IQ2000 = @CC_FOR_TARGET_IQ2000@
986CC_FOR_TARGET_LM32 = @CC_FOR_TARGET_LM32@
987CC_FOR_TARGET_M32C = @CC_FOR_TARGET_M32C@
988CC_FOR_TARGET_M32R = @CC_FOR_TARGET_M32R@
989CC_FOR_TARGET_M68HC11 = @CC_FOR_TARGET_M68HC11@
990CC_FOR_TARGET_MCORE = @CC_FOR_TARGET_MCORE@
991CC_FOR_TARGET_MICROBLAZE = @CC_FOR_TARGET_MICROBLAZE@
992CC_FOR_TARGET_MIPS = @CC_FOR_TARGET_MIPS@
993CC_FOR_TARGET_MN10300 = @CC_FOR_TARGET_MN10300@
994CC_FOR_TARGET_MOXIE = @CC_FOR_TARGET_MOXIE@
995CC_FOR_TARGET_MSP430 = @CC_FOR_TARGET_MSP430@
996CC_FOR_TARGET_OR1K = @CC_FOR_TARGET_OR1K@
997CC_FOR_TARGET_PPC = @CC_FOR_TARGET_PPC@
998CC_FOR_TARGET_PRU = @CC_FOR_TARGET_PRU@
999CC_FOR_TARGET_RISCV = @CC_FOR_TARGET_RISCV@
1000CC_FOR_TARGET_RL78 = @CC_FOR_TARGET_RL78@
1001CC_FOR_TARGET_RX = @CC_FOR_TARGET_RX@
1002CC_FOR_TARGET_SH = @CC_FOR_TARGET_SH@
1003CC_FOR_TARGET_V850 = @CC_FOR_TARGET_V850@
6bddc3e8
MF		 1004CFLAGS = @CFLAGS@
1005CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
1bf5c342 1006CGEN_MAINT = @CGEN_MAINT@
6bddc3e8
MF		 1007CPP = @CPP@
1008CPPFLAGS = @CPPFLAGS@
fde7c6bf 1009CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@
6bddc3e8 1010CYGPATH_W = @CYGPATH_W@
c2783492 1011C_DIALECT = @C_DIALECT@
6bddc3e8
MF		 1012DEFS = @DEFS@
1013DEPDIR = @DEPDIR@
b5689863 1014DSYMUTIL = @DSYMUTIL@
a979f2a0 1015DTC = @DTC@
b5689863 1016DUMPBIN = @DUMPBIN@
6bddc3e8
MF		 1017ECHO_C = @ECHO_C@
1018ECHO_N = @ECHO_N@
1019ECHO_T = @ECHO_T@
c2783492 1020EGREP = @EGREP@
6bddc3e8 1021EXEEXT = @EXEEXT@
b5689863 1022FGREP = @FGREP@
c2783492 1023GREP = @GREP@
6bddc3e8
MF		 1024INSTALL = @INSTALL@
1025INSTALL_DATA = @INSTALL_DATA@
1026INSTALL_PROGRAM = @INSTALL_PROGRAM@
1027INSTALL_SCRIPT = @INSTALL_SCRIPT@
1028INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
b5689863 1029LD = @LD@
6bddc3e8 1030LDFLAGS = @LDFLAGS@
c2783492 1031LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@
dc4e1fde 1032LD_FOR_TARGET = @LD_FOR_TARGET@
8996c210
MF		 1033LD_FOR_TARGET_AARCH64 = @LD_FOR_TARGET_AARCH64@
1034LD_FOR_TARGET_ARM = @LD_FOR_TARGET_ARM@
1035LD_FOR_TARGET_AVR = @LD_FOR_TARGET_AVR@
1036LD_FOR_TARGET_BFIN = @LD_FOR_TARGET_BFIN@
1037LD_FOR_TARGET_BPF = @LD_FOR_TARGET_BPF@
1038LD_FOR_TARGET_CR16 = @LD_FOR_TARGET_CR16@
1039LD_FOR_TARGET_CRIS = @LD_FOR_TARGET_CRIS@
1040LD_FOR_TARGET_D10V = @LD_FOR_TARGET_D10V@
1041LD_FOR_TARGET_ERC32 = @LD_FOR_TARGET_ERC32@
1042LD_FOR_TARGET_EXAMPLE_SYNACOR = @LD_FOR_TARGET_EXAMPLE_SYNACOR@
1043LD_FOR_TARGET_FRV = @LD_FOR_TARGET_FRV@
1044LD_FOR_TARGET_FT32 = @LD_FOR_TARGET_FT32@
1045LD_FOR_TARGET_H8300 = @LD_FOR_TARGET_H8300@
1046LD_FOR_TARGET_IQ2000 = @LD_FOR_TARGET_IQ2000@
1047LD_FOR_TARGET_LM32 = @LD_FOR_TARGET_LM32@
1048LD_FOR_TARGET_M32C = @LD_FOR_TARGET_M32C@
1049LD_FOR_TARGET_M32R = @LD_FOR_TARGET_M32R@
1050LD_FOR_TARGET_M68HC11 = @LD_FOR_TARGET_M68HC11@
1051LD_FOR_TARGET_MCORE = @LD_FOR_TARGET_MCORE@
1052LD_FOR_TARGET_MICROBLAZE = @LD_FOR_TARGET_MICROBLAZE@
1053LD_FOR_TARGET_MIPS = @LD_FOR_TARGET_MIPS@
1054LD_FOR_TARGET_MN10300 = @LD_FOR_TARGET_MN10300@
1055LD_FOR_TARGET_MOXIE = @LD_FOR_TARGET_MOXIE@
1056LD_FOR_TARGET_MSP430 = @LD_FOR_TARGET_MSP430@
1057LD_FOR_TARGET_OR1K = @LD_FOR_TARGET_OR1K@
1058LD_FOR_TARGET_PPC = @LD_FOR_TARGET_PPC@
1059LD_FOR_TARGET_PRU = @LD_FOR_TARGET_PRU@
1060LD_FOR_TARGET_RISCV = @LD_FOR_TARGET_RISCV@
1061LD_FOR_TARGET_RL78 = @LD_FOR_TARGET_RL78@
1062LD_FOR_TARGET_RX = @LD_FOR_TARGET_RX@
1063LD_FOR_TARGET_SH = @LD_FOR_TARGET_SH@
1064LD_FOR_TARGET_V850 = @LD_FOR_TARGET_V850@
6bddc3e8
MF		 1065LIBOBJS = @LIBOBJS@
1066LIBS = @LIBS@
b5689863
MF		 1067LIBTOOL = @LIBTOOL@
1068LIPO = @LIPO@
1069LN_S = @LN_S@
6bddc3e8 1070LTLIBOBJS = @LTLIBOBJS@
8c379db2 1071MAINT = @MAINT@
6bddc3e8
MF		 1072MAKEINFO = @MAKEINFO@
1073MKDIR_P = @MKDIR_P@
b5689863
MF		 1074NM = @NM@
1075NMEDIT = @NMEDIT@
1076OBJDUMP = @OBJDUMP@
6bddc3e8 1077OBJEXT = @OBJEXT@
b5689863
MF		 1078OTOOL = @OTOOL@
1079OTOOL64 = @OTOOL64@
6bddc3e8
MF		 1080PACKAGE = @PACKAGE@
1081PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
1082PACKAGE_NAME = @PACKAGE_NAME@
1083PACKAGE_STRING = @PACKAGE_STRING@
1084PACKAGE_TARNAME = @PACKAGE_TARNAME@
1085PACKAGE_URL = @PACKAGE_URL@
1086PACKAGE_VERSION = @PACKAGE_VERSION@
1087PATH_SEPARATOR = @PATH_SEPARATOR@
6dd65fc0 1088PKGVERSION = @PKGVERSION@
d57b6533
MF		 1089PKG_CONFIG = @PKG_CONFIG@
1090PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@
1091PKG_CONFIG_PATH = @PKG_CONFIG_PATH@
6bddc3e8 1092RANLIB = @RANLIB@
aa0fca16 1093RANLIB_FOR_BUILD = @RANLIB_FOR_BUILD@
5d0b3088
MF		 1094READLINE_CFLAGS = @READLINE_CFLAGS@
1095READLINE_LIB = @READLINE_LIB@
6dd65fc0
MF		 1096REPORT_BUGS_TEXI = @REPORT_BUGS_TEXI@
1097REPORT_BUGS_TO = @REPORT_BUGS_TO@
d57b6533
MF		 1098SDL_CFLAGS = @SDL_CFLAGS@
1099SDL_LIBS = @SDL_LIBS@
b5689863 1100SED = @SED@
6bddc3e8
MF		 1101SET_MAKE = @SET_MAKE@
1102SHELL = @SHELL@
36bb57e4
MF		 1103SIM_COMMON_BUILD_FALSE = @SIM_COMMON_BUILD_FALSE@
1104SIM_COMMON_BUILD_TRUE = @SIM_COMMON_BUILD_TRUE@
2ba09f42 1105SIM_ENABLED_ARCHES = @SIM_ENABLED_ARCHES@
408a44aa 1106SIM_FRV_TRAPDUMP_FLAGS = @SIM_FRV_TRAPDUMP_FLAGS@
682a2a82
MF		 1107SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
1108SIM_HW_SOCKSER = @SIM_HW_SOCKSER@
d73f39ee 1109SIM_INLINE = @SIM_INLINE@
19b11256 1110SIM_MIPS_BITSIZE = @SIM_MIPS_BITSIZE@
d455df98 1111SIM_MIPS_FPU_BITSIZE = @SIM_MIPS_FPU_BITSIZE@
abc494c6
MF		 1112SIM_MIPS_GEN = @SIM_MIPS_GEN@
1113SIM_MIPS_IGEN_FLAGS = @SIM_MIPS_IGEN_FLAGS@
1114SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
1115SIM_MIPS_MICROMIPS16_FLAGS = @SIM_MIPS_MICROMIPS16_FLAGS@
1116SIM_MIPS_MICROMIPS_FLAGS = @SIM_MIPS_MICROMIPS_FLAGS@
1117SIM_MIPS_MULTI_FLAGS = @SIM_MIPS_MULTI_FLAGS@
1118SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
1119SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
1120SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
2d5700ad 1121SIM_MIPS_SUBTARGET = @SIM_MIPS_SUBTARGET@
a0e674c1 1122SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@
1787fcc4 1123SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@
e173c80f 1124SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@
36bb57e4 1125SIM_SUBDIRS = @SIM_SUBDIRS@
8996c210 1126SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@
6bddc3e8 1127STRIP = @STRIP@
5d0b3088 1128TERMCAP_LIB = @TERMCAP_LIB@
6bddc3e8 1129VERSION = @VERSION@
47ce766a
MF		 1130WARN_CFLAGS = @WARN_CFLAGS@
1131WERROR_CFLAGS = @WERROR_CFLAGS@
6bddc3e8 1132abs_builddir = @abs_builddir@
5e25901f 1133abs_srcdir = @abs_srcdir@
6bddc3e8
MF		 1134abs_top_builddir = @abs_top_builddir@
1135abs_top_srcdir = @abs_top_srcdir@
1136ac_ct_CC = @ac_ct_CC@
b5689863 1137ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
6bddc3e8
MF		 1138am__include = @am__include@
1139am__leading_dot = @am__leading_dot@
1140am__quote = @am__quote@
1141am__tar = @am__tar@
1142am__untar = @am__untar@
1143bindir = @bindir@
1144build = @build@
1145build_alias = @build_alias@
1146build_cpu = @build_cpu@
1147build_os = @build_os@
1148build_vendor = @build_vendor@
1149builddir = @builddir@
1bf5c342
MF		 1150cgen = @cgen@
1151cgendir = @cgendir@
6bddc3e8
MF		 1152datadir = @datadir@
1153datarootdir = @datarootdir@
1154docdir = @docdir@
1155dvidir = @dvidir@
c906108c 1156exec_prefix = @exec_prefix@
6bddc3e8 1157host = @host@
c906108c 1158host_alias = @host_alias@
6bddc3e8
MF		 1159host_cpu = @host_cpu@
1160host_os = @host_os@
1161host_vendor = @host_vendor@
1162htmldir = @htmldir@
46a1e1f2 1163include_makefile = @include_makefile@
6bddc3e8
MF		 1164includedir = @includedir@
1165infodir = @infodir@
1166install_sh = @install_sh@
c906108c 1167libdir = @libdir@
6bddc3e8
MF		 1168libexecdir = @libexecdir@
1169localedir = @localedir@
1170localstatedir = @localstatedir@
c906108c 1171mandir = @mandir@
6bddc3e8
MF		 1172mkdir_p = @mkdir_p@
1173oldincludedir = @oldincludedir@
1174pdfdir = @pdfdir@
1175prefix = @prefix@
1176program_transform_name = @program_transform_name@
1177psdir = @psdir@
1178sbindir = @sbindir@
1179sharedstatedir = @sharedstatedir@
36bb57e4 1180sim_bitsize = @sim_bitsize@
36bb57e4 1181sim_float = @sim_float@
6bddc3e8
MF		 1182srcdir = @srcdir@
1183subdirs = @subdirs@
1184sysconfdir = @sysconfdir@
1185target = @target@
1186target_alias = @target_alias@
1187target_cpu = @target_cpu@
1188target_os = @target_os@
1189target_vendor = @target_vendor@
1190top_build_prefix = @top_build_prefix@
1191top_builddir = @top_builddir@
1192top_srcdir = @top_srcdir@
6c57b87f 1193AUTOMAKE_OPTIONS = dejagnu foreign no-dist subdir-objects
c2783492 1194ACLOCAL_AMFLAGS = -Im4 -I.. -I../config
46a1e1f2 1195GNULIB_PARENT_DIR = ..
0a129eb1 1196srccom = $(srcdir)/common
6bddc3e8 1197srcroot = $(srcdir)/..
36bb57e4 1198SUBDIRS = @subdirs@ $(SIM_SUBDIRS)
d47ea1b9 1199AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \
3d042117
MF		 1200 $(am__append_3) $(am__append_12) $(am__append_21) \
1201 $(am__append_42) $(am__append_50) $(am__append_54) \
a449d2c2 1202 $(am__append_62) $(am__append_64)
fb2c495f 1203pkginclude_HEADERS = $(am__append_1)
d47ea1b9 1204noinst_LIBRARIES = $(SIM_COMMON_LIB) $(am__append_5)
015f7b74
MF		 1205CLEANFILES = common/version.c common/version.c-stamp \
1206 testsuite/common/bits-gen testsuite/common/bits32m0.c \
a389375f
MF		 1207 testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
1208 testsuite/common/bits64m63.c
c0c25232 1209DISTCLEANFILES =
f4ac2306
MF		 1210MOSTLYCLEANFILES = core $(common_HW_CONFIG_H_TARGETS) $(patsubst \
1211 %,%/stamp-hw,$(SIM_ENABLED_ARCHES)) $(am__append_7) \
1212 site-sim-config.exp testrun.log testrun.sum $(am__append_15) \
1213 $(am__append_19) $(am__append_24) $(am__append_28) \
1214 $(am__append_35) $(am__append_40) $(am__append_44) \
1215 $(am__append_48) $(am__append_52) $(am__append_57) \
a449d2c2
MF		 1216 $(am__append_66) $(am__append_71) $(am__append_80) \
1217 $(am__append_83)
47ce766a 1218AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS)
a1af8f40 1219AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \
bfc96c10
MF		 1220 $(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \
1221 -DSIM_COMMON_BUILD
1222AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \
1223 $(SIM_INLINE) -I$(srcdir)/common
fde7c6bf 1224COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
c2783492 1225LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
f4ac2306
MF		 1226SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \
1227 $(common_HW_CONFIG_H_TARGETS) $(am__append_4) $(am__append_14) \
1228 $(am__append_17) $(am__append_23) $(am__append_26) \
1229 $(am__append_34) $(am__append_39) $(am__append_43) \
1230 $(am__append_46) $(am__append_51) $(am__append_55) \
a449d2c2
MF		 1231 $(am__append_61) $(am__append_65) $(am__append_70) \
1232 $(am__append_78) $(am__append_82)
63bf33ff 1233SIM_INSTALL_DATA_LOCAL_DEPS =
3d042117
MF		 1234SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_30)
1235SIM_UNINSTALL_LOCAL_DEPS = $(am__append_31)
c0c25232 1236SIM_COMMON_LIB = common/libcommon.a
5bea0c32 1237common_libcommon_a_SOURCES = \
cd3ee89d 1238 common/callback.c \
ad9cc209 1239 common/portability.c \
dd8e16ea 1240 common/sim-load.c \
66882204 1241 common/syscall.c \
a7e40a99 1242 common/target-newlib-errno.c \
670817b9 1243 common/target-newlib-open.c \
88c8370b 1244 common/target-newlib-signal.c \
64ae70dd 1245 common/target-newlib-syscall.c \
5bea0c32
MF		 1246 common/version.c
1247
d47ea1b9
MF		 1248SIM_COMMON_HW_OBJS = \
1249 hw-alloc.o \
1250 hw-base.o \
1251 hw-device.o \
1252 hw-events.o \
1253 hw-handles.o \
1254 hw-instances.o \
1255 hw-ports.o \
1256 hw-properties.o \
1257 hw-tree.o \
1258 sim-hw.o
1259
1260SIM_NEW_COMMON_OBJS = sim-arange.o sim-bits.o sim-close.o \
1261 sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1262 sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1263 sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1264 sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1265 sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1266 sim-watch.o $(am__append_2)
1267SIM_HW_DEVICES = cfi core pal glue
f4ac2306 1268common_HW_CONFIG_H_TARGETS = $(patsubst %,%/hw-config.h,$(SIM_ENABLED_ARCHES))
c0c25232
MF		 1269LIBIBERTY_LIB = ../libiberty/libiberty.a
1270BFD_LIB = ../bfd/libbfd.la
1271OPCODES_LIB = ../opcodes/libopcodes.la
1272SIM_COMMON_LIBS = \
1273 $(SIM_COMMON_LIB) \
1274 $(BFD_LIB) \
1275 $(OPCODES_LIB) \
1276 $(LIBIBERTY_LIB) \
1277 $(LIBGNU) \
1278 $(LIBGNU_EXTRA_LIBS)
1279
d2a5dbc7
MF		 1280
1281# igen leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1282# leak detection while running it.
1283@SIM_ENABLE_IGEN_TRUE@IGEN = igen/igen$(EXEEXT)
1284@SIM_ENABLE_IGEN_TRUE@IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN)
b6b1c790
MF		 1285@SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES = \
1286@SIM_ENABLE_IGEN_TRUE@ igen/table.c \
1287@SIM_ENABLE_IGEN_TRUE@ igen/lf.c \
1288@SIM_ENABLE_IGEN_TRUE@ igen/misc.c \
1289@SIM_ENABLE_IGEN_TRUE@ igen/filter_host.c \
1290@SIM_ENABLE_IGEN_TRUE@ igen/ld-decode.c \
1291@SIM_ENABLE_IGEN_TRUE@ igen/ld-cache.c \
1292@SIM_ENABLE_IGEN_TRUE@ igen/filter.c \
1293@SIM_ENABLE_IGEN_TRUE@ igen/ld-insn.c \
1294@SIM_ENABLE_IGEN_TRUE@ igen/gen-model.c \
1295@SIM_ENABLE_IGEN_TRUE@ igen/gen-itable.c \
1296@SIM_ENABLE_IGEN_TRUE@ igen/gen-icache.c \
1297@SIM_ENABLE_IGEN_TRUE@ igen/gen-semantics.c \
1298@SIM_ENABLE_IGEN_TRUE@ igen/gen-idecode.c \
1299@SIM_ENABLE_IGEN_TRUE@ igen/gen-support.c \
1300@SIM_ENABLE_IGEN_TRUE@ igen/gen-engine.c \
1301@SIM_ENABLE_IGEN_TRUE@ igen/gen.c
1302
1303@SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES = igen/igen.c
1304@SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD = igen/libigen.a
1305@SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES =
1306@SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD = igen/filter-main.o igen/libigen.a
1307@SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES =
1308@SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD = igen/gen-main.o igen/libigen.a
1309@SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES =
1310@SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD = igen/ld-cache-main.o igen/libigen.a
1311@SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES =
1312@SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD = igen/ld-decode-main.o igen/libigen.a
1313@SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES =
1314@SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD = igen/ld-insn-main.o igen/libigen.a
1315@SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES =
1316@SIM_ENABLE_IGEN_TRUE@igen_table_LDADD = igen/table-main.o igen/libigen.a
1317@SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS = \
d2a5dbc7 1318@SIM_ENABLE_IGEN_TRUE@ $(IGEN) \
b6b1c790
MF		 1319@SIM_ENABLE_IGEN_TRUE@ igen/filter \
1320@SIM_ENABLE_IGEN_TRUE@ igen/gen \
1321@SIM_ENABLE_IGEN_TRUE@ igen/ld-cache \
1322@SIM_ENABLE_IGEN_TRUE@ igen/ld-decode \
1323@SIM_ENABLE_IGEN_TRUE@ igen/ld-insn \
1324@SIM_ENABLE_IGEN_TRUE@ igen/table
1325
e1e1ae6e 1326EXTRA_DEJAGNU_SITE_CONFIG = site-sim-config.exp
5ec501b5
MF		 1327
1328# Custom verbose test variables that automake doesn't provide (yet?).
1329AM_V_RUNTEST = $(AM_V_RUNTEST_@AM_V@)
1330AM_V_RUNTEST_ = $(AM_V_RUNTEST_@AM_DEFAULT_V@)
804de1fa 1331AM_V_RUNTEST_0 = @echo " RUNTEST $(RUNTESTFLAGS) $*";
5ec501b5 1332AM_V_RUNTEST_1 =
804de1fa
MF		 1333DO_RUNTEST = \
1334 LC_ALL=C; export LC_ALL; \
1335 EXPECT=${EXPECT} ; export EXPECT ; \
1336 runtest=$(RUNTEST); \
1337 $$runtest $(RUNTESTFLAGS)
1338
a389375f
MF		 1339testsuite_common_CPPFLAGS = \
1340 -I$(srcdir)/common \
0d315c88
DD		 1341 -I$(srcroot)/include \
1342 -I../bfd
a389375f 1343
c0c25232
MF		 1344@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES =
1345@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD = \
1346@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/nrun.o \
1347@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/libsim.a \
1348@SIM_ENABLE_ARCH_aarch64_TRUE@ $(SIM_COMMON_LIBS)
1349
1350@SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES =
1351@SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD = \
1352@SIM_ENABLE_ARCH_arm_TRUE@ arm/nrun.o \
1353@SIM_ENABLE_ARCH_arm_TRUE@ arm/libsim.a \
1354@SIM_ENABLE_ARCH_arm_TRUE@ $(SIM_COMMON_LIBS)
1355
ed939535
MF		 1356@SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm
1357@SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README
c0c25232
MF		 1358@SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES =
1359@SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD = \
1360@SIM_ENABLE_ARCH_avr_TRUE@ avr/nrun.o \
1361@SIM_ENABLE_ARCH_avr_TRUE@ avr/libsim.a \
1362@SIM_ENABLE_ARCH_avr_TRUE@ $(SIM_COMMON_LIBS)
1363
1364@SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES =
1365@SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD = \
1366@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/nrun.o \
1367@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/libsim.a \
1368@SIM_ENABLE_ARCH_bfin_TRUE@ $(SIM_COMMON_LIBS)
1369
3d042117
MF		 1370@SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES = \
1371@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_cec \
1372@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ctimer \
1373@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dma \
1374@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dmac \
1375@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_amc \
1376@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_ddrc \
1377@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_sdc \
1378@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_emac \
1379@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_eppi \
1380@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_evt \
1381@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio \
1382@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio2 \
1383@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gptimer \
1384@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_jtag \
1385@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_mmu \
1386@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_nfc \
1387@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_otp \
1388@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pfmon \
1389@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pint \
1390@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pll \
1391@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ppi \
1392@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_rtc \
1393@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_sic \
1394@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_spi \
1395@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_trace \
1396@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_twi \
1397@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart \
1398@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart2 \
1399@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wdog \
1400@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wp \
1401@SIM_ENABLE_ARCH_bfin_TRUE@ eth_phy
1402
c0c25232
MF		 1403@SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES =
1404@SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD = \
1405@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/nrun.o \
1406@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/libsim.a \
1407@SIM_ENABLE_ARCH_bpf_TRUE@ $(SIM_COMMON_LIBS)
1408
0a129eb1
MF		 1409@SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS = \
1410@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-le.h \
1411@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-le.c \
1412@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/stamp-mloop-le \
1413@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-be.h \
1414@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.c \
1415@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/stamp-mloop-be
1416
c0c25232
MF		 1417@SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES =
1418@SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD = \
1419@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/nrun.o \
1420@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/libsim.a \
1421@SIM_ENABLE_ARCH_cr16_TRUE@ $(SIM_COMMON_LIBS)
1422
70ab6bdd
MF		 1423@SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \
1424@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/gencode$(EXEEXT) \
1425@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/simops.h \
1426@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/table.c
1427
1428@SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c
1429@SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o
c0c25232
MF		 1430@SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES =
1431@SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD = \
1432@SIM_ENABLE_ARCH_cris_TRUE@ cris/nrun.o \
1433@SIM_ENABLE_ARCH_cris_TRUE@ cris/libsim.a \
1434@SIM_ENABLE_ARCH_cris_TRUE@ $(SIM_COMMON_LIBS)
1435
3d042117 1436@SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES = rv cris cris_900000xx
cb9bdc02
MF		 1437@SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES = cris/rvdummy.c
1438@SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD = $(LIBIBERTY_LIB)
0a129eb1
MF		 1439@SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \
1440@SIM_ENABLE_ARCH_cris_TRUE@ cris/engv10.h \
1441@SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv10f.c \
1442@SIM_ENABLE_ARCH_cris_TRUE@ cris/stamp-mloop-v10f \
1443@SIM_ENABLE_ARCH_cris_TRUE@ cris/engv32.h \
1444@SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.c \
1445@SIM_ENABLE_ARCH_cris_TRUE@ cris/stamp-mloop-v32f
1446
c0c25232
MF		 1447@SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES =
1448@SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD = \
1449@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/nrun.o \
1450@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/libsim.a \
1451@SIM_ENABLE_ARCH_d10v_TRUE@ $(SIM_COMMON_LIBS)
1452
70ab6bdd
MF		 1453@SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \
1454@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/gencode$(EXEEXT) \
1455@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/simops.h \
1456@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/table.c
1457
1458@SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c
1459@SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o
c0c25232
MF		 1460@SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES =
1461@SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD = \
1462@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/sis.o \
1463@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/libsim.a \
1464@SIM_ENABLE_ARCH_erc32_TRUE@ $(SIM_COMMON_LIBS) $(READLINE_LIB) $(TERMCAP_LIB)
1465
ed939535
MF		 1466@SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir = $(docdir)/erc32
1467@SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA = erc32/README.erc32 erc32/README.gdb erc32/README.sis
c0c25232
MF		 1468@SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES =
1469@SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD = \
1470@SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \
1471@SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \
1472@SIM_ENABLE_ARCH_examples_TRUE@ $(SIM_COMMON_LIBS)
1473
1474@SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES =
1475@SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD = \
1476@SIM_ENABLE_ARCH_frv_TRUE@ frv/nrun.o \
1477@SIM_ENABLE_ARCH_frv_TRUE@ frv/libsim.a \
1478@SIM_ENABLE_ARCH_frv_TRUE@ $(SIM_COMMON_LIBS)
1479
ed939535
MF		 1480@SIM_ENABLE_ARCH_frv_TRUE@frvdocdir = $(docdir)/frv
1481@SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA = frv/README
0a129eb1
MF		 1482@SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \
1483@SIM_ENABLE_ARCH_frv_TRUE@ frv/eng.h \
1484@SIM_ENABLE_ARCH_frv_TRUE@ frv/mloop.c \
1485@SIM_ENABLE_ARCH_frv_TRUE@ frv/stamp-mloop
1486
c0c25232
MF		 1487@SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES =
1488@SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD = \
1489@SIM_ENABLE_ARCH_ft32_TRUE@ ft32/nrun.o \
1490@SIM_ENABLE_ARCH_ft32_TRUE@ ft32/libsim.a \
1491@SIM_ENABLE_ARCH_ft32_TRUE@ $(SIM_COMMON_LIBS)
1492
1493@SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES =
1494@SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD = \
1495@SIM_ENABLE_ARCH_h8300_TRUE@ h8300/nrun.o \
1496@SIM_ENABLE_ARCH_h8300_TRUE@ h8300/libsim.a \
1497@SIM_ENABLE_ARCH_h8300_TRUE@ $(SIM_COMMON_LIBS)
1498
1499@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES =
1500@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD = \
1501@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/nrun.o \
1502@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/libsim.a \
1503@SIM_ENABLE_ARCH_iq2000_TRUE@ $(SIM_COMMON_LIBS)
1504
0a129eb1
MF		 1505@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \
1506@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/eng.h \
1507@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.c \
1508@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/stamp-mloop
1509
c0c25232
MF		 1510@SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES =
1511@SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD = \
1512@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/nrun.o \
1513@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/libsim.a \
1514@SIM_ENABLE_ARCH_lm32_TRUE@ $(SIM_COMMON_LIBS)
1515
3d042117 1516@SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES = lm32cpu lm32timer lm32uart
0a129eb1
MF		 1517@SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \
1518@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/eng.h \
1519@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.c \
1520@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/stamp-mloop
1521
c0c25232
MF		 1522@SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES =
1523@SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD = \
1524@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/main.o \
1525@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/libsim.a \
1526@SIM_ENABLE_ARCH_m32c_TRUE@ $(SIM_COMMON_LIBS)
1527
70ab6bdd
MF		 1528@SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \
1529@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/opc2c$(EXEEXT) \
1530@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c \
1531@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c
1532
1533@SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES = m32c/opc2c.c
1534
1535# opc2c leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1536# leak detection while running it.
1537@SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT)
c0c25232
MF		 1538@SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES =
1539@SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD = \
1540@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/nrun.o \
1541@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/libsim.a \
1542@SIM_ENABLE_ARCH_m32r_TRUE@ $(SIM_COMMON_LIBS)
1543
3d042117 1544@SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart
0a129eb1
MF		 1545@SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \
1546@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng.h \
1547@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop.c \
1548@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop \
1549@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/engx.h \
1550@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloopx.c \
1551@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop-x \
1552@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng2.h \
1553@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop2.c \
1554@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop-2
1555
c0c25232
MF		 1556@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES =
1557@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD = \
1558@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/nrun.o \
1559@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/libsim.a \
1560@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(SIM_COMMON_LIBS)
1561
3d042117 1562@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES = m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
70ab6bdd
MF		 1563@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \
1564@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/gencode$(EXEEXT) \
1565@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.c \
1566@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.c
1567
1568@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES = m68hc11/gencode.c
c0c25232
MF		 1569@SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES =
1570@SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD = \
1571@SIM_ENABLE_ARCH_mcore_TRUE@ mcore/nrun.o \
1572@SIM_ENABLE_ARCH_mcore_TRUE@ mcore/libsim.a \
1573@SIM_ENABLE_ARCH_mcore_TRUE@ $(SIM_COMMON_LIBS)
1574
1575@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES =
1576@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD = \
1577@SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/nrun.o \
1578@SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/libsim.a \
1579@SIM_ENABLE_ARCH_microblaze_TRUE@ $(SIM_COMMON_LIBS)
1580
1581@SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES =
1582@SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD = \
1583@SIM_ENABLE_ARCH_mips_TRUE@ mips/nrun.o \
1584@SIM_ENABLE_ARCH_mips_TRUE@ mips/libsim.a \
1585@SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_COMMON_LIBS)
1586
3d042117 1587@SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio
c0c25232
MF		 1588@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES =
1589@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
1590@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/nrun.o \
1591@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/libsim.a \
1592@SIM_ENABLE_ARCH_mn10300_TRUE@ $(SIM_COMMON_LIBS)
1593
3d042117 1594@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES = mn103cpu mn103int mn103tim mn103ser mn103iop
d2a5dbc7
MF		 1595@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN = \
1596@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \
1597@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.c \
1598@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \
1599@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.c \
1600@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \
1601@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.c \
1602@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.h \
1603@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.c \
1604@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.h \
1605@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.c \
1606@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \
1607@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.c \
1608@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h \
1609@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.c \
1610@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/irun.c
1611
1612@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS = \
1613@SIM_ENABLE_ARCH_mn10300_TRUE@ $(mn10300_BUILT_SRC_FROM_IGEN) \
1614@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/stamp-igen
1615
1616@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
1617@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen
1618@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen
1619@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc
c0c25232
MF		 1620@SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES =
1621@SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD = \
1622@SIM_ENABLE_ARCH_moxie_TRUE@ moxie/nrun.o \
1623@SIM_ENABLE_ARCH_moxie_TRUE@ moxie/libsim.a \
1624@SIM_ENABLE_ARCH_moxie_TRUE@ $(SIM_COMMON_LIBS)
1625
94f5dfed
MF		 1626@SIM_ENABLE_ARCH_moxie_TRUE@dtbdir = $(datadir)/gdb/dtb
1627@SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA = moxie/moxie-gdb.dtb
c0c25232
MF		 1628@SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES =
1629@SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD = \
1630@SIM_ENABLE_ARCH_msp430_TRUE@ msp430/nrun.o \
1631@SIM_ENABLE_ARCH_msp430_TRUE@ msp430/libsim.a \
1632@SIM_ENABLE_ARCH_msp430_TRUE@ $(SIM_COMMON_LIBS)
1633
1634@SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES =
1635@SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD = \
1636@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/nrun.o \
1637@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/libsim.a \
1638@SIM_ENABLE_ARCH_or1k_TRUE@ $(SIM_COMMON_LIBS)
1639
ed939535
MF		 1640@SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir = $(docdir)/or1k
1641@SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA = or1k/README
0a129eb1
MF		 1642@SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \
1643@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/eng.h \
1644@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/mloop.c \
1645@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/stamp-mloop
1646
c0c25232
MF		 1647@SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES =
1648@SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD = \
1649@SIM_ENABLE_ARCH_ppc_TRUE@ ppc/main.o \
1650@SIM_ENABLE_ARCH_ppc_TRUE@ ppc/libsim.a \
1651@SIM_ENABLE_ARCH_ppc_TRUE@ $(SIM_COMMON_LIBS)
1652
ed939535
MF		 1653@SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir = $(docdir)/ppc
1654@SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA = ppc/BUGS ppc/INSTALL ppc/README ppc/RUN
c0c25232
MF		 1655@SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES =
1656@SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD = \
1657@SIM_ENABLE_ARCH_pru_TRUE@ pru/nrun.o \
1658@SIM_ENABLE_ARCH_pru_TRUE@ pru/libsim.a \
1659@SIM_ENABLE_ARCH_pru_TRUE@ $(SIM_COMMON_LIBS)
1660
1661@SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES =
1662@SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD = \
1663@SIM_ENABLE_ARCH_riscv_TRUE@ riscv/nrun.o \
1664@SIM_ENABLE_ARCH_riscv_TRUE@ riscv/libsim.a \
1665@SIM_ENABLE_ARCH_riscv_TRUE@ $(SIM_COMMON_LIBS)
1666
1667@SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES =
1668@SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD = \
1669@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/main.o \
1670@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/libsim.a \
1671@SIM_ENABLE_ARCH_rl78_TRUE@ $(SIM_COMMON_LIBS)
1672
1673@SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES =
1674@SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD = \
1675@SIM_ENABLE_ARCH_rx_TRUE@ rx/main.o \
1676@SIM_ENABLE_ARCH_rx_TRUE@ rx/libsim.a \
1677@SIM_ENABLE_ARCH_rx_TRUE@ $(SIM_COMMON_LIBS)
1678
ed939535
MF		 1679@SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx
1680@SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt
c0c25232
MF		 1681@SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES =
1682@SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD = \
1683@SIM_ENABLE_ARCH_sh_TRUE@ sh/nrun.o \
1684@SIM_ENABLE_ARCH_sh_TRUE@ sh/libsim.a \
1685@SIM_ENABLE_ARCH_sh_TRUE@ $(SIM_COMMON_LIBS)
1686
70ab6bdd
MF		 1687@SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \
1688@SIM_ENABLE_ARCH_sh_TRUE@ sh/gencode$(EXEEXT) \
1689@SIM_ENABLE_ARCH_sh_TRUE@ sh/code.c \
1690@SIM_ENABLE_ARCH_sh_TRUE@ sh/ppi.c \
1691@SIM_ENABLE_ARCH_sh_TRUE@ sh/table.c
1692
1693@SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c
c0c25232
MF		 1694@SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES =
1695@SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD = \
1696@SIM_ENABLE_ARCH_v850_TRUE@ v850/nrun.o \
1697@SIM_ENABLE_ARCH_v850_TRUE@ v850/libsim.a \
1698@SIM_ENABLE_ARCH_v850_TRUE@ $(SIM_COMMON_LIBS)
1699
d2a5dbc7
MF		 1700@SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN = \
1701@SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \
1702@SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.c \
1703@SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \
1704@SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.c \
1705@SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \
1706@SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.c \
1707@SIM_ENABLE_ARCH_v850_TRUE@ v850/model.h \
1708@SIM_ENABLE_ARCH_v850_TRUE@ v850/model.c \
1709@SIM_ENABLE_ARCH_v850_TRUE@ v850/support.h \
1710@SIM_ENABLE_ARCH_v850_TRUE@ v850/support.c \
1711@SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \
1712@SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.c \
1713@SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h \
1714@SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.c \
1715@SIM_ENABLE_ARCH_v850_TRUE@ v850/irun.c
1716
1717@SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS = \
1718@SIM_ENABLE_ARCH_v850_TRUE@ $(v850_BUILT_SRC_FROM_IGEN) \
1719@SIM_ENABLE_ARCH_v850_TRUE@ v850/stamp-igen
1720
1721@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
1722@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen
897fc27b 1723@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc
b15c5d7a
MF		 1724all: config.h
1725 $(MAKE) $(AM_MAKEFLAGS) all-recursive
6bddc3e8
MF		 1726
1727.SUFFIXES:
b5689863 1728.SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs
6bddc3e8
MF		 1729am--refresh: Makefile
1730 @:
c0c25232 1731$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps)
6bddc3e8
MF		 1732 @for dep in $?; do \
1733 case '$(am__configure_deps)' in \
1734 *$$dep*) \
1735 echo ' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
1736 $(am__cd) $(srcdir) && $(AUTOMAKE) --foreign \
1737 && exit 0; \
1738 exit 1;; \
1739 esac; \
1740 done; \
1741 echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
1742 $(am__cd) $(top_srcdir) && \
1743 $(AUTOMAKE) --foreign Makefile
1744Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
1745 @case '$?' in \
1746 *config.status*) \
1747 echo ' $(SHELL) ./config.status'; \
1748 $(SHELL) ./config.status;; \
1749 *) \
1750 echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
1751 cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
1752 esac;
c0c25232 1753$(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty):
6bddc3e8
MF		 1754
1755$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
1756 $(SHELL) ./config.status --recheck
c906108c 1757
8c379db2 1758$(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
6bddc3e8 1759 $(am__cd) $(srcdir) && $(AUTOCONF)
8c379db2 1760$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
6bddc3e8
MF		 1761 $(am__cd) $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS)
1762$(am__aclocal_m4_deps):
6bddc3e8 1763
b15c5d7a
MF		 1764config.h: stamp-h1
1765 @test -f $@ || rm -f stamp-h1
1766 @test -f $@ || $(MAKE) $(AM_MAKEFLAGS) stamp-h1
1767
1768stamp-h1: $(srcdir)/config.h.in $(top_builddir)/config.status
1769 @rm -f stamp-h1
1770 cd $(top_builddir) && $(SHELL) ./config.status config.h
1771$(srcdir)/config.h.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
1772 ($(am__cd) $(top_srcdir) && $(AUTOHEADER))
1773 rm -f stamp-h1
1774 touch $@
1775
1776distclean-hdr:
1777 -rm -f config.h stamp-h1
36bb57e4
MF		 1778Make-common.sim: $(top_builddir)/config.status $(top_srcdir)/common/Make-common.in
1779 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 1780aarch64/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/aarch64/Makefile.in
1781 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 1782aarch64/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1783 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1784arm/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/arm/Makefile.in
36bb57e4 1785 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 1786arm/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1787 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1788avr/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/avr/Makefile.in
36bb57e4 1789 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 1790avr/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1791 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1792bfin/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bfin/Makefile.in
36bb57e4 1793 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 1794bfin/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1795 cd $(top_builddir) && $(SHELL) ./config.status $@
ee79c7df
MF		 1796bpf/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bpf/Makefile.in
1797 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 1798bpf/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1799 cd $(top_builddir) && $(SHELL) ./config.status $@
1800cr16/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cr16/Makefile.in
d8b04da7 1801 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 1802cr16/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1803 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1804cris/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cris/Makefile.in
36bb57e4 1805 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 1806cris/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1807 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1808d10v/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/d10v/Makefile.in
408a44aa 1809 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 1810d10v/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1811 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1812frv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/frv/Makefile.in
36bb57e4 1813 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 1814frv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1815 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1816ft32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/ft32/Makefile.in
408a44aa 1817 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 1818ft32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1819 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1820h8300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/h8300/Makefile.in
36bb57e4 1821 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 1822h8300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1823 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1824iq2000/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/iq2000/Makefile.in
36bb57e4 1825 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 1826iq2000/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1827 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1828lm32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/lm32/Makefile.in
408a44aa 1829 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 1830lm32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1831 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1832m32c/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32c/Makefile.in
408a44aa 1833 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 1834m32c/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1835 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1836m32r/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32r/Makefile.in
36bb57e4 1837 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 1838m32r/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1839 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1840m68hc11/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m68hc11/Makefile.in
313c332f 1841 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 1842m68hc11/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1843 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1844mcore/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mcore/Makefile.in
36bb57e4 1845 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 1846mcore/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1847 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1848microblaze/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/microblaze/Makefile.in
36bb57e4 1849 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 1850microblaze/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1851 cd $(top_builddir) && $(SHELL) ./config.status $@
abc494c6
MF		 1852mips/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mips/Makefile.in
1853 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1854mips/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
36bb57e4 1855 cd $(top_builddir) && $(SHELL) ./config.status $@
4cf83930
MF		 1856mn10300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mn10300/Makefile.in
1857 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1858mn10300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 1859 cd $(top_builddir) && $(SHELL) ./config.status $@
36bb57e4
MF		 1860moxie/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/moxie/Makefile.in
1861 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1862moxie/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 1863 cd $(top_builddir) && $(SHELL) ./config.status $@
36bb57e4
MF		 1864msp430/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/msp430/Makefile.in
1865 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 1866msp430/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1867 cd $(top_builddir) && $(SHELL) ./config.status $@
763b20ab
MF		 1868or1k/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/or1k/Makefile.in
1869 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 1870or1k/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1871 cd $(top_builddir) && $(SHELL) ./config.status $@
1872ppc/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 1873 cd $(top_builddir) && $(SHELL) ./config.status $@
36bb57e4
MF		 1874pru/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/pru/Makefile.in
1875 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 1876pru/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1877 cd $(top_builddir) && $(SHELL) ./config.status $@
1787fcc4
MF		 1878riscv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/riscv/Makefile.in
1879 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1880riscv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 1881 cd $(top_builddir) && $(SHELL) ./config.status $@
36bb57e4
MF		 1882rl78/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rl78/Makefile.in
1883 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1884rl78/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 1885 cd $(top_builddir) && $(SHELL) ./config.status $@
e173c80f
MF		 1886rx/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rx/Makefile.in
1887 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1888rx/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 1889 cd $(top_builddir) && $(SHELL) ./config.status $@
36bb57e4
MF		 1890sh/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/sh/Makefile.in
1891 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1892sh/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 1893 cd $(top_builddir) && $(SHELL) ./config.status $@
5d0b3088
MF		 1894erc32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/erc32/Makefile.in
1895 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 1896erc32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1897 cd $(top_builddir) && $(SHELL) ./config.status $@
871aa3b9
MF		 1898v850/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/v850/Makefile.in
1899 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 1900v850/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 1901 cd $(top_builddir) && $(SHELL) ./config.status $@
36bb57e4
MF		 1902example-synacor/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/example-synacor/Makefile.in
1903 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 1904example-synacor/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
1905 cd $(top_builddir) && $(SHELL) ./config.status $@
3f8414df
MF		 1906arch-subdir.mk: $(top_builddir)/config.status $(srcdir)/arch-subdir.mk.in
1907 cd $(top_builddir) && $(SHELL) ./config.status $@
21672298
MF		 1908.gdbinit: $(top_builddir)/config.status $(srcdir)/gdbinit.in
1909 cd $(top_builddir) && $(SHELL) ./config.status $@
b15c5d7a 1910
b6b1c790
MF		 1911clean-noinstLIBRARIES:
1912 -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES)
5bea0c32
MF		 1913common/$(am__dirstamp):
1914 @$(MKDIR_P) common
1915 @: > common/$(am__dirstamp)
1916common/$(DEPDIR)/$(am__dirstamp):
1917 @$(MKDIR_P) common/$(DEPDIR)
1918 @: > common/$(DEPDIR)/$(am__dirstamp)
a1af8f40
MF		 1919common/callback.$(OBJEXT): common/$(am__dirstamp) \
1920 common/$(DEPDIR)/$(am__dirstamp)
1921common/portability.$(OBJEXT): common/$(am__dirstamp) \
1922 common/$(DEPDIR)/$(am__dirstamp)
1923common/sim-load.$(OBJEXT): common/$(am__dirstamp) \
1924 common/$(DEPDIR)/$(am__dirstamp)
1925common/syscall.$(OBJEXT): common/$(am__dirstamp) \
1926 common/$(DEPDIR)/$(am__dirstamp)
1927common/target-newlib-errno.$(OBJEXT): common/$(am__dirstamp) \
cd3ee89d 1928 common/$(DEPDIR)/$(am__dirstamp)
a1af8f40 1929common/target-newlib-open.$(OBJEXT): common/$(am__dirstamp) \
dd8e16ea 1930 common/$(DEPDIR)/$(am__dirstamp)
a1af8f40 1931common/target-newlib-signal.$(OBJEXT): common/$(am__dirstamp) \
66882204 1932 common/$(DEPDIR)/$(am__dirstamp)
a1af8f40
MF		 1933common/target-newlib-syscall.$(OBJEXT): common/$(am__dirstamp) \
1934 common/$(DEPDIR)/$(am__dirstamp)
1935common/version.$(OBJEXT): common/$(am__dirstamp) \
5bea0c32
MF		 1936 common/$(DEPDIR)/$(am__dirstamp)
1937
1938common/libcommon.a: $(common_libcommon_a_OBJECTS) $(common_libcommon_a_DEPENDENCIES) $(EXTRA_common_libcommon_a_DEPENDENCIES) common/$(am__dirstamp)
1939 $(AM_V_at)-rm -f common/libcommon.a
1940 $(AM_V_AR)$(common_libcommon_a_AR) common/libcommon.a $(common_libcommon_a_OBJECTS) $(common_libcommon_a_LIBADD)
1941 $(AM_V_at)$(RANLIB) common/libcommon.a
b6b1c790
MF		 1942igen/$(am__dirstamp):
1943 @$(MKDIR_P) igen
1944 @: > igen/$(am__dirstamp)
1945igen/$(DEPDIR)/$(am__dirstamp):
1946 @$(MKDIR_P) igen/$(DEPDIR)
1947 @: > igen/$(DEPDIR)/$(am__dirstamp)
1948igen/table.$(OBJEXT): igen/$(am__dirstamp) \
1949 igen/$(DEPDIR)/$(am__dirstamp)
1950igen/lf.$(OBJEXT): igen/$(am__dirstamp) igen/$(DEPDIR)/$(am__dirstamp)
1951igen/misc.$(OBJEXT): igen/$(am__dirstamp) \
1952 igen/$(DEPDIR)/$(am__dirstamp)
1953igen/filter_host.$(OBJEXT): igen/$(am__dirstamp) \
1954 igen/$(DEPDIR)/$(am__dirstamp)
1955igen/ld-decode.$(OBJEXT): igen/$(am__dirstamp) \
1956 igen/$(DEPDIR)/$(am__dirstamp)
1957igen/ld-cache.$(OBJEXT): igen/$(am__dirstamp) \
1958 igen/$(DEPDIR)/$(am__dirstamp)
1959igen/filter.$(OBJEXT): igen/$(am__dirstamp) \
1960 igen/$(DEPDIR)/$(am__dirstamp)
1961igen/ld-insn.$(OBJEXT): igen/$(am__dirstamp) \
1962 igen/$(DEPDIR)/$(am__dirstamp)
1963igen/gen-model.$(OBJEXT): igen/$(am__dirstamp) \
1964 igen/$(DEPDIR)/$(am__dirstamp)
1965igen/gen-itable.$(OBJEXT): igen/$(am__dirstamp) \
1966 igen/$(DEPDIR)/$(am__dirstamp)
1967igen/gen-icache.$(OBJEXT): igen/$(am__dirstamp) \
1968 igen/$(DEPDIR)/$(am__dirstamp)
1969igen/gen-semantics.$(OBJEXT): igen/$(am__dirstamp) \
1970 igen/$(DEPDIR)/$(am__dirstamp)
1971igen/gen-idecode.$(OBJEXT): igen/$(am__dirstamp) \
1972 igen/$(DEPDIR)/$(am__dirstamp)
1973igen/gen-support.$(OBJEXT): igen/$(am__dirstamp) \
1974 igen/$(DEPDIR)/$(am__dirstamp)
1975igen/gen-engine.$(OBJEXT): igen/$(am__dirstamp) \
1976 igen/$(DEPDIR)/$(am__dirstamp)
1977igen/gen.$(OBJEXT): igen/$(am__dirstamp) \
1978 igen/$(DEPDIR)/$(am__dirstamp)
1979
aa0fca16
MF		 1980@SIM_ENABLE_IGEN_FALSE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
1981@SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)-rm -f igen/libigen.a
1982@SIM_ENABLE_IGEN_FALSE@ $(AM_V_AR)$(igen_libigen_a_AR) igen/libigen.a $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
1983@SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)$(RANLIB) igen/libigen.a
b6b1c790 1984
a389375f 1985clean-checkPROGRAMS:
b5689863
MF		 1986 @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \
1987 echo " rm -f" $$list; \
1988 rm -f $$list || exit $$?; \
1989 test -n "$(EXEEXT)" || exit 0; \
1990 list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
1991 echo " rm -f" $$list; \
1992 rm -f $$list
c0c25232
MF		 1993
1994clean-noinstPROGRAMS:
1995 @list='$(noinst_PROGRAMS)'; test -n "$$list" || exit 0; \
1996 echo " rm -f" $$list; \
1997 rm -f $$list || exit $$?; \
1998 test -n "$(EXEEXT)" || exit 0; \
1999 list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
2000 echo " rm -f" $$list; \
2001 rm -f $$list
2002aarch64/$(am__dirstamp):
2003 @$(MKDIR_P) aarch64
2004 @: > aarch64/$(am__dirstamp)
2005
2006aarch64/run$(EXEEXT): $(aarch64_run_OBJECTS) $(aarch64_run_DEPENDENCIES) $(EXTRA_aarch64_run_DEPENDENCIES) aarch64/$(am__dirstamp)
2007 @rm -f aarch64/run$(EXEEXT)
2008 $(AM_V_CCLD)$(LINK) $(aarch64_run_OBJECTS) $(aarch64_run_LDADD) $(LIBS)
2009arm/$(am__dirstamp):
2010 @$(MKDIR_P) arm
2011 @: > arm/$(am__dirstamp)
2012
2013arm/run$(EXEEXT): $(arm_run_OBJECTS) $(arm_run_DEPENDENCIES) $(EXTRA_arm_run_DEPENDENCIES) arm/$(am__dirstamp)
2014 @rm -f arm/run$(EXEEXT)
2015 $(AM_V_CCLD)$(LINK) $(arm_run_OBJECTS) $(arm_run_LDADD) $(LIBS)
2016avr/$(am__dirstamp):
2017 @$(MKDIR_P) avr
2018 @: > avr/$(am__dirstamp)
2019
2020avr/run$(EXEEXT): $(avr_run_OBJECTS) $(avr_run_DEPENDENCIES) $(EXTRA_avr_run_DEPENDENCIES) avr/$(am__dirstamp)
2021 @rm -f avr/run$(EXEEXT)
2022 $(AM_V_CCLD)$(LINK) $(avr_run_OBJECTS) $(avr_run_LDADD) $(LIBS)
2023bfin/$(am__dirstamp):
2024 @$(MKDIR_P) bfin
2025 @: > bfin/$(am__dirstamp)
2026
2027bfin/run$(EXEEXT): $(bfin_run_OBJECTS) $(bfin_run_DEPENDENCIES) $(EXTRA_bfin_run_DEPENDENCIES) bfin/$(am__dirstamp)
2028 @rm -f bfin/run$(EXEEXT)
2029 $(AM_V_CCLD)$(LINK) $(bfin_run_OBJECTS) $(bfin_run_LDADD) $(LIBS)
2030bpf/$(am__dirstamp):
2031 @$(MKDIR_P) bpf
2032 @: > bpf/$(am__dirstamp)
2033
2034bpf/run$(EXEEXT): $(bpf_run_OBJECTS) $(bpf_run_DEPENDENCIES) $(EXTRA_bpf_run_DEPENDENCIES) bpf/$(am__dirstamp)
2035 @rm -f bpf/run$(EXEEXT)
2036 $(AM_V_CCLD)$(LINK) $(bpf_run_OBJECTS) $(bpf_run_LDADD) $(LIBS)
70ab6bdd
MF		 2037cr16/$(am__dirstamp):
2038 @$(MKDIR_P) cr16
2039 @: > cr16/$(am__dirstamp)
2040cr16/$(DEPDIR)/$(am__dirstamp):
2041 @$(MKDIR_P) cr16/$(DEPDIR)
2042 @: > cr16/$(DEPDIR)/$(am__dirstamp)
2043cr16/gencode.$(OBJEXT): cr16/$(am__dirstamp) \
2044 cr16/$(DEPDIR)/$(am__dirstamp)
2045
2046@SIM_ENABLE_ARCH_cr16_FALSE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) $(EXTRA_cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
2047@SIM_ENABLE_ARCH_cr16_FALSE@ @rm -f cr16/gencode$(EXEEXT)
2048@SIM_ENABLE_ARCH_cr16_FALSE@ $(AM_V_CCLD)$(LINK) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD) $(LIBS)
c0c25232
MF		 2049
2050cr16/run$(EXEEXT): $(cr16_run_OBJECTS) $(cr16_run_DEPENDENCIES) $(EXTRA_cr16_run_DEPENDENCIES) cr16/$(am__dirstamp)
2051 @rm -f cr16/run$(EXEEXT)
2052 $(AM_V_CCLD)$(LINK) $(cr16_run_OBJECTS) $(cr16_run_LDADD) $(LIBS)
cb9bdc02
MF		 2053cris/$(am__dirstamp):
2054 @$(MKDIR_P) cris
2055 @: > cris/$(am__dirstamp)
c0c25232
MF		 2056
2057cris/run$(EXEEXT): $(cris_run_OBJECTS) $(cris_run_DEPENDENCIES) $(EXTRA_cris_run_DEPENDENCIES) cris/$(am__dirstamp)
2058 @rm -f cris/run$(EXEEXT)
2059 $(AM_V_CCLD)$(LINK) $(cris_run_OBJECTS) $(cris_run_LDADD) $(LIBS)
cb9bdc02
MF		 2060cris/$(DEPDIR)/$(am__dirstamp):
2061 @$(MKDIR_P) cris/$(DEPDIR)
2062 @: > cris/$(DEPDIR)/$(am__dirstamp)
2063cris/rvdummy.$(OBJEXT): cris/$(am__dirstamp) \
2064 cris/$(DEPDIR)/$(am__dirstamp)
2065
2066cris/rvdummy$(EXEEXT): $(cris_rvdummy_OBJECTS) $(cris_rvdummy_DEPENDENCIES) $(EXTRA_cris_rvdummy_DEPENDENCIES) cris/$(am__dirstamp)
2067 @rm -f cris/rvdummy$(EXEEXT)
2068 $(AM_V_CCLD)$(LINK) $(cris_rvdummy_OBJECTS) $(cris_rvdummy_LDADD) $(LIBS)
70ab6bdd
MF		 2069d10v/$(am__dirstamp):
2070 @$(MKDIR_P) d10v
2071 @: > d10v/$(am__dirstamp)
2072d10v/$(DEPDIR)/$(am__dirstamp):
2073 @$(MKDIR_P) d10v/$(DEPDIR)
2074 @: > d10v/$(DEPDIR)/$(am__dirstamp)
2075d10v/gencode.$(OBJEXT): d10v/$(am__dirstamp) \
2076 d10v/$(DEPDIR)/$(am__dirstamp)
2077
2078@SIM_ENABLE_ARCH_d10v_FALSE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) $(EXTRA_d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
2079@SIM_ENABLE_ARCH_d10v_FALSE@ @rm -f d10v/gencode$(EXEEXT)
2080@SIM_ENABLE_ARCH_d10v_FALSE@ $(AM_V_CCLD)$(LINK) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD) $(LIBS)
a389375f 2081
c0c25232
MF		 2082d10v/run$(EXEEXT): $(d10v_run_OBJECTS) $(d10v_run_DEPENDENCIES) $(EXTRA_d10v_run_DEPENDENCIES) d10v/$(am__dirstamp)
2083 @rm -f d10v/run$(EXEEXT)
2084 $(AM_V_CCLD)$(LINK) $(d10v_run_OBJECTS) $(d10v_run_LDADD) $(LIBS)
2085erc32/$(am__dirstamp):
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2088
2089erc32/run$(EXEEXT): $(erc32_run_OBJECTS) $(erc32_run_DEPENDENCIES) $(EXTRA_erc32_run_DEPENDENCIES) erc32/$(am__dirstamp)
2090 @rm -f erc32/run$(EXEEXT)
2091 $(AM_V_CCLD)$(LINK) $(erc32_run_OBJECTS) $(erc32_run_LDADD) $(LIBS)
2092erc32/$(DEPDIR)/$(am__dirstamp):
2093 @$(MKDIR_P) erc32/$(DEPDIR)
2094 @: > erc32/$(DEPDIR)/$(am__dirstamp)
2095erc32/sis.$(OBJEXT): erc32/$(am__dirstamp) \
2096 erc32/$(DEPDIR)/$(am__dirstamp)
2097
2098@SIM_ENABLE_ARCH_erc32_FALSE@erc32/sis$(EXEEXT): $(erc32_sis_OBJECTS) $(erc32_sis_DEPENDENCIES) $(EXTRA_erc32_sis_DEPENDENCIES) erc32/$(am__dirstamp)
2099@SIM_ENABLE_ARCH_erc32_FALSE@ @rm -f erc32/sis$(EXEEXT)
2100@SIM_ENABLE_ARCH_erc32_FALSE@ $(AM_V_CCLD)$(LINK) $(erc32_sis_OBJECTS) $(erc32_sis_LDADD) $(LIBS)
2101example-synacor/$(am__dirstamp):
2102 @$(MKDIR_P) example-synacor
2103 @: > example-synacor/$(am__dirstamp)
2104
2105example-synacor/run$(EXEEXT): $(example_synacor_run_OBJECTS) $(example_synacor_run_DEPENDENCIES) $(EXTRA_example_synacor_run_DEPENDENCIES) example-synacor/$(am__dirstamp)
2106 @rm -f example-synacor/run$(EXEEXT)
2107 $(AM_V_CCLD)$(LINK) $(example_synacor_run_OBJECTS) $(example_synacor_run_LDADD) $(LIBS)
2108frv/$(am__dirstamp):
2109 @$(MKDIR_P) frv
2110 @: > frv/$(am__dirstamp)
2111
2112frv/run$(EXEEXT): $(frv_run_OBJECTS) $(frv_run_DEPENDENCIES) $(EXTRA_frv_run_DEPENDENCIES) frv/$(am__dirstamp)
2113 @rm -f frv/run$(EXEEXT)
2114 $(AM_V_CCLD)$(LINK) $(frv_run_OBJECTS) $(frv_run_LDADD) $(LIBS)
2115ft32/$(am__dirstamp):
2116 @$(MKDIR_P) ft32
2117 @: > ft32/$(am__dirstamp)
2118
2119ft32/run$(EXEEXT): $(ft32_run_OBJECTS) $(ft32_run_DEPENDENCIES) $(EXTRA_ft32_run_DEPENDENCIES) ft32/$(am__dirstamp)
2120 @rm -f ft32/run$(EXEEXT)
2121 $(AM_V_CCLD)$(LINK) $(ft32_run_OBJECTS) $(ft32_run_LDADD) $(LIBS)
2122h8300/$(am__dirstamp):
2123 @$(MKDIR_P) h8300
2124 @: > h8300/$(am__dirstamp)
2125
2126h8300/run$(EXEEXT): $(h8300_run_OBJECTS) $(h8300_run_DEPENDENCIES) $(EXTRA_h8300_run_DEPENDENCIES) h8300/$(am__dirstamp)
2127 @rm -f h8300/run$(EXEEXT)
2128 $(AM_V_CCLD)$(LINK) $(h8300_run_OBJECTS) $(h8300_run_LDADD) $(LIBS)
2129
b6b1c790
MF		 2130igen/filter$(EXEEXT): $(igen_filter_OBJECTS) $(igen_filter_DEPENDENCIES) $(EXTRA_igen_filter_DEPENDENCIES) igen/$(am__dirstamp)
2131 @rm -f igen/filter$(EXEEXT)
2132 $(AM_V_CCLD)$(LINK) $(igen_filter_OBJECTS) $(igen_filter_LDADD) $(LIBS)
2133
2134igen/gen$(EXEEXT): $(igen_gen_OBJECTS) $(igen_gen_DEPENDENCIES) $(EXTRA_igen_gen_DEPENDENCIES) igen/$(am__dirstamp)
2135 @rm -f igen/gen$(EXEEXT)
2136 $(AM_V_CCLD)$(LINK) $(igen_gen_OBJECTS) $(igen_gen_LDADD) $(LIBS)
2137igen/igen.$(OBJEXT): igen/$(am__dirstamp) \
2138 igen/$(DEPDIR)/$(am__dirstamp)
2139
2140@SIM_ENABLE_IGEN_FALSE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) $(EXTRA_igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
2141@SIM_ENABLE_IGEN_FALSE@ @rm -f igen/igen$(EXEEXT)
2142@SIM_ENABLE_IGEN_FALSE@ $(AM_V_CCLD)$(LINK) $(igen_igen_OBJECTS) $(igen_igen_LDADD) $(LIBS)
2143
2144igen/ld-cache$(EXEEXT): $(igen_ld_cache_OBJECTS) $(igen_ld_cache_DEPENDENCIES) $(EXTRA_igen_ld_cache_DEPENDENCIES) igen/$(am__dirstamp)
2145 @rm -f igen/ld-cache$(EXEEXT)
2146 $(AM_V_CCLD)$(LINK) $(igen_ld_cache_OBJECTS) $(igen_ld_cache_LDADD) $(LIBS)
2147
2148igen/ld-decode$(EXEEXT): $(igen_ld_decode_OBJECTS) $(igen_ld_decode_DEPENDENCIES) $(EXTRA_igen_ld_decode_DEPENDENCIES) igen/$(am__dirstamp)
2149 @rm -f igen/ld-decode$(EXEEXT)
2150 $(AM_V_CCLD)$(LINK) $(igen_ld_decode_OBJECTS) $(igen_ld_decode_LDADD) $(LIBS)
2151
2152igen/ld-insn$(EXEEXT): $(igen_ld_insn_OBJECTS) $(igen_ld_insn_DEPENDENCIES) $(EXTRA_igen_ld_insn_DEPENDENCIES) igen/$(am__dirstamp)
2153 @rm -f igen/ld-insn$(EXEEXT)
2154 $(AM_V_CCLD)$(LINK) $(igen_ld_insn_OBJECTS) $(igen_ld_insn_LDADD) $(LIBS)
2155
2156igen/table$(EXEEXT): $(igen_table_OBJECTS) $(igen_table_DEPENDENCIES) $(EXTRA_igen_table_DEPENDENCIES) igen/$(am__dirstamp)
2157 @rm -f igen/table$(EXEEXT)
2158 $(AM_V_CCLD)$(LINK) $(igen_table_OBJECTS) $(igen_table_LDADD) $(LIBS)
c0c25232
MF		 2159iq2000/$(am__dirstamp):
2160 @$(MKDIR_P) iq2000
2161 @: > iq2000/$(am__dirstamp)
2162
2163iq2000/run$(EXEEXT): $(iq2000_run_OBJECTS) $(iq2000_run_DEPENDENCIES) $(EXTRA_iq2000_run_DEPENDENCIES) iq2000/$(am__dirstamp)
2164 @rm -f iq2000/run$(EXEEXT)
2165 $(AM_V_CCLD)$(LINK) $(iq2000_run_OBJECTS) $(iq2000_run_LDADD) $(LIBS)
2166lm32/$(am__dirstamp):
2167 @$(MKDIR_P) lm32
2168 @: > lm32/$(am__dirstamp)
2169
2170lm32/run$(EXEEXT): $(lm32_run_OBJECTS) $(lm32_run_DEPENDENCIES) $(EXTRA_lm32_run_DEPENDENCIES) lm32/$(am__dirstamp)
2171 @rm -f lm32/run$(EXEEXT)
2172 $(AM_V_CCLD)$(LINK) $(lm32_run_OBJECTS) $(lm32_run_LDADD) $(LIBS)
70ab6bdd
MF		 2173m32c/$(am__dirstamp):
2174 @$(MKDIR_P) m32c
2175 @: > m32c/$(am__dirstamp)
2176m32c/$(DEPDIR)/$(am__dirstamp):
2177 @$(MKDIR_P) m32c/$(DEPDIR)
2178 @: > m32c/$(DEPDIR)/$(am__dirstamp)
2179m32c/opc2c.$(OBJEXT): m32c/$(am__dirstamp) \
2180 m32c/$(DEPDIR)/$(am__dirstamp)
2181
2182@SIM_ENABLE_ARCH_m32c_FALSE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) $(EXTRA_m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
2183@SIM_ENABLE_ARCH_m32c_FALSE@ @rm -f m32c/opc2c$(EXEEXT)
2184@SIM_ENABLE_ARCH_m32c_FALSE@ $(AM_V_CCLD)$(LINK) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD) $(LIBS)
c0c25232
MF		 2185
2186m32c/run$(EXEEXT): $(m32c_run_OBJECTS) $(m32c_run_DEPENDENCIES) $(EXTRA_m32c_run_DEPENDENCIES) m32c/$(am__dirstamp)
2187 @rm -f m32c/run$(EXEEXT)
2188 $(AM_V_CCLD)$(LINK) $(m32c_run_OBJECTS) $(m32c_run_LDADD) $(LIBS)
2189m32r/$(am__dirstamp):
2190 @$(MKDIR_P) m32r
2191 @: > m32r/$(am__dirstamp)
2192
2193m32r/run$(EXEEXT): $(m32r_run_OBJECTS) $(m32r_run_DEPENDENCIES) $(EXTRA_m32r_run_DEPENDENCIES) m32r/$(am__dirstamp)
2194 @rm -f m32r/run$(EXEEXT)
2195 $(AM_V_CCLD)$(LINK) $(m32r_run_OBJECTS) $(m32r_run_LDADD) $(LIBS)
70ab6bdd
MF		 2196m68hc11/$(am__dirstamp):
2197 @$(MKDIR_P) m68hc11
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2199m68hc11/$(DEPDIR)/$(am__dirstamp):
2200 @$(MKDIR_P) m68hc11/$(DEPDIR)
2201 @: > m68hc11/$(DEPDIR)/$(am__dirstamp)
2202m68hc11/gencode.$(OBJEXT): m68hc11/$(am__dirstamp) \
2203 m68hc11/$(DEPDIR)/$(am__dirstamp)
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2205@SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) $(EXTRA_m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
2206@SIM_ENABLE_ARCH_m68hc11_FALSE@ @rm -f m68hc11/gencode$(EXEEXT)
2207@SIM_ENABLE_ARCH_m68hc11_FALSE@ $(AM_V_CCLD)$(LINK) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD) $(LIBS)
c0c25232
MF		 2208
2209m68hc11/run$(EXEEXT): $(m68hc11_run_OBJECTS) $(m68hc11_run_DEPENDENCIES) $(EXTRA_m68hc11_run_DEPENDENCIES) m68hc11/$(am__dirstamp)
2210 @rm -f m68hc11/run$(EXEEXT)
2211 $(AM_V_CCLD)$(LINK) $(m68hc11_run_OBJECTS) $(m68hc11_run_LDADD) $(LIBS)
2212mcore/$(am__dirstamp):
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2215
2216mcore/run$(EXEEXT): $(mcore_run_OBJECTS) $(mcore_run_DEPENDENCIES) $(EXTRA_mcore_run_DEPENDENCIES) mcore/$(am__dirstamp)
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2218 $(AM_V_CCLD)$(LINK) $(mcore_run_OBJECTS) $(mcore_run_LDADD) $(LIBS)
2219microblaze/$(am__dirstamp):
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2223microblaze/run$(EXEEXT): $(microblaze_run_OBJECTS) $(microblaze_run_DEPENDENCIES) $(EXTRA_microblaze_run_DEPENDENCIES) microblaze/$(am__dirstamp)
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2225 $(AM_V_CCLD)$(LINK) $(microblaze_run_OBJECTS) $(microblaze_run_LDADD) $(LIBS)
2226mips/$(am__dirstamp):
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2230mips/run$(EXEEXT): $(mips_run_OBJECTS) $(mips_run_DEPENDENCIES) $(EXTRA_mips_run_DEPENDENCIES) mips/$(am__dirstamp)
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2232 $(AM_V_CCLD)$(LINK) $(mips_run_OBJECTS) $(mips_run_LDADD) $(LIBS)
2233mn10300/$(am__dirstamp):
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2236
2237mn10300/run$(EXEEXT): $(mn10300_run_OBJECTS) $(mn10300_run_DEPENDENCIES) $(EXTRA_mn10300_run_DEPENDENCIES) mn10300/$(am__dirstamp)
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2239 $(AM_V_CCLD)$(LINK) $(mn10300_run_OBJECTS) $(mn10300_run_LDADD) $(LIBS)
2240moxie/$(am__dirstamp):
2241 @$(MKDIR_P) moxie
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2244moxie/run$(EXEEXT): $(moxie_run_OBJECTS) $(moxie_run_DEPENDENCIES) $(EXTRA_moxie_run_DEPENDENCIES) moxie/$(am__dirstamp)
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2246 $(AM_V_CCLD)$(LINK) $(moxie_run_OBJECTS) $(moxie_run_LDADD) $(LIBS)
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2250
2251msp430/run$(EXEEXT): $(msp430_run_OBJECTS) $(msp430_run_DEPENDENCIES) $(EXTRA_msp430_run_DEPENDENCIES) msp430/$(am__dirstamp)
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2253 $(AM_V_CCLD)$(LINK) $(msp430_run_OBJECTS) $(msp430_run_LDADD) $(LIBS)
2254or1k/$(am__dirstamp):
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2257
2258or1k/run$(EXEEXT): $(or1k_run_OBJECTS) $(or1k_run_DEPENDENCIES) $(EXTRA_or1k_run_DEPENDENCIES) or1k/$(am__dirstamp)
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2261ppc/$(am__dirstamp):
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2269@SIM_ENABLE_ARCH_ppc_FALSE@ppc/psim$(EXEEXT): $(ppc_psim_OBJECTS) $(ppc_psim_DEPENDENCIES) $(EXTRA_ppc_psim_DEPENDENCIES) ppc/$(am__dirstamp)
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2272
2273ppc/run$(EXEEXT): $(ppc_run_OBJECTS) $(ppc_run_DEPENDENCIES) $(EXTRA_ppc_run_DEPENDENCIES) ppc/$(am__dirstamp)
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2276pru/$(am__dirstamp):
2277 @$(MKDIR_P) pru
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2279
2280pru/run$(EXEEXT): $(pru_run_OBJECTS) $(pru_run_DEPENDENCIES) $(EXTRA_pru_run_DEPENDENCIES) pru/$(am__dirstamp)
2281 @rm -f pru/run$(EXEEXT)
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2283riscv/$(am__dirstamp):
2284 @$(MKDIR_P) riscv
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2286
2287riscv/run$(EXEEXT): $(riscv_run_OBJECTS) $(riscv_run_DEPENDENCIES) $(EXTRA_riscv_run_DEPENDENCIES) riscv/$(am__dirstamp)
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2289 $(AM_V_CCLD)$(LINK) $(riscv_run_OBJECTS) $(riscv_run_LDADD) $(LIBS)
2290rl78/$(am__dirstamp):
2291 @$(MKDIR_P) rl78
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2293
2294rl78/run$(EXEEXT): $(rl78_run_OBJECTS) $(rl78_run_DEPENDENCIES) $(EXTRA_rl78_run_DEPENDENCIES) rl78/$(am__dirstamp)
2295 @rm -f rl78/run$(EXEEXT)
2296 $(AM_V_CCLD)$(LINK) $(rl78_run_OBJECTS) $(rl78_run_LDADD) $(LIBS)
2297rx/$(am__dirstamp):
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2299 @: > rx/$(am__dirstamp)
2300
2301rx/run$(EXEEXT): $(rx_run_OBJECTS) $(rx_run_DEPENDENCIES) $(EXTRA_rx_run_DEPENDENCIES) rx/$(am__dirstamp)
2302 @rm -f rx/run$(EXEEXT)
2303 $(AM_V_CCLD)$(LINK) $(rx_run_OBJECTS) $(rx_run_LDADD) $(LIBS)
70ab6bdd
MF		 2304sh/$(am__dirstamp):
2305 @$(MKDIR_P) sh
2306 @: > sh/$(am__dirstamp)
2307sh/$(DEPDIR)/$(am__dirstamp):
2308 @$(MKDIR_P) sh/$(DEPDIR)
2309 @: > sh/$(DEPDIR)/$(am__dirstamp)
2310sh/gencode.$(OBJEXT): sh/$(am__dirstamp) sh/$(DEPDIR)/$(am__dirstamp)
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2312@SIM_ENABLE_ARCH_sh_FALSE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) $(EXTRA_sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
2313@SIM_ENABLE_ARCH_sh_FALSE@ @rm -f sh/gencode$(EXEEXT)
2314@SIM_ENABLE_ARCH_sh_FALSE@ $(AM_V_CCLD)$(LINK) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD) $(LIBS)
c0c25232
MF		 2315
2316sh/run$(EXEEXT): $(sh_run_OBJECTS) $(sh_run_DEPENDENCIES) $(EXTRA_sh_run_DEPENDENCIES) sh/$(am__dirstamp)
2317 @rm -f sh/run$(EXEEXT)
2318 $(AM_V_CCLD)$(LINK) $(sh_run_OBJECTS) $(sh_run_LDADD) $(LIBS)
a389375f
MF		 2319testsuite/common/$(am__dirstamp):
2320 @$(MKDIR_P) testsuite/common
2321 @: > testsuite/common/$(am__dirstamp)
2322testsuite/common/$(DEPDIR)/$(am__dirstamp):
2323 @$(MKDIR_P) testsuite/common/$(DEPDIR)
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2326 testsuite/common/$(DEPDIR)/$(am__dirstamp)
2327testsuite/common/bits-gen.$(OBJEXT): testsuite/common/$(am__dirstamp) \
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2330 testsuite/common/$(DEPDIR)/$(am__dirstamp)
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c0c25232
MF		 2341v850/$(am__dirstamp):
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b6b1c790
MF		 2348
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MF		 2357 -rm -f m32c/*.$(OBJEXT)
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a389375f
MF		 2780
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2812 am__remaking_logs=yes $(MAKE) $(AM_MAKEFLAGS) $$redo_logs; \
2813 fi; \
2814 if $(am__make_dryrun); then :; else \
2815 st=0; \
2816 errmsg="fatal: making $(TEST_SUITE_LOG): failed to create"; \
2817 for i in $$redo_bases; do \
2818 test -f $$i.trs && test -r $$i.trs \
2819 || { echo "$$errmsg $$i.trs" >&2; st=1; }; \
2820 test -f $$i.log && test -r $$i.log \
2821 || { echo "$$errmsg $$i.log" >&2; st=1; }; \
2822 done; \
2823 test $$st -eq 0 || exit 1; \
2824 fi
2825 @$(am__sh_e_setup); $(am__tty_colors); $(am__set_TESTS_bases); \
2826 ws='[ ]'; \
2827 results=`for b in $$bases; do echo $$b.trs; done`; \
2828 test -n "$$results" || results=/dev/null; \
2829 all=` grep "^$$ws*:test-result:" $$results | wc -l`; \
2830 pass=` grep "^$$ws*:test-result:$$ws*PASS" $$results | wc -l`; \
2831 fail=` grep "^$$ws*:test-result:$$ws*FAIL" $$results | wc -l`; \
2832 skip=` grep "^$$ws*:test-result:$$ws*SKIP" $$results | wc -l`; \
2833 xfail=`grep "^$$ws*:test-result:$$ws*XFAIL" $$results | wc -l`; \
2834 xpass=`grep "^$$ws*:test-result:$$ws*XPASS" $$results | wc -l`; \
2835 error=`grep "^$$ws*:test-result:$$ws*ERROR" $$results | wc -l`; \
2836 if test `expr $$fail + $$xpass + $$error` -eq 0; then \
2837 success=true; \
2838 else \
2839 success=false; \
2840 fi; \
2841 br='==================='; br=$$br$$br$$br$$br; \
2842 result_count () \
2843 { \
2844 if test x"$$1" = x"--maybe-color"; then \
2845 maybe_colorize=yes; \
2846 elif test x"$$1" = x"--no-color"; then \
2847 maybe_colorize=no; \
2848 else \
2849 echo "$@: invalid 'result_count' usage" >&2; exit 4; \
2850 fi; \
2851 shift; \
2852 desc=$$1 count=$$2; \
2853 if test $$maybe_colorize = yes && test $$count -gt 0; then \
2854 color_start=$$3 color_end=$$std; \
2855 else \
2856 color_start= color_end=; \
2857 fi; \
2858 echo "$${color_start}# $$desc $$count$${color_end}"; \
2859 }; \
2860 create_testsuite_report () \
2861 { \
2862 result_count $$1 "TOTAL:" $$all "$$brg"; \
2863 result_count $$1 "PASS: " $$pass "$$grn"; \
2864 result_count $$1 "SKIP: " $$skip "$$blu"; \
2865 result_count $$1 "XFAIL:" $$xfail "$$lgn"; \
2866 result_count $$1 "FAIL: " $$fail "$$red"; \
2867 result_count $$1 "XPASS:" $$xpass "$$red"; \
2868 result_count $$1 "ERROR:" $$error "$$mgn"; \
2869 }; \
2870 { \
2871 echo "$(PACKAGE_STRING): $(subdir)/$(TEST_SUITE_LOG)" | \
2872 $(am__rst_title); \
2873 create_testsuite_report --no-color; \
2874 echo; \
2875 echo ".. contents:: :depth: 2"; \
2876 echo; \
2877 for b in $$bases; do echo $$b; done \
2878 | $(am__create_global_log); \
2879 } >$(TEST_SUITE_LOG).tmp || exit 1; \
2880 mv $(TEST_SUITE_LOG).tmp $(TEST_SUITE_LOG); \
2881 if $$success; then \
2882 col="$$grn"; \
2883 else \
2884 col="$$red"; \
2885 test x"$$VERBOSE" = x || cat $(TEST_SUITE_LOG); \
2886 fi; \
2887 echo "$${col}$$br$${std}"; \
2888 echo "$${col}Testsuite summary for $(PACKAGE_STRING)$${std}"; \
2889 echo "$${col}$$br$${std}"; \
2890 create_testsuite_report --maybe-color; \
2891 echo "$$col$$br$$std"; \
2892 if $$success; then :; else \
2893 echo "$${col}See $(subdir)/$(TEST_SUITE_LOG)$${std}"; \
2894 if test -n "$(PACKAGE_BUGREPORT)"; then \
2895 echo "$${col}Please report to $(PACKAGE_BUGREPORT)$${std}"; \
2896 fi; \
2897 echo "$$col$$br$$std"; \
2898 fi; \
2899 $$success || exit 1
2900
2901check-TESTS:
2902 @list='$(RECHECK_LOGS)'; test -z "$$list" || rm -f $$list
2903 @list='$(RECHECK_LOGS:.log=.trs)'; test -z "$$list" || rm -f $$list
2904 @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
2905 @set +e; $(am__set_TESTS_bases); \
2906 log_list=`for i in $$bases; do echo $$i.log; done`; \
2907 trs_list=`for i in $$bases; do echo $$i.trs; done`; \
2908 log_list=`echo $$log_list`; trs_list=`echo $$trs_list`; \
2909 $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) TEST_LOGS="$$log_list"; \
2910 exit $$?;
2911recheck: all $(check_PROGRAMS)
2912 @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
2913 @set +e; $(am__set_TESTS_bases); \
2914 bases=`for i in $$bases; do echo $$i; done \
2915 | $(am__list_recheck_tests)` || exit 1; \
2916 log_list=`for i in $$bases; do echo $$i.log; done`; \
2917 log_list=`echo $$log_list`; \
2918 $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) \
2919 am__force_recheck=am--force-recheck \
2920 TEST_LOGS="$$log_list"; \
2921 exit $$?
2922testsuite/common/bits32m0.log: testsuite/common/bits32m0$(EXEEXT)
2923 @p='testsuite/common/bits32m0$(EXEEXT)'; \
2924 b='testsuite/common/bits32m0'; \
2925 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
2926 --log-file $$b.log --trs-file $$b.trs \
2927 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
2928 "$$tst" $(AM_TESTS_FD_REDIRECT)
2929testsuite/common/bits32m31.log: testsuite/common/bits32m31$(EXEEXT)
2930 @p='testsuite/common/bits32m31$(EXEEXT)'; \
2931 b='testsuite/common/bits32m31'; \
2932 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
2933 --log-file $$b.log --trs-file $$b.trs \
2934 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
2935 "$$tst" $(AM_TESTS_FD_REDIRECT)
2936testsuite/common/bits64m0.log: testsuite/common/bits64m0$(EXEEXT)
2937 @p='testsuite/common/bits64m0$(EXEEXT)'; \
2938 b='testsuite/common/bits64m0'; \
2939 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
2940 --log-file $$b.log --trs-file $$b.trs \
2941 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
2942 "$$tst" $(AM_TESTS_FD_REDIRECT)
2943testsuite/common/bits64m63.log: testsuite/common/bits64m63$(EXEEXT)
2944 @p='testsuite/common/bits64m63$(EXEEXT)'; \
2945 b='testsuite/common/bits64m63'; \
2946 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
2947 --log-file $$b.log --trs-file $$b.trs \
2948 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
2949 "$$tst" $(AM_TESTS_FD_REDIRECT)
2950testsuite/common/alu-tst.log: testsuite/common/alu-tst$(EXEEXT)
2951 @p='testsuite/common/alu-tst$(EXEEXT)'; \
2952 b='testsuite/common/alu-tst'; \
2953 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
2954 --log-file $$b.log --trs-file $$b.trs \
2955 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
2956 "$$tst" $(AM_TESTS_FD_REDIRECT)
2957.test.log:
2958 @p='$<'; \
2959 $(am__set_b); \
2960 $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
2961 --log-file $$b.log --trs-file $$b.trs \
2962 $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
2963 "$$tst" $(AM_TESTS_FD_REDIRECT)
2964@am__EXEEXT_TRUE@.test$(EXEEXT).log:
2965@am__EXEEXT_TRUE@ @p='$<'; \
2966@am__EXEEXT_TRUE@ $(am__set_b); \
2967@am__EXEEXT_TRUE@ $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
2968@am__EXEEXT_TRUE@ --log-file $$b.log --trs-file $$b.trs \
2969@am__EXEEXT_TRUE@ $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
2970@am__EXEEXT_TRUE@ "$$tst" $(AM_TESTS_FD_REDIRECT)
6bddc3e8 2971check-am: all-am
a389375f
MF		 2972 $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
2973 $(MAKE) $(AM_MAKEFLAGS) check-DEJAGNU check-TESTS
6bddc3e8 2974check: check-recursive
c0c25232 2975all-am: Makefile $(LIBRARIES) $(PROGRAMS) $(DATA) $(HEADERS) config.h
6bddc3e8
MF		 2976installdirs: installdirs-recursive
2977installdirs-am:
94f5dfed 2978 for dir in "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"; do \
92bc001e
MF		 2979 test -z "$$dir" || $(MKDIR_P) "$$dir"; \
2980 done
6bddc3e8
MF		 2981install: install-recursive
2982install-exec: install-exec-recursive
2983install-data: install-data-recursive
2984uninstall: uninstall-recursive
2985
2986install-am: all-am
2987 @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
2988
2989installcheck: installcheck-recursive
2990install-strip:
2991 if test -z '$(STRIP)'; then \
2992 $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
2993 install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
2994 install; \
2995 else \
2996 $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
2997 install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
2998 "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \
2999 fi
3000mostlyclean-generic:
3001 -test -z "$(MOSTLYCLEANFILES)" || rm -f $(MOSTLYCLEANFILES)
a389375f
MF		 3002 -test -z "$(TEST_LOGS)" || rm -f $(TEST_LOGS)
3003 -test -z "$(TEST_LOGS:.log=.trs)" || rm -f $(TEST_LOGS:.log=.trs)
3004 -test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
c906108c 3005
6bddc3e8 3006clean-generic:
a389375f 3007 -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES)
c906108c 3008
6bddc3e8
MF		 3009distclean-generic:
3010 -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
3011 -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES)
c0c25232
MF		 3012 -rm -f aarch64/$(am__dirstamp)
3013 -rm -f arm/$(am__dirstamp)
3014 -rm -f avr/$(am__dirstamp)
3015 -rm -f bfin/$(am__dirstamp)
3016 -rm -f bpf/$(am__dirstamp)
5bea0c32
MF		 3017 -rm -f common/$(DEPDIR)/$(am__dirstamp)
3018 -rm -f common/$(am__dirstamp)
70ab6bdd
MF		 3019 -rm -f cr16/$(DEPDIR)/$(am__dirstamp)
3020 -rm -f cr16/$(am__dirstamp)
cb9bdc02
MF		 3021 -rm -f cris/$(DEPDIR)/$(am__dirstamp)
3022 -rm -f cris/$(am__dirstamp)
70ab6bdd
MF		 3023 -rm -f d10v/$(DEPDIR)/$(am__dirstamp)
3024 -rm -f d10v/$(am__dirstamp)
c0c25232
MF		 3025 -rm -f erc32/$(DEPDIR)/$(am__dirstamp)
3026 -rm -f erc32/$(am__dirstamp)
3027 -rm -f example-synacor/$(am__dirstamp)
3028 -rm -f frv/$(am__dirstamp)
3029 -rm -f ft32/$(am__dirstamp)
3030 -rm -f h8300/$(am__dirstamp)
b6b1c790
MF		 3031 -rm -f igen/$(DEPDIR)/$(am__dirstamp)
3032 -rm -f igen/$(am__dirstamp)
c0c25232
MF		 3033 -rm -f iq2000/$(am__dirstamp)
3034 -rm -f lm32/$(am__dirstamp)
70ab6bdd
MF		 3035 -rm -f m32c/$(DEPDIR)/$(am__dirstamp)
3036 -rm -f m32c/$(am__dirstamp)
c0c25232 3037 -rm -f m32r/$(am__dirstamp)
70ab6bdd
MF		 3038 -rm -f m68hc11/$(DEPDIR)/$(am__dirstamp)
3039 -rm -f m68hc11/$(am__dirstamp)
c0c25232
MF		 3040 -rm -f mcore/$(am__dirstamp)
3041 -rm -f microblaze/$(am__dirstamp)
3042 -rm -f mips/$(am__dirstamp)
3043 -rm -f mn10300/$(am__dirstamp)
3044 -rm -f moxie/$(am__dirstamp)
3045 -rm -f msp430/$(am__dirstamp)
3046 -rm -f or1k/$(am__dirstamp)
3047 -rm -f ppc/$(DEPDIR)/$(am__dirstamp)
3048 -rm -f ppc/$(am__dirstamp)
3049 -rm -f pru/$(am__dirstamp)
3050 -rm -f riscv/$(am__dirstamp)
3051 -rm -f rl78/$(am__dirstamp)
3052 -rm -f rx/$(am__dirstamp)
70ab6bdd
MF		 3053 -rm -f sh/$(DEPDIR)/$(am__dirstamp)
3054 -rm -f sh/$(am__dirstamp)
a389375f
MF		 3055 -rm -f testsuite/common/$(DEPDIR)/$(am__dirstamp)
3056 -rm -f testsuite/common/$(am__dirstamp)
c0c25232 3057 -rm -f v850/$(am__dirstamp)
a389375f 3058 -test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES)
c906108c 3059
6bddc3e8
MF		 3060maintainer-clean-generic:
3061 @echo "This command is intended for maintainers to use"
3062 @echo "it deletes files that may require special tools to rebuild."
3063clean: clean-recursive
c906108c 3064
b5689863 3065clean-am: clean-checkPROGRAMS clean-generic clean-libtool \
c0c25232 3066 clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
c906108c 3067
6bddc3e8
MF		 3068distclean: distclean-recursive
3069 -rm -f $(am__CONFIG_DISTCLEAN_FILES)
c0c25232 3070 -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
6bddc3e8 3071 -rm -f Makefile
b6b1c790 3072distclean-am: clean-am distclean-DEJAGNU distclean-compile \
b5689863
MF		 3073 distclean-generic distclean-hdr distclean-libtool \
3074 distclean-tags
c906108c 3075
6bddc3e8 3076dvi: dvi-recursive
c906108c 3077
6bddc3e8 3078dvi-am:
c906108c 3079
6bddc3e8 3080html: html-recursive
c906108c 3081
6bddc3e8 3082html-am:
c906108c 3083
6bddc3e8
MF		 3084info: info-recursive
3085
3086info-am:
3087
63bf33ff 3088install-data-am: install-armdocDATA install-data-local install-dtbDATA \
94f5dfed 3089 install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
ed939535 3090 install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
6bddc3e8
MF		 3091
3092install-dvi: install-dvi-recursive
3093
3094install-dvi-am:
3095
63bf33ff 3096install-exec-am: install-exec-local
6bddc3e8
MF		 3097
3098install-html: install-html-recursive
3099
3100install-html-am:
3101
3102install-info: install-info-recursive
3103
3104install-info-am:
3105
3106install-man:
3107
3108install-pdf: install-pdf-recursive
3109
3110install-pdf-am:
3111
3112install-ps: install-ps-recursive
3113
3114install-ps-am:
3115
3116installcheck-am:
3117
3118maintainer-clean: maintainer-clean-recursive
3119 -rm -f $(am__CONFIG_DISTCLEAN_FILES)
3120 -rm -rf $(top_srcdir)/autom4te.cache
c0c25232 3121 -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
6bddc3e8
MF		 3122 -rm -f Makefile
3123maintainer-clean-am: distclean-am maintainer-clean-generic
3124
3125mostlyclean: mostlyclean-recursive
3126
b5689863
MF		 3127mostlyclean-am: mostlyclean-compile mostlyclean-generic \
3128 mostlyclean-libtool
6bddc3e8
MF		 3129
3130pdf: pdf-recursive
3131
3132pdf-am:
3133
3134ps: ps-recursive
3135
3136ps-am:
3137
94f5dfed 3138uninstall-am: uninstall-armdocDATA uninstall-dtbDATA \
59d8576e 3139 uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
94f5dfed
MF		 3140 uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
3141 uninstall-ppcdocDATA uninstall-rxdocDATA
6bddc3e8 3142
b15c5d7a 3143.MAKE: $(am__recursive_targets) all check-am install-am install-strip
6bddc3e8
MF		 3144
3145.PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am \
a389375f 3146 am--refresh check check-DEJAGNU check-TESTS check-am clean \
b5689863 3147 clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
c0c25232
MF		 3148 clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
3149 cscopelist-am ctags ctags-am distclean distclean-DEJAGNU \
3150 distclean-compile distclean-generic distclean-hdr \
3151 distclean-libtool distclean-tags dvi dvi-am html html-am info \
3152 info-am install install-am install-armdocDATA install-data \
3153 install-data-am install-data-local install-dtbDATA install-dvi \
3154 install-dvi-am install-erc32docDATA install-exec \
3155 install-exec-am install-exec-local install-frvdocDATA \
3156 install-html install-html-am install-info install-info-am \
3157 install-man install-or1kdocDATA install-pdf install-pdf-am \
63bf33ff
MF		 3158 install-pkgincludeHEADERS install-ppcdocDATA install-ps \
3159 install-ps-am install-rxdocDATA install-strip installcheck \
3160 installcheck-am installdirs installdirs-am maintainer-clean \
3161 maintainer-clean-generic mostlyclean mostlyclean-compile \
3162 mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
3163 recheck tags tags-am uninstall uninstall-am \
3164 uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
59d8576e 3165 uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
63bf33ff
MF		 3166 uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
3167 uninstall-rxdocDATA
6bddc3e8
MF		 3168
3169.PRECIOUS: Makefile
c906108c 3170
46a1e1f2 3171@include_makefile@ $(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc
c906108c 3172
64ae70dd 3173# Generate target constants for newlib/libgloss from its source tree.
5e25901f
MF		 3174# This file is shipped with distributions so we build in the source dir.
3175# Use `make nltvals' to rebuild.
5e25901f
MF		 3176.PHONY: nltvals
3177nltvals:
0a129eb1 3178 $(srccom)/gennltvals.py --cpp "$(CPP)"
5e25901f 3179
015f7b74
MF		 3180common/version.c: common/version.c-stamp ; @true
3181common/version.c-stamp: $(srcroot)/gdb/version.in $(srcroot)/bfd/version.h $(srcdir)/common/create-version.sh
fbe8d1cf 3182 $(AM_V_GEN)$(SHELL) $(srcdir)/common/create-version.sh $(srcroot)/gdb $@.tmp
015f7b74 3183 $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(@:-stamp=)
fbe8d1cf 3184 $(AM_V_at)touch $@
b6b1c790 3185
f4ac2306
MF		 3186# FIXME This is one very simple-minded way of generating the file hw-config.h.
3187%/hw-config.h: %/stamp-hw ; @true
3188%/stamp-hw: Makefile
3189 $(AM_V_GEN)set -e; \
3190 ( \
3191 sim_hw="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
3192 echo "/* generated by Makefile */" ; \
3193 printf "extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
3194 echo "const struct hw_descriptor * const hw_descriptors[] = {" ; \
3195 printf " dv_%s_descriptor,\n" $$sim_hw ; \
3196 echo " NULL," ; \
3197 echo "};" \
3198 ) > $@.tmp; \
3199 $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/hw-config.h; \
3200 touch $@
3201.PRECIOUS: %/stamp-hw
3202
b6b1c790 3203# Alias for developers.
d2a5dbc7 3204@SIM_ENABLE_IGEN_TRUE@igen: $(IGEN)
b6b1c790 3205
aa0fca16
MF		 3206# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3207@SIM_ENABLE_IGEN_TRUE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
3208@SIM_ENABLE_IGEN_TRUE@ $(AM_V_at)-rm -f $@
3209@SIM_ENABLE_IGEN_TRUE@ $(AM_V_AR)$(AR_FOR_BUILD) $(ARFLAGS) $@ $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
3210@SIM_ENABLE_IGEN_TRUE@ $(AM_V_at)$(RANLIB_FOR_BUILD) $@
3211
b6b1c790
MF		 3212@SIM_ENABLE_IGEN_TRUE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
3213@SIM_ENABLE_IGEN_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(igen_igen_OBJECTS) $(igen_igen_LDADD)
3214
3215# igen is a build-time only tool. Override the default rules for it.
3216@SIM_ENABLE_IGEN_TRUE@igen/%.o: igen/%.c
3217@SIM_ENABLE_IGEN_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
3218
3219# Build some of the files in standalone mode for developers of igen itself.
3220@SIM_ENABLE_IGEN_TRUE@igen/%-main.o: igen/%.c
3221@SIM_ENABLE_IGEN_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -DMAIN -c $< -o $@
3222
e1e1ae6e
MF		 3223site-sim-config.exp: Makefile
3224 $(AM_V_GEN)( \
7a259895 3225 echo "set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
e1e1ae6e
MF		 3226 echo "set builddir \"$(builddir)\""; \
3227 echo "set srcdir \"$(srcdir)/testsuite\""; \
8996c210 3228 $(foreach V,$(SIM_TOOLCHAIN_VARS),echo "set $(V) \"$($(V))\"";) \
e1e1ae6e 3229 ) > $@
6c57b87f 3230
804de1fa
MF		 3231# Ignore dirs that only contain configuration settings.
3232check/./config/%.exp: ; @true
e60091e4 3233check/config/%.exp: ; @true
804de1fa 3234check/./lib/%.exp: ; @true
e60091e4 3235check/lib/%.exp: ; @true
804de1fa
MF		 3236
3237check/%.exp:
3238 $(AM_V_at)mkdir -p testsuite/$*
3239 $(AM_V_RUNTEST)$(DO_RUNTEST) --objdir testsuite/$* --outdir testsuite/$* $*.exp
3240
3241check-DEJAGNU-parallel:
3242 $(AM_V_at)( \
8f97b519
MF		 3243 set -- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
3244 $(MAKE) -k `printf 'check/%s.exp ' $$@`; \
804de1fa 3245 ret=$$?; \
8f97b519 3246 set -- `printf 'testsuite/%s/ ' $$@`; \
804de1fa 3247 $(SHELL) $(srcroot)/contrib/dg-extract-results.sh \
8f97b519 3248 `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum; \
804de1fa 3249 $(SHELL) $(srcroot)/contrib/dg-extract-results.sh -L \
8f97b519 3250 `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log; \
804de1fa
MF		 3251 echo; \
3252 $(SED) -n '/^.*===.*Summary.*===/,$$p' testrun.sum; \
3253 exit $$ret)
3254
3255check-DEJAGNU-single:
3256 $(AM_V_RUNTEST)$(DO_RUNTEST)
3257
3258# If running a single job, invoking runtest once is faster & has nicer output.
6c57b87f 3259check-DEJAGNU: site.exp
804de1fa 3260 $(AM_V_at)(set -e; \
6c57b87f
MF		 3261 EXPECT=${EXPECT} ; export EXPECT ; \
3262 runtest=$(RUNTEST); \
3263 if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
804de1fa
MF		 3264 case "$(MAKEFLAGS)" in \
3265 *-j*) $(MAKE) check-DEJAGNU-parallel;; \
3266 *) $(MAKE) check-DEJAGNU-single;; \
3267 esac; \
3268 else \
3269 echo "WARNING: could not find \`runtest'" 1>&2; :;\
3270 fi)
6c57b87f 3271
a389375f
MF		 3272# These tests are build-time only tools. Override the default rules for them.
3273testsuite/common/%.o: testsuite/common/%.c
3274 $(AM_V_CC)$(COMPILE_FOR_BUILD) $(testsuite_common_CPPFLAGS) -c $< -o $@
3275
3276testsuite/common/alu-tst$(EXEEXT): $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3277 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_LDADD)
3278
3279testsuite/common/fpu-tst$(EXEEXT): $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3280 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_LDADD)
3281
3282testsuite/common/bits-gen$(EXEEXT): $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3283 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_LDADD)
3284
3285testsuite/common/bits32m0$(EXEEXT): $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3286 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_LDADD)
3287
429a55b8 3288testsuite/common/bits32m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
fbe8d1cf
MF		 3289 $(AM_V_GEN)$< 32 0 big > $@.tmp
3290 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
3291 $(AM_V_at)mv $@.tmp $@
a389375f
MF		 3292
3293testsuite/common/bits32m31$(EXEEXT): $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3294 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_LDADD)
3295
429a55b8 3296testsuite/common/bits32m31.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
fbe8d1cf
MF		 3297 $(AM_V_GEN)$< 32 31 little > $@.tmp
3298 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
3299 $(AM_V_at)mv $@.tmp $@
a389375f
MF		 3300
3301testsuite/common/bits64m0$(EXEEXT): $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3302 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_LDADD)
3303
429a55b8 3304testsuite/common/bits64m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
fbe8d1cf
MF		 3305 $(AM_V_GEN)$< 64 0 big > $@.tmp
3306 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
3307 $(AM_V_at)mv $@.tmp $@
a389375f
MF		 3308
3309testsuite/common/bits64m63$(EXEEXT): $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3310 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_LDADD)
3311
429a55b8 3312testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
fbe8d1cf
MF		 3313 $(AM_V_GEN)$< 64 63 little > $@.tmp
3314 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
3315 $(AM_V_at)mv $@.tmp $@
a389375f 3316
e5f7bc29
MF		 3317@SIM_ENABLE_ARCH_bfin_TRUE@bfin/linux-fixed-code.h: @MAINT@ $(srcdir)/bfin/linux-fixed-code.s bfin/local.mk bfin/$(am__dirstamp)
3318@SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_GEN)$(AS_FOR_TARGET_BFIN) $(srcdir)/bfin/linux-fixed-code.s -o bfin/linux-fixed-code.o
3319@SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)(\
3320@SIM_ENABLE_ARCH_bfin_TRUE@ set -e; \
3321@SIM_ENABLE_ARCH_bfin_TRUE@ echo "/* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */"; \
3322@SIM_ENABLE_ARCH_bfin_TRUE@ echo "static const unsigned char bfin_linux_fixed_code[] ="; \
3323@SIM_ENABLE_ARCH_bfin_TRUE@ echo "{"; \
3324@SIM_ENABLE_ARCH_bfin_TRUE@ $(OBJDUMP_FOR_TARGET_BFIN) -d -z bfin/linux-fixed-code.o > $@.dis; \
3325@SIM_ENABLE_ARCH_bfin_TRUE@ sed -n \
3326@SIM_ENABLE_ARCH_bfin_TRUE@ -e 's:^[^ ]* :0x:' \
3327@SIM_ENABLE_ARCH_bfin_TRUE@ -e '/^0x/{s: .*::;s: *$$:,:;s: :, 0x:g;p;}' \
3328@SIM_ENABLE_ARCH_bfin_TRUE@ $@.dis; \
3329@SIM_ENABLE_ARCH_bfin_TRUE@ rm -f $@.dis; \
3330@SIM_ENABLE_ARCH_bfin_TRUE@ echo "};" \
3331@SIM_ENABLE_ARCH_bfin_TRUE@ ) > $@.tmp
3332@SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/bfin/linux-fixed-code.h
3333@SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)touch $(srcdir)/bfin/linux-fixed-code.h
3334
0a129eb1
MF		 3335@SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le ; @true
3336@SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-le: $(srccom)/genmloop.sh bpf/mloop.in
3337@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3338@SIM_ENABLE_ARCH_bpf_TRUE@ -mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \
3339@SIM_ENABLE_ARCH_bpf_TRUE@ -infile $(srcdir)/bpf/mloop.in \
3340@SIM_ENABLE_ARCH_bpf_TRUE@ -outfile-prefix bpf/ -outfile-suffix -le
3341@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-le.hin bpf/eng-le.h
3342@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-le.cin bpf/mloop-le.c
3343@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)touch $@
3344
3345@SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-be.c bpf/eng-be.h: bpf/stamp-mloop-be ; @true
3346@SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-be: $(srccom)/genmloop.sh bpf/mloop.in
3347@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3348@SIM_ENABLE_ARCH_bpf_TRUE@ -mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \
3349@SIM_ENABLE_ARCH_bpf_TRUE@ -infile $(srcdir)/bpf/mloop.in \
3350@SIM_ENABLE_ARCH_bpf_TRUE@ -outfile-prefix bpf/ -outfile-suffix -be
3351@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-be.hin bpf/eng-be.h
3352@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-be.cin bpf/mloop-be.c
3353@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)touch $@
3354
70ab6bdd
MF		 3355# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3356@SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
3357@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD)
3358
3359# gencode is a build-time only tool. Override the default rules for it.
3360@SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode.o: cr16/gencode.c
3361@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
3362@SIM_ENABLE_ARCH_cr16_TRUE@cr16/cr16-opc.o: ../opcodes/cr16-opc.c
3363@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
3364
3365@SIM_ENABLE_ARCH_cr16_TRUE@cr16/simops.h: cr16/gencode$(EXEEXT)
3366@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_GEN)$< -h >$@
3367
3368@SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT)
3369@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_GEN)$< >$@
3370
0a129eb1
MF		 3371@SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true
3372@SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cris/mloop.in
3373@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3374@SIM_ENABLE_ARCH_cris_TRUE@ -mono -no-fast -pbb -switch semcrisv10f-switch.c \
3375@SIM_ENABLE_ARCH_cris_TRUE@ -cpu crisv10f \
3376@SIM_ENABLE_ARCH_cris_TRUE@ -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v10f
3377@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v10f.hin cris/engv10.h
3378@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v10f.cin cris/mloopv10f.c
3379@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)touch $@
3380
0a129eb1
MF		 3381@SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv32f.c cris/engv32.h: cris/stamp-mloop-v32f ; @true
3382@SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v32f: $(srccom)/genmloop.sh cris/mloop.in
3383@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3384@SIM_ENABLE_ARCH_cris_TRUE@ -mono -no-fast -pbb -switch semcrisv32f-switch.c \
3385@SIM_ENABLE_ARCH_cris_TRUE@ -cpu crisv32f \
3386@SIM_ENABLE_ARCH_cris_TRUE@ -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v32f
3387@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v32f.hin cris/engv32.h
3388@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v32f.cin cris/mloopv32f.c
3389@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)touch $@
3390
70ab6bdd
MF		 3391# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3392@SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
3393@SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD)
3394
3395# gencode is a build-time only tool. Override the default rules for it.
3396@SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode.o: d10v/gencode.c
3397@SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
3398@SIM_ENABLE_ARCH_d10v_TRUE@d10v/d10v-opc.o: ../opcodes/d10v-opc.c
3399@SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
3400
3401@SIM_ENABLE_ARCH_d10v_TRUE@d10v/simops.h: d10v/gencode$(EXEEXT)
3402@SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_GEN)$< -h >$@
3403
3404@SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT)
3405@SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_GEN)$< >$@
c0c25232
MF		 3406
3407@SIM_ENABLE_ARCH_erc32_TRUE@erc32/sis$(EXEEXT): erc32/run$(EXEEXT)
3408@SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
3409
3410@SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: erc32/%.c | erc32/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
93e0ec91 3411@SIM_ENABLE_ARCH_erc32_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
63bf33ff
MF		 3412@SIM_ENABLE_ARCH_erc32_TRUE@sim-%D-install-exec-local: installdirs
3413@SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
3414@SIM_ENABLE_ARCH_erc32_TRUE@ n=`echo sis | sed '$(program_transform_name)'`; \
c95bd911 3415@SIM_ENABLE_ARCH_erc32_TRUE@ $(LIBTOOL) --mode=install $(INSTALL_PROGRAM) erc32/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
59d8576e
MF		 3416@SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local:
3417@SIM_ENABLE_ARCH_erc32_TRUE@ rm -f $(DESTDIR)$(bindir)/sis
70ab6bdd 3418
0a129eb1
MF		 3419@SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true
3420@SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in
3421@SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3422@SIM_ENABLE_ARCH_frv_TRUE@ -mono -scache -parallel-generic-write -parallel-only \
3423@SIM_ENABLE_ARCH_frv_TRUE@ -cpu frvbf \
3424@SIM_ENABLE_ARCH_frv_TRUE@ -infile $(srcdir)/frv/mloop.in -outfile-prefix frv/
3425@SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h
3426@SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c
3427@SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)touch $@
3428
0a129eb1
MF		 3429@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true
3430@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in
3431@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3432@SIM_ENABLE_ARCH_iq2000_TRUE@ -mono -fast -pbb -switch sem-switch.c \
3433@SIM_ENABLE_ARCH_iq2000_TRUE@ -cpu iq2000bf \
3434@SIM_ENABLE_ARCH_iq2000_TRUE@ -infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/
3435@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h
3436@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c
3437@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)touch $@
3438
0a129eb1
MF		 3439@SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
3440@SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in
3441@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3442@SIM_ENABLE_ARCH_lm32_TRUE@ -mono -fast -pbb -switch sem-switch.c \
3443@SIM_ENABLE_ARCH_lm32_TRUE@ -cpu lm32bf \
3444@SIM_ENABLE_ARCH_lm32_TRUE@ -infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/
3445@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h
3446@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c
3447@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)touch $@
3448
c0c25232 3449@SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: m32c/%.c | m32c/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
93e0ec91 3450@SIM_ENABLE_ARCH_m32c_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
c0c25232 3451
70ab6bdd
MF		 3452# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3453@SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
3454@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD)
3455
3456# opc2c is a build-time only tool. Override the default rules for it.
3457@SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c.o: m32c/opc2c.c
3458@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
3459
3460@SIM_ENABLE_ARCH_m32c_TRUE@m32c/m32c.c: m32c/m32c.opc m32c/opc2c$(EXEEXT)
3461@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
3462@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)mv $@.tmp $@
3463
3464@SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT)
3465@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
3466@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)mv $@.tmp $@
3467
0a129eb1
MF		 3468@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true
3469@SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in
3470@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3471@SIM_ENABLE_ARCH_m32r_TRUE@ -mono -fast -pbb -switch sem-switch.c \
3472@SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32rbf \
3473@SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/
3474@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h
3475@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c
3476@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@
3477
0a129eb1
MF		 3478@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop ; @true
3479@SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in
3480@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3481@SIM_ENABLE_ARCH_m32r_TRUE@ -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
3482@SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32rxf \
3483@SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x
3484@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h
3485@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c
3486@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@
3487
0a129eb1
MF		 3488@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop ; @true
3489@SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in
3490@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3491@SIM_ENABLE_ARCH_m32r_TRUE@ -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
3492@SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32r2f \
3493@SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2
3494@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h
3495@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c
3496@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@
3497
70ab6bdd
MF		 3498# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3499@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
3500@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD)
3501
3502# gencode is a build-time only tool. Override the default rules for it.
3503@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode.o: m68hc11/gencode.c
3504@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
3505
3506@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc11int.c: m68hc11/gencode$(EXEEXT)
3507@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_GEN)$< -m6811 >$@
3508
3509@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEXT)
3510@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_GEN)$< -m6812 >$@
3511
d2a5dbc7
MF		 3512@SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
3513@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN)
3514@SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
3515@SIM_ENABLE_ARCH_mn10300_TRUE@ $(mn10300_IGEN_TRACE) \
3516@SIM_ENABLE_ARCH_mn10300_TRUE@ -G gen-direct-access \
3517@SIM_ENABLE_ARCH_mn10300_TRUE@ -M mn10300,am33 -G gen-multi-sim=am33 \
3518@SIM_ENABLE_ARCH_mn10300_TRUE@ -M am33_2 \
3519@SIM_ENABLE_ARCH_mn10300_TRUE@ -I $(srcdir)/mn10300 \
3520@SIM_ENABLE_ARCH_mn10300_TRUE@ -i $(mn10300_IGEN_INSN) \
3521@SIM_ENABLE_ARCH_mn10300_TRUE@ -o $(mn10300_IGEN_DC) \
3522@SIM_ENABLE_ARCH_mn10300_TRUE@ -x \
3bef0f03
MF		 3523@SIM_ENABLE_ARCH_mn10300_TRUE@ -n icache.h -hc mn10300/icache.h \
3524@SIM_ENABLE_ARCH_mn10300_TRUE@ -n icache.c -c mn10300/icache.c \
3525@SIM_ENABLE_ARCH_mn10300_TRUE@ -n semantics.h -hs mn10300/semantics.h \
3526@SIM_ENABLE_ARCH_mn10300_TRUE@ -n semantics.c -s mn10300/semantics.c \
3527@SIM_ENABLE_ARCH_mn10300_TRUE@ -n idecode.h -hd mn10300/idecode.h \
3528@SIM_ENABLE_ARCH_mn10300_TRUE@ -n idecode.c -d mn10300/idecode.c \
3529@SIM_ENABLE_ARCH_mn10300_TRUE@ -n model.h -hm mn10300/model.h \
3530@SIM_ENABLE_ARCH_mn10300_TRUE@ -n model.c -m mn10300/model.c \
3531@SIM_ENABLE_ARCH_mn10300_TRUE@ -n support.h -hf mn10300/support.h \
3532@SIM_ENABLE_ARCH_mn10300_TRUE@ -n support.c -f mn10300/support.c \
3533@SIM_ENABLE_ARCH_mn10300_TRUE@ -n itable.h -ht mn10300/itable.h \
3534@SIM_ENABLE_ARCH_mn10300_TRUE@ -n itable.c -t mn10300/itable.c \
3535@SIM_ENABLE_ARCH_mn10300_TRUE@ -n engine.h -he mn10300/engine.h \
3536@SIM_ENABLE_ARCH_mn10300_TRUE@ -n engine.c -e mn10300/engine.c \
3537@SIM_ENABLE_ARCH_mn10300_TRUE@ -n irun.c -r mn10300/irun.c
d2a5dbc7
MF		 3538@SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)touch $@
3539
94f5dfed
MF		 3540@SIM_ENABLE_ARCH_moxie_TRUE@moxie/moxie-gdb.dtb: @MAINT@ moxie/moxie-gdb.dts moxie/$(am__dirstamp)
3541@SIM_ENABLE_ARCH_moxie_TRUE@ $(AM_V_GEN) \
3542@SIM_ENABLE_ARCH_moxie_TRUE@ if test "x$(DTC)" != x; then \
3543@SIM_ENABLE_ARCH_moxie_TRUE@ $(DTC) -O dtb -o $@.tmp ${srcdir}/moxie/moxie-gdb.dts || exit 1; \
3544@SIM_ENABLE_ARCH_moxie_TRUE@ $(SHELL) $(srcroot)/move-if-change $@.tmp ${srcdir}/moxie/moxie-gdb.dtb || exit 1; \
3545@SIM_ENABLE_ARCH_moxie_TRUE@ touch ${srcdir}/moxie/moxie-gdb.dtb; \
3546@SIM_ENABLE_ARCH_moxie_TRUE@ else \
3547@SIM_ENABLE_ARCH_moxie_TRUE@ echo "Could not update the moxie-gdb.dtb file because the device "; \
3548@SIM_ENABLE_ARCH_moxie_TRUE@ echo "tree compiler tool (dtc) is missing. Install the tool to "; \
3549@SIM_ENABLE_ARCH_moxie_TRUE@ echo "update the device tree blob."; \
3550@SIM_ENABLE_ARCH_moxie_TRUE@ fi
3551
0a129eb1
MF		 3552@SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
3553@SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in
3554@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3555@SIM_ENABLE_ARCH_or1k_TRUE@ -mono -fast -pbb -switch sem-switch.c \
3556@SIM_ENABLE_ARCH_or1k_TRUE@ -cpu or1k32bf \
3557@SIM_ENABLE_ARCH_or1k_TRUE@ -infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/
3558@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h
3559@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c
3560@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)touch $@
3561
c0c25232
MF		 3562@SIM_ENABLE_ARCH_ppc_TRUE@ppc/psim$(EXEEXT): ppc/run$(EXEEXT)
3563@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
3564
3565@SIM_ENABLE_ARCH_ppc_TRUE@ppc/%.o: ppc/%.c | ppc/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
93e0ec91 3566@SIM_ENABLE_ARCH_ppc_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
c0c25232 3567
ee3314c4
MF		 3568@SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.c: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
3569@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --source $@.tmp
3570@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.c
3571@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)touch $(srcdir)/ppc/spreg.c
3572
3573@SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.h: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
3574@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --header $@.tmp
3575@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.h
3576@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)touch $(srcdir)/ppc/spreg.h
3577
c0c25232 3578@SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: rl78/%.c | rl78/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
93e0ec91 3579@SIM_ENABLE_ARCH_rl78_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
c0c25232
MF		 3580
3581@SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: rx/%.c | rx/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
93e0ec91 3582@SIM_ENABLE_ARCH_rx_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
c0c25232 3583
70ab6bdd
MF		 3584# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3585@SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
3586@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD)
3587
3588# gencode is a build-time only tool. Override the default rules for it.
3589@SIM_ENABLE_ARCH_sh_TRUE@sh/gencode.o: sh/gencode.c
3590@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
3591
3592@SIM_ENABLE_ARCH_sh_TRUE@sh/code.c: sh/gencode$(EXEEXT)
3593@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -x >$@
3594
3595@SIM_ENABLE_ARCH_sh_TRUE@sh/ppi.c: sh/gencode$(EXEEXT)
3596@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -p >$@
3597
3598@SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT)
3599@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -s >$@
3600
d2a5dbc7
MF		 3601@SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen
3602@SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_DC) $(IGEN)
3603@SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
3604@SIM_ENABLE_ARCH_v850_TRUE@ $(v850_IGEN_TRACE) \
3605@SIM_ENABLE_ARCH_v850_TRUE@ -G gen-direct-access \
3606@SIM_ENABLE_ARCH_v850_TRUE@ -G gen-zero-r0 \
3607@SIM_ENABLE_ARCH_v850_TRUE@ -i $(v850_IGEN_INSN) \
3608@SIM_ENABLE_ARCH_v850_TRUE@ -o $(v850_IGEN_DC) \
3609@SIM_ENABLE_ARCH_v850_TRUE@ -x \
3bef0f03
MF		 3610@SIM_ENABLE_ARCH_v850_TRUE@ -n icache.h -hc v850/icache.h \
3611@SIM_ENABLE_ARCH_v850_TRUE@ -n icache.c -c v850/icache.c \
3612@SIM_ENABLE_ARCH_v850_TRUE@ -n semantics.h -hs v850/semantics.h \
3613@SIM_ENABLE_ARCH_v850_TRUE@ -n semantics.c -s v850/semantics.c \
3614@SIM_ENABLE_ARCH_v850_TRUE@ -n idecode.h -hd v850/idecode.h \
3615@SIM_ENABLE_ARCH_v850_TRUE@ -n idecode.c -d v850/idecode.c \
3616@SIM_ENABLE_ARCH_v850_TRUE@ -n model.h -hm v850/model.h \
3617@SIM_ENABLE_ARCH_v850_TRUE@ -n model.c -m v850/model.c \
3618@SIM_ENABLE_ARCH_v850_TRUE@ -n support.h -hf v850/support.h \
3619@SIM_ENABLE_ARCH_v850_TRUE@ -n support.c -f v850/support.c \
3620@SIM_ENABLE_ARCH_v850_TRUE@ -n itable.h -ht v850/itable.h \
3621@SIM_ENABLE_ARCH_v850_TRUE@ -n itable.c -t v850/itable.c \
3622@SIM_ENABLE_ARCH_v850_TRUE@ -n engine.h -he v850/engine.h \
3623@SIM_ENABLE_ARCH_v850_TRUE@ -n engine.c -e v850/engine.c \
3624@SIM_ENABLE_ARCH_v850_TRUE@ -n irun.c -r v850/irun.c
d2a5dbc7
MF		 3625@SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)touch $@
3626
c0c25232 3627%/libsim.a: | $(SIM_ALL_RECURSIVE_DEPS)
93e0ec91 3628 $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
c0c25232
MF		 3629
3630%/nrun.o: common/nrun.c | %/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
93e0ec91 3631 $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
c0c25232 3632
5bea0c32
MF		 3633all-recursive: $(SIM_ALL_RECURSIVE_DEPS)
3634
63bf33ff
MF		 3635install-data-local: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS)
3636 $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(libdir)
3637 lib=`echo sim | sed '$(program_transform_name)'`; \
2ba09f42
MF		 3638 for d in $(SIM_ENABLED_ARCHES); do \
3639 n="$$lib"; \
3640 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
3641 n="lib$$n.a"; \
3642 $(INSTALL_DATA) $$d/libsim.a $(DESTDIR)$(libdir)/$$n || exit 1; \
63bf33ff
MF		 3643 done
3644
3645install-exec-local: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS)
3646 $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
3647 run=`echo run | sed '$(program_transform_name)'`; \
2ba09f42
MF		 3648 for d in $(SIM_ENABLED_ARCHES); do \
3649 n="$$run"; \
3650 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
3651 $(LIBTOOL) --mode=install \
3652 $(INSTALL_PROGRAM) $$d/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) || exit 1; \
63bf33ff
MF		 3653 done
3654
59d8576e
MF		 3655uninstall-local: $(SIM_UNINSTALL_LOCAL_DEPS)
3656 rm -f $(DESTDIR)$(bindir)/run $(DESTDIR)$(libdir)/libsim.a
2ba09f42 3657 for d in $(SIM_ENABLED_ARCHES); do \
59d8576e
MF		 3658 rm -f $(DESTDIR)$(bindir)/run-$$d $(DESTDIR)$(libdir)/libsim-$$d.a; \
3659 done
3660
6bddc3e8
MF		 3661# Tell versions [3.59,3.63) of GNU make to not export all variables.
3662# Otherwise a system limit (for SysV at least) may be exceeded.
3663.NOEXPORT:
A mirror of the official binutils-gdb repository