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sim: bpf: move libsim.a creation to top-level
[thirdparty/binutils-gdb.git] / sim / Makefile.in
CommitLineData
6bddc3e8
MF		 1# Makefile.in generated by automake 1.15.1 from Makefile.am.
2# @configure_input@
3
0d9d77e5 4# Copyright (C) 1994-2017 Free Software Foundation, Inc.
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MF		 5
6# This Makefile.in is free software; the Free Software Foundation
7# gives unlimited permission to copy and/or distribute it,
8# with or without modifications, as long as this notice is preserved.
9
10# This program is distributed in the hope that it will be useful,
11# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
12# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
13# PARTICULAR PURPOSE.
14
15@SET_MAKE@
16
0d9d77e5 17# Copyright (C) 1993-2023 Free Software Foundation, Inc.
6bddc3e8 18#
c906108c
SS		 19# This program is free software; you can redistribute it and/or modify
20# it under the terms of the GNU General Public License as published by
4744ac1b 21# the Free Software Foundation; either version 3 of the License, or
c906108c 22# (at your option) any later version.
4744ac1b 23#
c906108c
SS		 24# This program is distributed in the hope that it will be useful,
25# but WITHOUT ANY WARRANTY; without even the implied warranty of
26# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27# GNU General Public License for more details.
4744ac1b 28#
c906108c 29# You should have received a copy of the GNU General Public License
4744ac1b 30# along with this program. If not, see <http://www.gnu.org/licenses/>.
6c57b87f 31
92bc001e 32
ed939535 33
c0c25232 34
c906108c 35VPATH = @srcdir@
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MF		 36am__is_gnu_make = { \
37 if test -z '$(MAKELEVEL)'; then \
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44 false; \
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47am__make_running_with_option = \
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89am__make_dryrun = (target_option=n; $(am__make_running_with_option))
90am__make_keepgoing = (target_option=k; $(am__make_running_with_option))
91pkgdatadir = $(datadir)/@PACKAGE@
92pkgincludedir = $(includedir)/@PACKAGE@
93pkglibdir = $(libdir)/@PACKAGE@
94pkglibexecdir = $(libexecdir)/@PACKAGE@
95am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
96install_sh_DATA = $(install_sh) -c -m 644
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99INSTALL_HEADER = $(INSTALL_DATA)
100transform = $(program_transform_name)
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cb9bdc02 110check_PROGRAMS = $(am__EXEEXT_8) $(am__EXEEXT_9)
c0c25232
MF		 111noinst_PROGRAMS = $(am__EXEEXT_10) $(am__EXEEXT_11) $(am__EXEEXT_12) \
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113 $(am__EXEEXT_16) $(am__EXEEXT_17) $(am__EXEEXT_18) \
114 $(am__EXEEXT_19) $(am__EXEEXT_20) $(am__EXEEXT_21) \
115 $(am__EXEEXT_22) $(am__EXEEXT_23) $(am__EXEEXT_24) \
116 $(am__EXEEXT_25) $(am__EXEEXT_26) $(am__EXEEXT_27) \
117 $(am__EXEEXT_28) $(am__EXEEXT_29) $(am__EXEEXT_30) \
118 $(am__EXEEXT_31) $(am__EXEEXT_32) $(am__EXEEXT_33) \
119 $(am__EXEEXT_34) $(am__EXEEXT_35) $(am__EXEEXT_36) \
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a389375f 122EXTRA_PROGRAMS = $(am__EXEEXT_2) testsuite/common/bits-gen$(EXEEXT) \
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MF		 123 testsuite/common/fpu-tst$(EXEEXT) $(am__EXEEXT_3) \
124 $(am__EXEEXT_4) $(am__EXEEXT_5) $(am__EXEEXT_6) \
125 $(am__EXEEXT_7)
fb2c495f
MF		 126@ENABLE_SIM_TRUE@am__append_1 = \
127@ENABLE_SIM_TRUE@ $(srcroot)/include/sim/callback.h \
128@ENABLE_SIM_TRUE@ $(srcroot)/include/sim/sim.h
129
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MF		 130@SIM_ENABLE_HW_TRUE@am__append_2 = \
131@SIM_ENABLE_HW_TRUE@ $(SIM_COMMON_HW_OBJS) \
132@SIM_ENABLE_HW_TRUE@ $(SIM_HW_SOCKSER)
133
134@SIM_ENABLE_HW_TRUE@am__append_3 = SIM_HW_DEVICES_="$(SIM_HW_DEVICES)"
135@SIM_ENABLE_IGEN_TRUE@am__append_4 = $(IGEN)
136@SIM_ENABLE_IGEN_TRUE@am__append_5 = igen/libigen.a
137@SIM_ENABLE_IGEN_TRUE@am__append_6 = $(igen_IGEN_TOOLS)
138@SIM_ENABLE_IGEN_TRUE@am__append_7 = $(igen_IGEN_TOOLS)
a389375f
MF		 139TESTS = testsuite/common/bits32m0$(EXEEXT) \
140 testsuite/common/bits32m31$(EXEEXT) \
141 testsuite/common/bits64m0$(EXEEXT) \
142 testsuite/common/bits64m63$(EXEEXT) \
143 testsuite/common/alu-tst$(EXEEXT)
c58353b7
MF		 144@SIM_ENABLE_ARCH_aarch64_TRUE@am__append_8 = aarch64/libsim.a
145@SIM_ENABLE_ARCH_aarch64_TRUE@am__append_9 = aarch64/run
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MF		 146@SIM_ENABLE_ARCH_arm_TRUE@am__append_10 = arm/libsim.a
147@SIM_ENABLE_ARCH_arm_TRUE@am__append_11 = arm/run
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MF		 148@SIM_ENABLE_ARCH_avr_TRUE@am__append_12 = avr/libsim.a
149@SIM_ENABLE_ARCH_avr_TRUE@am__append_13 = avr/run
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MF		 150@SIM_ENABLE_ARCH_bfin_TRUE@am__append_14 = bfin/libsim.a
151@SIM_ENABLE_ARCH_bfin_TRUE@am__append_15 = bfin/run
152@SIM_ENABLE_ARCH_bfin_TRUE@am__append_16 = bfin_SIM_EXTRA_HW_DEVICES="$(bfin_SIM_EXTRA_HW_DEVICES)"
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MF		 153@SIM_ENABLE_ARCH_bpf_TRUE@am__append_17 = bpf/libsim.a
154@SIM_ENABLE_ARCH_bpf_TRUE@am__append_18 = bpf/run
155@SIM_ENABLE_ARCH_bpf_TRUE@am__append_19 = \
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MF		 156@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-le.h \
157@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-be.h
158
bc1dd618 159@SIM_ENABLE_ARCH_bpf_TRUE@am__append_20 = $(bpf_BUILD_OUTPUTS)
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MF		 160@SIM_ENABLE_ARCH_bpf_TRUE@am__append_21 = $(bpf_BUILD_OUTPUTS)
161@SIM_ENABLE_ARCH_cr16_TRUE@am__append_22 = cr16/run
162@SIM_ENABLE_ARCH_cr16_TRUE@am__append_23 = cr16/simops.h
163@SIM_ENABLE_ARCH_cr16_TRUE@am__append_24 = $(cr16_BUILD_OUTPUTS)
164@SIM_ENABLE_ARCH_cr16_TRUE@am__append_25 = cr16/gencode
165@SIM_ENABLE_ARCH_cr16_TRUE@am__append_26 = $(cr16_BUILD_OUTPUTS)
166@SIM_ENABLE_ARCH_cris_TRUE@am__append_27 = cris/run
167@SIM_ENABLE_ARCH_cris_TRUE@am__append_28 = cris_SIM_EXTRA_HW_DEVICES="$(cris_SIM_EXTRA_HW_DEVICES)"
168@SIM_ENABLE_ARCH_cris_TRUE@am__append_29 = cris/rvdummy
169@SIM_ENABLE_ARCH_cris_TRUE@am__append_30 = \
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MF		 170@SIM_ENABLE_ARCH_cris_TRUE@ cris/engv10.h \
171@SIM_ENABLE_ARCH_cris_TRUE@ cris/engv32.h
172
bc1dd618 173@SIM_ENABLE_ARCH_cris_TRUE@am__append_31 = $(cris_BUILD_OUTPUTS)
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MF		 174@SIM_ENABLE_ARCH_cris_TRUE@am__append_32 = $(cris_BUILD_OUTPUTS)
175@SIM_ENABLE_ARCH_d10v_TRUE@am__append_33 = d10v/run
176@SIM_ENABLE_ARCH_d10v_TRUE@am__append_34 = d10v/simops.h
177@SIM_ENABLE_ARCH_d10v_TRUE@am__append_35 = $(d10v_BUILD_OUTPUTS)
178@SIM_ENABLE_ARCH_d10v_TRUE@am__append_36 = d10v/gencode
179@SIM_ENABLE_ARCH_d10v_TRUE@am__append_37 = $(d10v_BUILD_OUTPUTS)
180@SIM_ENABLE_ARCH_erc32_TRUE@am__append_38 = erc32/run erc32/sis
181@SIM_ENABLE_ARCH_erc32_TRUE@am__append_39 = sim-%D-install-exec-local
182@SIM_ENABLE_ARCH_erc32_TRUE@am__append_40 = sim-erc32-uninstall-local
183@SIM_ENABLE_ARCH_examples_TRUE@am__append_41 = example-synacor/run
184@SIM_ENABLE_ARCH_frv_TRUE@am__append_42 = frv/run
185@SIM_ENABLE_ARCH_frv_TRUE@am__append_43 = frv/eng.h
bc1dd618 186@SIM_ENABLE_ARCH_frv_TRUE@am__append_44 = $(frv_BUILD_OUTPUTS)
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MF		 187@SIM_ENABLE_ARCH_frv_TRUE@am__append_45 = $(frv_BUILD_OUTPUTS)
188@SIM_ENABLE_ARCH_ft32_TRUE@am__append_46 = ft32/run
189@SIM_ENABLE_ARCH_h8300_TRUE@am__append_47 = h8300/run
190@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_48 = iq2000/run
191@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_49 = iq2000/eng.h
bc1dd618 192@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_50 = $(iq2000_BUILD_OUTPUTS)
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MF		 193@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_51 = $(iq2000_BUILD_OUTPUTS)
194@SIM_ENABLE_ARCH_lm32_TRUE@am__append_52 = lm32/run
195@SIM_ENABLE_ARCH_lm32_TRUE@am__append_53 = lm32_SIM_EXTRA_HW_DEVICES="$(lm32_SIM_EXTRA_HW_DEVICES)"
196@SIM_ENABLE_ARCH_lm32_TRUE@am__append_54 = lm32/eng.h
bc1dd618 197@SIM_ENABLE_ARCH_lm32_TRUE@am__append_55 = $(lm32_BUILD_OUTPUTS)
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MF		 198@SIM_ENABLE_ARCH_lm32_TRUE@am__append_56 = $(lm32_BUILD_OUTPUTS)
199@SIM_ENABLE_ARCH_m32c_TRUE@am__append_57 = m32c/run
200@SIM_ENABLE_ARCH_m32c_TRUE@am__append_58 = $(m32c_BUILD_OUTPUTS)
201@SIM_ENABLE_ARCH_m32c_TRUE@am__append_59 = m32c/opc2c
202@SIM_ENABLE_ARCH_m32c_TRUE@am__append_60 = \
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MF		 203@SIM_ENABLE_ARCH_m32c_TRUE@ $(m32c_BUILD_OUTPUTS) \
204@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c.log \
205@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c.log
206
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MF		 207@SIM_ENABLE_ARCH_m32r_TRUE@am__append_61 = m32r/run
208@SIM_ENABLE_ARCH_m32r_TRUE@am__append_62 = m32r_SIM_EXTRA_HW_DEVICES="$(m32r_SIM_EXTRA_HW_DEVICES)"
209@SIM_ENABLE_ARCH_m32r_TRUE@am__append_63 = \
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MF		 210@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng.h \
211@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/engx.h \
212@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng2.h
213
bc1dd618 214@SIM_ENABLE_ARCH_m32r_TRUE@am__append_64 = $(m32r_BUILD_OUTPUTS)
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MF		 215@SIM_ENABLE_ARCH_m32r_TRUE@am__append_65 = $(m32r_BUILD_OUTPUTS)
216@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_66 = m68hc11/run
217@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_67 = m68hc11_SIM_EXTRA_HW_DEVICES="$(m68hc11_SIM_EXTRA_HW_DEVICES)"
218@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_68 = $(m68hc11_BUILD_OUTPUTS)
219@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_69 = m68hc11/gencode
220@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_70 = $(m68hc11_BUILD_OUTPUTS)
221@SIM_ENABLE_ARCH_mcore_TRUE@am__append_71 = mcore/run
222@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_72 = microblaze/run
223@SIM_ENABLE_ARCH_mips_TRUE@am__append_73 = mips/run
224@SIM_ENABLE_ARCH_mips_TRUE@am__append_74 = mips_SIM_EXTRA_HW_DEVICES="$(mips_SIM_EXTRA_HW_DEVICES)"
225@SIM_ENABLE_ARCH_mips_TRUE@am__append_75 = mips/itable.h \
ddfc4317 226@SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_MULTI_SRC)
cdbb77e4 227@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_76 = \
3a31051b
MF		 228@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
229@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/stamp-gen-mode-single
230
cdbb77e4 231@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_77 = \
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MF		 232@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \
233@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \
234@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \
235@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32
236
cdbb77e4 237@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_78 = \
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MF		 238@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ $(SIM_MIPS_MULTI_SRC) \
239@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-igen \
240@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-run
241
bc1dd618 242@SIM_ENABLE_ARCH_mips_TRUE@am__append_79 = $(mips_BUILD_OUTPUTS)
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MF		 243@SIM_ENABLE_ARCH_mips_TRUE@am__append_80 = $(mips_BUILD_OUTPUTS)
244@SIM_ENABLE_ARCH_mips_TRUE@am__append_81 = mips/multi-include.h mips/multi-run.c
245@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_82 = mn10300/run
246@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_83 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)"
247@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_84 = \
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MF		 248@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \
249@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \
250@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \
251@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.h \
252@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.h \
253@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \
254@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h
255
bc1dd618 256@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_85 = $(mn10300_BUILD_OUTPUTS)
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MF		 257@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_86 = $(mn10300_BUILD_OUTPUTS)
258@SIM_ENABLE_ARCH_moxie_TRUE@am__append_87 = moxie/run
259@SIM_ENABLE_ARCH_msp430_TRUE@am__append_88 = msp430/run
260@SIM_ENABLE_ARCH_or1k_TRUE@am__append_89 = or1k/run
261@SIM_ENABLE_ARCH_or1k_TRUE@am__append_90 = or1k/eng.h
bc1dd618 262@SIM_ENABLE_ARCH_or1k_TRUE@am__append_91 = $(or1k_BUILD_OUTPUTS)
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MF		 263@SIM_ENABLE_ARCH_or1k_TRUE@am__append_92 = $(or1k_BUILD_OUTPUTS)
264@SIM_ENABLE_ARCH_ppc_TRUE@am__append_93 = ppc/run ppc/psim
265@SIM_ENABLE_ARCH_pru_TRUE@am__append_94 = pru/run
266@SIM_ENABLE_ARCH_riscv_TRUE@am__append_95 = riscv/run
267@SIM_ENABLE_ARCH_rl78_TRUE@am__append_96 = rl78/run
268@SIM_ENABLE_ARCH_rx_TRUE@am__append_97 = rx/run
269@SIM_ENABLE_ARCH_sh_TRUE@am__append_98 = sh/run
270@SIM_ENABLE_ARCH_sh_TRUE@am__append_99 = \
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MF		 271@SIM_ENABLE_ARCH_sh_TRUE@ sh/code.c \
272@SIM_ENABLE_ARCH_sh_TRUE@ sh/ppi.c
273
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MF		 274@SIM_ENABLE_ARCH_sh_TRUE@am__append_100 = $(sh_BUILD_OUTPUTS)
275@SIM_ENABLE_ARCH_sh_TRUE@am__append_101 = sh/gencode
276@SIM_ENABLE_ARCH_sh_TRUE@am__append_102 = $(sh_BUILD_OUTPUTS)
277@SIM_ENABLE_ARCH_v850_TRUE@am__append_103 = v850/run
278@SIM_ENABLE_ARCH_v850_TRUE@am__append_104 = \
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MF		 279@SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \
280@SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \
281@SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \
282@SIM_ENABLE_ARCH_v850_TRUE@ v850/model.h \
283@SIM_ENABLE_ARCH_v850_TRUE@ v850/support.h \
284@SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \
285@SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h
286
bc1dd618 287@SIM_ENABLE_ARCH_v850_TRUE@am__append_105 = $(v850_BUILD_OUTPUTS)
cdbb77e4 288@SIM_ENABLE_ARCH_v850_TRUE@am__append_106 = $(v850_BUILD_OUTPUTS)
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MF		 289subdir = .
290ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
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MF		 291am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
292 $(top_srcdir)/../config/depstand.m4 \
6bddc3e8 293 $(top_srcdir)/../config/lead-dot.m4 \
c2783492 294 $(top_srcdir)/../config/override.m4 \
89cf99a9 295 $(top_srcdir)/../config/pkg.m4 $(top_srcdir)/../libtool.m4 \
b5689863
MF		 296 $(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
297 $(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
ba307cdd 298 $(top_srcdir)/m4/sim_ac_option_alignment.m4 \
dba333c1 299 $(top_srcdir)/m4/sim_ac_option_assert.m4 \
1bf5c342 300 $(top_srcdir)/m4/sim_ac_option_cgen_maint.m4 \
04381273 301 $(top_srcdir)/m4/sim_ac_option_debug.m4 \
f9a4d543 302 $(top_srcdir)/m4/sim_ac_option_endian.m4 \
5ea45474 303 $(top_srcdir)/m4/sim_ac_option_environment.m4 \
456ef1c1 304 $(top_srcdir)/m4/sim_ac_option_hardware.m4 \
d73f39ee 305 $(top_srcdir)/m4/sim_ac_option_inline.m4 \
04381273 306 $(top_srcdir)/m4/sim_ac_option_profile.m4 \
7eb1f99a 307 $(top_srcdir)/m4/sim_ac_option_reserved_bits.m4 \
b79efe26 308 $(top_srcdir)/m4/sim_ac_option_scache.m4 \
20b579ba 309 $(top_srcdir)/m4/sim_ac_option_smp.m4 \
04381273
MF		 310 $(top_srcdir)/m4/sim_ac_option_stdio.m4 \
311 $(top_srcdir)/m4/sim_ac_option_trace.m4 \
47ce766a 312 $(top_srcdir)/m4/sim_ac_option_warnings.m4 \
b15c5d7a 313 $(top_srcdir)/m4/sim_ac_platform.m4 \
c2783492 314 $(top_srcdir)/m4/sim_ac_toolchain.m4 \
23ddbd2f 315 $(top_srcdir)/frv/acinclude.m4 $(top_srcdir)/mips/acinclude.m4 \
1787fcc4 316 $(top_srcdir)/riscv/acinclude.m4 $(top_srcdir)/rx/acinclude.m4 \
408a44aa 317 $(top_srcdir)/configure.ac
6bddc3e8
MF		 318am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
319 $(ACLOCAL_M4)
320DIST_COMMON = $(srcdir)/Makefile.am $(top_srcdir)/configure \
fb2c495f 321 $(am__configure_deps) $(am__pkginclude_HEADERS_DIST)
6bddc3e8
MF		 322am__CONFIG_DISTCLEAN_FILES = config.status config.cache config.log \
323 configure.lineno config.status.lineno
324mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs
b15c5d7a 325CONFIG_HEADER = config.h
23912acd
MF		 326CONFIG_CLEAN_FILES = Make-common.sim aarch64/Makefile.sim \
327 aarch64/.gdbinit arm/Makefile.sim arm/.gdbinit \
328 avr/Makefile.sim avr/.gdbinit bfin/Makefile.sim bfin/.gdbinit \
ee79c7df
MF		 329 bpf/Makefile.sim bpf/.gdbinit cr16/Makefile.sim cr16/.gdbinit \
330 cris/Makefile.sim cris/.gdbinit d10v/Makefile.sim \
331 d10v/.gdbinit frv/Makefile.sim frv/.gdbinit ft32/Makefile.sim \
332 ft32/.gdbinit h8300/Makefile.sim h8300/.gdbinit \
333 iq2000/Makefile.sim iq2000/.gdbinit lm32/Makefile.sim \
334 lm32/.gdbinit m32c/Makefile.sim m32c/.gdbinit \
335 m32r/Makefile.sim m32r/.gdbinit m68hc11/Makefile.sim \
336 m68hc11/.gdbinit mcore/Makefile.sim mcore/.gdbinit \
abc494c6
MF		 337 microblaze/Makefile.sim microblaze/.gdbinit mips/Makefile.sim \
338 mips/.gdbinit mn10300/Makefile.sim mn10300/.gdbinit \
339 moxie/Makefile.sim moxie/.gdbinit msp430/Makefile.sim \
340 msp430/.gdbinit or1k/Makefile.sim or1k/.gdbinit ppc/.gdbinit \
341 pru/Makefile.sim pru/.gdbinit riscv/Makefile.sim \
342 riscv/.gdbinit rl78/Makefile.sim rl78/.gdbinit rx/Makefile.sim \
343 rx/.gdbinit sh/Makefile.sim sh/.gdbinit erc32/Makefile.sim \
344 erc32/.gdbinit v850/Makefile.sim v850/.gdbinit \
345 example-synacor/Makefile.sim example-synacor/.gdbinit \
346 arch-subdir.mk .gdbinit
6bddc3e8 347CONFIG_CLEAN_VPATH_FILES =
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MF		 348LIBRARIES = $(noinst_LIBRARIES)
349ARFLAGS = cru
350AM_V_AR = $(am__v_AR_@AM_V@)
351am__v_AR_ = $(am__v_AR_@AM_DEFAULT_V@)
352am__v_AR_0 = @echo " AR " $@;
353am__v_AR_1 =
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MF		 354aarch64_libsim_a_AR = $(AR) $(ARFLAGS)
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356@SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst \
357@SIM_ENABLE_ARCH_aarch64_TRUE@ %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
358@SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst \
359@SIM_ENABLE_ARCH_aarch64_TRUE@ %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
360@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/cpustate.o \
361@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/interp.o \
362@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/memory.o \
363@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/modules.o \
364@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/sim-resume.o \
365@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/simulator.o
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MF		 369arm_libsim_a_AR = $(AR) $(ARFLAGS)
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372@SIM_ENABLE_ARCH_arm_TRUE@ %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
373@SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst \
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375@SIM_ENABLE_ARCH_arm_TRUE@ arm/armemu.o arm/armemu32.o \
376@SIM_ENABLE_ARCH_arm_TRUE@ arm/arminit.o arm/armos.o \
377@SIM_ENABLE_ARCH_arm_TRUE@ arm/armsupp.o arm/armvirt.o \
378@SIM_ENABLE_ARCH_arm_TRUE@ arm/thumbemu.o arm/armcopro.o \
379@SIM_ENABLE_ARCH_arm_TRUE@ arm/maverick.o arm/iwmmxt.o \
380@SIM_ENABLE_ARCH_arm_TRUE@ arm/modules.o
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MF		 383avr_libsim_a_AR = $(AR) $(ARFLAGS)
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385@SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst \
386@SIM_ENABLE_ARCH_avr_TRUE@ %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
387@SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst \
388@SIM_ENABLE_ARCH_avr_TRUE@ %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
389@SIM_ENABLE_ARCH_avr_TRUE@ avr/modules.o avr/sim-resume.o
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MF		 392bfin_libsim_a_AR = $(AR) $(ARFLAGS)
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395@SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst \
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397@SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst \
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399@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/bfin-sim.o bfin/devices.o \
400@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/gui.o bfin/interp.o \
401@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/machs.o bfin/modules.o \
402@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/sim-resume.o
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MF		 405bpf_libsim_a_AR = $(AR) $(ARFLAGS)
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408@SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst \
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411@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-scache.o bpf/cgen-trace.o \
412@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-utils.o bpf/arch.o \
413@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cpu.o bpf/decode-le.o \
414@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-be.o bpf/sem-le.o \
415@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-be.o bpf/mloop-le.o \
416@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.o bpf/bpf.o \
417@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf-helpers.o bpf/sim-if.o \
418@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/traps.o
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MF		 421common_libcommon_a_AR = $(AR) $(ARFLAGS)
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MF		 423am_common_libcommon_a_OBJECTS = common/callback.$(OBJEXT) \
424 common/portability.$(OBJEXT) common/sim-load.$(OBJEXT) \
425 common/syscall.$(OBJEXT) common/target-newlib-errno.$(OBJEXT) \
426 common/target-newlib-open.$(OBJEXT) \
427 common/target-newlib-signal.$(OBJEXT) \
428 common/target-newlib-syscall.$(OBJEXT) \
429 common/version.$(OBJEXT)
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MF		 431igen_libigen_a_AR = $(AR) $(ARFLAGS)
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MF		 433@SIM_ENABLE_IGEN_TRUE@am_igen_libigen_a_OBJECTS = \
434@SIM_ENABLE_IGEN_TRUE@ igen/table.$(OBJEXT) igen/lf.$(OBJEXT) \
435@SIM_ENABLE_IGEN_TRUE@ igen/misc.$(OBJEXT) \
436@SIM_ENABLE_IGEN_TRUE@ igen/filter_host.$(OBJEXT) \
437@SIM_ENABLE_IGEN_TRUE@ igen/ld-decode.$(OBJEXT) \
438@SIM_ENABLE_IGEN_TRUE@ igen/ld-cache.$(OBJEXT) \
439@SIM_ENABLE_IGEN_TRUE@ igen/filter.$(OBJEXT) \
440@SIM_ENABLE_IGEN_TRUE@ igen/ld-insn.$(OBJEXT) \
441@SIM_ENABLE_IGEN_TRUE@ igen/gen-model.$(OBJEXT) \
442@SIM_ENABLE_IGEN_TRUE@ igen/gen-itable.$(OBJEXT) \
443@SIM_ENABLE_IGEN_TRUE@ igen/gen-icache.$(OBJEXT) \
444@SIM_ENABLE_IGEN_TRUE@ igen/gen-semantics.$(OBJEXT) \
445@SIM_ENABLE_IGEN_TRUE@ igen/gen-idecode.$(OBJEXT) \
446@SIM_ENABLE_IGEN_TRUE@ igen/gen-support.$(OBJEXT) \
447@SIM_ENABLE_IGEN_TRUE@ igen/gen-engine.$(OBJEXT) \
448@SIM_ENABLE_IGEN_TRUE@ igen/gen.$(OBJEXT)
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MF		 450@SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) \
451@SIM_ENABLE_IGEN_TRUE@ igen/gen$(EXEEXT) igen/ld-cache$(EXEEXT) \
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MF		 452@SIM_ENABLE_IGEN_TRUE@ igen/ld-decode$(EXEEXT) \
453@SIM_ENABLE_IGEN_TRUE@ igen/ld-insn$(EXEEXT) \
454@SIM_ENABLE_IGEN_TRUE@ igen/table$(EXEEXT)
455@SIM_ENABLE_IGEN_TRUE@am__EXEEXT_2 = $(am__EXEEXT_1)
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MF		 456@SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_3 = cr16/gencode$(EXEEXT)
457@SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_4 = d10v/gencode$(EXEEXT)
458@SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_5 = m32c/opc2c$(EXEEXT)
459@SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_6 = m68hc11/gencode$(EXEEXT)
460@SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_7 = sh/gencode$(EXEEXT)
461am__EXEEXT_8 = testsuite/common/bits32m0$(EXEEXT) \
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MF		 462 testsuite/common/bits32m31$(EXEEXT) \
463 testsuite/common/bits64m0$(EXEEXT) \
464 testsuite/common/bits64m63$(EXEEXT) \
465 testsuite/common/alu-tst$(EXEEXT)
cb9bdc02 466@SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_9 = cris/rvdummy$(EXEEXT)
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MF		 467@SIM_ENABLE_ARCH_aarch64_TRUE@am__EXEEXT_10 = aarch64/run$(EXEEXT)
468@SIM_ENABLE_ARCH_arm_TRUE@am__EXEEXT_11 = arm/run$(EXEEXT)
469@SIM_ENABLE_ARCH_avr_TRUE@am__EXEEXT_12 = avr/run$(EXEEXT)
470@SIM_ENABLE_ARCH_bfin_TRUE@am__EXEEXT_13 = bfin/run$(EXEEXT)
471@SIM_ENABLE_ARCH_bpf_TRUE@am__EXEEXT_14 = bpf/run$(EXEEXT)
472@SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_15 = cr16/run$(EXEEXT)
473@SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_16 = cris/run$(EXEEXT)
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476@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/sis$(EXEEXT)
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478@SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/run$(EXEEXT)
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484@SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_25 = m32c/run$(EXEEXT)
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486@SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_27 = m68hc11/run$(EXEEXT)
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496@SIM_ENABLE_ARCH_ppc_TRUE@ ppc/psim$(EXEEXT)
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498@SIM_ENABLE_ARCH_riscv_TRUE@am__EXEEXT_37 = riscv/run$(EXEEXT)
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500@SIM_ENABLE_ARCH_rx_TRUE@am__EXEEXT_39 = rx/run$(EXEEXT)
501@SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_40 = sh/run$(EXEEXT)
502@SIM_ENABLE_ARCH_v850_TRUE@am__EXEEXT_41 = v850/run$(EXEEXT)
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127d167a 506am__DEPENDENCIES_1 = $(BFD_LIB) $(OPCODES_LIB) $(LIBIBERTY_LIB)
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MF		 507@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_DEPENDENCIES = \
508@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/nrun.o aarch64/libsim.a \
509@SIM_ENABLE_ARCH_aarch64_TRUE@ $(am__DEPENDENCIES_1)
510AM_V_lt = $(am__v_lt_@AM_V@)
511am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@)
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MF		 530@SIM_ENABLE_ARCH_cr16_TRUE@am_cr16_gencode_OBJECTS = \
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MF		 535am_cr16_run_OBJECTS =
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MF		 543@SIM_ENABLE_ARCH_cris_TRUE@am_cris_rvdummy_OBJECTS = \
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MF		 546@SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_DEPENDENCIES = \
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MF		 548@SIM_ENABLE_ARCH_d10v_TRUE@am_d10v_gencode_OBJECTS = \
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MF		 553am_d10v_run_OBJECTS =
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MF		 587am_igen_filter_OBJECTS =
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MF		 591am_igen_gen_OBJECTS =
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MF		 614am_iq2000_run_OBJECTS =
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MF		 623@SIM_ENABLE_ARCH_m32c_TRUE@am_m32c_opc2c_OBJECTS = \
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MF		 627am_m32c_run_OBJECTS =
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MF		 635@SIM_ENABLE_ARCH_m68hc11_TRUE@am_m68hc11_gencode_OBJECTS = \
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MF		 639am_m68hc11_run_OBJECTS =
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642@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/nrun.o m68hc11/libsim.a \
643@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(am__DEPENDENCIES_1)
644am_mcore_run_OBJECTS =
645mcore_run_OBJECTS = $(am_mcore_run_OBJECTS)
646@SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_DEPENDENCIES = mcore/nrun.o \
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649am_microblaze_run_OBJECTS =
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652@SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/nrun.o \
653@SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/libsim.a \
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655am_mips_run_OBJECTS =
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681am_ppc_run_OBJECTS =
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685am_pru_run_OBJECTS =
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689am_riscv_run_OBJECTS =
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698am_rx_run_OBJECTS =
699rx_run_OBJECTS = $(am_rx_run_OBJECTS)
700@SIM_ENABLE_ARCH_rx_TRUE@rx_run_DEPENDENCIES = rx/main.o rx/libsim.a \
701@SIM_ENABLE_ARCH_rx_TRUE@ $(am__DEPENDENCIES_1)
70ab6bdd
MF		 702@SIM_ENABLE_ARCH_sh_TRUE@am_sh_gencode_OBJECTS = sh/gencode.$(OBJEXT)
703sh_gencode_OBJECTS = $(am_sh_gencode_OBJECTS)
704sh_gencode_LDADD = $(LDADD)
c0c25232
MF		 705am_sh_run_OBJECTS =
706sh_run_OBJECTS = $(am_sh_run_OBJECTS)
707@SIM_ENABLE_ARCH_sh_TRUE@sh_run_DEPENDENCIES = sh/nrun.o sh/libsim.a \
708@SIM_ENABLE_ARCH_sh_TRUE@ $(am__DEPENDENCIES_1)
a389375f
MF		 709testsuite_common_alu_tst_SOURCES = testsuite/common/alu-tst.c
710testsuite_common_alu_tst_OBJECTS = testsuite/common/alu-tst.$(OBJEXT)
711testsuite_common_alu_tst_LDADD = $(LDADD)
712testsuite_common_bits_gen_SOURCES = testsuite/common/bits-gen.c
713testsuite_common_bits_gen_OBJECTS = \
714 testsuite/common/bits-gen.$(OBJEXT)
715testsuite_common_bits_gen_LDADD = $(LDADD)
716testsuite_common_bits32m0_SOURCES = testsuite/common/bits32m0.c
717testsuite_common_bits32m0_OBJECTS = \
718 testsuite/common/bits32m0.$(OBJEXT)
719testsuite_common_bits32m0_LDADD = $(LDADD)
720testsuite_common_bits32m31_SOURCES = testsuite/common/bits32m31.c
721testsuite_common_bits32m31_OBJECTS = \
722 testsuite/common/bits32m31.$(OBJEXT)
723testsuite_common_bits32m31_LDADD = $(LDADD)
724testsuite_common_bits64m0_SOURCES = testsuite/common/bits64m0.c
725testsuite_common_bits64m0_OBJECTS = \
726 testsuite/common/bits64m0.$(OBJEXT)
727testsuite_common_bits64m0_LDADD = $(LDADD)
728testsuite_common_bits64m63_SOURCES = testsuite/common/bits64m63.c
729testsuite_common_bits64m63_OBJECTS = \
730 testsuite/common/bits64m63.$(OBJEXT)
731testsuite_common_bits64m63_LDADD = $(LDADD)
732testsuite_common_fpu_tst_SOURCES = testsuite/common/fpu-tst.c
733testsuite_common_fpu_tst_OBJECTS = testsuite/common/fpu-tst.$(OBJEXT)
734testsuite_common_fpu_tst_LDADD = $(LDADD)
c0c25232
MF		 735am_v850_run_OBJECTS =
736v850_run_OBJECTS = $(am_v850_run_OBJECTS)
737@SIM_ENABLE_ARCH_v850_TRUE@v850_run_DEPENDENCIES = v850/nrun.o \
738@SIM_ENABLE_ARCH_v850_TRUE@ v850/libsim.a $(am__DEPENDENCIES_1)
6bddc3e8
MF		 739AM_V_P = $(am__v_P_@AM_V@)
740am__v_P_ = $(am__v_P_@AM_DEFAULT_V@)
741am__v_P_0 = false
742am__v_P_1 = :
743AM_V_GEN = $(am__v_GEN_@AM_V@)
744am__v_GEN_ = $(am__v_GEN_@AM_DEFAULT_V@)
745am__v_GEN_0 = @echo " GEN " $@;
746am__v_GEN_1 =
747AM_V_at = $(am__v_at_@AM_V@)
748am__v_at_ = $(am__v_at_@AM_DEFAULT_V@)
749am__v_at_0 = @
750am__v_at_1 =
b6b1c790
MF		 751DEFAULT_INCLUDES = -I.@am__isrc@
752depcomp = $(SHELL) $(top_srcdir)/../depcomp
753am__depfiles_maybe = depfiles
754am__mv = mv -f
755COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \
756 $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
b5689863
MF		 757LTCOMPILE = $(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) \
758 $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) \
759 $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) \
760 $(AM_CFLAGS) $(CFLAGS)
b6b1c790
MF		 761AM_V_CC = $(am__v_CC_@AM_V@)
762am__v_CC_ = $(am__v_CC_@AM_DEFAULT_V@)
763am__v_CC_0 = @echo " CC " $@;
764am__v_CC_1 =
765CCLD = $(CC)
b5689863
MF		 766LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) \
767 $(LIBTOOLFLAGS) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \
768 $(AM_LDFLAGS) $(LDFLAGS) -o $@
b6b1c790
MF		 769AM_V_CCLD = $(am__v_CCLD_@AM_V@)
770am__v_CCLD_ = $(am__v_CCLD_@AM_DEFAULT_V@)
771am__v_CCLD_0 = @echo " CCLD " $@;
772am__v_CCLD_1 =
6a8e18f0 773SOURCES = $(aarch64_libsim_a_SOURCES) $(arm_libsim_a_SOURCES) \
bc1dd618 774 $(avr_libsim_a_SOURCES) $(bfin_libsim_a_SOURCES) \
cdbb77e4
MF		 775 $(bpf_libsim_a_SOURCES) $(common_libcommon_a_SOURCES) \
776 $(igen_libigen_a_SOURCES) $(aarch64_run_SOURCES) \
777 $(arm_run_SOURCES) $(avr_run_SOURCES) $(bfin_run_SOURCES) \
778 $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) $(cr16_run_SOURCES) \
779 $(cris_run_SOURCES) $(cris_rvdummy_SOURCES) \
780 $(d10v_gencode_SOURCES) $(d10v_run_SOURCES) \
781 $(erc32_run_SOURCES) erc32/sis.c \
c0c25232
MF		 782 $(example_synacor_run_SOURCES) $(frv_run_SOURCES) \
783 $(ft32_run_SOURCES) $(h8300_run_SOURCES) \
784 $(igen_filter_SOURCES) $(igen_gen_SOURCES) \
785 $(igen_igen_SOURCES) $(igen_ld_cache_SOURCES) \
786 $(igen_ld_decode_SOURCES) $(igen_ld_insn_SOURCES) \
787 $(igen_table_SOURCES) $(iq2000_run_SOURCES) \
788 $(lm32_run_SOURCES) $(m32c_opc2c_SOURCES) $(m32c_run_SOURCES) \
789 $(m32r_run_SOURCES) $(m68hc11_gencode_SOURCES) \
790 $(m68hc11_run_SOURCES) $(mcore_run_SOURCES) \
791 $(microblaze_run_SOURCES) $(mips_run_SOURCES) \
792 $(mn10300_run_SOURCES) $(moxie_run_SOURCES) \
793 $(msp430_run_SOURCES) $(or1k_run_SOURCES) ppc/psim.c \
794 $(ppc_run_SOURCES) $(pru_run_SOURCES) $(riscv_run_SOURCES) \
795 $(rl78_run_SOURCES) $(rx_run_SOURCES) $(sh_gencode_SOURCES) \
796 $(sh_run_SOURCES) testsuite/common/alu-tst.c \
cb9bdc02
MF		 797 testsuite/common/bits-gen.c testsuite/common/bits32m0.c \
798 testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
c0c25232
MF		 799 testsuite/common/bits64m63.c testsuite/common/fpu-tst.c \
800 $(v850_run_SOURCES)
6bddc3e8
MF		 801RECURSIVE_TARGETS = all-recursive check-recursive cscopelist-recursive \
802 ctags-recursive dvi-recursive html-recursive info-recursive \
803 install-data-recursive install-dvi-recursive \
804 install-exec-recursive install-html-recursive \
805 install-info-recursive install-pdf-recursive \
806 install-ps-recursive install-recursive installcheck-recursive \
807 installdirs-recursive pdf-recursive ps-recursive \
808 tags-recursive uninstall-recursive
809am__can_run_installinfo = \
810 case $$AM_UPDATE_INFO_DIR in \
811 n|no|NO) false;; \
812 *) (install-info --version) >/dev/null 2>&1;; \
813 esac
92bc001e
MF		 814am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`;
815am__vpath_adj = case $$p in \
816 $(srcdir)/*) f=`echo "$$p" | sed "s|^$$srcdirstrip/||"`;; \
817 *) f=$$p;; \
818 esac;
819am__strip_dir = f=`echo $$p | sed -e 's|^.*/||'`;
820am__install_max = 40
821am__nobase_strip_setup = \
822 srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*|]/\\\\&/g'`
823am__nobase_strip = \
824 for p in $$list; do echo "$$p"; done | sed -e "s|$$srcdirstrip/||"
825am__nobase_list = $(am__nobase_strip_setup); \
826 for p in $$list; do echo "$$p $$p"; done | \
827 sed "s| $$srcdirstrip/| |;"' / .*\//!s/ .*/ ./; s,\( .*\)/[^/]*$$,\1,' | \
828 $(AWK) 'BEGIN { files["."] = "" } { files[$$2] = files[$$2] " " $$1; \
829 if (++n[$$2] == $(am__install_max)) \
830 { print $$2, files[$$2]; n[$$2] = 0; files[$$2] = "" } } \
831 END { for (dir in files) print dir, files[dir] }'
832am__base_list = \
833 sed '$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;s/\n/ /g' | \
834 sed '$$!N;$$!N;$$!N;$$!N;s/\n/ /g'
835am__uninstall_files_from_dir = { \
836 test -z "$$files" \
837 || { test ! -d "$$dir" && test ! -f "$$dir" && test ! -r "$$dir"; } \
838 || { echo " ( cd '$$dir' && rm -f" $$files ")"; \
839 $(am__cd) "$$dir" && rm -f $$files; }; \
840 }
94f5dfed
MF		 841am__installdirs = "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" \
842 "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" \
843 "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" \
844 "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"
845DATA = $(armdoc_DATA) $(dtb_DATA) $(erc32doc_DATA) $(frvdoc_DATA) \
846 $(or1kdoc_DATA) $(ppcdoc_DATA) $(rxdoc_DATA)
ed939535
MF		 847am__pkginclude_HEADERS_DIST = $(srcroot)/include/sim/callback.h \
848 $(srcroot)/include/sim/sim.h
92bc001e 849HEADERS = $(pkginclude_HEADERS)
6bddc3e8
MF		 850RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
851 distclean-recursive maintainer-clean-recursive
852am__recursive_targets = \
853 $(RECURSIVE_TARGETS) \
854 $(RECURSIVE_CLEAN_TARGETS) \
855 $(am__extra_recursive_targets)
856AM_RECURSIVE_TARGETS = $(am__recursive_targets:-recursive=) TAGS CTAGS \
a389375f 857 cscope check recheck
b15c5d7a
MF		 858am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) \
859 $(LISP)config.h.in
6bddc3e8
MF		 860# Read a list of newline-separated strings from the standard input,
861# and print each of them once, without duplicates. Input order is
862# *not* preserved.
863am__uniquify_input = $(AWK) '\
864 BEGIN { nonempty = 0; } \
865 { items[$$0] = 1; nonempty = 1; } \
866 END { if (nonempty) { for (i in items) print i; }; } \
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868# Make sure the list of sources is unique. This is necessary because,
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870# for different programs/libraries.
871am__define_uniq_tagged_files = \
872 list='$(am__tagged_files)'; \
873 unique=`for i in $$list; do \
874 if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
875 done | $(am__uniquify_input)`
876ETAGS = etags
877CTAGS = ctags
878CSCOPE = cscope
6c57b87f
MF		 879DEJATOOL = $(PACKAGE)
880RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
881EXPECT = expect
882RUNTEST = runtest
a389375f
MF		 883am__tty_colors_dummy = \
884 mgn= red= grn= lgn= blu= brg= std=; \
885 am__color_tests=no
886am__tty_colors = { \
887 $(am__tty_colors_dummy); \
888 if test "X$(AM_COLOR_TESTS)" = Xno; then \
889 am__color_tests=no; \
890 elif test "X$(AM_COLOR_TESTS)" = Xalways; then \
891 am__color_tests=yes; \
892 elif test "X$$TERM" != Xdumb && { test -t 1; } 2>/dev/null; then \
893 am__color_tests=yes; \
894 fi; \
895 if test $$am__color_tests = yes; then \
896 red='\e[0;31m'; \
897 grn='\e[0;32m'; \
898 lgn='\e[1;32m'; \
899 blu='\e[1;34m'; \
900 mgn='\e[0;35m'; \
901 brg='\e[1m'; \
902 std='\e[m'; \
903 fi; \
904}
a389375f
MF		 905am__recheck_rx = ^[ ]*:recheck:[ ]*
906am__global_test_result_rx = ^[ ]*:global-test-result:[ ]*
907am__copy_in_global_log_rx = ^[ ]*:copy-in-global-log:[ ]*
908# A command that, given a newline-separated list of test names on the
909# standard input, print the name of the tests that are to be re-run
910# upon "make recheck".
911am__list_recheck_tests = $(AWK) '{ \
912 recheck = 1; \
913 while ((rc = (getline line < ($$0 ".trs"))) != 0) \
914 { \
915 if (rc < 0) \
916 { \
917 if ((getline line2 < ($$0 ".log")) < 0) \
918 recheck = 0; \
919 break; \
920 } \
921 else if (line ~ /$(am__recheck_rx)[nN][Oo]/) \
922 { \
923 recheck = 0; \
924 break; \
925 } \
926 else if (line ~ /$(am__recheck_rx)[yY][eE][sS]/) \
927 { \
928 break; \
929 } \
930 }; \
931 if (recheck) \
932 print $$0; \
933 close ($$0 ".trs"); \
934 close ($$0 ".log"); \
935}'
936# A command that, given a newline-separated list of test names on the
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938am__create_global_log = $(AWK) ' \
939function fatal(msg) \
940{ \
941 print "fatal: making $@: " msg | "cat >&2"; \
942 exit 1; \
943} \
944function rst_section(header) \
945{ \
946 print header; \
947 len = length(header); \
948 for (i = 1; i <= len; i = i + 1) \
949 printf "="; \
950 printf "\n\n"; \
951} \
952{ \
953 copy_in_global_log = 1; \
954 global_test_result = "RUN"; \
955 while ((rc = (getline line < ($$0 ".trs"))) != 0) \
956 { \
957 if (rc < 0) \
958 fatal("failed to read from " $$0 ".trs"); \
959 if (line ~ /$(am__global_test_result_rx)/) \
960 { \
961 sub("$(am__global_test_result_rx)", "", line); \
962 sub("[ ]*$$", "", line); \
963 global_test_result = line; \
964 } \
965 else if (line ~ /$(am__copy_in_global_log_rx)[nN][oO]/) \
966 copy_in_global_log = 0; \
967 }; \
968 if (copy_in_global_log) \
969 { \
970 rst_section(global_test_result ": " $$0); \
971 while ((rc = (getline line < ($$0 ".log"))) != 0) \
972 { \
973 if (rc < 0) \
974 fatal("failed to read from " $$0 ".log"); \
975 print line; \
976 }; \
977 printf "\n"; \
978 }; \
979 close ($$0 ".trs"); \
980 close ($$0 ".log"); \
981}'
982# Restructured Text title.
983am__rst_title = { sed 's/.*/ & /;h;s/./=/g;p;x;s/ *$$//;p;g' && echo; }
984# Solaris 10 'make', and several other traditional 'make' implementations,
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987am__sh_e_setup = case $$- in *e*) set +e;; esac
988# Default flags passed to test drivers.
989am__common_driver_flags = \
990 --color-tests "$$am__color_tests" \
991 --enable-hard-errors "$$am__enable_hard_errors" \
992 --expect-failure "$$am__expect_failure"
993# To be inserted before the command running the test. Creates the
994# directory for the log if needed. Stores in $dir the directory
995# containing $f, in $tst the test, in $log the log. Executes the
996# developer- defined test setup AM_TESTS_ENVIRONMENT (if any), and
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1000am__check_pre = \
1001$(am__sh_e_setup); \
1002$(am__vpath_adj_setup) $(am__vpath_adj) \
1003$(am__tty_colors); \
1004srcdir=$(srcdir); export srcdir; \
1005case "$@" in \
1006 */*) am__odir=`echo "./$@" | sed 's|/[^/]*$$||'`;; \
1007 *) am__odir=.;; \
1008esac; \
1009test "x$$am__odir" = x"." || test -d "$$am__odir" \
1010 || $(MKDIR_P) "$$am__odir" || exit $$?; \
1011if test -f "./$$f"; then dir=./; \
1012elif test -f "$$f"; then dir=; \
1013else dir="$(srcdir)/"; fi; \
1014tst=$$dir$$f; log='$@'; \
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1016 am__enable_hard_errors=no; \
1017else \
1018 am__enable_hard_errors=yes; \
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1020case " $(XFAIL_TESTS) " in \
1021 *[\ \ ]$$f[\ \ ]* | *[\ \ ]$$dir$$f[\ \ ]*) \
1022 am__expect_failure=yes;; \
1023 *) \
1024 am__expect_failure=no;; \
1025esac; \
1026$(AM_TESTS_ENVIRONMENT) $(TESTS_ENVIRONMENT)
1027# A shell command to get the names of the tests scripts with any registered
1028# extension removed (i.e., equivalently, the names of the test logs, with
1029# the '.log' extension removed). The result is saved in the shell variable
1030# '$bases'. This honors runtime overriding of TESTS and TEST_LOGS. Sadly,
1031# we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)",
1032# since that might cause problem with VPATH rewrites for suffix-less tests.
1033# See also 'test-harness-vpath-rewrite.sh' and 'test-trs-basic.sh'.
1034am__set_TESTS_bases = \
1035 bases='$(TEST_LOGS)'; \
1036 bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \
1037 bases=`echo $$bases`
1038RECHECK_LOGS = $(TEST_LOGS)
1039TEST_SUITE_LOG = test-suite.log
1040TEST_EXTENSIONS = @EXEEXT@ .test
1041LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1042LOG_COMPILE = $(LOG_COMPILER) $(AM_LOG_FLAGS) $(LOG_FLAGS)
1043am__set_b = \
1044 case '$@' in \
1045 */*) \
1046 case '$*' in \
1047 */*) b='$*';; \
1048 *) b=`echo '$@' | sed 's/\.log$$//'`; \
1049 esac;; \
1050 *) \
1051 b='$*';; \
1052 esac
1053am__test_logs1 = $(TESTS:=.log)
1054am__test_logs2 = $(am__test_logs1:@EXEEXT@.log=.log)
1055TEST_LOGS = $(am__test_logs2:.test.log=.log)
1056TEST_LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1057TEST_LOG_COMPILE = $(TEST_LOG_COMPILER) $(AM_TEST_LOG_FLAGS) \
1058 $(TEST_LOG_FLAGS)
6bddc3e8
MF		 1059DIST_SUBDIRS = $(SUBDIRS)
1060ACLOCAL = @ACLOCAL@
1061AMTAR = @AMTAR@
1062AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
1063AR = @AR@
aa0fca16 1064AR_FOR_BUILD = @AR_FOR_BUILD@
dc4e1fde 1065AS_FOR_TARGET = @AS_FOR_TARGET@
8996c210
MF		 1066AS_FOR_TARGET_AARCH64 = @AS_FOR_TARGET_AARCH64@
1067AS_FOR_TARGET_ARM = @AS_FOR_TARGET_ARM@
1068AS_FOR_TARGET_AVR = @AS_FOR_TARGET_AVR@
1069AS_FOR_TARGET_BFIN = @AS_FOR_TARGET_BFIN@
1070AS_FOR_TARGET_BPF = @AS_FOR_TARGET_BPF@
1071AS_FOR_TARGET_CR16 = @AS_FOR_TARGET_CR16@
1072AS_FOR_TARGET_CRIS = @AS_FOR_TARGET_CRIS@
1073AS_FOR_TARGET_D10V = @AS_FOR_TARGET_D10V@
1074AS_FOR_TARGET_ERC32 = @AS_FOR_TARGET_ERC32@
1075AS_FOR_TARGET_EXAMPLE_SYNACOR = @AS_FOR_TARGET_EXAMPLE_SYNACOR@
1076AS_FOR_TARGET_FRV = @AS_FOR_TARGET_FRV@
1077AS_FOR_TARGET_FT32 = @AS_FOR_TARGET_FT32@
1078AS_FOR_TARGET_H8300 = @AS_FOR_TARGET_H8300@
1079AS_FOR_TARGET_IQ2000 = @AS_FOR_TARGET_IQ2000@
1080AS_FOR_TARGET_LM32 = @AS_FOR_TARGET_LM32@
1081AS_FOR_TARGET_M32C = @AS_FOR_TARGET_M32C@
1082AS_FOR_TARGET_M32R = @AS_FOR_TARGET_M32R@
1083AS_FOR_TARGET_M68HC11 = @AS_FOR_TARGET_M68HC11@
1084AS_FOR_TARGET_MCORE = @AS_FOR_TARGET_MCORE@
1085AS_FOR_TARGET_MICROBLAZE = @AS_FOR_TARGET_MICROBLAZE@
1086AS_FOR_TARGET_MIPS = @AS_FOR_TARGET_MIPS@
1087AS_FOR_TARGET_MN10300 = @AS_FOR_TARGET_MN10300@
1088AS_FOR_TARGET_MOXIE = @AS_FOR_TARGET_MOXIE@
1089AS_FOR_TARGET_MSP430 = @AS_FOR_TARGET_MSP430@
1090AS_FOR_TARGET_OR1K = @AS_FOR_TARGET_OR1K@
1091AS_FOR_TARGET_PPC = @AS_FOR_TARGET_PPC@
1092AS_FOR_TARGET_PRU = @AS_FOR_TARGET_PRU@
1093AS_FOR_TARGET_RISCV = @AS_FOR_TARGET_RISCV@
1094AS_FOR_TARGET_RL78 = @AS_FOR_TARGET_RL78@
1095AS_FOR_TARGET_RX = @AS_FOR_TARGET_RX@
1096AS_FOR_TARGET_SH = @AS_FOR_TARGET_SH@
1097AS_FOR_TARGET_V850 = @AS_FOR_TARGET_V850@
6bddc3e8
MF		 1098AUTOCONF = @AUTOCONF@
1099AUTOHEADER = @AUTOHEADER@
1100AUTOMAKE = @AUTOMAKE@
1101AWK = @AWK@
1102CC = @CC@
1103CCDEPMODE = @CCDEPMODE@
1104CC_FOR_BUILD = @CC_FOR_BUILD@
dc4e1fde 1105CC_FOR_TARGET = @CC_FOR_TARGET@
8996c210
MF		 1106CC_FOR_TARGET_AARCH64 = @CC_FOR_TARGET_AARCH64@
1107CC_FOR_TARGET_ARM = @CC_FOR_TARGET_ARM@
1108CC_FOR_TARGET_AVR = @CC_FOR_TARGET_AVR@
1109CC_FOR_TARGET_BFIN = @CC_FOR_TARGET_BFIN@
1110CC_FOR_TARGET_BPF = @CC_FOR_TARGET_BPF@
1111CC_FOR_TARGET_CR16 = @CC_FOR_TARGET_CR16@
1112CC_FOR_TARGET_CRIS = @CC_FOR_TARGET_CRIS@
1113CC_FOR_TARGET_D10V = @CC_FOR_TARGET_D10V@
1114CC_FOR_TARGET_ERC32 = @CC_FOR_TARGET_ERC32@
1115CC_FOR_TARGET_EXAMPLE_SYNACOR = @CC_FOR_TARGET_EXAMPLE_SYNACOR@
1116CC_FOR_TARGET_FRV = @CC_FOR_TARGET_FRV@
1117CC_FOR_TARGET_FT32 = @CC_FOR_TARGET_FT32@
1118CC_FOR_TARGET_H8300 = @CC_FOR_TARGET_H8300@
1119CC_FOR_TARGET_IQ2000 = @CC_FOR_TARGET_IQ2000@
1120CC_FOR_TARGET_LM32 = @CC_FOR_TARGET_LM32@
1121CC_FOR_TARGET_M32C = @CC_FOR_TARGET_M32C@
1122CC_FOR_TARGET_M32R = @CC_FOR_TARGET_M32R@
1123CC_FOR_TARGET_M68HC11 = @CC_FOR_TARGET_M68HC11@
1124CC_FOR_TARGET_MCORE = @CC_FOR_TARGET_MCORE@
1125CC_FOR_TARGET_MICROBLAZE = @CC_FOR_TARGET_MICROBLAZE@
1126CC_FOR_TARGET_MIPS = @CC_FOR_TARGET_MIPS@
1127CC_FOR_TARGET_MN10300 = @CC_FOR_TARGET_MN10300@
1128CC_FOR_TARGET_MOXIE = @CC_FOR_TARGET_MOXIE@
1129CC_FOR_TARGET_MSP430 = @CC_FOR_TARGET_MSP430@
1130CC_FOR_TARGET_OR1K = @CC_FOR_TARGET_OR1K@
1131CC_FOR_TARGET_PPC = @CC_FOR_TARGET_PPC@
1132CC_FOR_TARGET_PRU = @CC_FOR_TARGET_PRU@
1133CC_FOR_TARGET_RISCV = @CC_FOR_TARGET_RISCV@
1134CC_FOR_TARGET_RL78 = @CC_FOR_TARGET_RL78@
1135CC_FOR_TARGET_RX = @CC_FOR_TARGET_RX@
1136CC_FOR_TARGET_SH = @CC_FOR_TARGET_SH@
1137CC_FOR_TARGET_V850 = @CC_FOR_TARGET_V850@
6bddc3e8
MF		 1138CFLAGS = @CFLAGS@
1139CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
1bf5c342 1140CGEN_MAINT = @CGEN_MAINT@
6bddc3e8
MF		 1141CPP = @CPP@
1142CPPFLAGS = @CPPFLAGS@
fde7c6bf 1143CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@
6bddc3e8 1144CYGPATH_W = @CYGPATH_W@
c2783492 1145C_DIALECT = @C_DIALECT@
6bddc3e8
MF		 1146DEFS = @DEFS@
1147DEPDIR = @DEPDIR@
b5689863 1148DSYMUTIL = @DSYMUTIL@
a979f2a0 1149DTC = @DTC@
b5689863 1150DUMPBIN = @DUMPBIN@
6bddc3e8
MF		 1151ECHO_C = @ECHO_C@
1152ECHO_N = @ECHO_N@
1153ECHO_T = @ECHO_T@
c2783492 1154EGREP = @EGREP@
6bddc3e8 1155EXEEXT = @EXEEXT@
b5689863 1156FGREP = @FGREP@
c2783492 1157GREP = @GREP@
111b1cf9 1158IGEN_FLAGS_SMP = @IGEN_FLAGS_SMP@
6bddc3e8
MF		 1159INSTALL = @INSTALL@
1160INSTALL_DATA = @INSTALL_DATA@
1161INSTALL_PROGRAM = @INSTALL_PROGRAM@
1162INSTALL_SCRIPT = @INSTALL_SCRIPT@
1163INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
b5689863 1164LD = @LD@
6bddc3e8 1165LDFLAGS = @LDFLAGS@
c2783492 1166LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@
dc4e1fde 1167LD_FOR_TARGET = @LD_FOR_TARGET@
8996c210
MF		 1168LD_FOR_TARGET_AARCH64 = @LD_FOR_TARGET_AARCH64@
1169LD_FOR_TARGET_ARM = @LD_FOR_TARGET_ARM@
1170LD_FOR_TARGET_AVR = @LD_FOR_TARGET_AVR@
1171LD_FOR_TARGET_BFIN = @LD_FOR_TARGET_BFIN@
1172LD_FOR_TARGET_BPF = @LD_FOR_TARGET_BPF@
1173LD_FOR_TARGET_CR16 = @LD_FOR_TARGET_CR16@
1174LD_FOR_TARGET_CRIS = @LD_FOR_TARGET_CRIS@
1175LD_FOR_TARGET_D10V = @LD_FOR_TARGET_D10V@
1176LD_FOR_TARGET_ERC32 = @LD_FOR_TARGET_ERC32@
1177LD_FOR_TARGET_EXAMPLE_SYNACOR = @LD_FOR_TARGET_EXAMPLE_SYNACOR@
1178LD_FOR_TARGET_FRV = @LD_FOR_TARGET_FRV@
1179LD_FOR_TARGET_FT32 = @LD_FOR_TARGET_FT32@
1180LD_FOR_TARGET_H8300 = @LD_FOR_TARGET_H8300@
1181LD_FOR_TARGET_IQ2000 = @LD_FOR_TARGET_IQ2000@
1182LD_FOR_TARGET_LM32 = @LD_FOR_TARGET_LM32@
1183LD_FOR_TARGET_M32C = @LD_FOR_TARGET_M32C@
1184LD_FOR_TARGET_M32R = @LD_FOR_TARGET_M32R@
1185LD_FOR_TARGET_M68HC11 = @LD_FOR_TARGET_M68HC11@
1186LD_FOR_TARGET_MCORE = @LD_FOR_TARGET_MCORE@
1187LD_FOR_TARGET_MICROBLAZE = @LD_FOR_TARGET_MICROBLAZE@
1188LD_FOR_TARGET_MIPS = @LD_FOR_TARGET_MIPS@
1189LD_FOR_TARGET_MN10300 = @LD_FOR_TARGET_MN10300@
1190LD_FOR_TARGET_MOXIE = @LD_FOR_TARGET_MOXIE@
1191LD_FOR_TARGET_MSP430 = @LD_FOR_TARGET_MSP430@
1192LD_FOR_TARGET_OR1K = @LD_FOR_TARGET_OR1K@
1193LD_FOR_TARGET_PPC = @LD_FOR_TARGET_PPC@
1194LD_FOR_TARGET_PRU = @LD_FOR_TARGET_PRU@
1195LD_FOR_TARGET_RISCV = @LD_FOR_TARGET_RISCV@
1196LD_FOR_TARGET_RL78 = @LD_FOR_TARGET_RL78@
1197LD_FOR_TARGET_RX = @LD_FOR_TARGET_RX@
1198LD_FOR_TARGET_SH = @LD_FOR_TARGET_SH@
1199LD_FOR_TARGET_V850 = @LD_FOR_TARGET_V850@
6bddc3e8
MF		 1200LIBOBJS = @LIBOBJS@
1201LIBS = @LIBS@
b5689863
MF		 1202LIBTOOL = @LIBTOOL@
1203LIPO = @LIPO@
1204LN_S = @LN_S@
6bddc3e8 1205LTLIBOBJS = @LTLIBOBJS@
8c379db2 1206MAINT = @MAINT@
6bddc3e8
MF		 1207MAKEINFO = @MAKEINFO@
1208MKDIR_P = @MKDIR_P@
b5689863
MF		 1209NM = @NM@
1210NMEDIT = @NMEDIT@
1211OBJDUMP = @OBJDUMP@
6bddc3e8 1212OBJEXT = @OBJEXT@
b5689863
MF		 1213OTOOL = @OTOOL@
1214OTOOL64 = @OTOOL64@
6bddc3e8
MF		 1215PACKAGE = @PACKAGE@
1216PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
1217PACKAGE_NAME = @PACKAGE_NAME@
1218PACKAGE_STRING = @PACKAGE_STRING@
1219PACKAGE_TARNAME = @PACKAGE_TARNAME@
1220PACKAGE_URL = @PACKAGE_URL@
1221PACKAGE_VERSION = @PACKAGE_VERSION@
1222PATH_SEPARATOR = @PATH_SEPARATOR@
6dd65fc0 1223PKGVERSION = @PKGVERSION@
d57b6533
MF		 1224PKG_CONFIG = @PKG_CONFIG@
1225PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@
1226PKG_CONFIG_PATH = @PKG_CONFIG_PATH@
6bddc3e8 1227RANLIB = @RANLIB@
aa0fca16 1228RANLIB_FOR_BUILD = @RANLIB_FOR_BUILD@
5d0b3088
MF		 1229READLINE_CFLAGS = @READLINE_CFLAGS@
1230READLINE_LIB = @READLINE_LIB@
6dd65fc0
MF		 1231REPORT_BUGS_TEXI = @REPORT_BUGS_TEXI@
1232REPORT_BUGS_TO = @REPORT_BUGS_TO@
d57b6533
MF		 1233SDL_CFLAGS = @SDL_CFLAGS@
1234SDL_LIBS = @SDL_LIBS@
b5689863 1235SED = @SED@
6bddc3e8
MF		 1236SET_MAKE = @SET_MAKE@
1237SHELL = @SHELL@
36bb57e4
MF		 1238SIM_COMMON_BUILD_FALSE = @SIM_COMMON_BUILD_FALSE@
1239SIM_COMMON_BUILD_TRUE = @SIM_COMMON_BUILD_TRUE@
2ba09f42 1240SIM_ENABLED_ARCHES = @SIM_ENABLED_ARCHES@
408a44aa 1241SIM_FRV_TRAPDUMP_FLAGS = @SIM_FRV_TRAPDUMP_FLAGS@
682a2a82
MF		 1242SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
1243SIM_HW_SOCKSER = @SIM_HW_SOCKSER@
d73f39ee 1244SIM_INLINE = @SIM_INLINE@
19b11256 1245SIM_MIPS_BITSIZE = @SIM_MIPS_BITSIZE@
d455df98 1246SIM_MIPS_FPU_BITSIZE = @SIM_MIPS_FPU_BITSIZE@
abc494c6 1247SIM_MIPS_GEN = @SIM_MIPS_GEN@
4c45662c 1248SIM_MIPS_IGEN_ITABLE_FLAGS = @SIM_MIPS_IGEN_ITABLE_FLAGS@
abc494c6 1249SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
abc494c6
MF		 1250SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
1251SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
1252SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
07f60ed8 1253SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
2d5700ad 1254SIM_MIPS_SUBTARGET = @SIM_MIPS_SUBTARGET@
a0e674c1 1255SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@
1787fcc4 1256SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@
e173c80f 1257SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@
36bb57e4 1258SIM_SUBDIRS = @SIM_SUBDIRS@
8996c210 1259SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@
6bddc3e8 1260STRIP = @STRIP@
5d0b3088 1261TERMCAP_LIB = @TERMCAP_LIB@
6bddc3e8 1262VERSION = @VERSION@
47ce766a
MF		 1263WARN_CFLAGS = @WARN_CFLAGS@
1264WERROR_CFLAGS = @WERROR_CFLAGS@
6bddc3e8 1265abs_builddir = @abs_builddir@
5e25901f 1266abs_srcdir = @abs_srcdir@
6bddc3e8
MF		 1267abs_top_builddir = @abs_top_builddir@
1268abs_top_srcdir = @abs_top_srcdir@
1269ac_ct_CC = @ac_ct_CC@
b5689863 1270ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
6bddc3e8
MF		 1271am__include = @am__include@
1272am__leading_dot = @am__leading_dot@
1273am__quote = @am__quote@
1274am__tar = @am__tar@
1275am__untar = @am__untar@
1276bindir = @bindir@
1277build = @build@
1278build_alias = @build_alias@
1279build_cpu = @build_cpu@
1280build_os = @build_os@
1281build_vendor = @build_vendor@
1282builddir = @builddir@
1bf5c342
MF		 1283cgen = @cgen@
1284cgendir = @cgendir@
6bddc3e8
MF		 1285datadir = @datadir@
1286datarootdir = @datarootdir@
1287docdir = @docdir@
1288dvidir = @dvidir@
c906108c 1289exec_prefix = @exec_prefix@
6bddc3e8 1290host = @host@
c906108c 1291host_alias = @host_alias@
6bddc3e8
MF		 1292host_cpu = @host_cpu@
1293host_os = @host_os@
1294host_vendor = @host_vendor@
1295htmldir = @htmldir@
1296includedir = @includedir@
1297infodir = @infodir@
1298install_sh = @install_sh@
c906108c 1299libdir = @libdir@
6bddc3e8
MF		 1300libexecdir = @libexecdir@
1301localedir = @localedir@
1302localstatedir = @localstatedir@
c906108c 1303mandir = @mandir@
6bddc3e8
MF		 1304mkdir_p = @mkdir_p@
1305oldincludedir = @oldincludedir@
1306pdfdir = @pdfdir@
1307prefix = @prefix@
1308program_transform_name = @program_transform_name@
1309psdir = @psdir@
1310sbindir = @sbindir@
1311sharedstatedir = @sharedstatedir@
36bb57e4 1312sim_bitsize = @sim_bitsize@
36bb57e4 1313sim_float = @sim_float@
6bddc3e8
MF		 1314srcdir = @srcdir@
1315subdirs = @subdirs@
1316sysconfdir = @sysconfdir@
1317target = @target@
1318target_alias = @target_alias@
1319target_cpu = @target_cpu@
1320target_os = @target_os@
1321target_vendor = @target_vendor@
1322top_build_prefix = @top_build_prefix@
1323top_builddir = @top_builddir@
1324top_srcdir = @top_srcdir@
6c57b87f 1325AUTOMAKE_OPTIONS = dejagnu foreign no-dist subdir-objects
c2783492 1326ACLOCAL_AMFLAGS = -Im4 -I.. -I../config
46a1e1f2 1327GNULIB_PARENT_DIR = ..
0a129eb1 1328srccom = $(srcdir)/common
6bddc3e8 1329srcroot = $(srcdir)/..
36bb57e4 1330SUBDIRS = @subdirs@ $(SIM_SUBDIRS)
d47ea1b9 1331AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \
cdbb77e4
MF		 1332 $(am__append_3) $(am__append_16) $(am__append_28) \
1333 $(am__append_53) $(am__append_62) $(am__append_67) \
1334 $(am__append_74) $(am__append_83)
fb2c495f 1335pkginclude_HEADERS = $(am__append_1)
6a8e18f0 1336noinst_LIBRARIES = common/libcommon.a $(am__append_5) $(am__append_8) \
cdbb77e4
MF		 1337 $(am__append_10) $(am__append_12) $(am__append_14) \
1338 $(am__append_17)
1339BUILT_SOURCES = $(am__append_19) $(am__append_23) $(am__append_30) \
1340 $(am__append_34) $(am__append_43) $(am__append_49) \
1341 $(am__append_54) $(am__append_63) $(am__append_75) \
1342 $(am__append_84) $(am__append_90) $(am__append_99) \
1343 $(am__append_104)
015f7b74
MF		 1344CLEANFILES = common/version.c common/version.c-stamp \
1345 testsuite/common/bits-gen testsuite/common/bits32m0.c \
a389375f
MF		 1346 testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
1347 testsuite/common/bits64m63.c
cdbb77e4 1348DISTCLEANFILES = $(am__append_81)
f4ac2306 1349MOSTLYCLEANFILES = core $(common_HW_CONFIG_H_TARGETS) $(patsubst \
437eeee9
MF		 1350 %,%/stamp-hw,$(SIM_ENABLED_ARCHES)) \
1351 $(common_GEN_MODULES_C_TARGETS) $(patsubst \
1352 %,%/stamp-modules,$(SIM_ENABLED_ARCHES)) $(am__append_7) \
cdbb77e4
MF		 1353 site-sim-config.exp testrun.log testrun.sum $(am__append_21) \
1354 $(am__append_26) $(am__append_32) $(am__append_37) \
1355 $(am__append_45) $(am__append_51) $(am__append_56) \
1356 $(am__append_60) $(am__append_65) $(am__append_70) \
1357 $(am__append_80) $(am__append_86) $(am__append_92) \
1358 $(am__append_102) $(am__append_106)
47ce766a 1359AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS)
a1af8f40 1360AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \
bfc96c10
MF		 1361 $(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \
1362 -DSIM_COMMON_BUILD
1363AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \
1364 $(SIM_INLINE) -I$(srcdir)/common
fde7c6bf 1365COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
c2783492 1366LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
f4ac2306 1367SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \
437eeee9 1368 $(common_HW_CONFIG_H_TARGETS) $(common_GEN_MODULES_C_TARGETS) \
cdbb77e4
MF		 1369 $(am__append_4) $(am__append_20) $(am__append_24) \
1370 $(am__append_31) $(am__append_35) $(am__append_44) \
1371 $(am__append_50) $(am__append_55) $(am__append_58) \
1372 $(am__append_64) $(am__append_68) $(am__append_79) \
1373 $(am__append_85) $(am__append_91) $(am__append_100) \
1374 $(am__append_105)
63bf33ff 1375SIM_INSTALL_DATA_LOCAL_DEPS =
cdbb77e4
MF		 1376SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_39)
1377SIM_UNINSTALL_LOCAL_DEPS = $(am__append_40)
5bea0c32 1378common_libcommon_a_SOURCES = \
cd3ee89d 1379 common/callback.c \
ad9cc209 1380 common/portability.c \
dd8e16ea 1381 common/sim-load.c \
66882204 1382 common/syscall.c \
a7e40a99 1383 common/target-newlib-errno.c \
670817b9 1384 common/target-newlib-open.c \
88c8370b 1385 common/target-newlib-signal.c \
64ae70dd 1386 common/target-newlib-syscall.c \
5bea0c32
MF		 1387 common/version.c
1388
d47ea1b9
MF		 1389SIM_COMMON_HW_OBJS = \
1390 hw-alloc.o \
1391 hw-base.o \
1392 hw-device.o \
1393 hw-events.o \
1394 hw-handles.o \
1395 hw-instances.o \
1396 hw-ports.o \
1397 hw-properties.o \
1398 hw-tree.o \
1399 sim-hw.o
1400
1401SIM_NEW_COMMON_OBJS = sim-arange.o sim-bits.o sim-close.o \
1402 sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1403 sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1404 sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1405 sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1406 sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1407 sim-watch.o $(am__append_2)
1408SIM_HW_DEVICES = cfi core pal glue
f4ac2306 1409common_HW_CONFIG_H_TARGETS = $(patsubst %,%/hw-config.h,$(SIM_ENABLED_ARCHES))
437eeee9
MF		 1410am_arch_d = $(subst -,_,$(@D))
1411GEN_MODULES_C_SRCS = \
1412 $(wildcard \
1413 $(patsubst %.o,$(abs_srcdir)/%.c,$($(am_arch_d)_libsim_a_OBJECTS) $($(am_arch_d)_libsim_a_LIBADD)) \
1414 $(filter-out %.o,$(patsubst $(@D)/%.o,$(abs_srcdir)/common/%.c,$($(am_arch_d)_libsim_a_LIBADD))))
1415
1416common_GEN_MODULES_C_TARGETS = $(patsubst %,%/modules.c,$(filter-out ppc,$(SIM_ENABLED_ARCHES)))
c0c25232
MF		 1417LIBIBERTY_LIB = ../libiberty/libiberty.a
1418BFD_LIB = ../bfd/libbfd.la
1419OPCODES_LIB = ../opcodes/libopcodes.la
1420SIM_COMMON_LIBS = \
c0c25232
MF		 1421 $(BFD_LIB) \
1422 $(OPCODES_LIB) \
1423 $(LIBIBERTY_LIB) \
1424 $(LIBGNU) \
1425 $(LIBGNU_EXTRA_LIBS)
1426
93b937c9
MF		 1427GUILE = $(or $(wildcard ../guile/libguile/guile),guile)
1428CGEN = "$(GUILE) -l $(cgendir)/guile.scm -s"
1429CGENFLAGS = -v
1430CGEN_CPU_DIR = $(cgendir)/cpu
1431CPU_DIR = $(srcroot)/cpu
1432CGEN_ARCHFILE = $(CPU_DIR)/$(@D).cpu
1433CGEN_READ_SCM = $(cgendir)/sim.scm
1434CGEN_ARCH_SCM = $(cgendir)/sim-arch.scm
1435CGEN_CPU_SCM = $(cgendir)/sim-cpu.scm $(cgendir)/sim-model.scm
1436CGEN_DECODE_SCM = $(cgendir)/sim-decode.scm
1437CGEN_DESC_SCM = $(cgendir)/desc.scm $(cgendir)/desc-cpu.scm
1438CGEN_CPU_EXTR = /extr/
1439CGEN_CPU_READ = /read/
1440CGEN_CPU_WRITE = /write/
1441CGEN_CPU_SEM = /sem/
1442CGEN_CPU_SEMSW = /semsw/
1443CGEN_WRAPPER = $(srccom)/cgen.sh
1444CGEN_GEN_ARCH = \
1445 $(SHELL) $(CGEN_WRAPPER) arch $(srcdir)/$(@D) \
1446 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1447 $(@D) "$$FLAGS" ignored "$$isa" $$mach ignored \
1448 $(CGEN_ARCHFILE) ignored
1449
1450CGEN_GEN_CPU = \
1451 $(SHELL) $(CGEN_WRAPPER) cpu $(srcdir)/$(@D) \
1452 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1453 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1454 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1455
1456CGEN_GEN_DEFS = \
1457 $(SHELL) $(CGEN_WRAPPER) defs $(srcdir)/$(@D) \
1458 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1459 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1460 $(CGEN_ARCHFILE) ignored
1461
1462CGEN_GEN_DECODE = \
1463 $(SHELL) $(CGEN_WRAPPER) decode $(srcdir)/$(@D) \
1464 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1465 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1466 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1467
1468CGEN_GEN_CPU_DECODE = \
1469 $(SHELL) $(CGEN_WRAPPER) cpu-decode $(srcdir)/$(@D) \
1470 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1471 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1472 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1473
1474CGEN_GEN_CPU_DESC = \
1475 $(SHELL) $(CGEN_WRAPPER) desc $(srcdir)/$(@D) \
1476 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1477 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1478 $(CGEN_ARCHFILE) ignored $$opcfile
1479
d2a5dbc7
MF		 1480
1481# igen leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1482# leak detection while running it.
1483@SIM_ENABLE_IGEN_TRUE@IGEN = igen/igen$(EXEEXT)
111b1cf9 1484@SIM_ENABLE_IGEN_TRUE@IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN) $(IGEN_FLAGS_SMP)
b6b1c790
MF		 1485@SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES = \
1486@SIM_ENABLE_IGEN_TRUE@ igen/table.c \
1487@SIM_ENABLE_IGEN_TRUE@ igen/lf.c \
1488@SIM_ENABLE_IGEN_TRUE@ igen/misc.c \
1489@SIM_ENABLE_IGEN_TRUE@ igen/filter_host.c \
1490@SIM_ENABLE_IGEN_TRUE@ igen/ld-decode.c \
1491@SIM_ENABLE_IGEN_TRUE@ igen/ld-cache.c \
1492@SIM_ENABLE_IGEN_TRUE@ igen/filter.c \
1493@SIM_ENABLE_IGEN_TRUE@ igen/ld-insn.c \
1494@SIM_ENABLE_IGEN_TRUE@ igen/gen-model.c \
1495@SIM_ENABLE_IGEN_TRUE@ igen/gen-itable.c \
1496@SIM_ENABLE_IGEN_TRUE@ igen/gen-icache.c \
1497@SIM_ENABLE_IGEN_TRUE@ igen/gen-semantics.c \
1498@SIM_ENABLE_IGEN_TRUE@ igen/gen-idecode.c \
1499@SIM_ENABLE_IGEN_TRUE@ igen/gen-support.c \
1500@SIM_ENABLE_IGEN_TRUE@ igen/gen-engine.c \
1501@SIM_ENABLE_IGEN_TRUE@ igen/gen.c
1502
1503@SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES = igen/igen.c
1504@SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD = igen/libigen.a
1505@SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES =
1506@SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD = igen/filter-main.o igen/libigen.a
1507@SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES =
1508@SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD = igen/gen-main.o igen/libigen.a
1509@SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES =
1510@SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD = igen/ld-cache-main.o igen/libigen.a
1511@SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES =
1512@SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD = igen/ld-decode-main.o igen/libigen.a
1513@SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES =
1514@SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD = igen/ld-insn-main.o igen/libigen.a
1515@SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES =
1516@SIM_ENABLE_IGEN_TRUE@igen_table_LDADD = igen/table-main.o igen/libigen.a
1517@SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS = \
d2a5dbc7 1518@SIM_ENABLE_IGEN_TRUE@ $(IGEN) \
b6b1c790
MF		 1519@SIM_ENABLE_IGEN_TRUE@ igen/filter \
1520@SIM_ENABLE_IGEN_TRUE@ igen/gen \
1521@SIM_ENABLE_IGEN_TRUE@ igen/ld-cache \
1522@SIM_ENABLE_IGEN_TRUE@ igen/ld-decode \
1523@SIM_ENABLE_IGEN_TRUE@ igen/ld-insn \
1524@SIM_ENABLE_IGEN_TRUE@ igen/table
1525
e1e1ae6e 1526EXTRA_DEJAGNU_SITE_CONFIG = site-sim-config.exp
5ec501b5
MF		 1527
1528# Custom verbose test variables that automake doesn't provide (yet?).
1529AM_V_RUNTEST = $(AM_V_RUNTEST_@AM_V@)
1530AM_V_RUNTEST_ = $(AM_V_RUNTEST_@AM_DEFAULT_V@)
804de1fa 1531AM_V_RUNTEST_0 = @echo " RUNTEST $(RUNTESTFLAGS) $*";
5ec501b5 1532AM_V_RUNTEST_1 =
804de1fa
MF		 1533DO_RUNTEST = \
1534 LC_ALL=C; export LC_ALL; \
1535 EXPECT=${EXPECT} ; export EXPECT ; \
1536 runtest=$(RUNTEST); \
1537 $$runtest $(RUNTESTFLAGS)
1538
a389375f
MF		 1539testsuite_common_CPPFLAGS = \
1540 -I$(srcdir)/common \
0d315c88
DD		 1541 -I$(srcroot)/include \
1542 -I../bfd
a389375f 1543
c58353b7
MF		 1544@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES =
1545@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD = \
1546@SIM_ENABLE_ARCH_aarch64_TRUE@ $(common_libcommon_a_OBJECTS) \
1547@SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
1548@SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
1549@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/cpustate.o \
1550@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/interp.o \
1551@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/memory.o \
1552@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/modules.o \
1553@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/sim-resume.o \
1554@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/simulator.o
1555
c0c25232
MF		 1556@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES =
1557@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD = \
1558@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/nrun.o \
1559@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/libsim.a \
1560@SIM_ENABLE_ARCH_aarch64_TRUE@ $(SIM_COMMON_LIBS)
1561
6a8e18f0
MF		 1562@SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES =
1563@SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD = \
1564@SIM_ENABLE_ARCH_arm_TRUE@ $(common_libcommon_a_OBJECTS) \
1565@SIM_ENABLE_ARCH_arm_TRUE@ arm/wrapper.o \
1566@SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
1567@SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
1568@SIM_ENABLE_ARCH_arm_TRUE@ arm/armemu.o \
1569@SIM_ENABLE_ARCH_arm_TRUE@ arm/armemu32.o arm/arminit.o arm/armos.o arm/armsupp.o \
1570@SIM_ENABLE_ARCH_arm_TRUE@ arm/armvirt.o arm/thumbemu.o \
1571@SIM_ENABLE_ARCH_arm_TRUE@ arm/armcopro.o arm/maverick.o arm/iwmmxt.o \
1572@SIM_ENABLE_ARCH_arm_TRUE@ arm/modules.o
1573
c0c25232
MF		 1574@SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES =
1575@SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD = \
1576@SIM_ENABLE_ARCH_arm_TRUE@ arm/nrun.o \
1577@SIM_ENABLE_ARCH_arm_TRUE@ arm/libsim.a \
1578@SIM_ENABLE_ARCH_arm_TRUE@ $(SIM_COMMON_LIBS)
1579
ed939535
MF		 1580@SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm
1581@SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README
c65b31b8
MF		 1582@SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES =
1583@SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD = \
1584@SIM_ENABLE_ARCH_avr_TRUE@ $(common_libcommon_a_OBJECTS) \
1585@SIM_ENABLE_ARCH_avr_TRUE@ avr/interp.o \
1586@SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
1587@SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
1588@SIM_ENABLE_ARCH_avr_TRUE@ avr/modules.o \
1589@SIM_ENABLE_ARCH_avr_TRUE@ avr/sim-resume.o
1590
c0c25232
MF		 1591@SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES =
1592@SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD = \
1593@SIM_ENABLE_ARCH_avr_TRUE@ avr/nrun.o \
1594@SIM_ENABLE_ARCH_avr_TRUE@ avr/libsim.a \
1595@SIM_ENABLE_ARCH_avr_TRUE@ $(SIM_COMMON_LIBS)
1596
bc1dd618
MF		 1597@SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES =
1598@SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD = \
1599@SIM_ENABLE_ARCH_bfin_TRUE@ $(common_libcommon_a_OBJECTS) \
1600@SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
1601@SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
1602@SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
1603@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/bfin-sim.o \
1604@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/devices.o \
1605@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/gui.o \
1606@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/interp.o \
1607@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/machs.o \
1608@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/modules.o \
1609@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/sim-resume.o
1610
c0c25232
MF		 1611@SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES =
1612@SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD = \
1613@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/nrun.o \
1614@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/libsim.a \
1615@SIM_ENABLE_ARCH_bfin_TRUE@ $(SIM_COMMON_LIBS)
1616
3d042117
MF		 1617@SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES = \
1618@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_cec \
1619@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ctimer \
1620@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dma \
1621@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dmac \
1622@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_amc \
1623@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_ddrc \
1624@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_sdc \
1625@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_emac \
1626@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_eppi \
1627@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_evt \
1628@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio \
1629@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio2 \
1630@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gptimer \
1631@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_jtag \
1632@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_mmu \
1633@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_nfc \
1634@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_otp \
1635@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pfmon \
1636@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pint \
1637@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pll \
1638@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ppi \
1639@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_rtc \
1640@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_sic \
1641@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_spi \
1642@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_trace \
1643@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_twi \
1644@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart \
1645@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart2 \
1646@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wdog \
1647@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wp \
1648@SIM_ENABLE_ARCH_bfin_TRUE@ eth_phy
1649
cdbb77e4
MF		 1650@SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES =
1651@SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD = \
1652@SIM_ENABLE_ARCH_bpf_TRUE@ $(common_libcommon_a_OBJECTS) \
1653@SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
1654@SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
1655@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/modules.o \
1656@SIM_ENABLE_ARCH_bpf_TRUE@ \
1657@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-run.o \
1658@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-scache.o \
1659@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-trace.o \
1660@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-utils.o \
1661@SIM_ENABLE_ARCH_bpf_TRUE@ \
1662@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/arch.o \
1663@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cpu.o \
1664@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-le.o \
1665@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-be.o \
1666@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-le.o \
1667@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-be.o \
1668@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-le.o \
1669@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.o \
1670@SIM_ENABLE_ARCH_bpf_TRUE@ \
1671@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf.o \
1672@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf-helpers.o \
1673@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sim-if.o \
1674@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/traps.o
1675
c0c25232
MF		 1676@SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES =
1677@SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD = \
1678@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/nrun.o \
1679@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/libsim.a \
1680@SIM_ENABLE_ARCH_bpf_TRUE@ $(SIM_COMMON_LIBS)
1681
0a129eb1 1682@SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS = \
0a129eb1
MF		 1683@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-le.c \
1684@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/stamp-mloop-le \
0a129eb1
MF		 1685@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.c \
1686@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/stamp-mloop-be
1687
c0c25232
MF		 1688@SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES =
1689@SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD = \
1690@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/nrun.o \
1691@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/libsim.a \
1692@SIM_ENABLE_ARCH_cr16_TRUE@ $(SIM_COMMON_LIBS)
1693
70ab6bdd
MF		 1694@SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \
1695@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/gencode$(EXEEXT) \
70ab6bdd
MF		 1696@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/table.c
1697
1698@SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c
1699@SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o
c0c25232
MF		 1700@SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES =
1701@SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD = \
1702@SIM_ENABLE_ARCH_cris_TRUE@ cris/nrun.o \
1703@SIM_ENABLE_ARCH_cris_TRUE@ cris/libsim.a \
1704@SIM_ENABLE_ARCH_cris_TRUE@ $(SIM_COMMON_LIBS)
1705
3d042117 1706@SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES = rv cris cris_900000xx
cb9bdc02
MF		 1707@SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES = cris/rvdummy.c
1708@SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD = $(LIBIBERTY_LIB)
0a129eb1 1709@SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \
0a129eb1
MF		 1710@SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv10f.c \
1711@SIM_ENABLE_ARCH_cris_TRUE@ cris/stamp-mloop-v10f \
0a129eb1
MF		 1712@SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.c \
1713@SIM_ENABLE_ARCH_cris_TRUE@ cris/stamp-mloop-v32f
1714
c0c25232
MF		 1715@SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES =
1716@SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD = \
1717@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/nrun.o \
1718@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/libsim.a \
1719@SIM_ENABLE_ARCH_d10v_TRUE@ $(SIM_COMMON_LIBS)
1720
70ab6bdd
MF		 1721@SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \
1722@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/gencode$(EXEEXT) \
70ab6bdd
MF		 1723@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/table.c
1724
1725@SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c
1726@SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o
c0c25232
MF		 1727@SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES =
1728@SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD = \
1729@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/sis.o \
1730@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/libsim.a \
1731@SIM_ENABLE_ARCH_erc32_TRUE@ $(SIM_COMMON_LIBS) $(READLINE_LIB) $(TERMCAP_LIB)
1732
ed939535
MF		 1733@SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir = $(docdir)/erc32
1734@SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA = erc32/README.erc32 erc32/README.gdb erc32/README.sis
c0c25232
MF		 1735@SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES =
1736@SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD = \
1737@SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \
1738@SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \
1739@SIM_ENABLE_ARCH_examples_TRUE@ $(SIM_COMMON_LIBS)
1740
1741@SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES =
1742@SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD = \
1743@SIM_ENABLE_ARCH_frv_TRUE@ frv/nrun.o \
1744@SIM_ENABLE_ARCH_frv_TRUE@ frv/libsim.a \
1745@SIM_ENABLE_ARCH_frv_TRUE@ $(SIM_COMMON_LIBS)
1746
ed939535
MF		 1747@SIM_ENABLE_ARCH_frv_TRUE@frvdocdir = $(docdir)/frv
1748@SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA = frv/README
0a129eb1 1749@SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \
0a129eb1
MF		 1750@SIM_ENABLE_ARCH_frv_TRUE@ frv/mloop.c \
1751@SIM_ENABLE_ARCH_frv_TRUE@ frv/stamp-mloop
1752
c0c25232
MF		 1753@SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES =
1754@SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD = \
1755@SIM_ENABLE_ARCH_ft32_TRUE@ ft32/nrun.o \
1756@SIM_ENABLE_ARCH_ft32_TRUE@ ft32/libsim.a \
1757@SIM_ENABLE_ARCH_ft32_TRUE@ $(SIM_COMMON_LIBS)
1758
1759@SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES =
1760@SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD = \
1761@SIM_ENABLE_ARCH_h8300_TRUE@ h8300/nrun.o \
1762@SIM_ENABLE_ARCH_h8300_TRUE@ h8300/libsim.a \
1763@SIM_ENABLE_ARCH_h8300_TRUE@ $(SIM_COMMON_LIBS)
1764
1765@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES =
1766@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD = \
1767@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/nrun.o \
1768@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/libsim.a \
1769@SIM_ENABLE_ARCH_iq2000_TRUE@ $(SIM_COMMON_LIBS)
1770
0a129eb1 1771@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \
0a129eb1
MF		 1772@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.c \
1773@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/stamp-mloop
1774
c0c25232
MF		 1775@SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES =
1776@SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD = \
1777@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/nrun.o \
1778@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/libsim.a \
1779@SIM_ENABLE_ARCH_lm32_TRUE@ $(SIM_COMMON_LIBS)
1780
3d042117 1781@SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES = lm32cpu lm32timer lm32uart
0a129eb1 1782@SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \
0a129eb1
MF		 1783@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.c \
1784@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/stamp-mloop
1785
c0c25232
MF		 1786@SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES =
1787@SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD = \
1788@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/main.o \
1789@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/libsim.a \
1790@SIM_ENABLE_ARCH_m32c_TRUE@ $(SIM_COMMON_LIBS)
1791
70ab6bdd
MF		 1792@SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \
1793@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/opc2c$(EXEEXT) \
1794@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c \
1795@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c
1796
1797@SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES = m32c/opc2c.c
1798
1799# opc2c leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1800# leak detection while running it.
1801@SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT)
c0c25232
MF		 1802@SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES =
1803@SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD = \
1804@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/nrun.o \
1805@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/libsim.a \
1806@SIM_ENABLE_ARCH_m32r_TRUE@ $(SIM_COMMON_LIBS)
1807
3d042117 1808@SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart
0a129eb1 1809@SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \
0a129eb1
MF		 1810@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop.c \
1811@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop \
0a129eb1
MF		 1812@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloopx.c \
1813@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop-x \
0a129eb1
MF		 1814@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop2.c \
1815@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop-2
1816
c0c25232
MF		 1817@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES =
1818@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD = \
1819@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/nrun.o \
1820@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/libsim.a \
1821@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(SIM_COMMON_LIBS)
1822
3d042117 1823@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES = m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
70ab6bdd
MF		 1824@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \
1825@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/gencode$(EXEEXT) \
1826@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.c \
1827@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.c
1828
1829@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES = m68hc11/gencode.c
c0c25232
MF		 1830@SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES =
1831@SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD = \
1832@SIM_ENABLE_ARCH_mcore_TRUE@ mcore/nrun.o \
1833@SIM_ENABLE_ARCH_mcore_TRUE@ mcore/libsim.a \
1834@SIM_ENABLE_ARCH_mcore_TRUE@ $(SIM_COMMON_LIBS)
1835
1836@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES =
1837@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD = \
1838@SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/nrun.o \
1839@SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/libsim.a \
1840@SIM_ENABLE_ARCH_microblaze_TRUE@ $(SIM_COMMON_LIBS)
1841
1842@SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES =
1843@SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD = \
1844@SIM_ENABLE_ARCH_mips_TRUE@ mips/nrun.o \
1845@SIM_ENABLE_ARCH_mips_TRUE@ mips/libsim.a \
1846@SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_COMMON_LIBS)
1847
3d042117 1848@SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio
49d3ce6c
MF		 1849@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE = \
1850@SIM_ENABLE_ARCH_mips_TRUE@ mips/itable.h \
1851@SIM_ENABLE_ARCH_mips_TRUE@ mips/itable.c
1852
3a31051b
MF		 1853@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE = \
1854@SIM_ENABLE_ARCH_mips_TRUE@ mips/icache.h \
1855@SIM_ENABLE_ARCH_mips_TRUE@ mips/icache.c \
1856@SIM_ENABLE_ARCH_mips_TRUE@ mips/idecode.h \
1857@SIM_ENABLE_ARCH_mips_TRUE@ mips/idecode.c \
1858@SIM_ENABLE_ARCH_mips_TRUE@ mips/semantics.h \
1859@SIM_ENABLE_ARCH_mips_TRUE@ mips/semantics.c \
1860@SIM_ENABLE_ARCH_mips_TRUE@ mips/model.h \
1861@SIM_ENABLE_ARCH_mips_TRUE@ mips/model.c \
1862@SIM_ENABLE_ARCH_mips_TRUE@ mips/support.h \
1863@SIM_ENABLE_ARCH_mips_TRUE@ mips/support.c \
1864@SIM_ENABLE_ARCH_mips_TRUE@ mips/engine.h \
1865@SIM_ENABLE_ARCH_mips_TRUE@ mips/engine.c \
1866@SIM_ENABLE_ARCH_mips_TRUE@ mips/irun.c
1867
f6d58d40
MF		 1868@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16 = \
1869@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_icache.h \
1870@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_icache.c \
1871@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_idecode.h \
1872@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_idecode.c \
1873@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_semantics.h \
1874@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_semantics.c \
1875@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_model.h \
1876@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_model.c \
1877@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_support.h \
1878@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_support.c \
1879@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32 = \
1880@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_icache.h \
1881@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_icache.c \
1882@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_idecode.h \
1883@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_idecode.c \
1884@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_semantics.h \
1885@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_semantics.c \
1886@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_model.h \
1887@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_model.c \
1888@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_support.h \
1889@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_support.c
1890
3a31051b 1891@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS = \
49d3ce6c 1892@SIM_ENABLE_ARCH_mips_TRUE@ $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
3a31051b 1893@SIM_ENABLE_ARCH_mips_TRUE@ mips/stamp-igen-itable \
cdbb77e4
MF		 1894@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_76) $(am__append_77) \
1895@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_78)
49d3ce6c
MF		 1896@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
1897@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen
1898@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \
1899@SIM_ENABLE_ARCH_mips_TRUE@ mips/dsp.igen \
1900@SIM_ENABLE_ARCH_mips_TRUE@ mips/dsp2.igen \
1901@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16.igen \
1902@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16e.igen \
1903@SIM_ENABLE_ARCH_mips_TRUE@ mips/mdmx.igen \
1904@SIM_ENABLE_ARCH_mips_TRUE@ mips/micromipsdsp.igen \
1905@SIM_ENABLE_ARCH_mips_TRUE@ mips/micromips.igen \
1906@SIM_ENABLE_ARCH_mips_TRUE@ mips/mips3264r2.igen \
1907@SIM_ENABLE_ARCH_mips_TRUE@ mips/mips3264r6.igen \
1908@SIM_ENABLE_ARCH_mips_TRUE@ mips/mips3d.igen \
1909@SIM_ENABLE_ARCH_mips_TRUE@ mips/sb1.igen \
1910@SIM_ENABLE_ARCH_mips_TRUE@ mips/tx.igen \
1911@SIM_ENABLE_ARCH_mips_TRUE@ mips/vr.igen
1912
3a31051b 1913@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC = $(srcdir)/mips/mips.dc
f6d58d40 1914@SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC = $(srcdir)/mips/m16.dc
f12c3c63
MF		 1915@SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC = $(srcdir)/mips/micromips.dc
1916@SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC = $(srcdir)/mips/micromips16.dc
c0c25232
MF		 1917@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES =
1918@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
1919@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/nrun.o \
1920@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/libsim.a \
1921@SIM_ENABLE_ARCH_mn10300_TRUE@ $(SIM_COMMON_LIBS)
1922
3d042117 1923@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES = mn103cpu mn103int mn103tim mn103ser mn103iop
d2a5dbc7
MF		 1924@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN = \
1925@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \
1926@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.c \
1927@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \
1928@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.c \
1929@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \
1930@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.c \
1931@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.h \
1932@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.c \
1933@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.h \
1934@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.c \
1935@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \
1936@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.c \
1937@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h \
1938@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.c \
1939@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/irun.c
1940
1941@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS = \
1942@SIM_ENABLE_ARCH_mn10300_TRUE@ $(mn10300_BUILT_SRC_FROM_IGEN) \
1943@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/stamp-igen
1944
1945@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
1946@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen
1947@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen
1948@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc
c0c25232
MF		 1949@SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES =
1950@SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD = \
1951@SIM_ENABLE_ARCH_moxie_TRUE@ moxie/nrun.o \
1952@SIM_ENABLE_ARCH_moxie_TRUE@ moxie/libsim.a \
1953@SIM_ENABLE_ARCH_moxie_TRUE@ $(SIM_COMMON_LIBS)
1954
94f5dfed
MF		 1955@SIM_ENABLE_ARCH_moxie_TRUE@dtbdir = $(datadir)/gdb/dtb
1956@SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA = moxie/moxie-gdb.dtb
c0c25232
MF		 1957@SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES =
1958@SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD = \
1959@SIM_ENABLE_ARCH_msp430_TRUE@ msp430/nrun.o \
1960@SIM_ENABLE_ARCH_msp430_TRUE@ msp430/libsim.a \
1961@SIM_ENABLE_ARCH_msp430_TRUE@ $(SIM_COMMON_LIBS)
1962
1963@SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES =
1964@SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD = \
1965@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/nrun.o \
1966@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/libsim.a \
1967@SIM_ENABLE_ARCH_or1k_TRUE@ $(SIM_COMMON_LIBS)
1968
ed939535
MF		 1969@SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir = $(docdir)/or1k
1970@SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA = or1k/README
0a129eb1 1971@SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \
0a129eb1
MF		 1972@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/mloop.c \
1973@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/stamp-mloop
1974
c0c25232
MF		 1975@SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES =
1976@SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD = \
1977@SIM_ENABLE_ARCH_ppc_TRUE@ ppc/main.o \
1978@SIM_ENABLE_ARCH_ppc_TRUE@ ppc/libsim.a \
1979@SIM_ENABLE_ARCH_ppc_TRUE@ $(SIM_COMMON_LIBS)
1980
ed939535
MF		 1981@SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir = $(docdir)/ppc
1982@SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA = ppc/BUGS ppc/INSTALL ppc/README ppc/RUN
c0c25232
MF		 1983@SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES =
1984@SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD = \
1985@SIM_ENABLE_ARCH_pru_TRUE@ pru/nrun.o \
1986@SIM_ENABLE_ARCH_pru_TRUE@ pru/libsim.a \
1987@SIM_ENABLE_ARCH_pru_TRUE@ $(SIM_COMMON_LIBS)
1988
1989@SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES =
1990@SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD = \
1991@SIM_ENABLE_ARCH_riscv_TRUE@ riscv/nrun.o \
1992@SIM_ENABLE_ARCH_riscv_TRUE@ riscv/libsim.a \
1993@SIM_ENABLE_ARCH_riscv_TRUE@ $(SIM_COMMON_LIBS)
1994
1995@SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES =
1996@SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD = \
1997@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/main.o \
1998@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/libsim.a \
1999@SIM_ENABLE_ARCH_rl78_TRUE@ $(SIM_COMMON_LIBS)
2000
2001@SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES =
2002@SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD = \
2003@SIM_ENABLE_ARCH_rx_TRUE@ rx/main.o \
2004@SIM_ENABLE_ARCH_rx_TRUE@ rx/libsim.a \
2005@SIM_ENABLE_ARCH_rx_TRUE@ $(SIM_COMMON_LIBS)
2006
ed939535
MF		 2007@SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx
2008@SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt
c0c25232
MF		 2009@SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES =
2010@SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD = \
2011@SIM_ENABLE_ARCH_sh_TRUE@ sh/nrun.o \
2012@SIM_ENABLE_ARCH_sh_TRUE@ sh/libsim.a \
2013@SIM_ENABLE_ARCH_sh_TRUE@ $(SIM_COMMON_LIBS)
2014
70ab6bdd
MF		 2015@SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \
2016@SIM_ENABLE_ARCH_sh_TRUE@ sh/gencode$(EXEEXT) \
70ab6bdd
MF		 2017@SIM_ENABLE_ARCH_sh_TRUE@ sh/table.c
2018
2019@SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c
c0c25232
MF		 2020@SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES =
2021@SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD = \
2022@SIM_ENABLE_ARCH_v850_TRUE@ v850/nrun.o \
2023@SIM_ENABLE_ARCH_v850_TRUE@ v850/libsim.a \
2024@SIM_ENABLE_ARCH_v850_TRUE@ $(SIM_COMMON_LIBS)
2025
d2a5dbc7
MF		 2026@SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN = \
2027@SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \
2028@SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.c \
2029@SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \
2030@SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.c \
2031@SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \
2032@SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.c \
2033@SIM_ENABLE_ARCH_v850_TRUE@ v850/model.h \
2034@SIM_ENABLE_ARCH_v850_TRUE@ v850/model.c \
2035@SIM_ENABLE_ARCH_v850_TRUE@ v850/support.h \
2036@SIM_ENABLE_ARCH_v850_TRUE@ v850/support.c \
2037@SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \
2038@SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.c \
2039@SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h \
2040@SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.c \
2041@SIM_ENABLE_ARCH_v850_TRUE@ v850/irun.c
2042
2043@SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS = \
2044@SIM_ENABLE_ARCH_v850_TRUE@ $(v850_BUILT_SRC_FROM_IGEN) \
2045@SIM_ENABLE_ARCH_v850_TRUE@ v850/stamp-igen
2046
2047@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2048@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen
897fc27b 2049@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc
80636a54 2050all: $(BUILT_SOURCES) config.h
b15c5d7a 2051 $(MAKE) $(AM_MAKEFLAGS) all-recursive
6bddc3e8
MF		 2052
2053.SUFFIXES:
b5689863 2054.SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs
6bddc3e8
MF		 2055am--refresh: Makefile
2056 @:
c0c25232 2057$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps)
6bddc3e8
MF		 2058 @for dep in $?; do \
2059 case '$(am__configure_deps)' in \
2060 *$$dep*) \
2061 echo ' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
2062 $(am__cd) $(srcdir) && $(AUTOMAKE) --foreign \
2063 && exit 0; \
2064 exit 1;; \
2065 esac; \
2066 done; \
2067 echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
2068 $(am__cd) $(top_srcdir) && \
2069 $(AUTOMAKE) --foreign Makefile
2070Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
2071 @case '$?' in \
2072 *config.status*) \
2073 echo ' $(SHELL) ./config.status'; \
2074 $(SHELL) ./config.status;; \
2075 *) \
2076 echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
2077 cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
2078 esac;
c0c25232 2079$(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty):
6bddc3e8
MF		 2080
2081$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
2082 $(SHELL) ./config.status --recheck
c906108c 2083
8c379db2 2084$(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
6bddc3e8 2085 $(am__cd) $(srcdir) && $(AUTOCONF)
8c379db2 2086$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
6bddc3e8
MF		 2087 $(am__cd) $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS)
2088$(am__aclocal_m4_deps):
6bddc3e8 2089
b15c5d7a
MF		 2090config.h: stamp-h1
2091 @test -f $@ || rm -f stamp-h1
2092 @test -f $@ || $(MAKE) $(AM_MAKEFLAGS) stamp-h1
2093
2094stamp-h1: $(srcdir)/config.h.in $(top_builddir)/config.status
2095 @rm -f stamp-h1
2096 cd $(top_builddir) && $(SHELL) ./config.status config.h
2097$(srcdir)/config.h.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
2098 ($(am__cd) $(top_srcdir) && $(AUTOHEADER))
2099 rm -f stamp-h1
2100 touch $@
2101
2102distclean-hdr:
2103 -rm -f config.h stamp-h1
36bb57e4
MF		 2104Make-common.sim: $(top_builddir)/config.status $(top_srcdir)/common/Make-common.in
2105 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 2106aarch64/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/aarch64/Makefile.in
2107 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 2108aarch64/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2109 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2110arm/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/arm/Makefile.in
36bb57e4 2111 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 2112arm/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2113 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2114avr/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/avr/Makefile.in
36bb57e4 2115 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 2116avr/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2117 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2118bfin/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bfin/Makefile.in
36bb57e4 2119 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 2120bfin/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2121 cd $(top_builddir) && $(SHELL) ./config.status $@
ee79c7df
MF		 2122bpf/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bpf/Makefile.in
2123 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 2124bpf/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2125 cd $(top_builddir) && $(SHELL) ./config.status $@
2126cr16/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cr16/Makefile.in
d8b04da7 2127 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 2128cr16/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2129 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2130cris/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cris/Makefile.in
36bb57e4 2131 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 2132cris/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2133 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2134d10v/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/d10v/Makefile.in
408a44aa 2135 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 2136d10v/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2137 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2138frv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/frv/Makefile.in
36bb57e4 2139 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 2140frv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2141 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2142ft32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/ft32/Makefile.in
408a44aa 2143 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 2144ft32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2145 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2146h8300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/h8300/Makefile.in
36bb57e4 2147 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 2148h8300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2149 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2150iq2000/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/iq2000/Makefile.in
36bb57e4 2151 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 2152iq2000/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2153 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2154lm32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/lm32/Makefile.in
408a44aa 2155 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 2156lm32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2157 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2158m32c/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32c/Makefile.in
408a44aa 2159 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 2160m32c/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2161 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2162m32r/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32r/Makefile.in
36bb57e4 2163 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 2164m32r/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2165 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2166m68hc11/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m68hc11/Makefile.in
313c332f 2167 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 2168m68hc11/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2169 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2170mcore/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mcore/Makefile.in
36bb57e4 2171 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 2172mcore/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2173 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2174microblaze/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/microblaze/Makefile.in
36bb57e4 2175 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 2176microblaze/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2177 cd $(top_builddir) && $(SHELL) ./config.status $@
abc494c6
MF		 2178mips/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mips/Makefile.in
2179 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2180mips/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
36bb57e4 2181 cd $(top_builddir) && $(SHELL) ./config.status $@
4cf83930
MF		 2182mn10300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mn10300/Makefile.in
2183 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2184mn10300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 2185 cd $(top_builddir) && $(SHELL) ./config.status $@
36bb57e4
MF		 2186moxie/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/moxie/Makefile.in
2187 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2188moxie/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 2189 cd $(top_builddir) && $(SHELL) ./config.status $@
36bb57e4
MF		 2190msp430/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/msp430/Makefile.in
2191 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 2192msp430/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2193 cd $(top_builddir) && $(SHELL) ./config.status $@
763b20ab
MF		 2194or1k/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/or1k/Makefile.in
2195 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 2196or1k/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2197 cd $(top_builddir) && $(SHELL) ./config.status $@
2198ppc/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 2199 cd $(top_builddir) && $(SHELL) ./config.status $@
36bb57e4
MF		 2200pru/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/pru/Makefile.in
2201 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 2202pru/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2203 cd $(top_builddir) && $(SHELL) ./config.status $@
1787fcc4
MF		 2204riscv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/riscv/Makefile.in
2205 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2206riscv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 2207 cd $(top_builddir) && $(SHELL) ./config.status $@
36bb57e4
MF		 2208rl78/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rl78/Makefile.in
2209 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2210rl78/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 2211 cd $(top_builddir) && $(SHELL) ./config.status $@
e173c80f
MF		 2212rx/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rx/Makefile.in
2213 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2214rx/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 2215 cd $(top_builddir) && $(SHELL) ./config.status $@
36bb57e4
MF		 2216sh/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/sh/Makefile.in
2217 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2218sh/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 2219 cd $(top_builddir) && $(SHELL) ./config.status $@
5d0b3088
MF		 2220erc32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/erc32/Makefile.in
2221 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 2222erc32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2223 cd $(top_builddir) && $(SHELL) ./config.status $@
871aa3b9
MF		 2224v850/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/v850/Makefile.in
2225 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 2226v850/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 2227 cd $(top_builddir) && $(SHELL) ./config.status $@
36bb57e4
MF		 2228example-synacor/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/example-synacor/Makefile.in
2229 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 2230example-synacor/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2231 cd $(top_builddir) && $(SHELL) ./config.status $@
3f8414df
MF		 2232arch-subdir.mk: $(top_builddir)/config.status $(srcdir)/arch-subdir.mk.in
2233 cd $(top_builddir) && $(SHELL) ./config.status $@
21672298
MF		 2234.gdbinit: $(top_builddir)/config.status $(srcdir)/gdbinit.in
2235 cd $(top_builddir) && $(SHELL) ./config.status $@
b15c5d7a 2236
b6b1c790
MF		 2237clean-noinstLIBRARIES:
2238 -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES)
c58353b7
MF		 2239aarch64/$(am__dirstamp):
2240 @$(MKDIR_P) aarch64
2241 @: > aarch64/$(am__dirstamp)
2242
2243aarch64/libsim.a: $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_DEPENDENCIES) $(EXTRA_aarch64_libsim_a_DEPENDENCIES) aarch64/$(am__dirstamp)
2244 $(AM_V_at)-rm -f aarch64/libsim.a
2245 $(AM_V_AR)$(aarch64_libsim_a_AR) aarch64/libsim.a $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD)
2246 $(AM_V_at)$(RANLIB) aarch64/libsim.a
6a8e18f0
MF		 2247arm/$(am__dirstamp):
2248 @$(MKDIR_P) arm
2249 @: > arm/$(am__dirstamp)
2250
2251arm/libsim.a: $(arm_libsim_a_OBJECTS) $(arm_libsim_a_DEPENDENCIES) $(EXTRA_arm_libsim_a_DEPENDENCIES) arm/$(am__dirstamp)
2252 $(AM_V_at)-rm -f arm/libsim.a
2253 $(AM_V_AR)$(arm_libsim_a_AR) arm/libsim.a $(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD)
2254 $(AM_V_at)$(RANLIB) arm/libsim.a
c65b31b8
MF		 2255avr/$(am__dirstamp):
2256 @$(MKDIR_P) avr
2257 @: > avr/$(am__dirstamp)
2258
2259avr/libsim.a: $(avr_libsim_a_OBJECTS) $(avr_libsim_a_DEPENDENCIES) $(EXTRA_avr_libsim_a_DEPENDENCIES) avr/$(am__dirstamp)
2260 $(AM_V_at)-rm -f avr/libsim.a
2261 $(AM_V_AR)$(avr_libsim_a_AR) avr/libsim.a $(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD)
2262 $(AM_V_at)$(RANLIB) avr/libsim.a
bc1dd618
MF		 2263bfin/$(am__dirstamp):
2264 @$(MKDIR_P) bfin
2265 @: > bfin/$(am__dirstamp)
2266
2267bfin/libsim.a: $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_DEPENDENCIES) $(EXTRA_bfin_libsim_a_DEPENDENCIES) bfin/$(am__dirstamp)
2268 $(AM_V_at)-rm -f bfin/libsim.a
2269 $(AM_V_AR)$(bfin_libsim_a_AR) bfin/libsim.a $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD)
2270 $(AM_V_at)$(RANLIB) bfin/libsim.a
cdbb77e4
MF		 2271bpf/$(am__dirstamp):
2272 @$(MKDIR_P) bpf
2273 @: > bpf/$(am__dirstamp)
2274
2275bpf/libsim.a: $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_DEPENDENCIES) $(EXTRA_bpf_libsim_a_DEPENDENCIES) bpf/$(am__dirstamp)
2276 $(AM_V_at)-rm -f bpf/libsim.a
2277 $(AM_V_AR)$(bpf_libsim_a_AR) bpf/libsim.a $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD)
2278 $(AM_V_at)$(RANLIB) bpf/libsim.a
5bea0c32
MF		 2279common/$(am__dirstamp):
2280 @$(MKDIR_P) common
2281 @: > common/$(am__dirstamp)
2282common/$(DEPDIR)/$(am__dirstamp):
2283 @$(MKDIR_P) common/$(DEPDIR)
2284 @: > common/$(DEPDIR)/$(am__dirstamp)
a1af8f40
MF		 2285common/callback.$(OBJEXT): common/$(am__dirstamp) \
2286 common/$(DEPDIR)/$(am__dirstamp)
2287common/portability.$(OBJEXT): common/$(am__dirstamp) \
2288 common/$(DEPDIR)/$(am__dirstamp)
2289common/sim-load.$(OBJEXT): common/$(am__dirstamp) \
2290 common/$(DEPDIR)/$(am__dirstamp)
2291common/syscall.$(OBJEXT): common/$(am__dirstamp) \
2292 common/$(DEPDIR)/$(am__dirstamp)
2293common/target-newlib-errno.$(OBJEXT): common/$(am__dirstamp) \
cd3ee89d 2294 common/$(DEPDIR)/$(am__dirstamp)
a1af8f40 2295common/target-newlib-open.$(OBJEXT): common/$(am__dirstamp) \
dd8e16ea 2296 common/$(DEPDIR)/$(am__dirstamp)
a1af8f40 2297common/target-newlib-signal.$(OBJEXT): common/$(am__dirstamp) \
66882204 2298 common/$(DEPDIR)/$(am__dirstamp)
a1af8f40
MF		 2299common/target-newlib-syscall.$(OBJEXT): common/$(am__dirstamp) \
2300 common/$(DEPDIR)/$(am__dirstamp)
2301common/version.$(OBJEXT): common/$(am__dirstamp) \
5bea0c32
MF		 2302 common/$(DEPDIR)/$(am__dirstamp)
2303
2304common/libcommon.a: $(common_libcommon_a_OBJECTS) $(common_libcommon_a_DEPENDENCIES) $(EXTRA_common_libcommon_a_DEPENDENCIES) common/$(am__dirstamp)
2305 $(AM_V_at)-rm -f common/libcommon.a
2306 $(AM_V_AR)$(common_libcommon_a_AR) common/libcommon.a $(common_libcommon_a_OBJECTS) $(common_libcommon_a_LIBADD)
2307 $(AM_V_at)$(RANLIB) common/libcommon.a
b6b1c790
MF		 2308igen/$(am__dirstamp):
2309 @$(MKDIR_P) igen
2310 @: > igen/$(am__dirstamp)
2311igen/$(DEPDIR)/$(am__dirstamp):
2312 @$(MKDIR_P) igen/$(DEPDIR)
2313 @: > igen/$(DEPDIR)/$(am__dirstamp)
2314igen/table.$(OBJEXT): igen/$(am__dirstamp) \
2315 igen/$(DEPDIR)/$(am__dirstamp)
2316igen/lf.$(OBJEXT): igen/$(am__dirstamp) igen/$(DEPDIR)/$(am__dirstamp)
2317igen/misc.$(OBJEXT): igen/$(am__dirstamp) \
2318 igen/$(DEPDIR)/$(am__dirstamp)
2319igen/filter_host.$(OBJEXT): igen/$(am__dirstamp) \
2320 igen/$(DEPDIR)/$(am__dirstamp)
2321igen/ld-decode.$(OBJEXT): igen/$(am__dirstamp) \
2322 igen/$(DEPDIR)/$(am__dirstamp)
2323igen/ld-cache.$(OBJEXT): igen/$(am__dirstamp) \
2324 igen/$(DEPDIR)/$(am__dirstamp)
2325igen/filter.$(OBJEXT): igen/$(am__dirstamp) \
2326 igen/$(DEPDIR)/$(am__dirstamp)
2327igen/ld-insn.$(OBJEXT): igen/$(am__dirstamp) \
2328 igen/$(DEPDIR)/$(am__dirstamp)
2329igen/gen-model.$(OBJEXT): igen/$(am__dirstamp) \
2330 igen/$(DEPDIR)/$(am__dirstamp)
2331igen/gen-itable.$(OBJEXT): igen/$(am__dirstamp) \
2332 igen/$(DEPDIR)/$(am__dirstamp)
2333igen/gen-icache.$(OBJEXT): igen/$(am__dirstamp) \
2334 igen/$(DEPDIR)/$(am__dirstamp)
2335igen/gen-semantics.$(OBJEXT): igen/$(am__dirstamp) \
2336 igen/$(DEPDIR)/$(am__dirstamp)
2337igen/gen-idecode.$(OBJEXT): igen/$(am__dirstamp) \
2338 igen/$(DEPDIR)/$(am__dirstamp)
2339igen/gen-support.$(OBJEXT): igen/$(am__dirstamp) \
2340 igen/$(DEPDIR)/$(am__dirstamp)
2341igen/gen-engine.$(OBJEXT): igen/$(am__dirstamp) \
2342 igen/$(DEPDIR)/$(am__dirstamp)
2343igen/gen.$(OBJEXT): igen/$(am__dirstamp) \
2344 igen/$(DEPDIR)/$(am__dirstamp)
2345
aa0fca16
MF		 2346@SIM_ENABLE_IGEN_FALSE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
2347@SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)-rm -f igen/libigen.a
2348@SIM_ENABLE_IGEN_FALSE@ $(AM_V_AR)$(igen_libigen_a_AR) igen/libigen.a $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
2349@SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)$(RANLIB) igen/libigen.a
b6b1c790 2350
a389375f 2351clean-checkPROGRAMS:
b5689863
MF		 2352 @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \
2353 echo " rm -f" $$list; \
2354 rm -f $$list || exit $$?; \
2355 test -n "$(EXEEXT)" || exit 0; \
2356 list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
2357 echo " rm -f" $$list; \
2358 rm -f $$list
c0c25232
MF		 2359
2360clean-noinstPROGRAMS:
2361 @list='$(noinst_PROGRAMS)'; test -n "$$list" || exit 0; \
2362 echo " rm -f" $$list; \
2363 rm -f $$list || exit $$?; \
2364 test -n "$(EXEEXT)" || exit 0; \
2365 list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
2366 echo " rm -f" $$list; \
2367 rm -f $$list
c0c25232
MF		 2368
2369aarch64/run$(EXEEXT): $(aarch64_run_OBJECTS) $(aarch64_run_DEPENDENCIES) $(EXTRA_aarch64_run_DEPENDENCIES) aarch64/$(am__dirstamp)
2370 @rm -f aarch64/run$(EXEEXT)
2371 $(AM_V_CCLD)$(LINK) $(aarch64_run_OBJECTS) $(aarch64_run_LDADD) $(LIBS)
c0c25232
MF		 2372
2373arm/run$(EXEEXT): $(arm_run_OBJECTS) $(arm_run_DEPENDENCIES) $(EXTRA_arm_run_DEPENDENCIES) arm/$(am__dirstamp)
2374 @rm -f arm/run$(EXEEXT)
2375 $(AM_V_CCLD)$(LINK) $(arm_run_OBJECTS) $(arm_run_LDADD) $(LIBS)
c0c25232
MF		 2376
2377avr/run$(EXEEXT): $(avr_run_OBJECTS) $(avr_run_DEPENDENCIES) $(EXTRA_avr_run_DEPENDENCIES) avr/$(am__dirstamp)
2378 @rm -f avr/run$(EXEEXT)
2379 $(AM_V_CCLD)$(LINK) $(avr_run_OBJECTS) $(avr_run_LDADD) $(LIBS)
c0c25232
MF		 2380
2381bfin/run$(EXEEXT): $(bfin_run_OBJECTS) $(bfin_run_DEPENDENCIES) $(EXTRA_bfin_run_DEPENDENCIES) bfin/$(am__dirstamp)
2382 @rm -f bfin/run$(EXEEXT)
2383 $(AM_V_CCLD)$(LINK) $(bfin_run_OBJECTS) $(bfin_run_LDADD) $(LIBS)
c0c25232
MF		 2384
2385bpf/run$(EXEEXT): $(bpf_run_OBJECTS) $(bpf_run_DEPENDENCIES) $(EXTRA_bpf_run_DEPENDENCIES) bpf/$(am__dirstamp)
2386 @rm -f bpf/run$(EXEEXT)
2387 $(AM_V_CCLD)$(LINK) $(bpf_run_OBJECTS) $(bpf_run_LDADD) $(LIBS)
70ab6bdd
MF		 2388cr16/$(am__dirstamp):
2389 @$(MKDIR_P) cr16
2390 @: > cr16/$(am__dirstamp)
2391cr16/$(DEPDIR)/$(am__dirstamp):
2392 @$(MKDIR_P) cr16/$(DEPDIR)
2393 @: > cr16/$(DEPDIR)/$(am__dirstamp)
2394cr16/gencode.$(OBJEXT): cr16/$(am__dirstamp) \
2395 cr16/$(DEPDIR)/$(am__dirstamp)
2396
2397@SIM_ENABLE_ARCH_cr16_FALSE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) $(EXTRA_cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
2398@SIM_ENABLE_ARCH_cr16_FALSE@ @rm -f cr16/gencode$(EXEEXT)
2399@SIM_ENABLE_ARCH_cr16_FALSE@ $(AM_V_CCLD)$(LINK) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD) $(LIBS)
c0c25232
MF		 2400
2401cr16/run$(EXEEXT): $(cr16_run_OBJECTS) $(cr16_run_DEPENDENCIES) $(EXTRA_cr16_run_DEPENDENCIES) cr16/$(am__dirstamp)
2402 @rm -f cr16/run$(EXEEXT)
2403 $(AM_V_CCLD)$(LINK) $(cr16_run_OBJECTS) $(cr16_run_LDADD) $(LIBS)
cb9bdc02
MF		 2404cris/$(am__dirstamp):
2405 @$(MKDIR_P) cris
2406 @: > cris/$(am__dirstamp)
c0c25232
MF		 2407
2408cris/run$(EXEEXT): $(cris_run_OBJECTS) $(cris_run_DEPENDENCIES) $(EXTRA_cris_run_DEPENDENCIES) cris/$(am__dirstamp)
2409 @rm -f cris/run$(EXEEXT)
2410 $(AM_V_CCLD)$(LINK) $(cris_run_OBJECTS) $(cris_run_LDADD) $(LIBS)
cb9bdc02
MF		 2411cris/$(DEPDIR)/$(am__dirstamp):
2412 @$(MKDIR_P) cris/$(DEPDIR)
2413 @: > cris/$(DEPDIR)/$(am__dirstamp)
2414cris/rvdummy.$(OBJEXT): cris/$(am__dirstamp) \
2415 cris/$(DEPDIR)/$(am__dirstamp)
2416
2417cris/rvdummy$(EXEEXT): $(cris_rvdummy_OBJECTS) $(cris_rvdummy_DEPENDENCIES) $(EXTRA_cris_rvdummy_DEPENDENCIES) cris/$(am__dirstamp)
2418 @rm -f cris/rvdummy$(EXEEXT)
2419 $(AM_V_CCLD)$(LINK) $(cris_rvdummy_OBJECTS) $(cris_rvdummy_LDADD) $(LIBS)
70ab6bdd
MF		 2420d10v/$(am__dirstamp):
2421 @$(MKDIR_P) d10v
2422 @: > d10v/$(am__dirstamp)
2423d10v/$(DEPDIR)/$(am__dirstamp):
2424 @$(MKDIR_P) d10v/$(DEPDIR)
2425 @: > d10v/$(DEPDIR)/$(am__dirstamp)
2426d10v/gencode.$(OBJEXT): d10v/$(am__dirstamp) \
2427 d10v/$(DEPDIR)/$(am__dirstamp)
2428
2429@SIM_ENABLE_ARCH_d10v_FALSE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) $(EXTRA_d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
2430@SIM_ENABLE_ARCH_d10v_FALSE@ @rm -f d10v/gencode$(EXEEXT)
2431@SIM_ENABLE_ARCH_d10v_FALSE@ $(AM_V_CCLD)$(LINK) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD) $(LIBS)
a389375f 2432
c0c25232
MF		 2433d10v/run$(EXEEXT): $(d10v_run_OBJECTS) $(d10v_run_DEPENDENCIES) $(EXTRA_d10v_run_DEPENDENCIES) d10v/$(am__dirstamp)
2434 @rm -f d10v/run$(EXEEXT)
2435 $(AM_V_CCLD)$(LINK) $(d10v_run_OBJECTS) $(d10v_run_LDADD) $(LIBS)
2436erc32/$(am__dirstamp):
2437 @$(MKDIR_P) erc32
2438 @: > erc32/$(am__dirstamp)
2439
2440erc32/run$(EXEEXT): $(erc32_run_OBJECTS) $(erc32_run_DEPENDENCIES) $(EXTRA_erc32_run_DEPENDENCIES) erc32/$(am__dirstamp)
2441 @rm -f erc32/run$(EXEEXT)
2442 $(AM_V_CCLD)$(LINK) $(erc32_run_OBJECTS) $(erc32_run_LDADD) $(LIBS)
2443erc32/$(DEPDIR)/$(am__dirstamp):
2444 @$(MKDIR_P) erc32/$(DEPDIR)
2445 @: > erc32/$(DEPDIR)/$(am__dirstamp)
2446erc32/sis.$(OBJEXT): erc32/$(am__dirstamp) \
2447 erc32/$(DEPDIR)/$(am__dirstamp)
2448
2449@SIM_ENABLE_ARCH_erc32_FALSE@erc32/sis$(EXEEXT): $(erc32_sis_OBJECTS) $(erc32_sis_DEPENDENCIES) $(EXTRA_erc32_sis_DEPENDENCIES) erc32/$(am__dirstamp)
2450@SIM_ENABLE_ARCH_erc32_FALSE@ @rm -f erc32/sis$(EXEEXT)
2451@SIM_ENABLE_ARCH_erc32_FALSE@ $(AM_V_CCLD)$(LINK) $(erc32_sis_OBJECTS) $(erc32_sis_LDADD) $(LIBS)
2452example-synacor/$(am__dirstamp):
2453 @$(MKDIR_P) example-synacor
2454 @: > example-synacor/$(am__dirstamp)
2455
2456example-synacor/run$(EXEEXT): $(example_synacor_run_OBJECTS) $(example_synacor_run_DEPENDENCIES) $(EXTRA_example_synacor_run_DEPENDENCIES) example-synacor/$(am__dirstamp)
2457 @rm -f example-synacor/run$(EXEEXT)
2458 $(AM_V_CCLD)$(LINK) $(example_synacor_run_OBJECTS) $(example_synacor_run_LDADD) $(LIBS)
2459frv/$(am__dirstamp):
2460 @$(MKDIR_P) frv
2461 @: > frv/$(am__dirstamp)
2462
2463frv/run$(EXEEXT): $(frv_run_OBJECTS) $(frv_run_DEPENDENCIES) $(EXTRA_frv_run_DEPENDENCIES) frv/$(am__dirstamp)
2464 @rm -f frv/run$(EXEEXT)
2465 $(AM_V_CCLD)$(LINK) $(frv_run_OBJECTS) $(frv_run_LDADD) $(LIBS)
2466ft32/$(am__dirstamp):
2467 @$(MKDIR_P) ft32
2468 @: > ft32/$(am__dirstamp)
2469
2470ft32/run$(EXEEXT): $(ft32_run_OBJECTS) $(ft32_run_DEPENDENCIES) $(EXTRA_ft32_run_DEPENDENCIES) ft32/$(am__dirstamp)
2471 @rm -f ft32/run$(EXEEXT)
2472 $(AM_V_CCLD)$(LINK) $(ft32_run_OBJECTS) $(ft32_run_LDADD) $(LIBS)
2473h8300/$(am__dirstamp):
2474 @$(MKDIR_P) h8300
2475 @: > h8300/$(am__dirstamp)
2476
2477h8300/run$(EXEEXT): $(h8300_run_OBJECTS) $(h8300_run_DEPENDENCIES) $(EXTRA_h8300_run_DEPENDENCIES) h8300/$(am__dirstamp)
2478 @rm -f h8300/run$(EXEEXT)
2479 $(AM_V_CCLD)$(LINK) $(h8300_run_OBJECTS) $(h8300_run_LDADD) $(LIBS)
2480
b6b1c790
MF		 2481igen/filter$(EXEEXT): $(igen_filter_OBJECTS) $(igen_filter_DEPENDENCIES) $(EXTRA_igen_filter_DEPENDENCIES) igen/$(am__dirstamp)
2482 @rm -f igen/filter$(EXEEXT)
2483 $(AM_V_CCLD)$(LINK) $(igen_filter_OBJECTS) $(igen_filter_LDADD) $(LIBS)
2484
2485igen/gen$(EXEEXT): $(igen_gen_OBJECTS) $(igen_gen_DEPENDENCIES) $(EXTRA_igen_gen_DEPENDENCIES) igen/$(am__dirstamp)
2486 @rm -f igen/gen$(EXEEXT)
2487 $(AM_V_CCLD)$(LINK) $(igen_gen_OBJECTS) $(igen_gen_LDADD) $(LIBS)
2488igen/igen.$(OBJEXT): igen/$(am__dirstamp) \
2489 igen/$(DEPDIR)/$(am__dirstamp)
2490
2491@SIM_ENABLE_IGEN_FALSE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) $(EXTRA_igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
2492@SIM_ENABLE_IGEN_FALSE@ @rm -f igen/igen$(EXEEXT)
2493@SIM_ENABLE_IGEN_FALSE@ $(AM_V_CCLD)$(LINK) $(igen_igen_OBJECTS) $(igen_igen_LDADD) $(LIBS)
2494
2495igen/ld-cache$(EXEEXT): $(igen_ld_cache_OBJECTS) $(igen_ld_cache_DEPENDENCIES) $(EXTRA_igen_ld_cache_DEPENDENCIES) igen/$(am__dirstamp)
2496 @rm -f igen/ld-cache$(EXEEXT)
2497 $(AM_V_CCLD)$(LINK) $(igen_ld_cache_OBJECTS) $(igen_ld_cache_LDADD) $(LIBS)
2498
2499igen/ld-decode$(EXEEXT): $(igen_ld_decode_OBJECTS) $(igen_ld_decode_DEPENDENCIES) $(EXTRA_igen_ld_decode_DEPENDENCIES) igen/$(am__dirstamp)
2500 @rm -f igen/ld-decode$(EXEEXT)
2501 $(AM_V_CCLD)$(LINK) $(igen_ld_decode_OBJECTS) $(igen_ld_decode_LDADD) $(LIBS)
2502
2503igen/ld-insn$(EXEEXT): $(igen_ld_insn_OBJECTS) $(igen_ld_insn_DEPENDENCIES) $(EXTRA_igen_ld_insn_DEPENDENCIES) igen/$(am__dirstamp)
2504 @rm -f igen/ld-insn$(EXEEXT)
2505 $(AM_V_CCLD)$(LINK) $(igen_ld_insn_OBJECTS) $(igen_ld_insn_LDADD) $(LIBS)
2506
2507igen/table$(EXEEXT): $(igen_table_OBJECTS) $(igen_table_DEPENDENCIES) $(EXTRA_igen_table_DEPENDENCIES) igen/$(am__dirstamp)
2508 @rm -f igen/table$(EXEEXT)
2509 $(AM_V_CCLD)$(LINK) $(igen_table_OBJECTS) $(igen_table_LDADD) $(LIBS)
c0c25232
MF		 2510iq2000/$(am__dirstamp):
2511 @$(MKDIR_P) iq2000
2512 @: > iq2000/$(am__dirstamp)
2513
2514iq2000/run$(EXEEXT): $(iq2000_run_OBJECTS) $(iq2000_run_DEPENDENCIES) $(EXTRA_iq2000_run_DEPENDENCIES) iq2000/$(am__dirstamp)
2515 @rm -f iq2000/run$(EXEEXT)
2516 $(AM_V_CCLD)$(LINK) $(iq2000_run_OBJECTS) $(iq2000_run_LDADD) $(LIBS)
2517lm32/$(am__dirstamp):
2518 @$(MKDIR_P) lm32
2519 @: > lm32/$(am__dirstamp)
2520
2521lm32/run$(EXEEXT): $(lm32_run_OBJECTS) $(lm32_run_DEPENDENCIES) $(EXTRA_lm32_run_DEPENDENCIES) lm32/$(am__dirstamp)
2522 @rm -f lm32/run$(EXEEXT)
2523 $(AM_V_CCLD)$(LINK) $(lm32_run_OBJECTS) $(lm32_run_LDADD) $(LIBS)
70ab6bdd
MF		 2524m32c/$(am__dirstamp):
2525 @$(MKDIR_P) m32c
2526 @: > m32c/$(am__dirstamp)
2527m32c/$(DEPDIR)/$(am__dirstamp):
2528 @$(MKDIR_P) m32c/$(DEPDIR)
2529 @: > m32c/$(DEPDIR)/$(am__dirstamp)
2530m32c/opc2c.$(OBJEXT): m32c/$(am__dirstamp) \
2531 m32c/$(DEPDIR)/$(am__dirstamp)
2532
2533@SIM_ENABLE_ARCH_m32c_FALSE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) $(EXTRA_m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
2534@SIM_ENABLE_ARCH_m32c_FALSE@ @rm -f m32c/opc2c$(EXEEXT)
2535@SIM_ENABLE_ARCH_m32c_FALSE@ $(AM_V_CCLD)$(LINK) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD) $(LIBS)
c0c25232
MF		 2536
2537m32c/run$(EXEEXT): $(m32c_run_OBJECTS) $(m32c_run_DEPENDENCIES) $(EXTRA_m32c_run_DEPENDENCIES) m32c/$(am__dirstamp)
2538 @rm -f m32c/run$(EXEEXT)
2539 $(AM_V_CCLD)$(LINK) $(m32c_run_OBJECTS) $(m32c_run_LDADD) $(LIBS)
2540m32r/$(am__dirstamp):
2541 @$(MKDIR_P) m32r
2542 @: > m32r/$(am__dirstamp)
2543
2544m32r/run$(EXEEXT): $(m32r_run_OBJECTS) $(m32r_run_DEPENDENCIES) $(EXTRA_m32r_run_DEPENDENCIES) m32r/$(am__dirstamp)
2545 @rm -f m32r/run$(EXEEXT)
2546 $(AM_V_CCLD)$(LINK) $(m32r_run_OBJECTS) $(m32r_run_LDADD) $(LIBS)
70ab6bdd
MF		 2547m68hc11/$(am__dirstamp):
2548 @$(MKDIR_P) m68hc11
2549 @: > m68hc11/$(am__dirstamp)
2550m68hc11/$(DEPDIR)/$(am__dirstamp):
2551 @$(MKDIR_P) m68hc11/$(DEPDIR)
2552 @: > m68hc11/$(DEPDIR)/$(am__dirstamp)
2553m68hc11/gencode.$(OBJEXT): m68hc11/$(am__dirstamp) \
2554 m68hc11/$(DEPDIR)/$(am__dirstamp)
2555
2556@SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) $(EXTRA_m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
2557@SIM_ENABLE_ARCH_m68hc11_FALSE@ @rm -f m68hc11/gencode$(EXEEXT)
2558@SIM_ENABLE_ARCH_m68hc11_FALSE@ $(AM_V_CCLD)$(LINK) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD) $(LIBS)
c0c25232
MF		 2559
2560m68hc11/run$(EXEEXT): $(m68hc11_run_OBJECTS) $(m68hc11_run_DEPENDENCIES) $(EXTRA_m68hc11_run_DEPENDENCIES) m68hc11/$(am__dirstamp)
2561 @rm -f m68hc11/run$(EXEEXT)
2562 $(AM_V_CCLD)$(LINK) $(m68hc11_run_OBJECTS) $(m68hc11_run_LDADD) $(LIBS)
2563mcore/$(am__dirstamp):
2564 @$(MKDIR_P) mcore
2565 @: > mcore/$(am__dirstamp)
2566
2567mcore/run$(EXEEXT): $(mcore_run_OBJECTS) $(mcore_run_DEPENDENCIES) $(EXTRA_mcore_run_DEPENDENCIES) mcore/$(am__dirstamp)
2568 @rm -f mcore/run$(EXEEXT)
2569 $(AM_V_CCLD)$(LINK) $(mcore_run_OBJECTS) $(mcore_run_LDADD) $(LIBS)
2570microblaze/$(am__dirstamp):
2571 @$(MKDIR_P) microblaze
2572 @: > microblaze/$(am__dirstamp)
2573
2574microblaze/run$(EXEEXT): $(microblaze_run_OBJECTS) $(microblaze_run_DEPENDENCIES) $(EXTRA_microblaze_run_DEPENDENCIES) microblaze/$(am__dirstamp)
2575 @rm -f microblaze/run$(EXEEXT)
2576 $(AM_V_CCLD)$(LINK) $(microblaze_run_OBJECTS) $(microblaze_run_LDADD) $(LIBS)
2577mips/$(am__dirstamp):
2578 @$(MKDIR_P) mips
2579 @: > mips/$(am__dirstamp)
2580
2581mips/run$(EXEEXT): $(mips_run_OBJECTS) $(mips_run_DEPENDENCIES) $(EXTRA_mips_run_DEPENDENCIES) mips/$(am__dirstamp)
2582 @rm -f mips/run$(EXEEXT)
2583 $(AM_V_CCLD)$(LINK) $(mips_run_OBJECTS) $(mips_run_LDADD) $(LIBS)
2584mn10300/$(am__dirstamp):
2585 @$(MKDIR_P) mn10300
2586 @: > mn10300/$(am__dirstamp)
2587
2588mn10300/run$(EXEEXT): $(mn10300_run_OBJECTS) $(mn10300_run_DEPENDENCIES) $(EXTRA_mn10300_run_DEPENDENCIES) mn10300/$(am__dirstamp)
2589 @rm -f mn10300/run$(EXEEXT)
2590 $(AM_V_CCLD)$(LINK) $(mn10300_run_OBJECTS) $(mn10300_run_LDADD) $(LIBS)
2591moxie/$(am__dirstamp):
2592 @$(MKDIR_P) moxie
2593 @: > moxie/$(am__dirstamp)
2594
2595moxie/run$(EXEEXT): $(moxie_run_OBJECTS) $(moxie_run_DEPENDENCIES) $(EXTRA_moxie_run_DEPENDENCIES) moxie/$(am__dirstamp)
2596 @rm -f moxie/run$(EXEEXT)
2597 $(AM_V_CCLD)$(LINK) $(moxie_run_OBJECTS) $(moxie_run_LDADD) $(LIBS)
2598msp430/$(am__dirstamp):
2599 @$(MKDIR_P) msp430
2600 @: > msp430/$(am__dirstamp)
2601
2602msp430/run$(EXEEXT): $(msp430_run_OBJECTS) $(msp430_run_DEPENDENCIES) $(EXTRA_msp430_run_DEPENDENCIES) msp430/$(am__dirstamp)
2603 @rm -f msp430/run$(EXEEXT)
2604 $(AM_V_CCLD)$(LINK) $(msp430_run_OBJECTS) $(msp430_run_LDADD) $(LIBS)
2605or1k/$(am__dirstamp):
2606 @$(MKDIR_P) or1k
2607 @: > or1k/$(am__dirstamp)
2608
2609or1k/run$(EXEEXT): $(or1k_run_OBJECTS) $(or1k_run_DEPENDENCIES) $(EXTRA_or1k_run_DEPENDENCIES) or1k/$(am__dirstamp)
2610 @rm -f or1k/run$(EXEEXT)
2611 $(AM_V_CCLD)$(LINK) $(or1k_run_OBJECTS) $(or1k_run_LDADD) $(LIBS)
2612ppc/$(am__dirstamp):
2613 @$(MKDIR_P) ppc
2614 @: > ppc/$(am__dirstamp)
2615ppc/$(DEPDIR)/$(am__dirstamp):
2616 @$(MKDIR_P) ppc/$(DEPDIR)
2617 @: > ppc/$(DEPDIR)/$(am__dirstamp)
2618ppc/psim.$(OBJEXT): ppc/$(am__dirstamp) ppc/$(DEPDIR)/$(am__dirstamp)
2619
2620@SIM_ENABLE_ARCH_ppc_FALSE@ppc/psim$(EXEEXT): $(ppc_psim_OBJECTS) $(ppc_psim_DEPENDENCIES) $(EXTRA_ppc_psim_DEPENDENCIES) ppc/$(am__dirstamp)
2621@SIM_ENABLE_ARCH_ppc_FALSE@ @rm -f ppc/psim$(EXEEXT)
2622@SIM_ENABLE_ARCH_ppc_FALSE@ $(AM_V_CCLD)$(LINK) $(ppc_psim_OBJECTS) $(ppc_psim_LDADD) $(LIBS)
2623
2624ppc/run$(EXEEXT): $(ppc_run_OBJECTS) $(ppc_run_DEPENDENCIES) $(EXTRA_ppc_run_DEPENDENCIES) ppc/$(am__dirstamp)
2625 @rm -f ppc/run$(EXEEXT)
2626 $(AM_V_CCLD)$(LINK) $(ppc_run_OBJECTS) $(ppc_run_LDADD) $(LIBS)
2627pru/$(am__dirstamp):
2628 @$(MKDIR_P) pru
2629 @: > pru/$(am__dirstamp)
2630
2631pru/run$(EXEEXT): $(pru_run_OBJECTS) $(pru_run_DEPENDENCIES) $(EXTRA_pru_run_DEPENDENCIES) pru/$(am__dirstamp)
2632 @rm -f pru/run$(EXEEXT)
2633 $(AM_V_CCLD)$(LINK) $(pru_run_OBJECTS) $(pru_run_LDADD) $(LIBS)
2634riscv/$(am__dirstamp):
2635 @$(MKDIR_P) riscv
2636 @: > riscv/$(am__dirstamp)
2637
2638riscv/run$(EXEEXT): $(riscv_run_OBJECTS) $(riscv_run_DEPENDENCIES) $(EXTRA_riscv_run_DEPENDENCIES) riscv/$(am__dirstamp)
2639 @rm -f riscv/run$(EXEEXT)
2640 $(AM_V_CCLD)$(LINK) $(riscv_run_OBJECTS) $(riscv_run_LDADD) $(LIBS)
2641rl78/$(am__dirstamp):
2642 @$(MKDIR_P) rl78
2643 @: > rl78/$(am__dirstamp)
2644
2645rl78/run$(EXEEXT): $(rl78_run_OBJECTS) $(rl78_run_DEPENDENCIES) $(EXTRA_rl78_run_DEPENDENCIES) rl78/$(am__dirstamp)
2646 @rm -f rl78/run$(EXEEXT)
2647 $(AM_V_CCLD)$(LINK) $(rl78_run_OBJECTS) $(rl78_run_LDADD) $(LIBS)
2648rx/$(am__dirstamp):
2649 @$(MKDIR_P) rx
2650 @: > rx/$(am__dirstamp)
2651
2652rx/run$(EXEEXT): $(rx_run_OBJECTS) $(rx_run_DEPENDENCIES) $(EXTRA_rx_run_DEPENDENCIES) rx/$(am__dirstamp)
2653 @rm -f rx/run$(EXEEXT)
2654 $(AM_V_CCLD)$(LINK) $(rx_run_OBJECTS) $(rx_run_LDADD) $(LIBS)
70ab6bdd
MF		 2655sh/$(am__dirstamp):
2656 @$(MKDIR_P) sh
2657 @: > sh/$(am__dirstamp)
2658sh/$(DEPDIR)/$(am__dirstamp):
2659 @$(MKDIR_P) sh/$(DEPDIR)
2660 @: > sh/$(DEPDIR)/$(am__dirstamp)
2661sh/gencode.$(OBJEXT): sh/$(am__dirstamp) sh/$(DEPDIR)/$(am__dirstamp)
2662
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3036 if ($(ETAGS) --etags-include --version) >/dev/null 2>&1; then \
3037 include_option=--etags-include; \
3038 empty_fix=.; \
3039 else \
3040 include_option=--include; \
3041 empty_fix=; \
3042 fi; \
3043 list='$(SUBDIRS)'; for subdir in $$list; do \
3044 if test "$$subdir" = .; then :; else \
3045 test ! -f $$subdir/TAGS || \
3046 set "$$@" "$$include_option=$$here/$$subdir/TAGS"; \
3047 fi; \
3048 done; \
3049 $(am__define_uniq_tagged_files); \
3050 shift; \
3051 if test -z "$(ETAGS_ARGS)$$*$$unique"; then :; else \
3052 test -n "$$unique" || unique=$$empty_fix; \
3053 if test $$# -gt 0; then \
3054 $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
3055 "$$@" $$unique; \
3056 else \
3057 $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
3058 $$unique; \
3059 fi; \
3060 fi
3061ctags: ctags-recursive
3062
3063CTAGS: ctags
3064ctags-am: $(TAGS_DEPENDENCIES) $(am__tagged_files)
3065 $(am__define_uniq_tagged_files); \
3066 test -z "$(CTAGS_ARGS)$$unique" \
3067 || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
3068 $$unique
3069
3070GTAGS:
3071 here=`$(am__cd) $(top_builddir) && pwd` \
3072 && $(am__cd) $(top_srcdir) \
3073 && gtags -i $(GTAGS_ARGS) "$$here"
3074cscope: cscope.files
3075 test ! -s cscope.files \
3076 || $(CSCOPE) -b -q $(AM_CSCOPEFLAGS) $(CSCOPEFLAGS) -i cscope.files $(CSCOPE_ARGS)
3077clean-cscope:
3078 -rm -f cscope.files
3079cscope.files: clean-cscope cscopelist
3080cscopelist: cscopelist-recursive
3081
3082cscopelist-am: $(am__tagged_files)
3083 list='$(am__tagged_files)'; \
3084 case "$(srcdir)" in \
3085 [\\/]* | ?:[\\/]*) sdir="$(srcdir)" ;; \
3086 *) sdir=$(subdir)/$(srcdir) ;; \
3087 esac; \
3088 for i in $$list; do \
3089 if test -f "$$i"; then \
3090 echo "$(subdir)/$$i"; \
3091 else \
3092 echo "$$sdir/$$i"; \
3093 fi; \
3094 done >> $(top_builddir)/cscope.files
3095
3096distclean-tags:
3097 -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
3098 -rm -f cscope.out cscope.in.out cscope.po.out cscope.files
6c57b87f
MF		 3099site.exp: Makefile $(EXTRA_DEJAGNU_SITE_CONFIG)
3100 @echo 'Making a new site.exp file ...'
3101 @echo '## these variables are automatically generated by make ##' >site.tmp
3102 @echo '# Do not edit here. If you wish to override these values' >>site.tmp
3103 @echo '# edit the last section' >>site.tmp
3104 @echo 'set srcdir "$(srcdir)"' >>site.tmp
3105 @echo "set objdir `pwd`" >>site.tmp
3106 @echo 'set build_alias "$(build_alias)"' >>site.tmp
3107 @echo 'set build_triplet $(build_triplet)' >>site.tmp
3108 @echo 'set host_alias "$(host_alias)"' >>site.tmp
3109 @echo 'set host_triplet $(host_triplet)' >>site.tmp
3110 @echo 'set target_alias "$(target_alias)"' >>site.tmp
3111 @echo 'set target_triplet $(target_triplet)' >>site.tmp
3112 @list='$(EXTRA_DEJAGNU_SITE_CONFIG)'; for f in $$list; do \
3113 echo "## Begin content included from file $$f. Do not modify. ##" \
3114 && cat `test -f "$$f" || echo '$(srcdir)/'`$$f \
3115 && echo "## End content included from file $$f. ##" \
3116 || exit 1; \
3117 done >> site.tmp
3118 @echo "## End of auto-generated content; you can edit from here. ##" >> site.tmp
3119 @if test -f site.exp; then \
3120 sed -e '1,/^## End of auto-generated content.*##/d' site.exp >> site.tmp; \
3121 fi
3122 @-rm -f site.bak
3123 @test ! -f site.exp || mv site.exp site.bak
3124 @mv site.tmp site.exp
3125
3126distclean-DEJAGNU:
3127 -rm -f site.exp site.bak
3128 -l='$(DEJATOOL)'; for tool in $$l; do \
3129 rm -f $$tool.sum $$tool.log; \
3130 done
a389375f
MF		 3131
3132# Recover from deleted '.trs' file; this should ensure that
3133# "rm -f foo.log; make foo.trs" re-run 'foo.test', and re-create
3134# both 'foo.log' and 'foo.trs'. Break the recipe in two subshells
3135# to avoid problems with "make -n".
3136.log.trs:
3137 rm -f $< $@
3138 $(MAKE) $(AM_MAKEFLAGS) $<
3139
3140# Leading 'am--fnord' is there to ensure the list of targets does not
3141# expand to empty, as could happen e.g. with make check TESTS=''.
3142am--fnord $(TEST_LOGS) $(TEST_LOGS:.log=.trs): $(am__force_recheck)
3143am--force-recheck:
3144 @:
3145
3146$(TEST_SUITE_LOG): $(TEST_LOGS)
3147 @$(am__set_TESTS_bases); \
3148 am__f_ok () { test -f "$$1" && test -r "$$1"; }; \
3149 redo_bases=`for i in $$bases; do \
3150 am__f_ok $$i.trs && am__f_ok $$i.log || echo $$i; \
3151 done`; \
3152 if test -n "$$redo_bases"; then \
3153 redo_logs=`for i in $$redo_bases; do echo $$i.log; done`; \
3154 redo_results=`for i in $$redo_bases; do echo $$i.trs; done`; \
3155 if $(am__make_dryrun); then :; else \
3156 rm -f $$redo_logs && rm -f $$redo_results || exit 1; \
3157 fi; \
3158 fi; \
3159 if test -n "$$am__remaking_logs"; then \
3160 echo "fatal: making $(TEST_SUITE_LOG): possible infinite" \
3161 "recursion detected" >&2; \
3162 elif test -n "$$redo_logs"; then \
3163 am__remaking_logs=yes $(MAKE) $(AM_MAKEFLAGS) $$redo_logs; \
3164 fi; \
3165 if $(am__make_dryrun); then :; else \
3166 st=0; \
3167 errmsg="fatal: making $(TEST_SUITE_LOG): failed to create"; \
3168 for i in $$redo_bases; do \
3169 test -f $$i.trs && test -r $$i.trs \
3170 || { echo "$$errmsg $$i.trs" >&2; st=1; }; \
3171 test -f $$i.log && test -r $$i.log \
3172 || { echo "$$errmsg $$i.log" >&2; st=1; }; \
3173 done; \
3174 test $$st -eq 0 || exit 1; \
3175 fi
3176 @$(am__sh_e_setup); $(am__tty_colors); $(am__set_TESTS_bases); \
3177 ws='[ ]'; \
3178 results=`for b in $$bases; do echo $$b.trs; done`; \
3179 test -n "$$results" || results=/dev/null; \
3180 all=` grep "^$$ws*:test-result:" $$results | wc -l`; \
3181 pass=` grep "^$$ws*:test-result:$$ws*PASS" $$results | wc -l`; \
3182 fail=` grep "^$$ws*:test-result:$$ws*FAIL" $$results | wc -l`; \
3183 skip=` grep "^$$ws*:test-result:$$ws*SKIP" $$results | wc -l`; \
3184 xfail=`grep "^$$ws*:test-result:$$ws*XFAIL" $$results | wc -l`; \
3185 xpass=`grep "^$$ws*:test-result:$$ws*XPASS" $$results | wc -l`; \
3186 error=`grep "^$$ws*:test-result:$$ws*ERROR" $$results | wc -l`; \
3187 if test `expr $$fail + $$xpass + $$error` -eq 0; then \
3188 success=true; \
3189 else \
3190 success=false; \
3191 fi; \
3192 br='==================='; br=$$br$$br$$br$$br; \
3193 result_count () \
3194 { \
3195 if test x"$$1" = x"--maybe-color"; then \
3196 maybe_colorize=yes; \
3197 elif test x"$$1" = x"--no-color"; then \
3198 maybe_colorize=no; \
3199 else \
3200 echo "$@: invalid 'result_count' usage" >&2; exit 4; \
3201 fi; \
3202 shift; \
3203 desc=$$1 count=$$2; \
3204 if test $$maybe_colorize = yes && test $$count -gt 0; then \
3205 color_start=$$3 color_end=$$std; \
3206 else \
3207 color_start= color_end=; \
3208 fi; \
3209 echo "$${color_start}# $$desc $$count$${color_end}"; \
3210 }; \
3211 create_testsuite_report () \
3212 { \
3213 result_count $$1 "TOTAL:" $$all "$$brg"; \
3214 result_count $$1 "PASS: " $$pass "$$grn"; \
3215 result_count $$1 "SKIP: " $$skip "$$blu"; \
3216 result_count $$1 "XFAIL:" $$xfail "$$lgn"; \
3217 result_count $$1 "FAIL: " $$fail "$$red"; \
3218 result_count $$1 "XPASS:" $$xpass "$$red"; \
3219 result_count $$1 "ERROR:" $$error "$$mgn"; \
3220 }; \
3221 { \
3222 echo "$(PACKAGE_STRING): $(subdir)/$(TEST_SUITE_LOG)" | \
3223 $(am__rst_title); \
3224 create_testsuite_report --no-color; \
3225 echo; \
3226 echo ".. contents:: :depth: 2"; \
3227 echo; \
3228 for b in $$bases; do echo $$b; done \
3229 | $(am__create_global_log); \
3230 } >$(TEST_SUITE_LOG).tmp || exit 1; \
3231 mv $(TEST_SUITE_LOG).tmp $(TEST_SUITE_LOG); \
3232 if $$success; then \
3233 col="$$grn"; \
3234 else \
3235 col="$$red"; \
3236 test x"$$VERBOSE" = x || cat $(TEST_SUITE_LOG); \
3237 fi; \
3238 echo "$${col}$$br$${std}"; \
3239 echo "$${col}Testsuite summary for $(PACKAGE_STRING)$${std}"; \
3240 echo "$${col}$$br$${std}"; \
3241 create_testsuite_report --maybe-color; \
3242 echo "$$col$$br$$std"; \
3243 if $$success; then :; else \
3244 echo "$${col}See $(subdir)/$(TEST_SUITE_LOG)$${std}"; \
3245 if test -n "$(PACKAGE_BUGREPORT)"; then \
3246 echo "$${col}Please report to $(PACKAGE_BUGREPORT)$${std}"; \
3247 fi; \
3248 echo "$$col$$br$$std"; \
3249 fi; \
3250 $$success || exit 1
3251
3252check-TESTS:
3253 @list='$(RECHECK_LOGS)'; test -z "$$list" || rm -f $$list
3254 @list='$(RECHECK_LOGS:.log=.trs)'; test -z "$$list" || rm -f $$list
3255 @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
3256 @set +e; $(am__set_TESTS_bases); \
3257 log_list=`for i in $$bases; do echo $$i.log; done`; \
3258 trs_list=`for i in $$bases; do echo $$i.trs; done`; \
3259 log_list=`echo $$log_list`; trs_list=`echo $$trs_list`; \
3260 $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) TEST_LOGS="$$log_list"; \
3261 exit $$?;
3262recheck: all $(check_PROGRAMS)
3263 @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
3264 @set +e; $(am__set_TESTS_bases); \
3265 bases=`for i in $$bases; do echo $$i; done \
3266 | $(am__list_recheck_tests)` || exit 1; \
3267 log_list=`for i in $$bases; do echo $$i.log; done`; \
3268 log_list=`echo $$log_list`; \
3269 $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) \
3270 am__force_recheck=am--force-recheck \
3271 TEST_LOGS="$$log_list"; \
3272 exit $$?
3273testsuite/common/bits32m0.log: testsuite/common/bits32m0$(EXEEXT)
3274 @p='testsuite/common/bits32m0$(EXEEXT)'; \
3275 b='testsuite/common/bits32m0'; \
3276 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3277 --log-file $$b.log --trs-file $$b.trs \
3278 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3279 "$$tst" $(AM_TESTS_FD_REDIRECT)
3280testsuite/common/bits32m31.log: testsuite/common/bits32m31$(EXEEXT)
3281 @p='testsuite/common/bits32m31$(EXEEXT)'; \
3282 b='testsuite/common/bits32m31'; \
3283 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3284 --log-file $$b.log --trs-file $$b.trs \
3285 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3286 "$$tst" $(AM_TESTS_FD_REDIRECT)
3287testsuite/common/bits64m0.log: testsuite/common/bits64m0$(EXEEXT)
3288 @p='testsuite/common/bits64m0$(EXEEXT)'; \
3289 b='testsuite/common/bits64m0'; \
3290 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3291 --log-file $$b.log --trs-file $$b.trs \
3292 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3293 "$$tst" $(AM_TESTS_FD_REDIRECT)
3294testsuite/common/bits64m63.log: testsuite/common/bits64m63$(EXEEXT)
3295 @p='testsuite/common/bits64m63$(EXEEXT)'; \
3296 b='testsuite/common/bits64m63'; \
3297 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3298 --log-file $$b.log --trs-file $$b.trs \
3299 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3300 "$$tst" $(AM_TESTS_FD_REDIRECT)
3301testsuite/common/alu-tst.log: testsuite/common/alu-tst$(EXEEXT)
3302 @p='testsuite/common/alu-tst$(EXEEXT)'; \
3303 b='testsuite/common/alu-tst'; \
3304 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3305 --log-file $$b.log --trs-file $$b.trs \
3306 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3307 "$$tst" $(AM_TESTS_FD_REDIRECT)
3308.test.log:
3309 @p='$<'; \
3310 $(am__set_b); \
3311 $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
3312 --log-file $$b.log --trs-file $$b.trs \
3313 $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
3314 "$$tst" $(AM_TESTS_FD_REDIRECT)
3315@am__EXEEXT_TRUE@.test$(EXEEXT).log:
3316@am__EXEEXT_TRUE@ @p='$<'; \
3317@am__EXEEXT_TRUE@ $(am__set_b); \
3318@am__EXEEXT_TRUE@ $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
3319@am__EXEEXT_TRUE@ --log-file $$b.log --trs-file $$b.trs \
3320@am__EXEEXT_TRUE@ $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
3321@am__EXEEXT_TRUE@ "$$tst" $(AM_TESTS_FD_REDIRECT)
6bddc3e8 3322check-am: all-am
a389375f
MF		 3323 $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
3324 $(MAKE) $(AM_MAKEFLAGS) check-DEJAGNU check-TESTS
80636a54
MF		 3325check: $(BUILT_SOURCES)
3326 $(MAKE) $(AM_MAKEFLAGS) check-recursive
c0c25232 3327all-am: Makefile $(LIBRARIES) $(PROGRAMS) $(DATA) $(HEADERS) config.h
6bddc3e8
MF		 3328installdirs: installdirs-recursive
3329installdirs-am:
94f5dfed 3330 for dir in "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"; do \
92bc001e
MF		 3331 test -z "$$dir" || $(MKDIR_P) "$$dir"; \
3332 done
80636a54
MF		 3333install: $(BUILT_SOURCES)
3334 $(MAKE) $(AM_MAKEFLAGS) install-recursive
6bddc3e8
MF		 3335install-exec: install-exec-recursive
3336install-data: install-data-recursive
3337uninstall: uninstall-recursive
3338
3339install-am: all-am
3340 @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
3341
3342installcheck: installcheck-recursive
3343install-strip:
3344 if test -z '$(STRIP)'; then \
3345 $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
3346 install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
3347 install; \
3348 else \
3349 $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
3350 install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
3351 "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \
3352 fi
3353mostlyclean-generic:
3354 -test -z "$(MOSTLYCLEANFILES)" || rm -f $(MOSTLYCLEANFILES)
a389375f
MF		 3355 -test -z "$(TEST_LOGS)" || rm -f $(TEST_LOGS)
3356 -test -z "$(TEST_LOGS:.log=.trs)" || rm -f $(TEST_LOGS:.log=.trs)
3357 -test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
c906108c 3358
6bddc3e8 3359clean-generic:
a389375f 3360 -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES)
c906108c 3361
6bddc3e8
MF		 3362distclean-generic:
3363 -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
3364 -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES)
c0c25232
MF		 3365 -rm -f aarch64/$(am__dirstamp)
3366 -rm -f arm/$(am__dirstamp)
3367 -rm -f avr/$(am__dirstamp)
3368 -rm -f bfin/$(am__dirstamp)
3369 -rm -f bpf/$(am__dirstamp)
5bea0c32
MF		 3370 -rm -f common/$(DEPDIR)/$(am__dirstamp)
3371 -rm -f common/$(am__dirstamp)
70ab6bdd
MF		 3372 -rm -f cr16/$(DEPDIR)/$(am__dirstamp)
3373 -rm -f cr16/$(am__dirstamp)
cb9bdc02
MF		 3374 -rm -f cris/$(DEPDIR)/$(am__dirstamp)
3375 -rm -f cris/$(am__dirstamp)
70ab6bdd
MF		 3376 -rm -f d10v/$(DEPDIR)/$(am__dirstamp)
3377 -rm -f d10v/$(am__dirstamp)
c0c25232
MF		 3378 -rm -f erc32/$(DEPDIR)/$(am__dirstamp)
3379 -rm -f erc32/$(am__dirstamp)
3380 -rm -f example-synacor/$(am__dirstamp)
3381 -rm -f frv/$(am__dirstamp)
3382 -rm -f ft32/$(am__dirstamp)
3383 -rm -f h8300/$(am__dirstamp)
b6b1c790
MF		 3384 -rm -f igen/$(DEPDIR)/$(am__dirstamp)
3385 -rm -f igen/$(am__dirstamp)
c0c25232
MF		 3386 -rm -f iq2000/$(am__dirstamp)
3387 -rm -f lm32/$(am__dirstamp)
70ab6bdd
MF		 3388 -rm -f m32c/$(DEPDIR)/$(am__dirstamp)
3389 -rm -f m32c/$(am__dirstamp)
c0c25232 3390 -rm -f m32r/$(am__dirstamp)
70ab6bdd
MF		 3391 -rm -f m68hc11/$(DEPDIR)/$(am__dirstamp)
3392 -rm -f m68hc11/$(am__dirstamp)
c0c25232
MF		 3393 -rm -f mcore/$(am__dirstamp)
3394 -rm -f microblaze/$(am__dirstamp)
3395 -rm -f mips/$(am__dirstamp)
3396 -rm -f mn10300/$(am__dirstamp)
3397 -rm -f moxie/$(am__dirstamp)
3398 -rm -f msp430/$(am__dirstamp)
3399 -rm -f or1k/$(am__dirstamp)
3400 -rm -f ppc/$(DEPDIR)/$(am__dirstamp)
3401 -rm -f ppc/$(am__dirstamp)
3402 -rm -f pru/$(am__dirstamp)
3403 -rm -f riscv/$(am__dirstamp)
3404 -rm -f rl78/$(am__dirstamp)
3405 -rm -f rx/$(am__dirstamp)
70ab6bdd
MF		 3406 -rm -f sh/$(DEPDIR)/$(am__dirstamp)
3407 -rm -f sh/$(am__dirstamp)
a389375f
MF		 3408 -rm -f testsuite/common/$(DEPDIR)/$(am__dirstamp)
3409 -rm -f testsuite/common/$(am__dirstamp)
c0c25232 3410 -rm -f v850/$(am__dirstamp)
a389375f 3411 -test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES)
c906108c 3412
6bddc3e8
MF		 3413maintainer-clean-generic:
3414 @echo "This command is intended for maintainers to use"
3415 @echo "it deletes files that may require special tools to rebuild."
80636a54 3416 -test -z "$(BUILT_SOURCES)" || rm -f $(BUILT_SOURCES)
6bddc3e8 3417clean: clean-recursive
c906108c 3418
b5689863 3419clean-am: clean-checkPROGRAMS clean-generic clean-libtool \
c0c25232 3420 clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
c906108c 3421
6bddc3e8
MF		 3422distclean: distclean-recursive
3423 -rm -f $(am__CONFIG_DISTCLEAN_FILES)
c0c25232 3424 -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
6bddc3e8 3425 -rm -f Makefile
b6b1c790 3426distclean-am: clean-am distclean-DEJAGNU distclean-compile \
b5689863
MF		 3427 distclean-generic distclean-hdr distclean-libtool \
3428 distclean-tags
c906108c 3429
6bddc3e8 3430dvi: dvi-recursive
c906108c 3431
6bddc3e8 3432dvi-am:
c906108c 3433
6bddc3e8 3434html: html-recursive
c906108c 3435
6bddc3e8 3436html-am:
c906108c 3437
6bddc3e8
MF		 3438info: info-recursive
3439
3440info-am:
3441
63bf33ff 3442install-data-am: install-armdocDATA install-data-local install-dtbDATA \
94f5dfed 3443 install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
ed939535 3444 install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
6bddc3e8
MF		 3445
3446install-dvi: install-dvi-recursive
3447
3448install-dvi-am:
3449
63bf33ff 3450install-exec-am: install-exec-local
6bddc3e8
MF		 3451
3452install-html: install-html-recursive
3453
3454install-html-am:
3455
3456install-info: install-info-recursive
3457
3458install-info-am:
3459
3460install-man:
3461
3462install-pdf: install-pdf-recursive
3463
3464install-pdf-am:
3465
3466install-ps: install-ps-recursive
3467
3468install-ps-am:
3469
3470installcheck-am:
3471
3472maintainer-clean: maintainer-clean-recursive
3473 -rm -f $(am__CONFIG_DISTCLEAN_FILES)
3474 -rm -rf $(top_srcdir)/autom4te.cache
c0c25232 3475 -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
6bddc3e8
MF		 3476 -rm -f Makefile
3477maintainer-clean-am: distclean-am maintainer-clean-generic
3478
3479mostlyclean: mostlyclean-recursive
3480
b5689863
MF		 3481mostlyclean-am: mostlyclean-compile mostlyclean-generic \
3482 mostlyclean-libtool
6bddc3e8
MF		 3483
3484pdf: pdf-recursive
3485
3486pdf-am:
3487
3488ps: ps-recursive
3489
3490ps-am:
3491
94f5dfed 3492uninstall-am: uninstall-armdocDATA uninstall-dtbDATA \
59d8576e 3493 uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
94f5dfed
MF		 3494 uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
3495 uninstall-ppcdocDATA uninstall-rxdocDATA
6bddc3e8 3496
80636a54
MF		 3497.MAKE: $(am__recursive_targets) all check check-am install install-am \
3498 install-strip
6bddc3e8
MF		 3499
3500.PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am \
a389375f 3501 am--refresh check check-DEJAGNU check-TESTS check-am clean \
b5689863 3502 clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
c0c25232
MF		 3503 clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
3504 cscopelist-am ctags ctags-am distclean distclean-DEJAGNU \
3505 distclean-compile distclean-generic distclean-hdr \
3506 distclean-libtool distclean-tags dvi dvi-am html html-am info \
3507 info-am install install-am install-armdocDATA install-data \
3508 install-data-am install-data-local install-dtbDATA install-dvi \
3509 install-dvi-am install-erc32docDATA install-exec \
3510 install-exec-am install-exec-local install-frvdocDATA \
3511 install-html install-html-am install-info install-info-am \
3512 install-man install-or1kdocDATA install-pdf install-pdf-am \
63bf33ff
MF		 3513 install-pkgincludeHEADERS install-ppcdocDATA install-ps \
3514 install-ps-am install-rxdocDATA install-strip installcheck \
3515 installcheck-am installdirs installdirs-am maintainer-clean \
3516 maintainer-clean-generic mostlyclean mostlyclean-compile \
3517 mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
3518 recheck tags tags-am uninstall uninstall-am \
3519 uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
59d8576e 3520 uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
63bf33ff
MF		 3521 uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
3522 uninstall-rxdocDATA
6bddc3e8
MF		 3523
3524.PRECIOUS: Makefile
c906108c 3525
4d4996a5 3526@am__include@ @am__quote@$(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc@am__quote@
c906108c 3527
64ae70dd 3528# Generate target constants for newlib/libgloss from its source tree.
5e25901f
MF		 3529# This file is shipped with distributions so we build in the source dir.
3530# Use `make nltvals' to rebuild.
5e25901f
MF		 3531.PHONY: nltvals
3532nltvals:
0a129eb1 3533 $(srccom)/gennltvals.py --cpp "$(CPP)"
5e25901f 3534
015f7b74
MF		 3535common/version.c: common/version.c-stamp ; @true
3536common/version.c-stamp: $(srcroot)/gdb/version.in $(srcroot)/bfd/version.h $(srcdir)/common/create-version.sh
fbe8d1cf 3537 $(AM_V_GEN)$(SHELL) $(srcdir)/common/create-version.sh $(srcroot)/gdb $@.tmp
015f7b74 3538 $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(@:-stamp=)
fbe8d1cf 3539 $(AM_V_at)touch $@
b6b1c790 3540
f4ac2306
MF		 3541# FIXME This is one very simple-minded way of generating the file hw-config.h.
3542%/hw-config.h: %/stamp-hw ; @true
3543%/stamp-hw: Makefile
3544 $(AM_V_GEN)set -e; \
3545 ( \
3546 sim_hw="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
3547 echo "/* generated by Makefile */" ; \
3548 printf "extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
3549 echo "const struct hw_descriptor * const hw_descriptors[] = {" ; \
3550 printf " dv_%s_descriptor,\n" $$sim_hw ; \
3551 echo " NULL," ; \
3552 echo "};" \
3553 ) > $@.tmp; \
3554 $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/hw-config.h; \
3555 touch $@
3556.PRECIOUS: %/stamp-hw
437eeee9
MF		 3557%/modules.c:
3558 $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) GEN_MODULES_C_SRCS="$(GEN_MODULES_C_SRCS)" -C $(@D) $(@F)
f4ac2306 3559
b6b1c790 3560# Alias for developers.
d2a5dbc7 3561@SIM_ENABLE_IGEN_TRUE@igen: $(IGEN)
b6b1c790 3562
aa0fca16
MF		 3563# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3564@SIM_ENABLE_IGEN_TRUE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
3565@SIM_ENABLE_IGEN_TRUE@ $(AM_V_at)-rm -f $@
3566@SIM_ENABLE_IGEN_TRUE@ $(AM_V_AR)$(AR_FOR_BUILD) $(ARFLAGS) $@ $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
3567@SIM_ENABLE_IGEN_TRUE@ $(AM_V_at)$(RANLIB_FOR_BUILD) $@
3568
b6b1c790
MF		 3569@SIM_ENABLE_IGEN_TRUE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
3570@SIM_ENABLE_IGEN_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(igen_igen_OBJECTS) $(igen_igen_LDADD)
3571
3572# igen is a build-time only tool. Override the default rules for it.
3573@SIM_ENABLE_IGEN_TRUE@igen/%.o: igen/%.c
3574@SIM_ENABLE_IGEN_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
3575
3576# Build some of the files in standalone mode for developers of igen itself.
3577@SIM_ENABLE_IGEN_TRUE@igen/%-main.o: igen/%.c
3578@SIM_ENABLE_IGEN_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -DMAIN -c $< -o $@
3579
e1e1ae6e
MF		 3580site-sim-config.exp: Makefile
3581 $(AM_V_GEN)( \
7a259895 3582 echo "set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
e1e1ae6e
MF		 3583 echo "set builddir \"$(builddir)\""; \
3584 echo "set srcdir \"$(srcdir)/testsuite\""; \
8996c210 3585 $(foreach V,$(SIM_TOOLCHAIN_VARS),echo "set $(V) \"$($(V))\"";) \
e1e1ae6e 3586 ) > $@
6c57b87f 3587
804de1fa
MF		 3588# Ignore dirs that only contain configuration settings.
3589check/./config/%.exp: ; @true
e60091e4 3590check/config/%.exp: ; @true
804de1fa 3591check/./lib/%.exp: ; @true
e60091e4 3592check/lib/%.exp: ; @true
804de1fa
MF		 3593
3594check/%.exp:
3595 $(AM_V_at)mkdir -p testsuite/$*
3596 $(AM_V_RUNTEST)$(DO_RUNTEST) --objdir testsuite/$* --outdir testsuite/$* $*.exp
3597
3598check-DEJAGNU-parallel:
3599 $(AM_V_at)( \
8f97b519
MF		 3600 set -- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
3601 $(MAKE) -k `printf 'check/%s.exp ' $$@`; \
804de1fa 3602 ret=$$?; \
8f97b519 3603 set -- `printf 'testsuite/%s/ ' $$@`; \
804de1fa 3604 $(SHELL) $(srcroot)/contrib/dg-extract-results.sh \
8f97b519 3605 `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum; \
804de1fa 3606 $(SHELL) $(srcroot)/contrib/dg-extract-results.sh -L \
8f97b519 3607 `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log; \
804de1fa
MF		 3608 echo; \
3609 $(SED) -n '/^.*===.*Summary.*===/,$$p' testrun.sum; \
3610 exit $$ret)
3611
3612check-DEJAGNU-single:
3613 $(AM_V_RUNTEST)$(DO_RUNTEST)
3614
3615# If running a single job, invoking runtest once is faster & has nicer output.
6c57b87f 3616check-DEJAGNU: site.exp
804de1fa 3617 $(AM_V_at)(set -e; \
6c57b87f
MF		 3618 EXPECT=${EXPECT} ; export EXPECT ; \
3619 runtest=$(RUNTEST); \
3620 if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
804de1fa
MF		 3621 case "$(MAKEFLAGS)" in \
3622 *-j*) $(MAKE) check-DEJAGNU-parallel;; \
3623 *) $(MAKE) check-DEJAGNU-single;; \
3624 esac; \
3625 else \
3626 echo "WARNING: could not find \`runtest'" 1>&2; :;\
3627 fi)
6c57b87f 3628
a389375f
MF		 3629# These tests are build-time only tools. Override the default rules for them.
3630testsuite/common/%.o: testsuite/common/%.c
3631 $(AM_V_CC)$(COMPILE_FOR_BUILD) $(testsuite_common_CPPFLAGS) -c $< -o $@
3632
3633testsuite/common/alu-tst$(EXEEXT): $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3634 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_LDADD)
3635
3636testsuite/common/fpu-tst$(EXEEXT): $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3637 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_LDADD)
3638
3639testsuite/common/bits-gen$(EXEEXT): $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3640 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_LDADD)
3641
3642testsuite/common/bits32m0$(EXEEXT): $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3643 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_LDADD)
3644
429a55b8 3645testsuite/common/bits32m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
fbe8d1cf
MF		 3646 $(AM_V_GEN)$< 32 0 big > $@.tmp
3647 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
3648 $(AM_V_at)mv $@.tmp $@
a389375f
MF		 3649
3650testsuite/common/bits32m31$(EXEEXT): $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3651 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_LDADD)
3652
429a55b8 3653testsuite/common/bits32m31.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
fbe8d1cf
MF		 3654 $(AM_V_GEN)$< 32 31 little > $@.tmp
3655 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
3656 $(AM_V_at)mv $@.tmp $@
a389375f
MF		 3657
3658testsuite/common/bits64m0$(EXEEXT): $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3659 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_LDADD)
3660
429a55b8 3661testsuite/common/bits64m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
fbe8d1cf
MF		 3662 $(AM_V_GEN)$< 64 0 big > $@.tmp
3663 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
3664 $(AM_V_at)mv $@.tmp $@
a389375f
MF		 3665
3666testsuite/common/bits64m63$(EXEEXT): $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3667 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_LDADD)
3668
429a55b8 3669testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
fbe8d1cf
MF		 3670 $(AM_V_GEN)$< 64 63 little > $@.tmp
3671 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
3672 $(AM_V_at)mv $@.tmp $@
c58353b7
MF		 3673@SIM_ENABLE_ARCH_aarch64_TRUE@$(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD): aarch64/hw-config.h
3674
3675@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: aarch64/%.c
3676@SIM_ENABLE_ARCH_aarch64_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
3677
3678@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: common/%.c
3679@SIM_ENABLE_ARCH_aarch64_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
6a8e18f0
MF		 3680@SIM_ENABLE_ARCH_arm_TRUE@$(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD): arm/hw-config.h
3681
3682@SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: arm/%.c
3683@SIM_ENABLE_ARCH_arm_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
3684
3685@SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: common/%.c
3686@SIM_ENABLE_ARCH_arm_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
c65b31b8
MF		 3687@SIM_ENABLE_ARCH_avr_TRUE@$(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD): avr/hw-config.h
3688
3689@SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: avr/%.c
3690@SIM_ENABLE_ARCH_avr_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
3691
3692@SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: common/%.c
3693@SIM_ENABLE_ARCH_avr_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
bc1dd618
MF		 3694@SIM_ENABLE_ARCH_bfin_TRUE@$(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD): bfin/hw-config.h
3695
3696@SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: bfin/%.c
3697@SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
3698
3699@SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: common/%.c
3700@SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
a389375f 3701
e5f7bc29
MF		 3702@SIM_ENABLE_ARCH_bfin_TRUE@bfin/linux-fixed-code.h: @MAINT@ $(srcdir)/bfin/linux-fixed-code.s bfin/local.mk bfin/$(am__dirstamp)
3703@SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_GEN)$(AS_FOR_TARGET_BFIN) $(srcdir)/bfin/linux-fixed-code.s -o bfin/linux-fixed-code.o
3704@SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)(\
3705@SIM_ENABLE_ARCH_bfin_TRUE@ set -e; \
3706@SIM_ENABLE_ARCH_bfin_TRUE@ echo "/* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */"; \
3707@SIM_ENABLE_ARCH_bfin_TRUE@ echo "static const unsigned char bfin_linux_fixed_code[] ="; \
3708@SIM_ENABLE_ARCH_bfin_TRUE@ echo "{"; \
3709@SIM_ENABLE_ARCH_bfin_TRUE@ $(OBJDUMP_FOR_TARGET_BFIN) -d -z bfin/linux-fixed-code.o > $@.dis; \
3710@SIM_ENABLE_ARCH_bfin_TRUE@ sed -n \
3711@SIM_ENABLE_ARCH_bfin_TRUE@ -e 's:^[^ ]* :0x:' \
3712@SIM_ENABLE_ARCH_bfin_TRUE@ -e '/^0x/{s: .*::;s: *$$:,:;s: :, 0x:g;p;}' \
3713@SIM_ENABLE_ARCH_bfin_TRUE@ $@.dis; \
3714@SIM_ENABLE_ARCH_bfin_TRUE@ rm -f $@.dis; \
3715@SIM_ENABLE_ARCH_bfin_TRUE@ echo "};" \
3716@SIM_ENABLE_ARCH_bfin_TRUE@ ) > $@.tmp
3717@SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/bfin/linux-fixed-code.h
3718@SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)touch $(srcdir)/bfin/linux-fixed-code.h
cdbb77e4
MF		 3719@SIM_ENABLE_ARCH_bpf_TRUE@$(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD): bpf/hw-config.h
3720
3721@SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: bpf/%.c
3722@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
3723
3724@SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: common/%.c
3725@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
437eeee9 3726@SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.c: | $(bpf_BUILD_OUTPUTS)
e5f7bc29 3727
0a129eb1
MF		 3728@SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le ; @true
3729@SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-le: $(srccom)/genmloop.sh bpf/mloop.in
3730@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3731@SIM_ENABLE_ARCH_bpf_TRUE@ -mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \
3732@SIM_ENABLE_ARCH_bpf_TRUE@ -infile $(srcdir)/bpf/mloop.in \
3733@SIM_ENABLE_ARCH_bpf_TRUE@ -outfile-prefix bpf/ -outfile-suffix -le
3734@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-le.hin bpf/eng-le.h
3735@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-le.cin bpf/mloop-le.c
3736@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)touch $@
3737
3738@SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-be.c bpf/eng-be.h: bpf/stamp-mloop-be ; @true
3739@SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-be: $(srccom)/genmloop.sh bpf/mloop.in
3740@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3741@SIM_ENABLE_ARCH_bpf_TRUE@ -mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \
3742@SIM_ENABLE_ARCH_bpf_TRUE@ -infile $(srcdir)/bpf/mloop.in \
3743@SIM_ENABLE_ARCH_bpf_TRUE@ -outfile-prefix bpf/ -outfile-suffix -be
3744@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-be.hin bpf/eng-be.h
3745@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-be.cin bpf/mloop-be.c
3746@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)touch $@
3747
3abb19ad
MF		 3748@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen: bpf/cgen-arch bpf/cgen-cpu bpf/cgen-defs-le bpf/cgen-defs-be bpf/cgen-decode-le bpf/cgen-decode-be
3749
3750@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-arch:
3751@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)mach=bpf cpu=bpfbf FLAGS="with-scache"; $(CGEN_GEN_ARCH)
3752@SIM_ENABLE_ARCH_bpf_TRUE@bpf/arch.h bpf/arch.c bpf/cpuall.h: @CGEN_MAINT@ bpf/cgen-arch
3753
3754@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-cpu:
3755@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfle,ebpfbe cpu=bpfbf mach=bpf FLAGS="with-multiple-isa with-scache"; $(CGEN_GEN_CPU)
3756@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)rm -f $(srcdir)/bpf/model.c
3757@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cpu.h bpf/cpu.c bpf/model.c: @CGEN_MAINT@ bpf/cgen-cpu
3758
3759@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-le:
3760@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le"; $(CGEN_GEN_DEFS)
3761@SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-le.h: @CGEN_MAINT@ bpf/cgen-defs-le
3762
3763@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-be:
3764@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be"; $(CGEN_GEN_DEFS)
3765@SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-be.h: @CGEN_MAINT@ bpf/cgen-defs-be
3766
3767@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-le:
3768@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
3769@SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-le.c bpf/decode-le.c bpf/decode-le.h: @CGEN_MAINT@ bpf/cgen-decode-vle
3770
3771@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-be:
3772@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
3773@SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-be.c bpf/decode-be.c bpf/decode-be.h: @CGEN_MAINT@ bpf/cgen-decode-be
437eeee9 3774@SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.c: | $(cr16_BUILD_OUTPUTS)
3abb19ad 3775
70ab6bdd
MF		 3776# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3777@SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
3778@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD)
3779
3780# gencode is a build-time only tool. Override the default rules for it.
3781@SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode.o: cr16/gencode.c
3782@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
3783@SIM_ENABLE_ARCH_cr16_TRUE@cr16/cr16-opc.o: ../opcodes/cr16-opc.c
3784@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
3785
3786@SIM_ENABLE_ARCH_cr16_TRUE@cr16/simops.h: cr16/gencode$(EXEEXT)
3787@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_GEN)$< -h >$@
3788
3789@SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT)
3790@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_GEN)$< >$@
437eeee9 3791@SIM_ENABLE_ARCH_cris_TRUE@cris/modules.c: | $(cris_BUILD_OUTPUTS)
70ab6bdd 3792
0a129eb1
MF		 3793@SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true
3794@SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cris/mloop.in
3795@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3796@SIM_ENABLE_ARCH_cris_TRUE@ -mono -no-fast -pbb -switch semcrisv10f-switch.c \
3797@SIM_ENABLE_ARCH_cris_TRUE@ -cpu crisv10f \
3798@SIM_ENABLE_ARCH_cris_TRUE@ -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v10f
3799@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v10f.hin cris/engv10.h
3800@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v10f.cin cris/mloopv10f.c
3801@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)touch $@
3802
0a129eb1
MF		 3803@SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv32f.c cris/engv32.h: cris/stamp-mloop-v32f ; @true
3804@SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v32f: $(srccom)/genmloop.sh cris/mloop.in
3805@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3806@SIM_ENABLE_ARCH_cris_TRUE@ -mono -no-fast -pbb -switch semcrisv32f-switch.c \
3807@SIM_ENABLE_ARCH_cris_TRUE@ -cpu crisv32f \
3808@SIM_ENABLE_ARCH_cris_TRUE@ -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v32f
3809@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v32f.hin cris/engv32.h
3810@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v32f.cin cris/mloopv32f.c
3811@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)touch $@
3812
3298ee7a
MF		 3813@SIM_ENABLE_ARCH_cris_TRUE@cris/cgen: cris/cgen-arch cris/cgen-cpu-decode-v10f cris/cgen-cpu-decode-v32f
3814
3815@SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-arch:
3816@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)mach=crisv10,crisv32 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
3817@SIM_ENABLE_ARCH_cris_TRUE@cris/arch.h cris/arch.c cris/cpuall.h: @CGEN_MAINT@ cris/cgen-arch
3818
3819@SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v10f:
3820@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
3821@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv10-switch.c $(srcdir)/cris/semcrisv10f-switch.c
3822@SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv10.h cris/cpuv10.c cris/semcrisv10f-switch.c cris/modelv10.c cris/decodev10.c cris/decodev10.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v10f
3823
3824@SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v32f:
3825@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
3826@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv32-switch.c $(srcdir)/cris/semcrisv32f-switch.c
3827@SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv32.h cris/cpuv32.c cris/semcrisv32f-switch.c cris/modelv32.c cris/decodev32.c cris/decodev32.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v32f
437eeee9 3828@SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.c: | $(d10v_BUILD_OUTPUTS)
3298ee7a 3829
70ab6bdd
MF		 3830# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3831@SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
3832@SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD)
3833
3834# gencode is a build-time only tool. Override the default rules for it.
3835@SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode.o: d10v/gencode.c
3836@SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
3837@SIM_ENABLE_ARCH_d10v_TRUE@d10v/d10v-opc.o: ../opcodes/d10v-opc.c
3838@SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
3839
3840@SIM_ENABLE_ARCH_d10v_TRUE@d10v/simops.h: d10v/gencode$(EXEEXT)
3841@SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_GEN)$< -h >$@
3842
3843@SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT)
3844@SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_GEN)$< >$@
c0c25232
MF		 3845
3846@SIM_ENABLE_ARCH_erc32_TRUE@erc32/sis$(EXEEXT): erc32/run$(EXEEXT)
3847@SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
3848
3849@SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: erc32/%.c | erc32/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
93e0ec91 3850@SIM_ENABLE_ARCH_erc32_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
63bf33ff
MF		 3851@SIM_ENABLE_ARCH_erc32_TRUE@sim-%D-install-exec-local: installdirs
3852@SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
3853@SIM_ENABLE_ARCH_erc32_TRUE@ n=`echo sis | sed '$(program_transform_name)'`; \
c95bd911 3854@SIM_ENABLE_ARCH_erc32_TRUE@ $(LIBTOOL) --mode=install $(INSTALL_PROGRAM) erc32/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
59d8576e
MF		 3855@SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local:
3856@SIM_ENABLE_ARCH_erc32_TRUE@ rm -f $(DESTDIR)$(bindir)/sis
437eeee9 3857@SIM_ENABLE_ARCH_frv_TRUE@frv/modules.c: | $(frv_BUILD_OUTPUTS)
70ab6bdd 3858
0a129eb1
MF		 3859@SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true
3860@SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in
3861@SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3862@SIM_ENABLE_ARCH_frv_TRUE@ -mono -scache -parallel-generic-write -parallel-only \
3863@SIM_ENABLE_ARCH_frv_TRUE@ -cpu frvbf \
3864@SIM_ENABLE_ARCH_frv_TRUE@ -infile $(srcdir)/frv/mloop.in -outfile-prefix frv/
3865@SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h
3866@SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c
3867@SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)touch $@
3868
cd313814
MF		 3869@SIM_ENABLE_ARCH_frv_TRUE@frv/cgen: frv/cgen-arch frv/cgen-cpu-decode
3870
3871@SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-arch:
3872@SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache"; $(CGEN_GEN_ARCH)
3873@SIM_ENABLE_ARCH_frv_TRUE@frv/arch.h frv/arch.c frv/cpuall.h: @CGEN_MAINT@ frv/cgen-arch
3874
3875@SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-cpu-decode:
3876@SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE)
3877@SIM_ENABLE_ARCH_frv_TRUE@frv/cpu.h frv/sem.c frv/model.c frv/decode.c frv/decode.h: @CGEN_MAINT@ frv/cgen-cpu-decode
437eeee9 3878@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.c: | $(iq2000_BUILD_OUTPUTS)
cd313814 3879
0a129eb1
MF		 3880@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true
3881@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in
3882@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3883@SIM_ENABLE_ARCH_iq2000_TRUE@ -mono -fast -pbb -switch sem-switch.c \
3884@SIM_ENABLE_ARCH_iq2000_TRUE@ -cpu iq2000bf \
3885@SIM_ENABLE_ARCH_iq2000_TRUE@ -infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/
3886@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h
3887@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c
3888@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)touch $@
3889
d5dd8f5d
MF		 3890@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen: iq2000/cgen-arch iq2000/cgen-cpu-decode
3891
3892@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-arch:
3893@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)mach=iq2000 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
3894@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/arch.h iq2000/arch.c iq2000/cpuall.h: @CGEN_MAINT@ iq2000/cgen-arch
3895
3896@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-cpu-decode:
3897@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
3898@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cpu.h iq2000/sem.c iq2000/sem-switch.c iq2000/model.c iq2000/decode.c iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-cpu-decode
437eeee9 3899@SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.c: | $(lm32_BUILD_OUTPUTS)
d5dd8f5d 3900
0a129eb1
MF		 3901@SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
3902@SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in
3903@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3904@SIM_ENABLE_ARCH_lm32_TRUE@ -mono -fast -pbb -switch sem-switch.c \
3905@SIM_ENABLE_ARCH_lm32_TRUE@ -cpu lm32bf \
3906@SIM_ENABLE_ARCH_lm32_TRUE@ -infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/
3907@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h
3908@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c
3909@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)touch $@
3910
86958583
MF		 3911@SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen: lm32/cgen-arch lm32/cgen-cpu-decode
3912
3913@SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-arch:
3914@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
3915@SIM_ENABLE_ARCH_lm32_TRUE@lm32/arch.h lm32/arch.c lm32/cpuall.h: @CGEN_MAINT@ lm32/cgen-arch
3916
3917@SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-cpu-decode:
3918@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)cpu=lm32bf mach=lm32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
3919@SIM_ENABLE_ARCH_lm32_TRUE@lm32/cpu.h lm32/sem.c lm32/sem-switch.c lm32/model.c lm32/decode.c lm32/decode.h: @CGEN_MAINT@ lm32/cgen-cpu-decode
3920
c0c25232 3921@SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: m32c/%.c | m32c/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
93e0ec91 3922@SIM_ENABLE_ARCH_m32c_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
437eeee9 3923@SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.c: | $(m32c_BUILD_OUTPUTS)
c0c25232 3924
70ab6bdd
MF		 3925# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3926@SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
3927@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD)
3928
3929# opc2c is a build-time only tool. Override the default rules for it.
3930@SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c.o: m32c/opc2c.c
3931@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
3932
3933@SIM_ENABLE_ARCH_m32c_TRUE@m32c/m32c.c: m32c/m32c.opc m32c/opc2c$(EXEEXT)
3934@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
3935@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)mv $@.tmp $@
3936
3937@SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT)
3938@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
3939@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)mv $@.tmp $@
437eeee9 3940@SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.c: | $(m32r_BUILD_OUTPUTS)
70ab6bdd 3941
0a129eb1
MF		 3942@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true
3943@SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in
3944@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3945@SIM_ENABLE_ARCH_m32r_TRUE@ -mono -fast -pbb -switch sem-switch.c \
3946@SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32rbf \
3947@SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/
3948@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h
3949@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c
3950@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@
3951
0a129eb1
MF		 3952@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop ; @true
3953@SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in
3954@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3955@SIM_ENABLE_ARCH_m32r_TRUE@ -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
3956@SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32rxf \
3957@SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x
3958@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h
3959@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c
3960@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@
3961
0a129eb1
MF		 3962@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop ; @true
3963@SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in
3964@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
3965@SIM_ENABLE_ARCH_m32r_TRUE@ -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
3966@SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32r2f \
3967@SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2
3968@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h
3969@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c
3970@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@
3971
cf764309
MF		 3972@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen: m32r/cgen-arch m32r/cgen-cpu-decode m32r/cgen-cpu-decode-x m32r/cgen-cpu-decode-2
3973
3974@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-arch:
3975@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
3976@SIM_ENABLE_ARCH_m32r_TRUE@m32r/arch.h m32r/arch.c m32r/cpuall.h: @CGEN_MAINT@ m32r/cgen-arch
3977
3978@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode:
3979@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
3980@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu.h m32r/sem.c m32r/sem-switch.c m32r/model.c m32r/decode.c m32r/decode.h: @CGEN_MAINT@ m32r/cgen-cpu-decode
3981
3982@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-x:
3983@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
3984@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpux.h m32r/semx-switch.c m32r/modelx.c m32r/decodex.c m32r/decodex.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-x
3985
3986@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-2:
3987@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
3988@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu2.h m32r/sem2-switch.c m32r/model2.c m32r/decode2.c m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2
437eeee9 3989@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.c: | $(m68hc11_BUILD_OUTPUTS)
cf764309 3990
70ab6bdd
MF		 3991# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3992@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
3993@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD)
3994
3995# gencode is a build-time only tool. Override the default rules for it.
3996@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode.o: m68hc11/gencode.c
3997@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
3998
3999@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc11int.c: m68hc11/gencode$(EXEEXT)
4000@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_GEN)$< -m6811 >$@
4001
4002@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEXT)
4003@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_GEN)$< -m6812 >$@
437eeee9 4004@SIM_ENABLE_ARCH_mips_TRUE@mips/modules.c: | $(mips_BUILD_OUTPUTS)
70ab6bdd 4005
49d3ce6c 4006@SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_IGEN_ITABLE): mips/stamp-igen-itable
3a31051b 4007@SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE): mips/stamp-gen-mode-single
f6d58d40
MF		 4008@SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16): mips/stamp-gen-mode-m16-m16
4009@SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32): mips/stamp-gen-mode-m16-m32
f12c3c63 4010@SIM_ENABLE_ARCH_mips_TRUE@$(SIM_MIPS_MULTI_SRC): mips/stamp-gen-mode-multi-igen mips/stamp-gen-mode-multi-run
49d3ce6c
MF		 4011
4012@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-igen-itable: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(IGEN)
4013@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
4014@SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
4015@SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
4016@SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
4017@SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
4018@SIM_ENABLE_ARCH_mips_TRUE@ -Wnowidth \
4019@SIM_ENABLE_ARCH_mips_TRUE@ -Wnounimplemented \
4020@SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_IGEN_ITABLE_FLAGS) \
4021@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
4022@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
4023@SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
4024@SIM_ENABLE_ARCH_mips_TRUE@ -n itable.h -ht mips/itable.h \
4025@SIM_ENABLE_ARCH_mips_TRUE@ -n itable.c -t mips/itable.c
4026@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
4027
3a31051b
MF		 4028@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-single: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
4029@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
4030@SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
4031@SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
4032@SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
4033@SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
4034@SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_SINGLE_FLAGS) \
4035@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
4036@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
4037@SIM_ENABLE_ARCH_mips_TRUE@ -B 32 \
4038@SIM_ENABLE_ARCH_mips_TRUE@ -H 31 \
4039@SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
4040@SIM_ENABLE_ARCH_mips_TRUE@ -o $(mips_IGEN_DC) \
4041@SIM_ENABLE_ARCH_mips_TRUE@ -x \
4042@SIM_ENABLE_ARCH_mips_TRUE@ -n icache.h -hc mips/icache.h \
4043@SIM_ENABLE_ARCH_mips_TRUE@ -n icache.c -c mips/icache.c \
4044@SIM_ENABLE_ARCH_mips_TRUE@ -n semantics.h -hs mips/semantics.h \
4045@SIM_ENABLE_ARCH_mips_TRUE@ -n semantics.c -s mips/semantics.c \
4046@SIM_ENABLE_ARCH_mips_TRUE@ -n idecode.h -hd mips/idecode.h \
4047@SIM_ENABLE_ARCH_mips_TRUE@ -n idecode.c -d mips/idecode.c \
4048@SIM_ENABLE_ARCH_mips_TRUE@ -n model.h -hm mips/model.h \
4049@SIM_ENABLE_ARCH_mips_TRUE@ -n model.c -m mips/model.c \
4050@SIM_ENABLE_ARCH_mips_TRUE@ -n support.h -hf mips/support.h \
4051@SIM_ENABLE_ARCH_mips_TRUE@ -n support.c -f mips/support.c \
4052@SIM_ENABLE_ARCH_mips_TRUE@ -n engine.h -he mips/engine.h \
4053@SIM_ENABLE_ARCH_mips_TRUE@ -n engine.c -e mips/engine.c \
4054@SIM_ENABLE_ARCH_mips_TRUE@ -n irun.c -r mips/irun.c
4055@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
4056
f6d58d40
MF		 4057@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m16: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_M16_DC) $(IGEN)
4058@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
4059@SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
4060@SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
4061@SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
4062@SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
4063@SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_M16_FLAGS) \
4064@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
4065@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
4066@SIM_ENABLE_ARCH_mips_TRUE@ -B 16 \
4067@SIM_ENABLE_ARCH_mips_TRUE@ -H 15 \
4068@SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
4069@SIM_ENABLE_ARCH_mips_TRUE@ -o $(mips_M16_DC) \
4070@SIM_ENABLE_ARCH_mips_TRUE@ -P m16_ \
4071@SIM_ENABLE_ARCH_mips_TRUE@ -x \
4072@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_icache.h -hc mips/m16_icache.h \
4073@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_icache.c -c mips/m16_icache.c \
4074@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_semantics.h -hs mips/m16_semantics.h \
4075@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_semantics.c -s mips/m16_semantics.c \
4076@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_idecode.h -hd mips/m16_idecode.h \
4077@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_idecode.c -d mips/m16_idecode.c \
4078@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_model.h -hm mips/m16_model.h \
4079@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_model.c -m mips/m16_model.c \
4080@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_support.h -hf mips/m16_support.h \
4081@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_support.c -f mips/m16_support.c
4082@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
4083
4084@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m32: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
4085@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
4086@SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
4087@SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
4088@SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
4089@SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
4090@SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_SINGLE_FLAGS) \
4091@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
4092@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
4093@SIM_ENABLE_ARCH_mips_TRUE@ -B 32 \
4094@SIM_ENABLE_ARCH_mips_TRUE@ -H 31 \
4095@SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
4096@SIM_ENABLE_ARCH_mips_TRUE@ -o $(mips_IGEN_DC) \
4097@SIM_ENABLE_ARCH_mips_TRUE@ -P m32_ \
4098@SIM_ENABLE_ARCH_mips_TRUE@ -x \
4099@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_icache.h -hc mips/m32_icache.h \
4100@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_icache.c -c mips/m32_icache.c \
4101@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_semantics.h -hs mips/m32_semantics.h \
4102@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_semantics.c -s mips/m32_semantics.c \
4103@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_idecode.h -hd mips/m32_idecode.h \
4104@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_idecode.c -d mips/m32_idecode.c \
4105@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_model.h -hm mips/m32_model.h \
4106@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_model.c -m mips/m32_model.c \
4107@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_support.h -hf mips/m32_support.h \
4108@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_support.c -f mips/m32_support.c
4109@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
4110
f12c3c63
MF		 4111@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-igen: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(mips_M16_DC) $(mips_MICROMIPS32_DC) $(mips_MICROMIPS16_DC) $(IGEN)
4112@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)\
4113@SIM_ENABLE_ARCH_mips_TRUE@ for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
4114@SIM_ENABLE_ARCH_mips_TRUE@ p=`echo $${t} | sed -e 's/:.*//'` ; \
4115@SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
4116@SIM_ENABLE_ARCH_mips_TRUE@ f=`echo $${t} | sed -e 's/.*://'` ; \
4117@SIM_ENABLE_ARCH_mips_TRUE@ case $${p} in \
4118@SIM_ENABLE_ARCH_mips_TRUE@ micromips16*) \
4119@SIM_ENABLE_ARCH_mips_TRUE@ e="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
4120@SIM_ENABLE_ARCH_mips_TRUE@ micromips32* | micromips64*) \
4121@SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
4122@SIM_ENABLE_ARCH_mips_TRUE@ micromips_m32*) \
4123@SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
4124@SIM_ENABLE_ARCH_mips_TRUE@ m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
4125@SIM_ENABLE_ARCH_mips_TRUE@ micromips_m64*) \
4126@SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
4127@SIM_ENABLE_ARCH_mips_TRUE@ m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
4128@SIM_ENABLE_ARCH_mips_TRUE@ m16*) \
4129@SIM_ENABLE_ARCH_mips_TRUE@ e="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
4130@SIM_ENABLE_ARCH_mips_TRUE@ *) \
4131@SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
4132@SIM_ENABLE_ARCH_mips_TRUE@ esac; \
4133@SIM_ENABLE_ARCH_mips_TRUE@ $(IGEN_RUN) \
4134@SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
4135@SIM_ENABLE_ARCH_mips_TRUE@ $${e} \
4136@SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
4137@SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
4138@SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
4139@SIM_ENABLE_ARCH_mips_TRUE@ -M $${m} \
4140@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
4141@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
4142@SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
4143@SIM_ENABLE_ARCH_mips_TRUE@ -P $${p}_ \
4144@SIM_ENABLE_ARCH_mips_TRUE@ -x \
4145@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_icache.h -hc mips/$${p}_icache.h \
4146@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_icache.c -c mips/$${p}_icache.c \
4147@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_semantics.h -hs mips/$${p}_semantics.h \
4148@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_semantics.c -s mips/$${p}_semantics.c \
4149@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_idecode.h -hd mips/$${p}_idecode.h \
4150@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_idecode.c -d mips/$${p}_idecode.c \
4151@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_model.h -hm mips/$${p}_model.h \
4152@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_model.c -m mips/$${p}_model.c \
4153@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_support.h -hf mips/$${p}_support.h \
4154@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_support.c -f mips/$${p}_support.c \
4155@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_engine.h -he mips/$${p}_engine.h \
4156@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_engine.c -e mips/$${p}_engine.c \
4157@SIM_ENABLE_ARCH_mips_TRUE@ || exit; \
4158@SIM_ENABLE_ARCH_mips_TRUE@ done
4159@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
4160
4161@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-run: mips/m16run.c mips/micromipsrun.c
4162@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)\
4163@SIM_ENABLE_ARCH_mips_TRUE@ for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
4164@SIM_ENABLE_ARCH_mips_TRUE@ case $${t} in \
4165@SIM_ENABLE_ARCH_mips_TRUE@ m16*) \
4166@SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
4167@SIM_ENABLE_ARCH_mips_TRUE@ o=mips/m16$${m}_run.c; \
4168@SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/m16run.c > $$o.tmp \
4169@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/m16$${m}_/" \
4170@SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/m16$${m}_engine/" \
4171@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m16_/m16$${m}_/" \
4172@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m32$${m}_/" \
4173@SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \
4174@SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
4175@SIM_ENABLE_ARCH_mips_TRUE@ ;;\
4176@SIM_ENABLE_ARCH_mips_TRUE@ micromips32*) \
4177@SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
4178@SIM_ENABLE_ARCH_mips_TRUE@ o=mips/micromips$${m}_run.c; \
4179@SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
4180@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/micromips32$${m}_/" \
4181@SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/micromips32$${m}_engine/" \
4182@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips16_/micromips16$${m}_/" \
4183@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips32_/micromips32$${m}_/" \
4184@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m32$${m}_/" \
4185@SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \
4186@SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
4187@SIM_ENABLE_ARCH_mips_TRUE@ ;;\
4188@SIM_ENABLE_ARCH_mips_TRUE@ micromips64*) \
4189@SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
4190@SIM_ENABLE_ARCH_mips_TRUE@ o=mips/micromips$${m}_run.c; \
4191@SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
4192@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/micromips64$${m}_/" \
4193@SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/micromips64$${m}_engine/" \
4194@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips16_/micromips16$${m}_/" \
4195@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips32_/micromips64$${m}_/" \
4196@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m64$${m}_/" \
4197@SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \
4198@SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
4199@SIM_ENABLE_ARCH_mips_TRUE@ ;;\
4200@SIM_ENABLE_ARCH_mips_TRUE@ esac \
4201@SIM_ENABLE_ARCH_mips_TRUE@ done
4202@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
437eeee9 4203@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.c: | $(mn10300_BUILD_OUTPUTS)
f12c3c63 4204
d2a5dbc7
MF		 4205@SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
4206@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN)
4207@SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
4208@SIM_ENABLE_ARCH_mn10300_TRUE@ $(mn10300_IGEN_TRACE) \
4209@SIM_ENABLE_ARCH_mn10300_TRUE@ -G gen-direct-access \
4210@SIM_ENABLE_ARCH_mn10300_TRUE@ -M mn10300,am33 -G gen-multi-sim=am33 \
4211@SIM_ENABLE_ARCH_mn10300_TRUE@ -M am33_2 \
4212@SIM_ENABLE_ARCH_mn10300_TRUE@ -I $(srcdir)/mn10300 \
4213@SIM_ENABLE_ARCH_mn10300_TRUE@ -i $(mn10300_IGEN_INSN) \
4214@SIM_ENABLE_ARCH_mn10300_TRUE@ -o $(mn10300_IGEN_DC) \
4215@SIM_ENABLE_ARCH_mn10300_TRUE@ -x \
3bef0f03
MF		 4216@SIM_ENABLE_ARCH_mn10300_TRUE@ -n icache.h -hc mn10300/icache.h \
4217@SIM_ENABLE_ARCH_mn10300_TRUE@ -n icache.c -c mn10300/icache.c \
4218@SIM_ENABLE_ARCH_mn10300_TRUE@ -n semantics.h -hs mn10300/semantics.h \
4219@SIM_ENABLE_ARCH_mn10300_TRUE@ -n semantics.c -s mn10300/semantics.c \
4220@SIM_ENABLE_ARCH_mn10300_TRUE@ -n idecode.h -hd mn10300/idecode.h \
4221@SIM_ENABLE_ARCH_mn10300_TRUE@ -n idecode.c -d mn10300/idecode.c \
4222@SIM_ENABLE_ARCH_mn10300_TRUE@ -n model.h -hm mn10300/model.h \
4223@SIM_ENABLE_ARCH_mn10300_TRUE@ -n model.c -m mn10300/model.c \
4224@SIM_ENABLE_ARCH_mn10300_TRUE@ -n support.h -hf mn10300/support.h \
4225@SIM_ENABLE_ARCH_mn10300_TRUE@ -n support.c -f mn10300/support.c \
4226@SIM_ENABLE_ARCH_mn10300_TRUE@ -n itable.h -ht mn10300/itable.h \
4227@SIM_ENABLE_ARCH_mn10300_TRUE@ -n itable.c -t mn10300/itable.c \
4228@SIM_ENABLE_ARCH_mn10300_TRUE@ -n engine.h -he mn10300/engine.h \
4229@SIM_ENABLE_ARCH_mn10300_TRUE@ -n engine.c -e mn10300/engine.c \
4230@SIM_ENABLE_ARCH_mn10300_TRUE@ -n irun.c -r mn10300/irun.c
d2a5dbc7
MF		 4231@SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)touch $@
4232
94f5dfed
MF		 4233@SIM_ENABLE_ARCH_moxie_TRUE@moxie/moxie-gdb.dtb: @MAINT@ moxie/moxie-gdb.dts moxie/$(am__dirstamp)
4234@SIM_ENABLE_ARCH_moxie_TRUE@ $(AM_V_GEN) \
4235@SIM_ENABLE_ARCH_moxie_TRUE@ if test "x$(DTC)" != x; then \
4236@SIM_ENABLE_ARCH_moxie_TRUE@ $(DTC) -O dtb -o $@.tmp ${srcdir}/moxie/moxie-gdb.dts || exit 1; \
4237@SIM_ENABLE_ARCH_moxie_TRUE@ $(SHELL) $(srcroot)/move-if-change $@.tmp ${srcdir}/moxie/moxie-gdb.dtb || exit 1; \
4238@SIM_ENABLE_ARCH_moxie_TRUE@ touch ${srcdir}/moxie/moxie-gdb.dtb; \
4239@SIM_ENABLE_ARCH_moxie_TRUE@ else \
4240@SIM_ENABLE_ARCH_moxie_TRUE@ echo "Could not update the moxie-gdb.dtb file because the device "; \
4241@SIM_ENABLE_ARCH_moxie_TRUE@ echo "tree compiler tool (dtc) is missing. Install the tool to "; \
4242@SIM_ENABLE_ARCH_moxie_TRUE@ echo "update the device tree blob."; \
4243@SIM_ENABLE_ARCH_moxie_TRUE@ fi
437eeee9 4244@SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.c: | $(or1k_BUILD_OUTPUTS)
94f5dfed 4245
0a129eb1
MF		 4246@SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
4247@SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in
4248@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4249@SIM_ENABLE_ARCH_or1k_TRUE@ -mono -fast -pbb -switch sem-switch.c \
4250@SIM_ENABLE_ARCH_or1k_TRUE@ -cpu or1k32bf \
4251@SIM_ENABLE_ARCH_or1k_TRUE@ -infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/
4252@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h
4253@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c
4254@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)touch $@
4255
f1a0a99c
MF		 4256@SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen: or1k/cgen-arch or1k/cgen-cpu-decode
4257
4258@SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-arch:
4259@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)mach=or32,or32nd FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4260@SIM_ENABLE_ARCH_or1k_TRUE@or1k/arch.h or1k/arch.c or1k/cpuall.h: @CGEN_MAINT@ or1k/cgen-arch
4261
4262@SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-cpu-decode:
4263@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)cpu=or1k32bf mach=or32,or32nd FLAGS="with-scache" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4264@SIM_ENABLE_ARCH_or1k_TRUE@or1k/cpu.h or1k/cpu.c or1k/model.c or1k/sem.c or1k/sem-switch.c or1k/decode.c or1k/decode.h: @CGEN_MAINT@ or1k/cgen-cpu-decode
4265
c0c25232
MF		 4266@SIM_ENABLE_ARCH_ppc_TRUE@ppc/psim$(EXEEXT): ppc/run$(EXEEXT)
4267@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
4268
4269@SIM_ENABLE_ARCH_ppc_TRUE@ppc/%.o: ppc/%.c | ppc/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
93e0ec91 4270@SIM_ENABLE_ARCH_ppc_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
c0c25232 4271
ee3314c4
MF		 4272@SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.c: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
4273@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --source $@.tmp
4274@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.c
4275@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)touch $(srcdir)/ppc/spreg.c
4276
4277@SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.h: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
4278@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --header $@.tmp
4279@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.h
4280@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)touch $(srcdir)/ppc/spreg.h
4281
c0c25232 4282@SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: rl78/%.c | rl78/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
93e0ec91 4283@SIM_ENABLE_ARCH_rl78_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
c0c25232
MF		 4284
4285@SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: rx/%.c | rx/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
93e0ec91 4286@SIM_ENABLE_ARCH_rx_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
437eeee9 4287@SIM_ENABLE_ARCH_sh_TRUE@sh/modules.c: | $(sh_BUILD_OUTPUTS)
c0c25232 4288
70ab6bdd
MF		 4289# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4290@SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
4291@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD)
4292
4293# gencode is a build-time only tool. Override the default rules for it.
4294@SIM_ENABLE_ARCH_sh_TRUE@sh/gencode.o: sh/gencode.c
4295@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4296
4297@SIM_ENABLE_ARCH_sh_TRUE@sh/code.c: sh/gencode$(EXEEXT)
4298@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -x >$@
4299
4300@SIM_ENABLE_ARCH_sh_TRUE@sh/ppi.c: sh/gencode$(EXEEXT)
4301@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -p >$@
4302
4303@SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT)
4304@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -s >$@
437eeee9 4305@SIM_ENABLE_ARCH_v850_TRUE@v850/modules.c: | $(v850_BUILD_OUTPUTS)
70ab6bdd 4306
d2a5dbc7
MF		 4307@SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen
4308@SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_DC) $(IGEN)
4309@SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
4310@SIM_ENABLE_ARCH_v850_TRUE@ $(v850_IGEN_TRACE) \
4311@SIM_ENABLE_ARCH_v850_TRUE@ -G gen-direct-access \
4312@SIM_ENABLE_ARCH_v850_TRUE@ -G gen-zero-r0 \
4313@SIM_ENABLE_ARCH_v850_TRUE@ -i $(v850_IGEN_INSN) \
4314@SIM_ENABLE_ARCH_v850_TRUE@ -o $(v850_IGEN_DC) \
4315@SIM_ENABLE_ARCH_v850_TRUE@ -x \
3bef0f03
MF		 4316@SIM_ENABLE_ARCH_v850_TRUE@ -n icache.h -hc v850/icache.h \
4317@SIM_ENABLE_ARCH_v850_TRUE@ -n icache.c -c v850/icache.c \
4318@SIM_ENABLE_ARCH_v850_TRUE@ -n semantics.h -hs v850/semantics.h \
4319@SIM_ENABLE_ARCH_v850_TRUE@ -n semantics.c -s v850/semantics.c \
4320@SIM_ENABLE_ARCH_v850_TRUE@ -n idecode.h -hd v850/idecode.h \
4321@SIM_ENABLE_ARCH_v850_TRUE@ -n idecode.c -d v850/idecode.c \
4322@SIM_ENABLE_ARCH_v850_TRUE@ -n model.h -hm v850/model.h \
4323@SIM_ENABLE_ARCH_v850_TRUE@ -n model.c -m v850/model.c \
4324@SIM_ENABLE_ARCH_v850_TRUE@ -n support.h -hf v850/support.h \
4325@SIM_ENABLE_ARCH_v850_TRUE@ -n support.c -f v850/support.c \
4326@SIM_ENABLE_ARCH_v850_TRUE@ -n itable.h -ht v850/itable.h \
4327@SIM_ENABLE_ARCH_v850_TRUE@ -n itable.c -t v850/itable.c \
4328@SIM_ENABLE_ARCH_v850_TRUE@ -n engine.h -he v850/engine.h \
4329@SIM_ENABLE_ARCH_v850_TRUE@ -n engine.c -e v850/engine.c \
4330@SIM_ENABLE_ARCH_v850_TRUE@ -n irun.c -r v850/irun.c
d2a5dbc7
MF		 4331@SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)touch $@
4332
c0c25232 4333%/libsim.a: | $(SIM_ALL_RECURSIVE_DEPS)
93e0ec91 4334 $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
c0c25232
MF		 4335
4336%/nrun.o: common/nrun.c | %/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
93e0ec91 4337 $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
c0c25232 4338
5bea0c32
MF		 4339all-recursive: $(SIM_ALL_RECURSIVE_DEPS)
4340
63bf33ff
MF		 4341install-data-local: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS)
4342 $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(libdir)
4343 lib=`echo sim | sed '$(program_transform_name)'`; \
2ba09f42
MF		 4344 for d in $(SIM_ENABLED_ARCHES); do \
4345 n="$$lib"; \
4346 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
4347 n="lib$$n.a"; \
4348 $(INSTALL_DATA) $$d/libsim.a $(DESTDIR)$(libdir)/$$n || exit 1; \
63bf33ff
MF		 4349 done
4350
4351install-exec-local: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS)
4352 $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
4353 run=`echo run | sed '$(program_transform_name)'`; \
2ba09f42
MF		 4354 for d in $(SIM_ENABLED_ARCHES); do \
4355 n="$$run"; \
4356 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
4357 $(LIBTOOL) --mode=install \
4358 $(INSTALL_PROGRAM) $$d/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) || exit 1; \
63bf33ff
MF		 4359 done
4360
59d8576e
MF		 4361uninstall-local: $(SIM_UNINSTALL_LOCAL_DEPS)
4362 rm -f $(DESTDIR)$(bindir)/run $(DESTDIR)$(libdir)/libsim.a
2ba09f42 4363 for d in $(SIM_ENABLED_ARCHES); do \
59d8576e
MF		 4364 rm -f $(DESTDIR)$(bindir)/run-$$d $(DESTDIR)$(libdir)/libsim-$$d.a; \
4365 done
4366
6bddc3e8
MF		 4367# Tell versions [3.59,3.63) of GNU make to not export all variables.
4368# Otherwise a system limit (for SysV at least) may be exceeded.
4369.NOEXPORT:
A mirror of the official binutils-gdb repository