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fee8ec00 1/* Simulation code for the CR16 processor.
4a94e368 2 Copyright (C) 2008-2022 Free Software Foundation, Inc.
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3 Contributed by M Ranga Swami Reddy <MR.Swami.Reddy@nsc.com>
4
5 This file is part of GDB, the GNU debugger.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
dc3cf14f 9 the Free Software Foundation; either version 3, or (at your option)
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10 any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
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17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
fee8ec00 19
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20/* This must come before any other includes. */
21#include "defs.h"
fee8ec00 22
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23#include <stdio.h>
24#include <ctype.h>
25#include <limits.h>
5aedb83b 26#include <string.h>
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27#include "ansidecl.h"
28#include "opcode/cr16.h"
29
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30static void write_header (void);
31static void write_opcodes (void);
32static void write_template (void);
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33
34int
948b4ede 35main (int argc, char *argv[])
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36{
37 if ((argc > 1) && (strcmp (argv[1],"-h") == 0))
38 write_header();
39 else if ((argc > 1) && (strcmp (argv[1],"-t") == 0))
40 write_template ();
41 else
42 write_opcodes();
43 return 0;
44}
45
46
47static void
5aedb83b 48write_header (void)
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49{
50 int i = 0;
51
52 /* Start searching from end of instruction table. */
53 const inst *instruction = &cr16_instruction[NUMOPCODES - 1];
54
55 /* Loop over instruction table until a full match is found. */
56 for ( ; i < NUMOPCODES; i++)
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57 printf("void OP_%lX_%X (SIM_DESC, SIM_CPU *);\t\t/* %s */\n",
58 cr16_instruction[i].match, (32 - cr16_instruction[i].match_bits),
59 cr16_instruction[i].mnemonic);
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60}
61
62
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63/* write_template creates a file all required functions,
64 ready to be filled out. */
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65
66static void
5aedb83b 67write_template (void)
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68{
69 int i = 0,j, k, flags;
70
6df01ab8 71 printf ("#include \"defs.h\"\n");
267b3b8e 72 printf ("#include \"sim-main.h\"\n");
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73 printf ("#include \"simops.h\"\n\n");
74
75 for ( ; i < NUMOPCODES; i++)
76 {
77 if (cr16_instruction[i].size != 0)
948b4ede 78{
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79 printf ("/* %s */\nvoid\nOP_%lX_%X (SIM_DESC sd, SIM_CPU *cpu)\n{\n",
80 cr16_instruction[i].mnemonic, cr16_instruction[i].match,
81 (32 - cr16_instruction[i].match_bits));
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82
83 /* count operands. */
84 j = 0;
85 for (k=0;k<5;k++)
86 {
87 if (cr16_instruction[i].operands[k].op_type == dummy)
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88 break;
89 else
90 j++;
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91 }
92 switch (j)
93 {
94 case 0:
95 printf ("printf(\" %s\\n\");\n",cr16_instruction[i].mnemonic);
96 break;
97 case 1:
98 printf ("printf(\" %s\\t%%x\\n\",OP[0]);\n",cr16_instruction[i].mnemonic);
99 break;
100 case 2:
101 printf ("printf(\" %s\\t%%x,%%x\\n\",OP[0],OP[1]);\n",cr16_instruction[i].mnemonic);
102 break;
103 case 3:
104 printf ("printf(\" %s\\t%%x,%%x,%%x\\n\",OP[0],OP[1],OP[2]);\n",cr16_instruction[i].mnemonic);
105 break;
106 default:
107 fprintf (stderr,"Too many operands: %d\n",j);
108 }
109 printf ("}\n\n");
110}
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111 }
112}
113
114
115long Opcodes[512];
116static int curop=0;
117
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118#if 0
119static void
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120check_opcodes( long op)
121{
122 int i;
123
124 for (i=0;i<curop;i++)
125 if (Opcodes[i] == op)
5aedb83b 126 fprintf(stderr,"DUPLICATE OPCODES: %lx\n", op);
fee8ec00 127}
5aedb83b 128#endif
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129
130static void
5aedb83b 131write_opcodes (void)
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132{
133 int i = 0, j = 0, k;
134
948b4ede 135 /* write out opcode table. */
6df01ab8 136 printf ("#include \"defs.h\"\n");
267b3b8e 137 printf ("#include \"sim-main.h\"\n");
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138 printf ("#include \"simops.h\"\n\n");
139 printf ("struct simops Simops[] = {\n");
140
948b4ede 141 for (i = NUMOPCODES-1; i >= 0; --i)
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142 {
143 if (cr16_instruction[i].size != 0)
948b4ede 144{
5aedb83b 145 printf (" { \"%s\", %u, %d, %ld, %u, \"OP_%lX_%X\", OP_%lX_%X, ",
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146 cr16_instruction[i].mnemonic, cr16_instruction[i].size,
147 cr16_instruction[i].match_bits, cr16_instruction[i].match,
148 cr16_instruction[i].flags, ((BIN(cr16_instruction[i].match, cr16_instruction[i].match_bits))>>(cr16_instruction[i].match_bits)),
948b4ede 149 (32 - cr16_instruction[i].match_bits),
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150 ((BIN(cr16_instruction[i].match, cr16_instruction[i].match_bits))>>(cr16_instruction[i].match_bits)), (32 - cr16_instruction[i].match_bits));
151
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152 j = 0;
153 for (k=0;k<5;k++)
154 {
155 if (cr16_instruction[i].operands[k].op_type == dummy)
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156 break;
157 else
158 j++;
fee8ec00 159 }
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160 printf ("%d, ",j);
161
162 j = 0;
163 for (k=0;k<4;k++)
164 {
165 int optype = cr16_instruction[i].operands[k].op_type;
166 int shift = cr16_instruction[i].operands[k].shift;
167 if (j == 0)
168 printf ("{");
169 else
170 printf (", ");
171 printf ("{");
172 printf ("%d,%d",optype, shift);
173 printf ("}");
174 j = 1;
175 }
176 if (j)
177 printf ("}");
178 printf ("},\n");
179 }
180 }
5aedb83b 181 printf (" { \"NULL\",1,8,0,0,\"OP_0_20\",OP_0_20,0,{{0,0},{0,0},{0,0},{0,0}}},\n};\n");
fee8ec00 182}