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f6bcefef 1/* Main header for the CRIS simulator, based on the m32r header.
4a94e368 2 Copyright (C) 2004-2022 Free Software Foundation, Inc.
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3 Contributed by Axis Communications.
4
5This file is part of the GNU simulators.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
4744ac1b 9the Free Software Foundation; either version 3 of the License, or
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10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
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17You should have received a copy of the GNU General Public License
18along with this program. If not, see <http://www.gnu.org/licenses/>. */
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19
20/* All FIXME:s present in m32r apply here too; I just refuse to blindly
21 carry them over, as I don't know if they're really things that need
22 fixing. */
23
24#ifndef SIM_MAIN_H
25#define SIM_MAIN_H
26
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27/* This is a global setting. Different cpu families can't mix-n-match -scache
28 and -pbb. However some cpu families may use -simple while others use
29 one of -scache/-pbb. */
30#define WITH_SCACHE_PBB 1
31
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32#include "symcat.h"
33#include "sim-basics.h"
34#include "cgen-types.h"
35#include "cris-desc.h"
36#include "cris-opc.h"
37#include "arch.h"
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38#include "sim-base.h"
39#include "cgen-sim.h"
40#include "cris-sim.h"
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41\f
42struct cris_sim_mmapped_page {
43 USI addr;
44 struct cris_sim_mmapped_page *prev;
45};
46
47struct cris_thread_info {
48 /* Identifier for this thread. */
49 unsigned int threadid;
50
51 /* Identifier for parent thread. */
52 unsigned int parent_threadid;
53
54 /* Signal to send to parent at exit. */
55 int exitsig;
56
57 /* Exit status. */
58 int exitval;
59
60 /* Only as storage to return the "set" value to the "get" method.
61 I'm not sure whether this is useful per-thread. */
62 USI priority;
63
64 struct
65 {
66 USI altstack;
67 USI options;
68
69 char action;
70 char pending;
71 char blocked;
72 char blocked_suspendsave;
73 /* The handler stub unblocks the signal, so we don't need a separate
74 "temporary save" for that. */
75 } sigdata[64];
76
77 /* Register context, swapped with _sim_cpu.cpu_data. */
78 void *cpu_context;
79
80 /* Similar, temporary copy for the state at a signal call. */
81 void *cpu_context_atsignal;
82
83 /* The number of the reading and writing ends of a pipe if waiting for
84 the reader, else 0. */
85 int pipe_read_fd;
86 int pipe_write_fd;
87
88 /* System time at last context switch when this thread ran. */
89 USI last_execution;
90
91 /* Nonzero if we just executed a syscall. */
92 char at_syscall;
93
94 /* Nonzero if any of sigaction[0..64].pending is true. */
95 char sigpending;
96
97 /* Nonzero if in (rt_)sigsuspend call. Cleared at every sighandler
98 call. */
99 char sigsuspended;
100};
101
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102typedef int (*cris_interrupt_delivery_fn) (SIM_CPU *,
103 enum cris_interrupt_type,
104 unsigned int);
105
86817137 106struct cris_sim_cpu {
f6bcefef 107 CRIS_MISC_PROFILE cris_misc_profile;
86817137 108#define CPU_CRIS_MISC_PROFILE(cpu) (& CRIS_SIM_CPU (cpu)->cris_misc_profile)
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109
110 /* Copy of previous data; only valid when emitting trace-data after
111 each insn. */
112 CRIS_MISC_PROFILE cris_prev_misc_profile;
86817137 113#define CPU_CRIS_PREV_MISC_PROFILE(cpu) (& CRIS_SIM_CPU (cpu)->cris_prev_misc_profile)
f6bcefef 114
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115#if WITH_HW
116 cris_interrupt_delivery_fn deliver_interrupt;
86817137 117#define CPU_CRIS_DELIVER_INTERRUPT(cpu) (CRIS_SIM_CPU (cpu)->deliver_interrupt)
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118#endif
119
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120 /* Simulator environment data. */
121 USI endmem;
122 USI endbrk;
123 USI stack_low;
124 struct cris_sim_mmapped_page *highest_mmapped_page;
125
126 /* Number of syscalls performed or in progress, counting once extra
127 for every time a blocked thread (internally, when threading) polls
128 the (pipe) blockage. By default, this is also a time counter: to
129 minimize performance noise from minor compiler changes,
130 instructions take no time and syscalls always take 1ms. */
131 USI syscalls;
132
133 /* Number of execution contexts minus one. */
134 int m1threads;
135
136 /* Current thread number; index into thread_data when m1threads != 0. */
137 int threadno;
138
139 /* When a new thread is created, it gets a unique number, which we
140 count here. */
141 int max_threadid;
142
143 /* Thread-specific info, for simulator thread support, created at
144 "clone" call. Vector of [threads+1] when m1threads > 0. */
145 struct cris_thread_info *thread_data;
146
147 /* "If CLONE_SIGHAND is set, the calling process and the child pro-
148 cesses share the same table of signal handlers." ... "However, the
149 calling process and child processes still have distinct signal
150 masks and sets of pending signals." See struct cris_thread_info
151 for sigmasks and sigpendings. */
152 USI sighandler[64];
153
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154 /* This is a hack to implement just the parts of fcntl F_GETFL that
155 are used in open+fdopen calls for the standard scenario: for such
156 a call we check that the last syscall was open, we check that the
157 passed fd is the same returned then, and so we return the same
158 flags passed to open. This way, we avoid complicating the
159 generic sim callback machinery by introducing fcntl
160 mechanisms. */
161 USI last_syscall;
162 USI last_open_fd;
163 USI last_open_flags;
164
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165 /* Function for initializing CPU thread context, which varies in size
166 with each CPU model. They should be in some constant parts or
167 initialized in *_init_cpu, but we can't modify that for now. */
168 void* (*make_thread_cpu_data) (SIM_CPU *, void *);
169 size_t thread_cpu_data_size;
170
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171 /* The register differs, so we dispatch to a CPU-specific function. */
172 void (*set_target_thread_data) (SIM_CPU *, USI);
173
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174 /* CPU-model specific parts go here.
175 Note that in files that don't need to access these pieces WANT_CPU_FOO
176 won't be defined and thus these parts won't appear. This is ok in the
177 sense that things work. It is a source of bugs though.
178 One has to of course be careful to not take the size of this
179 struct and no structure members accessed in non-cpu specific files can
180 go after here. */
181#if defined (WANT_CPU_CRISV0F)
182 CRISV0F_CPU_DATA cpu_data;
183#elif defined (WANT_CPU_CRISV3F)
184 CRISV3F_CPU_DATA cpu_data;
185#elif defined (WANT_CPU_CRISV8F)
186 CRISV8F_CPU_DATA cpu_data;
187#elif defined (WANT_CPU_CRISV10F)
188 CRISV10F_CPU_DATA cpu_data;
189#elif defined (WANT_CPU_CRISV32F)
190 CRISV32F_CPU_DATA cpu_data;
191#else
192 /* Let's assume all cpu_data have the same alignment requirements, so
193 they all are laid out at the same address. Since we can't get the
194 exact definition, we also assume that it has no higher alignment
195 requirements than a vector of, say, 16 pointers. (A single member
196 is often special-cased, and possibly two as well so we don't want
197 that). */
198 union { void *dummy[16]; } cpu_data_placeholder;
199#endif
200};
86817137 201#define CRIS_SIM_CPU(cpu) ((struct cris_sim_cpu *) CPU_ARCH_DATA (cpu))
f6bcefef 202\f
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203/* Misc. */
204
205/* Catch address exceptions. */
206extern SIM_CORE_SIGNAL_FN cris_core_signal;
207#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
208cris_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
209 (TRANSFER), (ERROR))
210
211/* Default memory size. */
212#define CRIS_DEFAULT_MEM_SIZE 0x800000 /* 8M */
213
f6bcefef 214#endif /* SIM_MAIN_H */