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c906108c
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1# Makefile template for Configure for the i960 simulator
2# Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
3# Contributed by Cygnus Support.
4#
5# This file is part of GDB, the GNU debugger.
6#
7# This program is free software; you can redistribute it and/or modify
8# it under the terms of the GNU General Public License as published by
9# the Free Software Foundation; either version 2 of the License, or
10# (at your option) any later version.
11#
12# This program is distributed in the hope that it will be useful,
13# but WITHOUT ANY WARRANTY; without even the implied warranty of
14# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15# GNU General Public License for more details.
16#
17# You should have received a copy of the GNU General Public License along
18# with this program; if not, write to the Free Software Foundation, Inc.,
19# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20
21## COMMON_PRE_CONFIG_FRAG
22
23I960_OBJS = i960.o cpu.o decode.o sem.o model.o mloop.o i960-desc.o
24
25CONFIG_DEVICES = dv-sockser.o
26CONFIG_DEVICES =
27
28SIM_OBJS = \
29 $(SIM_NEW_COMMON_OBJS) \
30 sim-cpu.o \
31 sim-engine.o \
32 sim-hload.o \
33 sim-hrw.o \
34 sim-model.o \
35 sim-reason.o \
36 cgen-utils.o cgen-trace.o cgen-scache.o \
37 cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
38 sim-if.o arch.o \
39 $(I960_OBJS) \
40 traps.o devices.o \
41 $(CONFIG_DEVICES)
42
43# Extra headers included by sim-main.h.
44SIM_EXTRA_DEPS = \
45 $(CGEN_INCLUDE_DEPS) \
46 arch.h cpuall.h i960-sim.h i960-desc.h i960-opc.h
47
48SIM_EXTRA_CFLAGS =
49
50SIM_RUN_OBJS = nrun.o
51SIM_EXTRA_CLEAN = i960-clean
52
53# This selects the i960 newlib/libgloss syscall definitions.
54#
55# ??? This affects what stuff gets included from ../common/nltvals.def.
56# For now, we need SYS_exit because of traps.c. If we really need this,
57# then we need to add i960 specific definitions to nltvals.def.
58NL_TARGET = -DNL_TARGET_i960
59
60## COMMON_POST_CONFIG_FRAG
61
62arch = i960
63
64sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
65
66arch.o: arch.c $(SIM_MAIN_DEPS)
67
68traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
69devices.o: devices.c $(SIM_MAIN_DEPS)
70
71# I960 objs
72
73I960BASE_INCLUDE_DEPS = \
74 $(CGEN_MAIN_CPU_DEPS) \
75 cpu.h decode.h eng.h
76
77i960.o: i960.c $(I960BASE_INCLUDE_DEPS)
78
79# FIXME: Use of `mono' is wip.
80mloop.c eng.h: stamp-mloop
81stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
82 $(SHELL) $(srccom)/genmloop.sh \
83 -mono -fast -pbb -switch sem-switch.c \
84 -cpu i960base -infile $(srcdir)/mloop.in
85 $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
86 $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
87 touch stamp-mloop
88# $(SHELL) $(srccom)/genmloop.sh \
89# -mono -scache -fast i960base $(srcdir)/mloop.in \
90# | sed -e 's/@cpu@/i960base/' -e 's/@CPU@/I960BASE/' >mloop.c
91mloop.o: mloop.c sem-switch.c $(I960BASE_INCLUDE_DEPS)
92
93cpu.o: cpu.c $(I960BASE_INCLUDE_DEPS)
94decode.o: decode.c $(I960BASE_INCLUDE_DEPS)
95sem.o: sem.c $(I960BASE_INCLUDE_DEPS)
96model.o: model.c $(I960BASE_INCLUDE_DEPS)
97
98i960-clean:
99 rm -f mloop.c eng.h stamp-mloop
100 rm -f tmp-*
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101 rm -f stamp-arch stamp-cpu stamp-desc
102
103# cgen support, enable with --enable-cgen-maint
104CGEN_MAINT = ; @true
105# The following line is commented in or out depending upon --enable-cgen-maint.
106@CGEN_MAINT@CGEN_MAINT =
107
108stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srccgen)/i960.cpu
109 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
110 FLAGS="with-scache with-profile=fn"
111 touch stamp-arch
112arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
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113
114stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/i960.cpu
115 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
116 cpu=i960base mach=i960:ka_sa,i960:ca SUFFIX= FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
117 touch stamp-cpu
118cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
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119
120stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) \
121 $(srccgen)/sparc.cpu $(srccgen)/sparccom.cpu $(srccgen)/i960.cpu $(srccgen)/i960.cpu
122 $(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \
123 cpu=i960 mach=all
124 touch stamp-desc
125i960-desc.c i960-desc.h i960-opc.h: $(CGEN_MAINT) stamp-desc