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* iq2000: New target subdirectory.
[thirdparty/binutils-gdb.git] / sim / iq2000 / sem-switch.c
CommitLineData
edece237
CV		 1/* Simulator instruction semantics for iq2000bf.
2
3THIS FILE IS MACHINE GENERATED WITH CGEN.
4
5Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
6
7This file is part of the GNU simulators.
8
9This program is free software; you can redistribute it and/or modify
10it under the terms of the GNU General Public License as published by
11the Free Software Foundation; either version 2, or (at your option)
12any later version.
13
14This program is distributed in the hope that it will be useful,
15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License along
20with this program; if not, write to the Free Software Foundation, Inc.,
2159 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23*/
24
25#ifdef DEFINE_LABELS
26
27 /* The labels have the case they have because the enum of insn types
28 is all uppercase and in the non-stdc case the insn symbol is built
29 into the enum name. */
30
31 static struct {
32 int index;
33 void *label;
34 } labels[] = {
35 { IQ2000BF_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
36 { IQ2000BF_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
37 { IQ2000BF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
38 { IQ2000BF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
39 { IQ2000BF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
40 { IQ2000BF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
41 { IQ2000BF_INSN_ADD, && case_sem_INSN_ADD },
42 { IQ2000BF_INSN_ADDI, && case_sem_INSN_ADDI },
43 { IQ2000BF_INSN_ADDIU, && case_sem_INSN_ADDIU },
44 { IQ2000BF_INSN_ADDU, && case_sem_INSN_ADDU },
45 { IQ2000BF_INSN_ADO16, && case_sem_INSN_ADO16 },
46 { IQ2000BF_INSN_AND, && case_sem_INSN_AND },
47 { IQ2000BF_INSN_ANDI, && case_sem_INSN_ANDI },
48 { IQ2000BF_INSN_ANDOI, && case_sem_INSN_ANDOI },
49 { IQ2000BF_INSN_NOR, && case_sem_INSN_NOR },
50 { IQ2000BF_INSN_OR, && case_sem_INSN_OR },
51 { IQ2000BF_INSN_ORI, && case_sem_INSN_ORI },
52 { IQ2000BF_INSN_RAM, && case_sem_INSN_RAM },
53 { IQ2000BF_INSN_SLL, && case_sem_INSN_SLL },
54 { IQ2000BF_INSN_SLLV, && case_sem_INSN_SLLV },
55 { IQ2000BF_INSN_SLMV, && case_sem_INSN_SLMV },
56 { IQ2000BF_INSN_SLT, && case_sem_INSN_SLT },
57 { IQ2000BF_INSN_SLTI, && case_sem_INSN_SLTI },
58 { IQ2000BF_INSN_SLTIU, && case_sem_INSN_SLTIU },
59 { IQ2000BF_INSN_SLTU, && case_sem_INSN_SLTU },
60 { IQ2000BF_INSN_SRA, && case_sem_INSN_SRA },
61 { IQ2000BF_INSN_SRAV, && case_sem_INSN_SRAV },
62 { IQ2000BF_INSN_SRL, && case_sem_INSN_SRL },
63 { IQ2000BF_INSN_SRLV, && case_sem_INSN_SRLV },
64 { IQ2000BF_INSN_SRMV, && case_sem_INSN_SRMV },
65 { IQ2000BF_INSN_SUB, && case_sem_INSN_SUB },
66 { IQ2000BF_INSN_SUBU, && case_sem_INSN_SUBU },
67 { IQ2000BF_INSN_XOR, && case_sem_INSN_XOR },
68 { IQ2000BF_INSN_XORI, && case_sem_INSN_XORI },
69 { IQ2000BF_INSN_BBI, && case_sem_INSN_BBI },
70 { IQ2000BF_INSN_BBIN, && case_sem_INSN_BBIN },
71 { IQ2000BF_INSN_BBV, && case_sem_INSN_BBV },
72 { IQ2000BF_INSN_BBVN, && case_sem_INSN_BBVN },
73 { IQ2000BF_INSN_BEQ, && case_sem_INSN_BEQ },
74 { IQ2000BF_INSN_BEQL, && case_sem_INSN_BEQL },
75 { IQ2000BF_INSN_BGEZ, && case_sem_INSN_BGEZ },
76 { IQ2000BF_INSN_BGEZAL, && case_sem_INSN_BGEZAL },
77 { IQ2000BF_INSN_BGEZALL, && case_sem_INSN_BGEZALL },
78 { IQ2000BF_INSN_BGEZL, && case_sem_INSN_BGEZL },
79 { IQ2000BF_INSN_BLTZ, && case_sem_INSN_BLTZ },
80 { IQ2000BF_INSN_BLTZL, && case_sem_INSN_BLTZL },
81 { IQ2000BF_INSN_BLTZAL, && case_sem_INSN_BLTZAL },
82 { IQ2000BF_INSN_BLTZALL, && case_sem_INSN_BLTZALL },
83 { IQ2000BF_INSN_BMB0, && case_sem_INSN_BMB0 },
84 { IQ2000BF_INSN_BMB1, && case_sem_INSN_BMB1 },
85 { IQ2000BF_INSN_BMB2, && case_sem_INSN_BMB2 },
86 { IQ2000BF_INSN_BMB3, && case_sem_INSN_BMB3 },
87 { IQ2000BF_INSN_BNE, && case_sem_INSN_BNE },
88 { IQ2000BF_INSN_BNEL, && case_sem_INSN_BNEL },
89 { IQ2000BF_INSN_JALR, && case_sem_INSN_JALR },
90 { IQ2000BF_INSN_JR, && case_sem_INSN_JR },
91 { IQ2000BF_INSN_LB, && case_sem_INSN_LB },
92 { IQ2000BF_INSN_LBU, && case_sem_INSN_LBU },
93 { IQ2000BF_INSN_LH, && case_sem_INSN_LH },
94 { IQ2000BF_INSN_LHU, && case_sem_INSN_LHU },
95 { IQ2000BF_INSN_LUI, && case_sem_INSN_LUI },
96 { IQ2000BF_INSN_LW, && case_sem_INSN_LW },
97 { IQ2000BF_INSN_SB, && case_sem_INSN_SB },
98 { IQ2000BF_INSN_SH, && case_sem_INSN_SH },
99 { IQ2000BF_INSN_SW, && case_sem_INSN_SW },
100 { IQ2000BF_INSN_BREAK, && case_sem_INSN_BREAK },
101 { IQ2000BF_INSN_SYSCALL, && case_sem_INSN_SYSCALL },
102 { IQ2000BF_INSN_ANDOUI, && case_sem_INSN_ANDOUI },
103 { IQ2000BF_INSN_ORUI, && case_sem_INSN_ORUI },
104 { IQ2000BF_INSN_BGTZ, && case_sem_INSN_BGTZ },
105 { IQ2000BF_INSN_BGTZL, && case_sem_INSN_BGTZL },
106 { IQ2000BF_INSN_BLEZ, && case_sem_INSN_BLEZ },
107 { IQ2000BF_INSN_BLEZL, && case_sem_INSN_BLEZL },
108 { IQ2000BF_INSN_MRGB, && case_sem_INSN_MRGB },
109 { IQ2000BF_INSN_BCTXT, && case_sem_INSN_BCTXT },
110 { IQ2000BF_INSN_BC0F, && case_sem_INSN_BC0F },
111 { IQ2000BF_INSN_BC0FL, && case_sem_INSN_BC0FL },
112 { IQ2000BF_INSN_BC3F, && case_sem_INSN_BC3F },
113 { IQ2000BF_INSN_BC3FL, && case_sem_INSN_BC3FL },
114 { IQ2000BF_INSN_BC0T, && case_sem_INSN_BC0T },
115 { IQ2000BF_INSN_BC0TL, && case_sem_INSN_BC0TL },
116 { IQ2000BF_INSN_BC3T, && case_sem_INSN_BC3T },
117 { IQ2000BF_INSN_BC3TL, && case_sem_INSN_BC3TL },
118 { IQ2000BF_INSN_CFC0, && case_sem_INSN_CFC0 },
119 { IQ2000BF_INSN_CFC1, && case_sem_INSN_CFC1 },
120 { IQ2000BF_INSN_CFC2, && case_sem_INSN_CFC2 },
121 { IQ2000BF_INSN_CFC3, && case_sem_INSN_CFC3 },
122 { IQ2000BF_INSN_CHKHDR, && case_sem_INSN_CHKHDR },
123 { IQ2000BF_INSN_CTC0, && case_sem_INSN_CTC0 },
124 { IQ2000BF_INSN_CTC1, && case_sem_INSN_CTC1 },
125 { IQ2000BF_INSN_CTC2, && case_sem_INSN_CTC2 },
126 { IQ2000BF_INSN_CTC3, && case_sem_INSN_CTC3 },
127 { IQ2000BF_INSN_JCR, && case_sem_INSN_JCR },
128 { IQ2000BF_INSN_LUC32, && case_sem_INSN_LUC32 },
129 { IQ2000BF_INSN_LUC32L, && case_sem_INSN_LUC32L },
130 { IQ2000BF_INSN_LUC64, && case_sem_INSN_LUC64 },
131 { IQ2000BF_INSN_LUC64L, && case_sem_INSN_LUC64L },
132 { IQ2000BF_INSN_LUK, && case_sem_INSN_LUK },
133 { IQ2000BF_INSN_LULCK, && case_sem_INSN_LULCK },
134 { IQ2000BF_INSN_LUM32, && case_sem_INSN_LUM32 },
135 { IQ2000BF_INSN_LUM32L, && case_sem_INSN_LUM32L },
136 { IQ2000BF_INSN_LUM64, && case_sem_INSN_LUM64 },
137 { IQ2000BF_INSN_LUM64L, && case_sem_INSN_LUM64L },
138 { IQ2000BF_INSN_LUR, && case_sem_INSN_LUR },
139 { IQ2000BF_INSN_LURL, && case_sem_INSN_LURL },
140 { IQ2000BF_INSN_LUULCK, && case_sem_INSN_LUULCK },
141 { IQ2000BF_INSN_MFC0, && case_sem_INSN_MFC0 },
142 { IQ2000BF_INSN_MFC1, && case_sem_INSN_MFC1 },
143 { IQ2000BF_INSN_MFC2, && case_sem_INSN_MFC2 },
144 { IQ2000BF_INSN_MFC3, && case_sem_INSN_MFC3 },
145 { IQ2000BF_INSN_MTC0, && case_sem_INSN_MTC0 },
146 { IQ2000BF_INSN_MTC1, && case_sem_INSN_MTC1 },
147 { IQ2000BF_INSN_MTC2, && case_sem_INSN_MTC2 },
148 { IQ2000BF_INSN_MTC3, && case_sem_INSN_MTC3 },
149 { IQ2000BF_INSN_PKRL, && case_sem_INSN_PKRL },
150 { IQ2000BF_INSN_PKRLR1, && case_sem_INSN_PKRLR1 },
151 { IQ2000BF_INSN_PKRLR30, && case_sem_INSN_PKRLR30 },
152 { IQ2000BF_INSN_RB, && case_sem_INSN_RB },
153 { IQ2000BF_INSN_RBR1, && case_sem_INSN_RBR1 },
154 { IQ2000BF_INSN_RBR30, && case_sem_INSN_RBR30 },
155 { IQ2000BF_INSN_RFE, && case_sem_INSN_RFE },
156 { IQ2000BF_INSN_RX, && case_sem_INSN_RX },
157 { IQ2000BF_INSN_RXR1, && case_sem_INSN_RXR1 },
158 { IQ2000BF_INSN_RXR30, && case_sem_INSN_RXR30 },
159 { IQ2000BF_INSN_SLEEP, && case_sem_INSN_SLEEP },
160 { IQ2000BF_INSN_SRRD, && case_sem_INSN_SRRD },
161 { IQ2000BF_INSN_SRRDL, && case_sem_INSN_SRRDL },
162 { IQ2000BF_INSN_SRULCK, && case_sem_INSN_SRULCK },
163 { IQ2000BF_INSN_SRWR, && case_sem_INSN_SRWR },
164 { IQ2000BF_INSN_SRWRU, && case_sem_INSN_SRWRU },
165 { IQ2000BF_INSN_TRAPQFL, && case_sem_INSN_TRAPQFL },
166 { IQ2000BF_INSN_TRAPQNE, && case_sem_INSN_TRAPQNE },
167 { IQ2000BF_INSN_TRAPREL, && case_sem_INSN_TRAPREL },
168 { IQ2000BF_INSN_WB, && case_sem_INSN_WB },
169 { IQ2000BF_INSN_WBU, && case_sem_INSN_WBU },
170 { IQ2000BF_INSN_WBR1, && case_sem_INSN_WBR1 },
171 { IQ2000BF_INSN_WBR1U, && case_sem_INSN_WBR1U },
172 { IQ2000BF_INSN_WBR30, && case_sem_INSN_WBR30 },
173 { IQ2000BF_INSN_WBR30U, && case_sem_INSN_WBR30U },
174 { IQ2000BF_INSN_WX, && case_sem_INSN_WX },
175 { IQ2000BF_INSN_WXU, && case_sem_INSN_WXU },
176 { IQ2000BF_INSN_WXR1, && case_sem_INSN_WXR1 },
177 { IQ2000BF_INSN_WXR1U, && case_sem_INSN_WXR1U },
178 { IQ2000BF_INSN_WXR30, && case_sem_INSN_WXR30 },
179 { IQ2000BF_INSN_WXR30U, && case_sem_INSN_WXR30U },
180 { IQ2000BF_INSN_LDW, && case_sem_INSN_LDW },
181 { IQ2000BF_INSN_SDW, && case_sem_INSN_SDW },
182 { IQ2000BF_INSN_J, && case_sem_INSN_J },
183 { IQ2000BF_INSN_JAL, && case_sem_INSN_JAL },
184 { IQ2000BF_INSN_BMB, && case_sem_INSN_BMB },
185 { 0, 0 }
186 };
187 int i;
188
189 for (i = 0; labels[i].label != 0; ++i)
190 {
191#if FAST_P
192 CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
193#else
194 CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
195#endif
196 }
197
198#undef DEFINE_LABELS
199#endif /* DEFINE_LABELS */
200
201#ifdef DEFINE_SWITCH
202
203/* If hyper-fast [well not unnecessarily slow] execution is selected, turn
204 off frills like tracing and profiling. */
205/* FIXME: A better way would be to have TRACE_RESULT check for something
206 that can cause it to be optimized out. Another way would be to emit
207 special handlers into the instruction "stream". */
208
209#if FAST_P
210#undef TRACE_RESULT
211#define TRACE_RESULT(cpu, abuf, name, type, val)
212#endif
213
214#undef GET_ATTR
215#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
216#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
217#else
218#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr)
219#endif
220
221{
222
223#if WITH_SCACHE_PBB
224
225/* Branch to next handler without going around main loop. */
226#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
227SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
228
229#else /* ! WITH_SCACHE_PBB */
230
231#define NEXT(vpc) BREAK (sem)
232#ifdef __GNUC__
233#if FAST_P
234 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
235#else
236 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
237#endif
238#else
239 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
240#endif
241
242#endif /* ! WITH_SCACHE_PBB */
243
244 {
245
246 CASE (sem, INSN_X_INVALID) : /* --invalid-- */
247{
248 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
249 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
250#define FLD(f) abuf->fields.fmt_empty.f
251 int UNUSED written = 0;
252 IADDR UNUSED pc = abuf->addr;
253 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
254
255 {
256 /* Update the recorded pc in the cpu state struct.
257 Only necessary for WITH_SCACHE case, but to avoid the
258 conditional compilation .... */
259 SET_H_PC (pc);
260 /* Virtual insns have zero size. Overwrite vpc with address of next insn
261 using the default-insn-bitsize spec. When executing insns in parallel
262 we may want to queue the fault and continue execution. */
263 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
264 vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
265 }
266
267#undef FLD
268}
269 NEXT (vpc);
270
271 CASE (sem, INSN_X_AFTER) : /* --after-- */
272{
273 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
274 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
275#define FLD(f) abuf->fields.fmt_empty.f
276 int UNUSED written = 0;
277 IADDR UNUSED pc = abuf->addr;
278 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
279
280 {
281#if WITH_SCACHE_PBB_IQ2000BF
282 iq2000bf_pbb_after (current_cpu, sem_arg);
283#endif
284 }
285
286#undef FLD
287}
288 NEXT (vpc);
289
290 CASE (sem, INSN_X_BEFORE) : /* --before-- */
291{
292 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
293 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
294#define FLD(f) abuf->fields.fmt_empty.f
295 int UNUSED written = 0;
296 IADDR UNUSED pc = abuf->addr;
297 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
298
299 {
300#if WITH_SCACHE_PBB_IQ2000BF
301 iq2000bf_pbb_before (current_cpu, sem_arg);
302#endif
303 }
304
305#undef FLD
306}
307 NEXT (vpc);
308
309 CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
310{
311 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
312 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
313#define FLD(f) abuf->fields.fmt_empty.f
314 int UNUSED written = 0;
315 IADDR UNUSED pc = abuf->addr;
316 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
317
318 {
319#if WITH_SCACHE_PBB_IQ2000BF
320#ifdef DEFINE_SWITCH
321 vpc = iq2000bf_pbb_cti_chain (current_cpu, sem_arg,
322 pbb_br_type, pbb_br_npc);
323 BREAK (sem);
324#else
325 /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
326 vpc = iq2000bf_pbb_cti_chain (current_cpu, sem_arg,
327 CPU_PBB_BR_TYPE (current_cpu),
328 CPU_PBB_BR_NPC (current_cpu));
329#endif
330#endif
331 }
332
333#undef FLD
334}
335 NEXT (vpc);
336
337 CASE (sem, INSN_X_CHAIN) : /* --chain-- */
338{
339 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
340 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
341#define FLD(f) abuf->fields.fmt_empty.f
342 int UNUSED written = 0;
343 IADDR UNUSED pc = abuf->addr;
344 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
345
346 {
347#if WITH_SCACHE_PBB_IQ2000BF
348 vpc = iq2000bf_pbb_chain (current_cpu, sem_arg);
349#ifdef DEFINE_SWITCH
350 BREAK (sem);
351#endif
352#endif
353 }
354
355#undef FLD
356}
357 NEXT (vpc);
358
359 CASE (sem, INSN_X_BEGIN) : /* --begin-- */
360{
361 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
362 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
363#define FLD(f) abuf->fields.fmt_empty.f
364 int UNUSED written = 0;
365 IADDR UNUSED pc = abuf->addr;
366 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
367
368 {
369#if WITH_SCACHE_PBB_IQ2000BF
370#if defined DEFINE_SWITCH || defined FAST_P
371 /* In the switch case FAST_P is a constant, allowing several optimizations
372 in any called inline functions. */
373 vpc = iq2000bf_pbb_begin (current_cpu, FAST_P);
374#else
375#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */
376 vpc = iq2000bf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
377#else
378 vpc = iq2000bf_pbb_begin (current_cpu, 0);
379#endif
380#endif
381#endif
382 }
383
384#undef FLD
385}
386 NEXT (vpc);
387
388 CASE (sem, INSN_ADD) : /* add $rd,$rs,$rt */
389{
390 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
391 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
392#define FLD(f) abuf->fields.sfmt_mrgb.f
393 int UNUSED written = 0;
394 IADDR UNUSED pc = abuf->addr;
395 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
396
397 {
398 SI opval = ADDSI (GET_H_GR (FLD (f_rs)), GET_H_GR (FLD (f_rt)));
399 SET_H_GR (FLD (f_rd), opval);
400 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
401 }
402
403#undef FLD
404}
405 NEXT (vpc);
406
407 CASE (sem, INSN_ADDI) : /* addi $rt,$rs,$lo16 */
408{
409 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
410 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
411#define FLD(f) abuf->fields.sfmt_addi.f
412 int UNUSED written = 0;
413 IADDR UNUSED pc = abuf->addr;
414 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
415
416 {
417 SI opval = ADDSI (GET_H_GR (FLD (f_rs)), EXTHISI (TRUNCSIHI (FLD (f_imm))));
418 SET_H_GR (FLD (f_rt), opval);
419 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
420 }
421
422#undef FLD
423}
424 NEXT (vpc);
425
426 CASE (sem, INSN_ADDIU) : /* addiu $rt,$rs,$lo16 */
427{
428 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
429 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
430#define FLD(f) abuf->fields.sfmt_addi.f
431 int UNUSED written = 0;
432 IADDR UNUSED pc = abuf->addr;
433 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
434
435 {
436 SI opval = ADDSI (GET_H_GR (FLD (f_rs)), EXTHISI (TRUNCSIHI (FLD (f_imm))));
437 SET_H_GR (FLD (f_rt), opval);
438 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
439 }
440
441#undef FLD
442}
443 NEXT (vpc);
444
445 CASE (sem, INSN_ADDU) : /* addu $rd,$rs,$rt */
446{
447 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
448 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
449#define FLD(f) abuf->fields.sfmt_mrgb.f
450 int UNUSED written = 0;
451 IADDR UNUSED pc = abuf->addr;
452 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
453
454 {
455 SI opval = ADDSI (GET_H_GR (FLD (f_rs)), GET_H_GR (FLD (f_rt)));
456 SET_H_GR (FLD (f_rd), opval);
457 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
458 }
459
460#undef FLD
461}
462 NEXT (vpc);
463
464 CASE (sem, INSN_ADO16) : /* ado16 $rd,$rs,$rt */
465{
466 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
467 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
468#define FLD(f) abuf->fields.sfmt_mrgb.f
469 int UNUSED written = 0;
470 IADDR UNUSED pc = abuf->addr;
471 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
472
473{
474 HI tmp_high;
475 HI tmp_low;
476 tmp_low = ADDHI (ANDHI (GET_H_GR (FLD (f_rs)), 65535), ANDHI (GET_H_GR (FLD (f_rt)), 65535));
477 tmp_high = ADDHI (SRLSI (GET_H_GR (FLD (f_rs)), 16), SRLSI (GET_H_GR (FLD (f_rt)), 16));
478 {
479 SI opval = ORSI (SLLSI (tmp_high, 16), tmp_low);
480 SET_H_GR (FLD (f_rd), opval);
481 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
482 }
483}
484
485#undef FLD
486}
487 NEXT (vpc);
488
489 CASE (sem, INSN_AND) : /* and $rd,$rs,$rt */
490{
491 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
492 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
493#define FLD(f) abuf->fields.sfmt_mrgb.f
494 int UNUSED written = 0;
495 IADDR UNUSED pc = abuf->addr;
496 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
497
498 {
499 SI opval = ANDSI (GET_H_GR (FLD (f_rs)), GET_H_GR (FLD (f_rt)));
500 SET_H_GR (FLD (f_rd), opval);
501 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
502 }
503
504#undef FLD
505}
506 NEXT (vpc);
507
508 CASE (sem, INSN_ANDI) : /* andi $rt,$rs,$lo16 */
509{
510 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
511 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
512#define FLD(f) abuf->fields.sfmt_addi.f
513 int UNUSED written = 0;
514 IADDR UNUSED pc = abuf->addr;
515 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
516
517 {
518 SI opval = ANDSI (GET_H_GR (FLD (f_rs)), ZEXTSISI (FLD (f_imm)));
519 SET_H_GR (FLD (f_rt), opval);
520 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
521 }
522
523#undef FLD
524}
525 NEXT (vpc);
526
527 CASE (sem, INSN_ANDOI) : /* andoi $rt,$rs,$lo16 */
528{
529 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
530 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
531#define FLD(f) abuf->fields.sfmt_addi.f
532 int UNUSED written = 0;
533 IADDR UNUSED pc = abuf->addr;
534 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
535
536 {
537 SI opval = ANDSI (GET_H_GR (FLD (f_rs)), ORSI (0xffff0000, EXTHISI (TRUNCSIHI (FLD (f_imm)))));
538 SET_H_GR (FLD (f_rt), opval);
539 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
540 }
541
542#undef FLD
543}
544 NEXT (vpc);
545
546 CASE (sem, INSN_NOR) : /* nor $rd,$rs,$rt */
547{
548 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
549 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
550#define FLD(f) abuf->fields.sfmt_mrgb.f
551 int UNUSED written = 0;
552 IADDR UNUSED pc = abuf->addr;
553 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
554
555 {
556 SI opval = INVSI (ORSI (GET_H_GR (FLD (f_rs)), GET_H_GR (FLD (f_rt))));
557 SET_H_GR (FLD (f_rd), opval);
558 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
559 }
560
561#undef FLD
562}
563 NEXT (vpc);
564
565 CASE (sem, INSN_OR) : /* or $rd,$rs,$rt */
566{
567 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
568 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
569#define FLD(f) abuf->fields.sfmt_mrgb.f
570 int UNUSED written = 0;
571 IADDR UNUSED pc = abuf->addr;
572 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
573
574 {
575 SI opval = ORSI (GET_H_GR (FLD (f_rs)), GET_H_GR (FLD (f_rt)));
576 SET_H_GR (FLD (f_rd), opval);
577 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
578 }
579
580#undef FLD
581}
582 NEXT (vpc);
583
584 CASE (sem, INSN_ORI) : /* ori $rt,$rs,$lo16 */
585{
586 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
587 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
588#define FLD(f) abuf->fields.sfmt_addi.f
589 int UNUSED written = 0;
590 IADDR UNUSED pc = abuf->addr;
591 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
592
593 {
594 SI opval = ORSI (GET_H_GR (FLD (f_rs)), ZEXTSISI (FLD (f_imm)));
595 SET_H_GR (FLD (f_rt), opval);
596 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
597 }
598
599#undef FLD
600}
601 NEXT (vpc);
602
603 CASE (sem, INSN_RAM) : /* ram $rd,$rt,$shamt,$maskl,$maskr */
604{
605 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
606 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
607#define FLD(f) abuf->fields.sfmt_ram.f
608 int UNUSED written = 0;
609 IADDR UNUSED pc = abuf->addr;
610 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
611
612{
613 {
614 SI opval = RORSI (GET_H_GR (FLD (f_rt)), FLD (f_shamt));
615 SET_H_GR (FLD (f_rd), opval);
616 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
617 }
618 {
619 SI opval = ANDSI (GET_H_GR (FLD (f_rd)), SRLSI (0xffffffff, FLD (f_maskl)));
620 SET_H_GR (FLD (f_rd), opval);
621 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
622 }
623 {
624 SI opval = ANDSI (GET_H_GR (FLD (f_rd)), SLLSI (0xffffffff, FLD (f_rs)));
625 SET_H_GR (FLD (f_rd), opval);
626 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
627 }
628}
629
630#undef FLD
631}
632 NEXT (vpc);
633
634 CASE (sem, INSN_SLL) : /* sll $rd,$rt,$shamt */
635{
636 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
637 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
638#define FLD(f) abuf->fields.sfmt_ram.f
639 int UNUSED written = 0;
640 IADDR UNUSED pc = abuf->addr;
641 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
642
643 {
644 SI opval = SLLSI (GET_H_GR (FLD (f_rt)), FLD (f_shamt));
645 SET_H_GR (FLD (f_rd), opval);
646 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
647 }
648
649#undef FLD
650}
651 NEXT (vpc);
652
653 CASE (sem, INSN_SLLV) : /* sllv $rd,$rt,$rs */
654{
655 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
656 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
657#define FLD(f) abuf->fields.sfmt_mrgb.f
658 int UNUSED written = 0;
659 IADDR UNUSED pc = abuf->addr;
660 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
661
662 {
663 SI opval = SLLSI (GET_H_GR (FLD (f_rt)), ANDSI (GET_H_GR (FLD (f_rs)), 31));
664 SET_H_GR (FLD (f_rd), opval);
665 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
666 }
667
668#undef FLD
669}
670 NEXT (vpc);
671
672 CASE (sem, INSN_SLMV) : /* slmv $rd,$rt,$rs,$shamt */
673{
674 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
675 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
676#define FLD(f) abuf->fields.sfmt_ram.f
677 int UNUSED written = 0;
678 IADDR UNUSED pc = abuf->addr;
679 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
680
681 {
682 SI opval = ANDSI (SLLSI (GET_H_GR (FLD (f_rt)), FLD (f_shamt)), SRLSI (0xffffffff, GET_H_GR (FLD (f_rs))));
683 SET_H_GR (FLD (f_rd), opval);
684 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
685 }
686
687#undef FLD
688}
689 NEXT (vpc);
690
691 CASE (sem, INSN_SLT) : /* slt $rd,$rs,$rt */
692{
693 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
694 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
695#define FLD(f) abuf->fields.sfmt_mrgb.f
696 int UNUSED written = 0;
697 IADDR UNUSED pc = abuf->addr;
698 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
699
700if (LTSI (GET_H_GR (FLD (f_rs)), GET_H_GR (FLD (f_rt)))) {
701 {
702 SI opval = 1;
703 SET_H_GR (FLD (f_rd), opval);
704 written |= (1 << 2);
705 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
706 }
707} else {
708 {
709 SI opval = 0;
710 SET_H_GR (FLD (f_rd), opval);
711 written |= (1 << 2);
712 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
713 }
714}
715
716 abuf->written = written;
717#undef FLD
718}
719 NEXT (vpc);
720
721 CASE (sem, INSN_SLTI) : /* slti $rt,$rs,$imm */
722{
723 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
724 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
725#define FLD(f) abuf->fields.sfmt_addi.f
726 int UNUSED written = 0;
727 IADDR UNUSED pc = abuf->addr;
728 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
729
730if (LTSI (GET_H_GR (FLD (f_rs)), EXTHISI (TRUNCSIHI (FLD (f_imm))))) {
731 {
732 SI opval = 1;
733 SET_H_GR (FLD (f_rt), opval);
734 written |= (1 << 2);
735 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
736 }
737} else {
738 {
739 SI opval = 0;
740 SET_H_GR (FLD (f_rt), opval);
741 written |= (1 << 2);
742 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
743 }
744}
745
746 abuf->written = written;
747#undef FLD
748}
749 NEXT (vpc);
750
751 CASE (sem, INSN_SLTIU) : /* sltiu $rt,$rs,$imm */
752{
753 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
754 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
755#define FLD(f) abuf->fields.sfmt_addi.f
756 int UNUSED written = 0;
757 IADDR UNUSED pc = abuf->addr;
758 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
759
760if (LTUSI (GET_H_GR (FLD (f_rs)), EXTHISI (TRUNCSIHI (FLD (f_imm))))) {
761 {
762 SI opval = 1;
763 SET_H_GR (FLD (f_rt), opval);
764 written |= (1 << 2);
765 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
766 }
767} else {
768 {
769 SI opval = 0;
770 SET_H_GR (FLD (f_rt), opval);
771 written |= (1 << 2);
772 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
773 }
774}
775
776 abuf->written = written;
777#undef FLD
778}
779 NEXT (vpc);
780
781 CASE (sem, INSN_SLTU) : /* sltu $rd,$rs,$rt */
782{
783 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
784 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
785#define FLD(f) abuf->fields.sfmt_mrgb.f
786 int UNUSED written = 0;
787 IADDR UNUSED pc = abuf->addr;
788 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
789
790if (LTUSI (GET_H_GR (FLD (f_rs)), GET_H_GR (FLD (f_rt)))) {
791 {
792 SI opval = 1;
793 SET_H_GR (FLD (f_rd), opval);
794 written |= (1 << 2);
795 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
796 }
797} else {
798 {
799 SI opval = 0;
800 SET_H_GR (FLD (f_rd), opval);
801 written |= (1 << 2);
802 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
803 }
804}
805
806 abuf->written = written;
807#undef FLD
808}
809 NEXT (vpc);
810
811 CASE (sem, INSN_SRA) : /* sra $rd,$rt,$shamt */
812{
813 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
814 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
815#define FLD(f) abuf->fields.sfmt_ram.f
816 int UNUSED written = 0;
817 IADDR UNUSED pc = abuf->addr;
818 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
819
820 {
821 SI opval = SRASI (GET_H_GR (FLD (f_rt)), FLD (f_shamt));
822 SET_H_GR (FLD (f_rd), opval);
823 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
824 }
825
826#undef FLD
827}
828 NEXT (vpc);
829
830 CASE (sem, INSN_SRAV) : /* srav $rd,$rt,$rs */
831{
832 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
833 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
834#define FLD(f) abuf->fields.sfmt_mrgb.f
835 int UNUSED written = 0;
836 IADDR UNUSED pc = abuf->addr;
837 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
838
839 {
840 SI opval = SRASI (GET_H_GR (FLD (f_rt)), ANDSI (GET_H_GR (FLD (f_rs)), 31));
841 SET_H_GR (FLD (f_rd), opval);
842 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
843 }
844
845#undef FLD
846}
847 NEXT (vpc);
848
849 CASE (sem, INSN_SRL) : /* srl $rd,$rt,$shamt */
850{
851 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
852 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
853#define FLD(f) abuf->fields.sfmt_ram.f
854 int UNUSED written = 0;
855 IADDR UNUSED pc = abuf->addr;
856 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
857
858 {
859 SI opval = SRLSI (GET_H_GR (FLD (f_rt)), FLD (f_shamt));
860 SET_H_GR (FLD (f_rd), opval);
861 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
862 }
863
864#undef FLD
865}
866 NEXT (vpc);
867
868 CASE (sem, INSN_SRLV) : /* srlv $rd,$rt,$rs */
869{
870 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
871 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
872#define FLD(f) abuf->fields.sfmt_mrgb.f
873 int UNUSED written = 0;
874 IADDR UNUSED pc = abuf->addr;
875 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
876
877 {
878 SI opval = SRLSI (GET_H_GR (FLD (f_rt)), ANDSI (GET_H_GR (FLD (f_rs)), 31));
879 SET_H_GR (FLD (f_rd), opval);
880 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
881 }
882
883#undef FLD
884}
885 NEXT (vpc);
886
887 CASE (sem, INSN_SRMV) : /* srmv $rd,$rt,$rs,$shamt */
888{
889 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
890 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
891#define FLD(f) abuf->fields.sfmt_ram.f
892 int UNUSED written = 0;
893 IADDR UNUSED pc = abuf->addr;
894 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
895
896 {
897 SI opval = ANDSI (SRLSI (GET_H_GR (FLD (f_rt)), FLD (f_shamt)), SLLSI (0xffffffff, GET_H_GR (FLD (f_rs))));
898 SET_H_GR (FLD (f_rd), opval);
899 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
900 }
901
902#undef FLD
903}
904 NEXT (vpc);
905
906 CASE (sem, INSN_SUB) : /* sub $rd,$rs,$rt */
907{
908 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
909 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
910#define FLD(f) abuf->fields.sfmt_mrgb.f
911 int UNUSED written = 0;
912 IADDR UNUSED pc = abuf->addr;
913 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
914
915 {
916 SI opval = SUBSI (GET_H_GR (FLD (f_rs)), GET_H_GR (FLD (f_rt)));
917 SET_H_GR (FLD (f_rd), opval);
918 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
919 }
920
921#undef FLD
922}
923 NEXT (vpc);
924
925 CASE (sem, INSN_SUBU) : /* subu $rd,$rs,$rt */
926{
927 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
928 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
929#define FLD(f) abuf->fields.sfmt_mrgb.f
930 int UNUSED written = 0;
931 IADDR UNUSED pc = abuf->addr;
932 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
933
934 {
935 SI opval = SUBSI (GET_H_GR (FLD (f_rs)), GET_H_GR (FLD (f_rt)));
936 SET_H_GR (FLD (f_rd), opval);
937 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
938 }
939
940#undef FLD
941}
942 NEXT (vpc);
943
944 CASE (sem, INSN_XOR) : /* xor $rd,$rs,$rt */
945{
946 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
947 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
948#define FLD(f) abuf->fields.sfmt_mrgb.f
949 int UNUSED written = 0;
950 IADDR UNUSED pc = abuf->addr;
951 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
952
953 {
954 SI opval = XORSI (GET_H_GR (FLD (f_rs)), GET_H_GR (FLD (f_rt)));
955 SET_H_GR (FLD (f_rd), opval);
956 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
957 }
958
959#undef FLD
960}
961 NEXT (vpc);
962
963 CASE (sem, INSN_XORI) : /* xori $rt,$rs,$lo16 */
964{
965 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
966 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
967#define FLD(f) abuf->fields.sfmt_addi.f
968 int UNUSED written = 0;
969 IADDR UNUSED pc = abuf->addr;
970 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
971
972 {
973 SI opval = XORSI (GET_H_GR (FLD (f_rs)), ZEXTSISI (FLD (f_imm)));
974 SET_H_GR (FLD (f_rt), opval);
975 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
976 }
977
978#undef FLD
979}
980 NEXT (vpc);
981
982 CASE (sem, INSN_BBI) : /* bbi $rs($bitnum),$offset */
983{
984 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
985 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
986#define FLD(f) abuf->fields.sfmt_bbi.f
987 int UNUSED written = 0;
988 IADDR UNUSED pc = abuf->addr;
989 SEM_BRANCH_INIT
990 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
991
992if (ANDSI (GET_H_GR (FLD (f_rs)), SLLSI (1, FLD (f_rt)))) {
993{
994 {
995 USI opval = FLD (i_offset);
996 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
997 written |= (1 << 3);
998 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
999 }
1000}
1001}
1002
1003 abuf->written = written;
1004 SEM_BRANCH_FINI (vpc);
1005#undef FLD
1006}
1007 NEXT (vpc);
1008
1009 CASE (sem, INSN_BBIN) : /* bbin $rs($bitnum),$offset */
1010{
1011 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1012 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1013#define FLD(f) abuf->fields.sfmt_bbi.f
1014 int UNUSED written = 0;
1015 IADDR UNUSED pc = abuf->addr;
1016 SEM_BRANCH_INIT
1017 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1018
1019if (NOTSI (ANDSI (GET_H_GR (FLD (f_rs)), SLLSI (1, FLD (f_rt))))) {
1020{
1021 {
1022 USI opval = FLD (i_offset);
1023 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1024 written |= (1 << 3);
1025 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1026 }
1027}
1028}
1029
1030 abuf->written = written;
1031 SEM_BRANCH_FINI (vpc);
1032#undef FLD
1033}
1034 NEXT (vpc);
1035
1036 CASE (sem, INSN_BBV) : /* bbv $rs,$rt,$offset */
1037{
1038 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1039 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1040#define FLD(f) abuf->fields.sfmt_bbi.f
1041 int UNUSED written = 0;
1042 IADDR UNUSED pc = abuf->addr;
1043 SEM_BRANCH_INIT
1044 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1045
1046if (ANDSI (GET_H_GR (FLD (f_rs)), SLLSI (1, ANDSI (GET_H_GR (FLD (f_rt)), 31)))) {
1047{
1048 {
1049 USI opval = FLD (i_offset);
1050 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1051 written |= (1 << 3);
1052 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1053 }
1054}
1055}
1056
1057 abuf->written = written;
1058 SEM_BRANCH_FINI (vpc);
1059#undef FLD
1060}
1061 NEXT (vpc);
1062
1063 CASE (sem, INSN_BBVN) : /* bbvn $rs,$rt,$offset */
1064{
1065 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1066 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1067#define FLD(f) abuf->fields.sfmt_bbi.f
1068 int UNUSED written = 0;
1069 IADDR UNUSED pc = abuf->addr;
1070 SEM_BRANCH_INIT
1071 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1072
1073if (NOTSI (ANDSI (GET_H_GR (FLD (f_rs)), SLLSI (1, ANDSI (GET_H_GR (FLD (f_rt)), 31))))) {
1074{
1075 {
1076 USI opval = FLD (i_offset);
1077 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1078 written |= (1 << 3);
1079 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1080 }
1081}
1082}
1083
1084 abuf->written = written;
1085 SEM_BRANCH_FINI (vpc);
1086#undef FLD
1087}
1088 NEXT (vpc);
1089
1090 CASE (sem, INSN_BEQ) : /* beq $rs,$rt,$offset */
1091{
1092 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1093 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1094#define FLD(f) abuf->fields.sfmt_bbi.f
1095 int UNUSED written = 0;
1096 IADDR UNUSED pc = abuf->addr;
1097 SEM_BRANCH_INIT
1098 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1099
1100if (EQSI (GET_H_GR (FLD (f_rs)), GET_H_GR (FLD (f_rt)))) {
1101{
1102 {
1103 USI opval = FLD (i_offset);
1104 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1105 written |= (1 << 3);
1106 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1107 }
1108}
1109}
1110
1111 abuf->written = written;
1112 SEM_BRANCH_FINI (vpc);
1113#undef FLD
1114}
1115 NEXT (vpc);
1116
1117 CASE (sem, INSN_BEQL) : /* beql $rs,$rt,$offset */
1118{
1119 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1120 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1121#define FLD(f) abuf->fields.sfmt_bbi.f
1122 int UNUSED written = 0;
1123 IADDR UNUSED pc = abuf->addr;
1124 SEM_BRANCH_INIT
1125 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1126
1127if (EQSI (GET_H_GR (FLD (f_rs)), GET_H_GR (FLD (f_rt)))) {
1128{
1129 {
1130 USI opval = FLD (i_offset);
1131 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1132 written |= (1 << 3);
1133 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1134 }
1135}
1136} else {
1137if (1)
1138 SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
1139}
1140
1141 abuf->written = written;
1142 SEM_BRANCH_FINI (vpc);
1143#undef FLD
1144}
1145 NEXT (vpc);
1146
1147 CASE (sem, INSN_BGEZ) : /* bgez $rs,$offset */
1148{
1149 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1150 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1151#define FLD(f) abuf->fields.sfmt_bbi.f
1152 int UNUSED written = 0;
1153 IADDR UNUSED pc = abuf->addr;
1154 SEM_BRANCH_INIT
1155 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1156
1157if (GESI (GET_H_GR (FLD (f_rs)), 0)) {
1158{
1159 {
1160 USI opval = FLD (i_offset);
1161 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1162 written |= (1 << 2);
1163 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1164 }
1165}
1166}
1167
1168 abuf->written = written;
1169 SEM_BRANCH_FINI (vpc);
1170#undef FLD
1171}
1172 NEXT (vpc);
1173
1174 CASE (sem, INSN_BGEZAL) : /* bgezal $rs,$offset */
1175{
1176 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1177 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1178#define FLD(f) abuf->fields.sfmt_bbi.f
1179 int UNUSED written = 0;
1180 IADDR UNUSED pc = abuf->addr;
1181 SEM_BRANCH_INIT
1182 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1183
1184if (GESI (GET_H_GR (FLD (f_rs)), 0)) {
1185{
1186 {
1187 SI opval = ADDSI (pc, 8);
1188 SET_H_GR (((UINT) 31), opval);
1189 written |= (1 << 3);
1190 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1191 }
1192{
1193 {
1194 USI opval = FLD (i_offset);
1195 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1196 written |= (1 << 4);
1197 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1198 }
1199}
1200}
1201}
1202
1203 abuf->written = written;
1204 SEM_BRANCH_FINI (vpc);
1205#undef FLD
1206}
1207 NEXT (vpc);
1208
1209 CASE (sem, INSN_BGEZALL) : /* bgezall $rs,$offset */
1210{
1211 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1212 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1213#define FLD(f) abuf->fields.sfmt_bbi.f
1214 int UNUSED written = 0;
1215 IADDR UNUSED pc = abuf->addr;
1216 SEM_BRANCH_INIT
1217 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1218
1219if (GESI (GET_H_GR (FLD (f_rs)), 0)) {
1220{
1221 {
1222 SI opval = ADDSI (pc, 8);
1223 SET_H_GR (((UINT) 31), opval);
1224 written |= (1 << 3);
1225 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1226 }
1227{
1228 {
1229 USI opval = FLD (i_offset);
1230 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1231 written |= (1 << 4);
1232 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1233 }
1234}
1235}
1236} else {
1237if (1)
1238 SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
1239}
1240
1241 abuf->written = written;
1242 SEM_BRANCH_FINI (vpc);
1243#undef FLD
1244}
1245 NEXT (vpc);
1246
1247 CASE (sem, INSN_BGEZL) : /* bgezl $rs,$offset */
1248{
1249 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1250 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1251#define FLD(f) abuf->fields.sfmt_bbi.f
1252 int UNUSED written = 0;
1253 IADDR UNUSED pc = abuf->addr;
1254 SEM_BRANCH_INIT
1255 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1256
1257if (GESI (GET_H_GR (FLD (f_rs)), 0)) {
1258{
1259 {
1260 USI opval = FLD (i_offset);
1261 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1262 written |= (1 << 2);
1263 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1264 }
1265}
1266} else {
1267if (1)
1268 SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
1269}
1270
1271 abuf->written = written;
1272 SEM_BRANCH_FINI (vpc);
1273#undef FLD
1274}
1275 NEXT (vpc);
1276
1277 CASE (sem, INSN_BLTZ) : /* bltz $rs,$offset */
1278{
1279 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1280 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1281#define FLD(f) abuf->fields.sfmt_bbi.f
1282 int UNUSED written = 0;
1283 IADDR UNUSED pc = abuf->addr;
1284 SEM_BRANCH_INIT
1285 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1286
1287if (LTSI (GET_H_GR (FLD (f_rs)), 0)) {
1288{
1289 {
1290 USI opval = FLD (i_offset);
1291 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1292 written |= (1 << 2);
1293 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1294 }
1295}
1296}
1297
1298 abuf->written = written;
1299 SEM_BRANCH_FINI (vpc);
1300#undef FLD
1301}
1302 NEXT (vpc);
1303
1304 CASE (sem, INSN_BLTZL) : /* bltzl $rs,$offset */
1305{
1306 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1307 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1308#define FLD(f) abuf->fields.sfmt_bbi.f
1309 int UNUSED written = 0;
1310 IADDR UNUSED pc = abuf->addr;
1311 SEM_BRANCH_INIT
1312 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1313
1314if (LTSI (GET_H_GR (FLD (f_rs)), 0)) {
1315{
1316 {
1317 USI opval = FLD (i_offset);
1318 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1319 written |= (1 << 2);
1320 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1321 }
1322}
1323} else {
1324if (1)
1325 SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
1326}
1327
1328 abuf->written = written;
1329 SEM_BRANCH_FINI (vpc);
1330#undef FLD
1331}
1332 NEXT (vpc);
1333
1334 CASE (sem, INSN_BLTZAL) : /* bltzal $rs,$offset */
1335{
1336 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1337 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1338#define FLD(f) abuf->fields.sfmt_bbi.f
1339 int UNUSED written = 0;
1340 IADDR UNUSED pc = abuf->addr;
1341 SEM_BRANCH_INIT
1342 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1343
1344if (LTSI (GET_H_GR (FLD (f_rs)), 0)) {
1345{
1346 {
1347 SI opval = ADDSI (pc, 8);
1348 SET_H_GR (((UINT) 31), opval);
1349 written |= (1 << 3);
1350 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1351 }
1352{
1353 {
1354 USI opval = FLD (i_offset);
1355 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1356 written |= (1 << 4);
1357 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1358 }
1359}
1360}
1361}
1362
1363 abuf->written = written;
1364 SEM_BRANCH_FINI (vpc);
1365#undef FLD
1366}
1367 NEXT (vpc);
1368
1369 CASE (sem, INSN_BLTZALL) : /* bltzall $rs,$offset */
1370{
1371 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1372 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1373#define FLD(f) abuf->fields.sfmt_bbi.f
1374 int UNUSED written = 0;
1375 IADDR UNUSED pc = abuf->addr;
1376 SEM_BRANCH_INIT
1377 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1378
1379if (LTSI (GET_H_GR (FLD (f_rs)), 0)) {
1380{
1381 {
1382 SI opval = ADDSI (pc, 8);
1383 SET_H_GR (((UINT) 31), opval);
1384 written |= (1 << 3);
1385 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1386 }
1387{
1388 {
1389 USI opval = FLD (i_offset);
1390 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1391 written |= (1 << 4);
1392 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1393 }
1394}
1395}
1396} else {
1397if (1)
1398 SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
1399}
1400
1401 abuf->written = written;
1402 SEM_BRANCH_FINI (vpc);
1403#undef FLD
1404}
1405 NEXT (vpc);
1406
1407 CASE (sem, INSN_BMB0) : /* bmb0 $rs,$rt,$offset */
1408{
1409 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1410 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1411#define FLD(f) abuf->fields.sfmt_bbi.f
1412 int UNUSED written = 0;
1413 IADDR UNUSED pc = abuf->addr;
1414 SEM_BRANCH_INIT
1415 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1416
1417if (EQSI (ANDSI (GET_H_GR (FLD (f_rs)), 255), ANDSI (GET_H_GR (FLD (f_rt)), 255))) {
1418{
1419 {
1420 USI opval = FLD (i_offset);
1421 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1422 written |= (1 << 3);
1423 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1424 }
1425}
1426}
1427
1428 abuf->written = written;
1429 SEM_BRANCH_FINI (vpc);
1430#undef FLD
1431}
1432 NEXT (vpc);
1433
1434 CASE (sem, INSN_BMB1) : /* bmb1 $rs,$rt,$offset */
1435{
1436 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1437 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1438#define FLD(f) abuf->fields.sfmt_bbi.f
1439 int UNUSED written = 0;
1440 IADDR UNUSED pc = abuf->addr;
1441 SEM_BRANCH_INIT
1442 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1443
1444if (EQSI (ANDSI (GET_H_GR (FLD (f_rs)), 65280), ANDSI (GET_H_GR (FLD (f_rt)), 65280))) {
1445{
1446 {
1447 USI opval = FLD (i_offset);
1448 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1449 written |= (1 << 3);
1450 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1451 }
1452}
1453}
1454
1455 abuf->written = written;
1456 SEM_BRANCH_FINI (vpc);
1457#undef FLD
1458}
1459 NEXT (vpc);
1460
1461 CASE (sem, INSN_BMB2) : /* bmb2 $rs,$rt,$offset */
1462{
1463 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1464 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1465#define FLD(f) abuf->fields.sfmt_bbi.f
1466 int UNUSED written = 0;
1467 IADDR UNUSED pc = abuf->addr;
1468 SEM_BRANCH_INIT
1469 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1470
1471if (EQSI (ANDSI (GET_H_GR (FLD (f_rs)), 16711680), ANDSI (GET_H_GR (FLD (f_rt)), 16711680))) {
1472{
1473 {
1474 USI opval = FLD (i_offset);
1475 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1476 written |= (1 << 3);
1477 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1478 }
1479}
1480}
1481
1482 abuf->written = written;
1483 SEM_BRANCH_FINI (vpc);
1484#undef FLD
1485}
1486 NEXT (vpc);
1487
1488 CASE (sem, INSN_BMB3) : /* bmb3 $rs,$rt,$offset */
1489{
1490 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1491 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1492#define FLD(f) abuf->fields.sfmt_bbi.f
1493 int UNUSED written = 0;
1494 IADDR UNUSED pc = abuf->addr;
1495 SEM_BRANCH_INIT
1496 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1497
1498if (EQSI (ANDSI (GET_H_GR (FLD (f_rs)), 0xff000000), ANDSI (GET_H_GR (FLD (f_rt)), 0xff000000))) {
1499{
1500 {
1501 USI opval = FLD (i_offset);
1502 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1503 written |= (1 << 3);
1504 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1505 }
1506}
1507}
1508
1509 abuf->written = written;
1510 SEM_BRANCH_FINI (vpc);
1511#undef FLD
1512}
1513 NEXT (vpc);
1514
1515 CASE (sem, INSN_BNE) : /* bne $rs,$rt,$offset */
1516{
1517 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1518 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1519#define FLD(f) abuf->fields.sfmt_bbi.f
1520 int UNUSED written = 0;
1521 IADDR UNUSED pc = abuf->addr;
1522 SEM_BRANCH_INIT
1523 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1524
1525if (NESI (GET_H_GR (FLD (f_rs)), GET_H_GR (FLD (f_rt)))) {
1526{
1527 {
1528 USI opval = FLD (i_offset);
1529 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1530 written |= (1 << 3);
1531 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1532 }
1533}
1534}
1535
1536 abuf->written = written;
1537 SEM_BRANCH_FINI (vpc);
1538#undef FLD
1539}
1540 NEXT (vpc);
1541
1542 CASE (sem, INSN_BNEL) : /* bnel $rs,$rt,$offset */
1543{
1544 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1545 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1546#define FLD(f) abuf->fields.sfmt_bbi.f
1547 int UNUSED written = 0;
1548 IADDR UNUSED pc = abuf->addr;
1549 SEM_BRANCH_INIT
1550 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1551
1552if (NESI (GET_H_GR (FLD (f_rs)), GET_H_GR (FLD (f_rt)))) {
1553{
1554 {
1555 USI opval = FLD (i_offset);
1556 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1557 written |= (1 << 3);
1558 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1559 }
1560}
1561} else {
1562if (1)
1563 SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
1564}
1565
1566 abuf->written = written;
1567 SEM_BRANCH_FINI (vpc);
1568#undef FLD
1569}
1570 NEXT (vpc);
1571
1572 CASE (sem, INSN_JALR) : /* jalr $rd,$rs */
1573{
1574 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1575 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1576#define FLD(f) abuf->fields.sfmt_mrgb.f
1577 int UNUSED written = 0;
1578 IADDR UNUSED pc = abuf->addr;
1579 SEM_BRANCH_INIT
1580 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1581
1582{
1583{
1584 {
1585 SI opval = ADDSI (pc, 8);
1586 SET_H_GR (FLD (f_rd), opval);
1587 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1588 }
1589 {
1590 USI opval = GET_H_GR (FLD (f_rs));
1591 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1592 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1593 }
1594}
1595}
1596
1597 SEM_BRANCH_FINI (vpc);
1598#undef FLD
1599}
1600 NEXT (vpc);
1601
1602 CASE (sem, INSN_JR) : /* jr $rs */
1603{
1604 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1605 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1606#define FLD(f) abuf->fields.sfmt_bbi.f
1607 int UNUSED written = 0;
1608 IADDR UNUSED pc = abuf->addr;
1609 SEM_BRANCH_INIT
1610 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1611
1612{
1613 {
1614 USI opval = GET_H_GR (FLD (f_rs));
1615 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1616 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1617 }
1618}
1619
1620 SEM_BRANCH_FINI (vpc);
1621#undef FLD
1622}
1623 NEXT (vpc);
1624
1625 CASE (sem, INSN_LB) : /* lb $rt,$lo16($base) */
1626{
1627 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1628 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1629#define FLD(f) abuf->fields.sfmt_addi.f
1630 int UNUSED written = 0;
1631 IADDR UNUSED pc = abuf->addr;
1632 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1633
1634 {
1635 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (FLD (f_rs)), EXTHISI (TRUNCSIHI (FLD (f_imm))))));
1636 SET_H_GR (FLD (f_rt), opval);
1637 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1638 }
1639
1640#undef FLD
1641}
1642 NEXT (vpc);
1643
1644 CASE (sem, INSN_LBU) : /* lbu $rt,$lo16($base) */
1645{
1646 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1647 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1648#define FLD(f) abuf->fields.sfmt_addi.f
1649 int UNUSED written = 0;
1650 IADDR UNUSED pc = abuf->addr;
1651 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1652
1653 {
1654 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (FLD (f_rs)), EXTHISI (TRUNCSIHI (FLD (f_imm))))));
1655 SET_H_GR (FLD (f_rt), opval);
1656 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1657 }
1658
1659#undef FLD
1660}
1661 NEXT (vpc);
1662
1663 CASE (sem, INSN_LH) : /* lh $rt,$lo16($base) */
1664{
1665 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1666 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1667#define FLD(f) abuf->fields.sfmt_addi.f
1668 int UNUSED written = 0;
1669 IADDR UNUSED pc = abuf->addr;
1670 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1671
1672 {
1673 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (FLD (f_rs)), EXTHISI (TRUNCSIHI (FLD (f_imm))))));
1674 SET_H_GR (FLD (f_rt), opval);
1675 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1676 }
1677
1678#undef FLD
1679}
1680 NEXT (vpc);
1681
1682 CASE (sem, INSN_LHU) : /* lhu $rt,$lo16($base) */
1683{
1684 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1685 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1686#define FLD(f) abuf->fields.sfmt_addi.f
1687 int UNUSED written = 0;
1688 IADDR UNUSED pc = abuf->addr;
1689 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1690
1691 {
1692 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (FLD (f_rs)), EXTHISI (TRUNCSIHI (FLD (f_imm))))));
1693 SET_H_GR (FLD (f_rt), opval);
1694 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1695 }
1696
1697#undef FLD
1698}
1699 NEXT (vpc);
1700
1701 CASE (sem, INSN_LUI) : /* lui $rt,$hi16 */
1702{
1703 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1704 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1705#define FLD(f) abuf->fields.sfmt_addi.f
1706 int UNUSED written = 0;
1707 IADDR UNUSED pc = abuf->addr;
1708 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1709
1710 {
1711 SI opval = SLLSI (FLD (f_imm), 16);
1712 SET_H_GR (FLD (f_rt), opval);
1713 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1714 }
1715
1716#undef FLD
1717}
1718 NEXT (vpc);
1719
1720 CASE (sem, INSN_LW) : /* lw $rt,$lo16($base) */
1721{
1722 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1723 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1724#define FLD(f) abuf->fields.sfmt_addi.f
1725 int UNUSED written = 0;
1726 IADDR UNUSED pc = abuf->addr;
1727 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1728
1729 {
1730 SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (FLD (f_rs)), EXTHISI (TRUNCSIHI (FLD (f_imm)))));
1731 SET_H_GR (FLD (f_rt), opval);
1732 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1733 }
1734
1735#undef FLD
1736}
1737 NEXT (vpc);
1738
1739 CASE (sem, INSN_SB) : /* sb $rt,$lo16($base) */
1740{
1741 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1742 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1743#define FLD(f) abuf->fields.sfmt_addi.f
1744 int UNUSED written = 0;
1745 IADDR UNUSED pc = abuf->addr;
1746 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1747
1748 {
1749 QI opval = ANDQI (GET_H_GR (FLD (f_rt)), 255);
1750 SETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (FLD (f_rs)), EXTHISI (TRUNCSIHI (FLD (f_imm)))), opval);
1751 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1752 }
1753
1754#undef FLD
1755}
1756 NEXT (vpc);
1757
1758 CASE (sem, INSN_SH) : /* sh $rt,$lo16($base) */
1759{
1760 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1761 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1762#define FLD(f) abuf->fields.sfmt_addi.f
1763 int UNUSED written = 0;
1764 IADDR UNUSED pc = abuf->addr;
1765 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1766
1767 {
1768 HI opval = ANDHI (GET_H_GR (FLD (f_rt)), 65535);
1769 SETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (FLD (f_rs)), EXTHISI (TRUNCSIHI (FLD (f_imm)))), opval);
1770 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1771 }
1772
1773#undef FLD
1774}
1775 NEXT (vpc);
1776
1777 CASE (sem, INSN_SW) : /* sw $rt,$lo16($base) */
1778{
1779 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1780 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1781#define FLD(f) abuf->fields.sfmt_addi.f
1782 int UNUSED written = 0;
1783 IADDR UNUSED pc = abuf->addr;
1784 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1785
1786 {
1787 SI opval = GET_H_GR (FLD (f_rt));
1788 SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (FLD (f_rs)), EXTHISI (TRUNCSIHI (FLD (f_imm)))), opval);
1789 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1790 }
1791
1792#undef FLD
1793}
1794 NEXT (vpc);
1795
1796 CASE (sem, INSN_BREAK) : /* break */
1797{
1798 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1799 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1800#define FLD(f) abuf->fields.fmt_empty.f
1801 int UNUSED written = 0;
1802 IADDR UNUSED pc = abuf->addr;
1803 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1804
1805do_break (current_cpu, pc);
1806
1807#undef FLD
1808}
1809 NEXT (vpc);
1810
1811 CASE (sem, INSN_SYSCALL) : /* syscall */
1812{
1813 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1814 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1815#define FLD(f) abuf->fields.fmt_empty.f
1816 int UNUSED written = 0;
1817 IADDR UNUSED pc = abuf->addr;
1818 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1819
1820do_syscall (current_cpu);
1821
1822#undef FLD
1823}
1824 NEXT (vpc);
1825
1826 CASE (sem, INSN_ANDOUI) : /* andoui $rt,$rs,$hi16 */
1827{
1828 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1829 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1830#define FLD(f) abuf->fields.sfmt_addi.f
1831 int UNUSED written = 0;
1832 IADDR UNUSED pc = abuf->addr;
1833 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1834
1835 {
1836 SI opval = ANDSI (GET_H_GR (FLD (f_rs)), ORSI (SLLSI (FLD (f_imm), 16), 65535));
1837 SET_H_GR (FLD (f_rt), opval);
1838 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1839 }
1840
1841#undef FLD
1842}
1843 NEXT (vpc);
1844
1845 CASE (sem, INSN_ORUI) : /* orui $rt,$rs,$hi16 */
1846{
1847 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1848 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1849#define FLD(f) abuf->fields.sfmt_addi.f
1850 int UNUSED written = 0;
1851 IADDR UNUSED pc = abuf->addr;
1852 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1853
1854 {
1855 SI opval = ORSI (GET_H_GR (FLD (f_rs)), SLLSI (FLD (f_imm), 16));
1856 SET_H_GR (FLD (f_rt), opval);
1857 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1858 }
1859
1860#undef FLD
1861}
1862 NEXT (vpc);
1863
1864 CASE (sem, INSN_BGTZ) : /* bgtz $rs,$offset */
1865{
1866 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1867 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1868#define FLD(f) abuf->fields.sfmt_bbi.f
1869 int UNUSED written = 0;
1870 IADDR UNUSED pc = abuf->addr;
1871 SEM_BRANCH_INIT
1872 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1873
1874if (GTSI (GET_H_GR (FLD (f_rs)), 0)) {
1875{
1876 {
1877 USI opval = FLD (i_offset);
1878 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1879 written |= (1 << 2);
1880 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1881 }
1882}
1883}
1884
1885 abuf->written = written;
1886 SEM_BRANCH_FINI (vpc);
1887#undef FLD
1888}
1889 NEXT (vpc);
1890
1891 CASE (sem, INSN_BGTZL) : /* bgtzl $rs,$offset */
1892{
1893 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1894 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1895#define FLD(f) abuf->fields.sfmt_bbi.f
1896 int UNUSED written = 0;
1897 IADDR UNUSED pc = abuf->addr;
1898 SEM_BRANCH_INIT
1899 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1900
1901if (GTSI (GET_H_GR (FLD (f_rs)), 0)) {
1902{
1903 {
1904 USI opval = FLD (i_offset);
1905 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1906 written |= (1 << 2);
1907 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1908 }
1909}
1910} else {
1911if (1)
1912 SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
1913}
1914
1915 abuf->written = written;
1916 SEM_BRANCH_FINI (vpc);
1917#undef FLD
1918}
1919 NEXT (vpc);
1920
1921 CASE (sem, INSN_BLEZ) : /* blez $rs,$offset */
1922{
1923 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1924 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1925#define FLD(f) abuf->fields.sfmt_bbi.f
1926 int UNUSED written = 0;
1927 IADDR UNUSED pc = abuf->addr;
1928 SEM_BRANCH_INIT
1929 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1930
1931if (LESI (GET_H_GR (FLD (f_rs)), 0)) {
1932{
1933 {
1934 USI opval = FLD (i_offset);
1935 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1936 written |= (1 << 2);
1937 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1938 }
1939}
1940}
1941
1942 abuf->written = written;
1943 SEM_BRANCH_FINI (vpc);
1944#undef FLD
1945}
1946 NEXT (vpc);
1947
1948 CASE (sem, INSN_BLEZL) : /* blezl $rs,$offset */
1949{
1950 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1951 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1952#define FLD(f) abuf->fields.sfmt_bbi.f
1953 int UNUSED written = 0;
1954 IADDR UNUSED pc = abuf->addr;
1955 SEM_BRANCH_INIT
1956 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1957
1958if (LESI (GET_H_GR (FLD (f_rs)), 0)) {
1959{
1960 {
1961 USI opval = FLD (i_offset);
1962 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1963 written |= (1 << 2);
1964 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1965 }
1966}
1967} else {
1968if (1)
1969 SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
1970}
1971
1972 abuf->written = written;
1973 SEM_BRANCH_FINI (vpc);
1974#undef FLD
1975}
1976 NEXT (vpc);
1977
1978 CASE (sem, INSN_MRGB) : /* mrgb $rd,$rs,$rt,$mask */
1979{
1980 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1981 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1982#define FLD(f) abuf->fields.sfmt_mrgb.f
1983 int UNUSED written = 0;
1984 IADDR UNUSED pc = abuf->addr;
1985 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1986
1987{
1988 SI tmp_temp;
1989if (NOTSI (ANDSI (FLD (f_mask), SLLSI (1, 0)))) {
1990 tmp_temp = ANDSI (GET_H_GR (FLD (f_rs)), 255);
1991} else {
1992 tmp_temp = ANDSI (GET_H_GR (FLD (f_rt)), 255);
1993}
1994if (NOTSI (ANDSI (FLD (f_mask), SLLSI (1, 1)))) {
1995 tmp_temp = ORSI (tmp_temp, ANDSI (GET_H_GR (FLD (f_rs)), 65280));
1996} else {
1997 tmp_temp = ORSI (tmp_temp, ANDSI (GET_H_GR (FLD (f_rt)), 65280));
1998}
1999if (NOTSI (ANDSI (FLD (f_mask), SLLSI (1, 2)))) {
2000 tmp_temp = ORSI (tmp_temp, ANDSI (GET_H_GR (FLD (f_rs)), 16711680));
2001} else {
2002 tmp_temp = ORSI (tmp_temp, ANDSI (GET_H_GR (FLD (f_rt)), 16711680));
2003}
2004if (NOTSI (ANDSI (FLD (f_mask), SLLSI (1, 3)))) {
2005 tmp_temp = ORSI (tmp_temp, ANDSI (GET_H_GR (FLD (f_rs)), 0xff000000));
2006} else {
2007 tmp_temp = ORSI (tmp_temp, ANDSI (GET_H_GR (FLD (f_rt)), 0xff000000));
2008}
2009 {
2010 SI opval = tmp_temp;
2011 SET_H_GR (FLD (f_rd), opval);
2012 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2013 }
2014}
2015
2016#undef FLD
2017}
2018 NEXT (vpc);
2019
2020 CASE (sem, INSN_BCTXT) : /* bctxt $rs,$offset */
2021{
2022 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2023 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2024#define FLD(f) abuf->fields.fmt_empty.f
2025 int UNUSED written = 0;
2026 IADDR UNUSED pc = abuf->addr;
2027 SEM_BRANCH_INIT
2028 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2029
2030((void) 0); /*nop*/
2031
2032 SEM_BRANCH_FINI (vpc);
2033#undef FLD
2034}
2035 NEXT (vpc);
2036
2037 CASE (sem, INSN_BC0F) : /* bc0f $offset */
2038{
2039 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2040 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2041#define FLD(f) abuf->fields.fmt_empty.f
2042 int UNUSED written = 0;
2043 IADDR UNUSED pc = abuf->addr;
2044 SEM_BRANCH_INIT
2045 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2046
2047((void) 0); /*nop*/
2048
2049 SEM_BRANCH_FINI (vpc);
2050#undef FLD
2051}
2052 NEXT (vpc);
2053
2054 CASE (sem, INSN_BC0FL) : /* bc0fl $offset */
2055{
2056 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2057 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2058#define FLD(f) abuf->fields.fmt_empty.f
2059 int UNUSED written = 0;
2060 IADDR UNUSED pc = abuf->addr;
2061 SEM_BRANCH_INIT
2062 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2063
2064((void) 0); /*nop*/
2065
2066 SEM_BRANCH_FINI (vpc);
2067#undef FLD
2068}
2069 NEXT (vpc);
2070
2071 CASE (sem, INSN_BC3F) : /* bc3f $offset */
2072{
2073 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2074 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2075#define FLD(f) abuf->fields.fmt_empty.f
2076 int UNUSED written = 0;
2077 IADDR UNUSED pc = abuf->addr;
2078 SEM_BRANCH_INIT
2079 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2080
2081((void) 0); /*nop*/
2082
2083 SEM_BRANCH_FINI (vpc);
2084#undef FLD
2085}
2086 NEXT (vpc);
2087
2088 CASE (sem, INSN_BC3FL) : /* bc3fl $offset */
2089{
2090 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2091 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2092#define FLD(f) abuf->fields.fmt_empty.f
2093 int UNUSED written = 0;
2094 IADDR UNUSED pc = abuf->addr;
2095 SEM_BRANCH_INIT
2096 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2097
2098((void) 0); /*nop*/
2099
2100 SEM_BRANCH_FINI (vpc);
2101#undef FLD
2102}
2103 NEXT (vpc);
2104
2105 CASE (sem, INSN_BC0T) : /* bc0t $offset */
2106{
2107 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2108 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2109#define FLD(f) abuf->fields.fmt_empty.f
2110 int UNUSED written = 0;
2111 IADDR UNUSED pc = abuf->addr;
2112 SEM_BRANCH_INIT
2113 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2114
2115((void) 0); /*nop*/
2116
2117 SEM_BRANCH_FINI (vpc);
2118#undef FLD
2119}
2120 NEXT (vpc);
2121
2122 CASE (sem, INSN_BC0TL) : /* bc0tl $offset */
2123{
2124 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2125 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2126#define FLD(f) abuf->fields.fmt_empty.f
2127 int UNUSED written = 0;
2128 IADDR UNUSED pc = abuf->addr;
2129 SEM_BRANCH_INIT
2130 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2131
2132((void) 0); /*nop*/
2133
2134 SEM_BRANCH_FINI (vpc);
2135#undef FLD
2136}
2137 NEXT (vpc);
2138
2139 CASE (sem, INSN_BC3T) : /* bc3t $offset */
2140{
2141 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2142 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2143#define FLD(f) abuf->fields.fmt_empty.f
2144 int UNUSED written = 0;
2145 IADDR UNUSED pc = abuf->addr;
2146 SEM_BRANCH_INIT
2147 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2148
2149((void) 0); /*nop*/
2150
2151 SEM_BRANCH_FINI (vpc);
2152#undef FLD
2153}
2154 NEXT (vpc);
2155
2156 CASE (sem, INSN_BC3TL) : /* bc3tl $offset */
2157{
2158 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2159 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2160#define FLD(f) abuf->fields.fmt_empty.f
2161 int UNUSED written = 0;
2162 IADDR UNUSED pc = abuf->addr;
2163 SEM_BRANCH_INIT
2164 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2165
2166((void) 0); /*nop*/
2167
2168 SEM_BRANCH_FINI (vpc);
2169#undef FLD
2170}
2171 NEXT (vpc);
2172
2173 CASE (sem, INSN_CFC0) : /* cfc0 $rt,$rd */
2174{
2175 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2176 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2177#define FLD(f) abuf->fields.fmt_empty.f
2178 int UNUSED written = 0;
2179 IADDR UNUSED pc = abuf->addr;
2180 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2181
2182((void) 0); /*nop*/
2183
2184#undef FLD
2185}
2186 NEXT (vpc);
2187
2188 CASE (sem, INSN_CFC1) : /* cfc1 $rt,$rd */
2189{
2190 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2191 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2192#define FLD(f) abuf->fields.fmt_empty.f
2193 int UNUSED written = 0;
2194 IADDR UNUSED pc = abuf->addr;
2195 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2196
2197((void) 0); /*nop*/
2198
2199#undef FLD
2200}
2201 NEXT (vpc);
2202
2203 CASE (sem, INSN_CFC2) : /* cfc2 $rt,$rd */
2204{
2205 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2206 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2207#define FLD(f) abuf->fields.fmt_empty.f
2208 int UNUSED written = 0;
2209 IADDR UNUSED pc = abuf->addr;
2210 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2211
2212((void) 0); /*nop*/
2213
2214#undef FLD
2215}
2216 NEXT (vpc);
2217
2218 CASE (sem, INSN_CFC3) : /* cfc3 $rt,$rd */
2219{
2220 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2221 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2222#define FLD(f) abuf->fields.fmt_empty.f
2223 int UNUSED written = 0;
2224 IADDR UNUSED pc = abuf->addr;
2225 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2226
2227((void) 0); /*nop*/
2228
2229#undef FLD
2230}
2231 NEXT (vpc);
2232
2233 CASE (sem, INSN_CHKHDR) : /* chkhdr $rd,$rt */
2234{
2235 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2236 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2237#define FLD(f) abuf->fields.fmt_empty.f
2238 int UNUSED written = 0;
2239 IADDR UNUSED pc = abuf->addr;
2240 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2241
2242((void) 0); /*nop*/
2243
2244#undef FLD
2245}
2246 NEXT (vpc);
2247
2248 CASE (sem, INSN_CTC0) : /* ctc0 $rt,$rd */
2249{
2250 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2251 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2252#define FLD(f) abuf->fields.fmt_empty.f
2253 int UNUSED written = 0;
2254 IADDR UNUSED pc = abuf->addr;
2255 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2256
2257((void) 0); /*nop*/
2258
2259#undef FLD
2260}
2261 NEXT (vpc);
2262
2263 CASE (sem, INSN_CTC1) : /* ctc1 $rt,$rd */
2264{
2265 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2266 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2267#define FLD(f) abuf->fields.fmt_empty.f
2268 int UNUSED written = 0;
2269 IADDR UNUSED pc = abuf->addr;
2270 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2271
2272((void) 0); /*nop*/
2273
2274#undef FLD
2275}
2276 NEXT (vpc);
2277
2278 CASE (sem, INSN_CTC2) : /* ctc2 $rt,$rd */
2279{
2280 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2281 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2282#define FLD(f) abuf->fields.fmt_empty.f
2283 int UNUSED written = 0;
2284 IADDR UNUSED pc = abuf->addr;
2285 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2286
2287((void) 0); /*nop*/
2288
2289#undef FLD
2290}
2291 NEXT (vpc);
2292
2293 CASE (sem, INSN_CTC3) : /* ctc3 $rt,$rd */
2294{
2295 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2296 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2297#define FLD(f) abuf->fields.fmt_empty.f
2298 int UNUSED written = 0;
2299 IADDR UNUSED pc = abuf->addr;
2300 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2301
2302((void) 0); /*nop*/
2303
2304#undef FLD
2305}
2306 NEXT (vpc);
2307
2308 CASE (sem, INSN_JCR) : /* jcr $rs */
2309{
2310 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2311 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2312#define FLD(f) abuf->fields.fmt_empty.f
2313 int UNUSED written = 0;
2314 IADDR UNUSED pc = abuf->addr;
2315 SEM_BRANCH_INIT
2316 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2317
2318((void) 0); /*nop*/
2319
2320 SEM_BRANCH_FINI (vpc);
2321#undef FLD
2322}
2323 NEXT (vpc);
2324
2325 CASE (sem, INSN_LUC32) : /* luc32 $rt,$rd */
2326{
2327 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2328 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2329#define FLD(f) abuf->fields.fmt_empty.f
2330 int UNUSED written = 0;
2331 IADDR UNUSED pc = abuf->addr;
2332 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2333
2334((void) 0); /*nop*/
2335
2336#undef FLD
2337}
2338 NEXT (vpc);
2339
2340 CASE (sem, INSN_LUC32L) : /* luc32l $rt,$rd */
2341{
2342 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2343 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2344#define FLD(f) abuf->fields.fmt_empty.f
2345 int UNUSED written = 0;
2346 IADDR UNUSED pc = abuf->addr;
2347 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2348
2349((void) 0); /*nop*/
2350
2351#undef FLD
2352}
2353 NEXT (vpc);
2354
2355 CASE (sem, INSN_LUC64) : /* luc64 $rt,$rd */
2356{
2357 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2358 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2359#define FLD(f) abuf->fields.fmt_empty.f
2360 int UNUSED written = 0;
2361 IADDR UNUSED pc = abuf->addr;
2362 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2363
2364((void) 0); /*nop*/
2365
2366#undef FLD
2367}
2368 NEXT (vpc);
2369
2370 CASE (sem, INSN_LUC64L) : /* luc64l $rt,$rd */
2371{
2372 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2373 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2374#define FLD(f) abuf->fields.fmt_empty.f
2375 int UNUSED written = 0;
2376 IADDR UNUSED pc = abuf->addr;
2377 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2378
2379((void) 0); /*nop*/
2380
2381#undef FLD
2382}
2383 NEXT (vpc);
2384
2385 CASE (sem, INSN_LUK) : /* luk $rt,$rd */
2386{
2387 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2388 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2389#define FLD(f) abuf->fields.fmt_empty.f
2390 int UNUSED written = 0;
2391 IADDR UNUSED pc = abuf->addr;
2392 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2393
2394((void) 0); /*nop*/
2395
2396#undef FLD
2397}
2398 NEXT (vpc);
2399
2400 CASE (sem, INSN_LULCK) : /* lulck $rt */
2401{
2402 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2403 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2404#define FLD(f) abuf->fields.fmt_empty.f
2405 int UNUSED written = 0;
2406 IADDR UNUSED pc = abuf->addr;
2407 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2408
2409((void) 0); /*nop*/
2410
2411#undef FLD
2412}
2413 NEXT (vpc);
2414
2415 CASE (sem, INSN_LUM32) : /* lum32 $rt,$rd */
2416{
2417 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2418 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2419#define FLD(f) abuf->fields.fmt_empty.f
2420 int UNUSED written = 0;
2421 IADDR UNUSED pc = abuf->addr;
2422 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2423
2424((void) 0); /*nop*/
2425
2426#undef FLD
2427}
2428 NEXT (vpc);
2429
2430 CASE (sem, INSN_LUM32L) : /* lum32l $rt,$rd */
2431{
2432 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2433 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2434#define FLD(f) abuf->fields.fmt_empty.f
2435 int UNUSED written = 0;
2436 IADDR UNUSED pc = abuf->addr;
2437 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2438
2439((void) 0); /*nop*/
2440
2441#undef FLD
2442}
2443 NEXT (vpc);
2444
2445 CASE (sem, INSN_LUM64) : /* lum64 $rt,$rd */
2446{
2447 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2448 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2449#define FLD(f) abuf->fields.fmt_empty.f
2450 int UNUSED written = 0;
2451 IADDR UNUSED pc = abuf->addr;
2452 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2453
2454((void) 0); /*nop*/
2455
2456#undef FLD
2457}
2458 NEXT (vpc);
2459
2460 CASE (sem, INSN_LUM64L) : /* lum64l $rt,$rd */
2461{
2462 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2463 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2464#define FLD(f) abuf->fields.fmt_empty.f
2465 int UNUSED written = 0;
2466 IADDR UNUSED pc = abuf->addr;
2467 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2468
2469((void) 0); /*nop*/
2470
2471#undef FLD
2472}
2473 NEXT (vpc);
2474
2475 CASE (sem, INSN_LUR) : /* lur $rt,$rd */
2476{
2477 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2478 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2479#define FLD(f) abuf->fields.fmt_empty.f
2480 int UNUSED written = 0;
2481 IADDR UNUSED pc = abuf->addr;
2482 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2483
2484((void) 0); /*nop*/
2485
2486#undef FLD
2487}
2488 NEXT (vpc);
2489
2490 CASE (sem, INSN_LURL) : /* lurl $rt,$rd */
2491{
2492 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2493 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2494#define FLD(f) abuf->fields.fmt_empty.f
2495 int UNUSED written = 0;
2496 IADDR UNUSED pc = abuf->addr;
2497 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2498
2499((void) 0); /*nop*/
2500
2501#undef FLD
2502}
2503 NEXT (vpc);
2504
2505 CASE (sem, INSN_LUULCK) : /* luulck $rt */
2506{
2507 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2508 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2509#define FLD(f) abuf->fields.fmt_empty.f
2510 int UNUSED written = 0;
2511 IADDR UNUSED pc = abuf->addr;
2512 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2513
2514((void) 0); /*nop*/
2515
2516#undef FLD
2517}
2518 NEXT (vpc);
2519
2520 CASE (sem, INSN_MFC0) : /* mfc0 $rt,$rd */
2521{
2522 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2523 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2524#define FLD(f) abuf->fields.fmt_empty.f
2525 int UNUSED written = 0;
2526 IADDR UNUSED pc = abuf->addr;
2527 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2528
2529((void) 0); /*nop*/
2530
2531#undef FLD
2532}
2533 NEXT (vpc);
2534
2535 CASE (sem, INSN_MFC1) : /* mfc1 $rt,$rd */
2536{
2537 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2538 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2539#define FLD(f) abuf->fields.fmt_empty.f
2540 int UNUSED written = 0;
2541 IADDR UNUSED pc = abuf->addr;
2542 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2543
2544((void) 0); /*nop*/
2545
2546#undef FLD
2547}
2548 NEXT (vpc);
2549
2550 CASE (sem, INSN_MFC2) : /* mfc2 $rt,$rd */
2551{
2552 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2553 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2554#define FLD(f) abuf->fields.fmt_empty.f
2555 int UNUSED written = 0;
2556 IADDR UNUSED pc = abuf->addr;
2557 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2558
2559((void) 0); /*nop*/
2560
2561#undef FLD
2562}
2563 NEXT (vpc);
2564
2565 CASE (sem, INSN_MFC3) : /* mfc3 $rt,$rd */
2566{
2567 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2568 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2569#define FLD(f) abuf->fields.fmt_empty.f
2570 int UNUSED written = 0;
2571 IADDR UNUSED pc = abuf->addr;
2572 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2573
2574((void) 0); /*nop*/
2575
2576#undef FLD
2577}
2578 NEXT (vpc);
2579
2580 CASE (sem, INSN_MTC0) : /* mtc0 $rt,$rd */
2581{
2582 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2583 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2584#define FLD(f) abuf->fields.fmt_empty.f
2585 int UNUSED written = 0;
2586 IADDR UNUSED pc = abuf->addr;
2587 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2588
2589((void) 0); /*nop*/
2590
2591#undef FLD
2592}
2593 NEXT (vpc);
2594
2595 CASE (sem, INSN_MTC1) : /* mtc1 $rt,$rd */
2596{
2597 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2598 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2599#define FLD(f) abuf->fields.fmt_empty.f
2600 int UNUSED written = 0;
2601 IADDR UNUSED pc = abuf->addr;
2602 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2603
2604((void) 0); /*nop*/
2605
2606#undef FLD
2607}
2608 NEXT (vpc);
2609
2610 CASE (sem, INSN_MTC2) : /* mtc2 $rt,$rd */
2611{
2612 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2613 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2614#define FLD(f) abuf->fields.fmt_empty.f
2615 int UNUSED written = 0;
2616 IADDR UNUSED pc = abuf->addr;
2617 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2618
2619((void) 0); /*nop*/
2620
2621#undef FLD
2622}
2623 NEXT (vpc);
2624
2625 CASE (sem, INSN_MTC3) : /* mtc3 $rt,$rd */
2626{
2627 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2628 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2629#define FLD(f) abuf->fields.fmt_empty.f
2630 int UNUSED written = 0;
2631 IADDR UNUSED pc = abuf->addr;
2632 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2633
2634((void) 0); /*nop*/
2635
2636#undef FLD
2637}
2638 NEXT (vpc);
2639
2640 CASE (sem, INSN_PKRL) : /* pkrl $rd,$rt */
2641{
2642 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2643 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2644#define FLD(f) abuf->fields.fmt_empty.f
2645 int UNUSED written = 0;
2646 IADDR UNUSED pc = abuf->addr;
2647 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2648
2649((void) 0); /*nop*/
2650
2651#undef FLD
2652}
2653 NEXT (vpc);
2654
2655 CASE (sem, INSN_PKRLR1) : /* pkrlr1 $rt,$index,$count */
2656{
2657 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2658 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2659#define FLD(f) abuf->fields.fmt_empty.f
2660 int UNUSED written = 0;
2661 IADDR UNUSED pc = abuf->addr;
2662 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2663
2664((void) 0); /*nop*/
2665
2666#undef FLD
2667}
2668 NEXT (vpc);
2669
2670 CASE (sem, INSN_PKRLR30) : /* pkrlr30 $rt,$index,$count */
2671{
2672 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2673 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2674#define FLD(f) abuf->fields.fmt_empty.f
2675 int UNUSED written = 0;
2676 IADDR UNUSED pc = abuf->addr;
2677 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2678
2679((void) 0); /*nop*/
2680
2681#undef FLD
2682}
2683 NEXT (vpc);
2684
2685 CASE (sem, INSN_RB) : /* rb $rd,$rt */
2686{
2687 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2688 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2689#define FLD(f) abuf->fields.fmt_empty.f
2690 int UNUSED written = 0;
2691 IADDR UNUSED pc = abuf->addr;
2692 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2693
2694((void) 0); /*nop*/
2695
2696#undef FLD
2697}
2698 NEXT (vpc);
2699
2700 CASE (sem, INSN_RBR1) : /* rbr1 $rt,$index,$count */
2701{
2702 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2703 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2704#define FLD(f) abuf->fields.fmt_empty.f
2705 int UNUSED written = 0;
2706 IADDR UNUSED pc = abuf->addr;
2707 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2708
2709((void) 0); /*nop*/
2710
2711#undef FLD
2712}
2713 NEXT (vpc);
2714
2715 CASE (sem, INSN_RBR30) : /* rbr30 $rt,$index,$count */
2716{
2717 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2718 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2719#define FLD(f) abuf->fields.fmt_empty.f
2720 int UNUSED written = 0;
2721 IADDR UNUSED pc = abuf->addr;
2722 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2723
2724((void) 0); /*nop*/
2725
2726#undef FLD
2727}
2728 NEXT (vpc);
2729
2730 CASE (sem, INSN_RFE) : /* rfe */
2731{
2732 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2733 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2734#define FLD(f) abuf->fields.fmt_empty.f
2735 int UNUSED written = 0;
2736 IADDR UNUSED pc = abuf->addr;
2737 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2738
2739((void) 0); /*nop*/
2740
2741#undef FLD
2742}
2743 NEXT (vpc);
2744
2745 CASE (sem, INSN_RX) : /* rx $rd,$rt */
2746{
2747 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2748 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2749#define FLD(f) abuf->fields.fmt_empty.f
2750 int UNUSED written = 0;
2751 IADDR UNUSED pc = abuf->addr;
2752 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2753
2754((void) 0); /*nop*/
2755
2756#undef FLD
2757}
2758 NEXT (vpc);
2759
2760 CASE (sem, INSN_RXR1) : /* rxr1 $rt,$index,$count */
2761{
2762 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2763 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2764#define FLD(f) abuf->fields.fmt_empty.f
2765 int UNUSED written = 0;
2766 IADDR UNUSED pc = abuf->addr;
2767 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2768
2769((void) 0); /*nop*/
2770
2771#undef FLD
2772}
2773 NEXT (vpc);
2774
2775 CASE (sem, INSN_RXR30) : /* rxr30 $rt,$index,$count */
2776{
2777 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2778 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2779#define FLD(f) abuf->fields.fmt_empty.f
2780 int UNUSED written = 0;
2781 IADDR UNUSED pc = abuf->addr;
2782 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2783
2784((void) 0); /*nop*/
2785
2786#undef FLD
2787}
2788 NEXT (vpc);
2789
2790 CASE (sem, INSN_SLEEP) : /* sleep */
2791{
2792 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2793 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2794#define FLD(f) abuf->fields.fmt_empty.f
2795 int UNUSED written = 0;
2796 IADDR UNUSED pc = abuf->addr;
2797 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2798
2799((void) 0); /*nop*/
2800
2801#undef FLD
2802}
2803 NEXT (vpc);
2804
2805 CASE (sem, INSN_SRRD) : /* srrd $rt */
2806{
2807 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2808 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2809#define FLD(f) abuf->fields.fmt_empty.f
2810 int UNUSED written = 0;
2811 IADDR UNUSED pc = abuf->addr;
2812 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2813
2814((void) 0); /*nop*/
2815
2816#undef FLD
2817}
2818 NEXT (vpc);
2819
2820 CASE (sem, INSN_SRRDL) : /* srrdl $rt */
2821{
2822 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2823 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2824#define FLD(f) abuf->fields.fmt_empty.f
2825 int UNUSED written = 0;
2826 IADDR UNUSED pc = abuf->addr;
2827 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2828
2829((void) 0); /*nop*/
2830
2831#undef FLD
2832}
2833 NEXT (vpc);
2834
2835 CASE (sem, INSN_SRULCK) : /* srulck $rt */
2836{
2837 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2838 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2839#define FLD(f) abuf->fields.fmt_empty.f
2840 int UNUSED written = 0;
2841 IADDR UNUSED pc = abuf->addr;
2842 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2843
2844((void) 0); /*nop*/
2845
2846#undef FLD
2847}
2848 NEXT (vpc);
2849
2850 CASE (sem, INSN_SRWR) : /* srwr $rt,$rd */
2851{
2852 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2853 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2854#define FLD(f) abuf->fields.fmt_empty.f
2855 int UNUSED written = 0;
2856 IADDR UNUSED pc = abuf->addr;
2857 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2858
2859((void) 0); /*nop*/
2860
2861#undef FLD
2862}
2863 NEXT (vpc);
2864
2865 CASE (sem, INSN_SRWRU) : /* srwru $rt,$rd */
2866{
2867 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2868 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2869#define FLD(f) abuf->fields.fmt_empty.f
2870 int UNUSED written = 0;
2871 IADDR UNUSED pc = abuf->addr;
2872 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2873
2874((void) 0); /*nop*/
2875
2876#undef FLD
2877}
2878 NEXT (vpc);
2879
2880 CASE (sem, INSN_TRAPQFL) : /* trapqfl */
2881{
2882 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2883 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2884#define FLD(f) abuf->fields.fmt_empty.f
2885 int UNUSED written = 0;
2886 IADDR UNUSED pc = abuf->addr;
2887 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2888
2889((void) 0); /*nop*/
2890
2891#undef FLD
2892}
2893 NEXT (vpc);
2894
2895 CASE (sem, INSN_TRAPQNE) : /* trapqne */
2896{
2897 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2898 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2899#define FLD(f) abuf->fields.fmt_empty.f
2900 int UNUSED written = 0;
2901 IADDR UNUSED pc = abuf->addr;
2902 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2903
2904((void) 0); /*nop*/
2905
2906#undef FLD
2907}
2908 NEXT (vpc);
2909
2910 CASE (sem, INSN_TRAPREL) : /* traprel $rt */
2911{
2912 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2913 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2914#define FLD(f) abuf->fields.fmt_empty.f
2915 int UNUSED written = 0;
2916 IADDR UNUSED pc = abuf->addr;
2917 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2918
2919((void) 0); /*nop*/
2920
2921#undef FLD
2922}
2923 NEXT (vpc);
2924
2925 CASE (sem, INSN_WB) : /* wb $rd,$rt */
2926{
2927 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2928 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2929#define FLD(f) abuf->fields.fmt_empty.f
2930 int UNUSED written = 0;
2931 IADDR UNUSED pc = abuf->addr;
2932 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2933
2934((void) 0); /*nop*/
2935
2936#undef FLD
2937}
2938 NEXT (vpc);
2939
2940 CASE (sem, INSN_WBU) : /* wbu $rd,$rt */
2941{
2942 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2943 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2944#define FLD(f) abuf->fields.fmt_empty.f
2945 int UNUSED written = 0;
2946 IADDR UNUSED pc = abuf->addr;
2947 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2948
2949((void) 0); /*nop*/
2950
2951#undef FLD
2952}
2953 NEXT (vpc);
2954
2955 CASE (sem, INSN_WBR1) : /* wbr1 $rt,$index,$count */
2956{
2957 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2958 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2959#define FLD(f) abuf->fields.fmt_empty.f
2960 int UNUSED written = 0;
2961 IADDR UNUSED pc = abuf->addr;
2962 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2963
2964((void) 0); /*nop*/
2965
2966#undef FLD
2967}
2968 NEXT (vpc);
2969
2970 CASE (sem, INSN_WBR1U) : /* wbr1u $rt,$index,$count */
2971{
2972 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2973 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2974#define FLD(f) abuf->fields.fmt_empty.f
2975 int UNUSED written = 0;
2976 IADDR UNUSED pc = abuf->addr;
2977 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2978
2979((void) 0); /*nop*/
2980
2981#undef FLD
2982}
2983 NEXT (vpc);
2984
2985 CASE (sem, INSN_WBR30) : /* wbr30 $rt,$index,$count */
2986{
2987 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2988 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2989#define FLD(f) abuf->fields.fmt_empty.f
2990 int UNUSED written = 0;
2991 IADDR UNUSED pc = abuf->addr;
2992 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2993
2994((void) 0); /*nop*/
2995
2996#undef FLD
2997}
2998 NEXT (vpc);
2999
3000 CASE (sem, INSN_WBR30U) : /* wbr30u $rt,$index,$count */
3001{
3002 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3003 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3004#define FLD(f) abuf->fields.fmt_empty.f
3005 int UNUSED written = 0;
3006 IADDR UNUSED pc = abuf->addr;
3007 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3008
3009((void) 0); /*nop*/
3010
3011#undef FLD
3012}
3013 NEXT (vpc);
3014
3015 CASE (sem, INSN_WX) : /* wx $rd,$rt */
3016{
3017 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3018 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3019#define FLD(f) abuf->fields.fmt_empty.f
3020 int UNUSED written = 0;
3021 IADDR UNUSED pc = abuf->addr;
3022 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3023
3024((void) 0); /*nop*/
3025
3026#undef FLD
3027}
3028 NEXT (vpc);
3029
3030 CASE (sem, INSN_WXU) : /* wxu $rd,$rt */
3031{
3032 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3033 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3034#define FLD(f) abuf->fields.fmt_empty.f
3035 int UNUSED written = 0;
3036 IADDR UNUSED pc = abuf->addr;
3037 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3038
3039((void) 0); /*nop*/
3040
3041#undef FLD
3042}
3043 NEXT (vpc);
3044
3045 CASE (sem, INSN_WXR1) : /* wxr1 $rt,$index,$count */
3046{
3047 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3048 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3049#define FLD(f) abuf->fields.fmt_empty.f
3050 int UNUSED written = 0;
3051 IADDR UNUSED pc = abuf->addr;
3052 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3053
3054((void) 0); /*nop*/
3055
3056#undef FLD
3057}
3058 NEXT (vpc);
3059
3060 CASE (sem, INSN_WXR1U) : /* wxr1u $rt,$index,$count */
3061{
3062 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3063 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3064#define FLD(f) abuf->fields.fmt_empty.f
3065 int UNUSED written = 0;
3066 IADDR UNUSED pc = abuf->addr;
3067 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3068
3069((void) 0); /*nop*/
3070
3071#undef FLD
3072}
3073 NEXT (vpc);
3074
3075 CASE (sem, INSN_WXR30) : /* wxr30 $rt,$index,$count */
3076{
3077 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3078 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3079#define FLD(f) abuf->fields.fmt_empty.f
3080 int UNUSED written = 0;
3081 IADDR UNUSED pc = abuf->addr;
3082 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3083
3084((void) 0); /*nop*/
3085
3086#undef FLD
3087}
3088 NEXT (vpc);
3089
3090 CASE (sem, INSN_WXR30U) : /* wxr30u $rt,$index,$count */
3091{
3092 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3093 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3094#define FLD(f) abuf->fields.fmt_empty.f
3095 int UNUSED written = 0;
3096 IADDR UNUSED pc = abuf->addr;
3097 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3098
3099((void) 0); /*nop*/
3100
3101#undef FLD
3102}
3103 NEXT (vpc);
3104
3105 CASE (sem, INSN_LDW) : /* ldw $rt,$lo16($base) */
3106{
3107 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3108 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3109#define FLD(f) abuf->fields.sfmt_addi.f
3110 int UNUSED written = 0;
3111 IADDR UNUSED pc = abuf->addr;
3112 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3113
3114{
3115 SI tmp_addr;
3116 tmp_addr = ANDSI (ADDSI (GET_H_GR (FLD (f_rs)), FLD (f_imm)), INVSI (3));
3117 {
3118 SI opval = GETMEMSI (current_cpu, pc, tmp_addr);
3119 SET_H_GR (ADDSI (FLD (f_rt), 1), opval);
3120 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3121 }
3122 {
3123 SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_addr, 4));
3124 SET_H_GR (FLD (f_rt), opval);
3125 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3126 }
3127}
3128
3129#undef FLD
3130}
3131 NEXT (vpc);
3132
3133 CASE (sem, INSN_SDW) : /* sdw $rt,$lo16($base) */
3134{
3135 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3136 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3137#define FLD(f) abuf->fields.sfmt_addi.f
3138 int UNUSED written = 0;
3139 IADDR UNUSED pc = abuf->addr;
3140 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3141
3142{
3143 SI tmp_addr;
3144 tmp_addr = ANDSI (ADDSI (GET_H_GR (FLD (f_rs)), FLD (f_imm)), INVSI (3));
3145 {
3146 SI opval = GET_H_GR (FLD (f_rt));
3147 SETMEMSI (current_cpu, pc, ADDSI (tmp_addr, 4), opval);
3148 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3149 }
3150 {
3151 SI opval = GET_H_GR (ADDSI (FLD (f_rt), 1));
3152 SETMEMSI (current_cpu, pc, tmp_addr, opval);
3153 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3154 }
3155}
3156
3157#undef FLD
3158}
3159 NEXT (vpc);
3160
3161 CASE (sem, INSN_J) : /* j $jmptarg */
3162{
3163 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3164 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3165#define FLD(f) abuf->fields.sfmt_j.f
3166 int UNUSED written = 0;
3167 IADDR UNUSED pc = abuf->addr;
3168 SEM_BRANCH_INIT
3169 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3170
3171{
3172 {
3173 USI opval = FLD (i_jmptarg);
3174 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
3175 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3176 }
3177}
3178
3179 SEM_BRANCH_FINI (vpc);
3180#undef FLD
3181}
3182 NEXT (vpc);
3183
3184 CASE (sem, INSN_JAL) : /* jal $jmptarg */
3185{
3186 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3187 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3188#define FLD(f) abuf->fields.sfmt_j.f
3189 int UNUSED written = 0;
3190 IADDR UNUSED pc = abuf->addr;
3191 SEM_BRANCH_INIT
3192 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3193
3194{
3195{
3196 {
3197 SI opval = ADDSI (pc, 8);
3198 SET_H_GR (((UINT) 31), opval);
3199 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3200 }
3201 {
3202 USI opval = FLD (i_jmptarg);
3203 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
3204 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3205 }
3206}
3207}
3208
3209 SEM_BRANCH_FINI (vpc);
3210#undef FLD
3211}
3212 NEXT (vpc);
3213
3214 CASE (sem, INSN_BMB) : /* bmb $rs,$rt,$offset */
3215{
3216 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3217 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3218#define FLD(f) abuf->fields.sfmt_bbi.f
3219 int UNUSED written = 0;
3220 IADDR UNUSED pc = abuf->addr;
3221 SEM_BRANCH_INIT
3222 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3223
3224{
3225 BI tmp_branch_;
3226 tmp_branch_ = 0;
3227if (EQSI (ANDSI (GET_H_GR (FLD (f_rs)), 255), ANDSI (GET_H_GR (FLD (f_rt)), 255))) {
3228 tmp_branch_ = 1;
3229}
3230if (EQSI (ANDSI (GET_H_GR (FLD (f_rs)), 65280), ANDSI (GET_H_GR (FLD (f_rt)), 65280))) {
3231 tmp_branch_ = 1;
3232}
3233if (EQSI (ANDSI (GET_H_GR (FLD (f_rs)), 16711680), ANDSI (GET_H_GR (FLD (f_rt)), 16711680))) {
3234 tmp_branch_ = 1;
3235}
3236if (EQSI (ANDSI (GET_H_GR (FLD (f_rs)), 0xff000000), ANDSI (GET_H_GR (FLD (f_rt)), 0xff000000))) {
3237 tmp_branch_ = 1;
3238}
3239if (tmp_branch_) {
3240{
3241 {
3242 USI opval = FLD (i_offset);
3243 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
3244 written |= (1 << 3);
3245 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3246 }
3247}
3248}
3249}
3250
3251 abuf->written = written;
3252 SEM_BRANCH_FINI (vpc);
3253#undef FLD
3254}
3255 NEXT (vpc);
3256
3257
3258 }
3259 ENDSWITCH (sem) /* End of semantic switch. */
3260 ;
3261
3262 /* At this point `vpc' contains the next insn to execute. */
3263}
3264
3265#undef DEFINE_SWITCH
3266#endif /* DEFINE_SWITCH */
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