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Commit | Line | Data |
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c906108c SS |
1 | /* Simulator instruction decoder for m32rbf. |
2 | ||
3 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
4 | ||
5 | Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. | |
6 | ||
7 | This file is part of the GNU Simulators. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2, or (at your option) | |
12 | any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License along | |
20 | with this program; if not, write to the Free Software Foundation, Inc., | |
21 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
22 | ||
23 | */ | |
24 | ||
25 | #define WANT_CPU m32rbf | |
26 | #define WANT_CPU_M32RBF | |
27 | ||
28 | #include "sim-main.h" | |
29 | #include "sim-assert.h" | |
30 | ||
c906108c SS |
31 | /* The instruction descriptor array. |
32 | This is computed at runtime. Space for it is not malloc'd to save a | |
33 | teensy bit of cpu in the decoder. Moving it to malloc space is trivial | |
34 | but won't be done until necessary (we don't currently support the runtime | |
35 | addition of instructions nor an SMP machine with different cpus). */ | |
36 | static IDESC m32rbf_insn_data[M32RBF_INSN_MAX]; | |
37 | ||
c906108c SS |
38 | /* Commas between elements are contained in the macros. |
39 | Some of these are conditionally compiled out. */ | |
40 | ||
41 | static const struct insn_sem m32rbf_insn_sem[] = | |
42 | { | |
96baa820 JM |
43 | { VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY }, |
44 | { VIRTUAL_INSN_X_AFTER, M32RBF_INSN_X_AFTER, M32RBF_SFMT_EMPTY }, | |
45 | { VIRTUAL_INSN_X_BEFORE, M32RBF_INSN_X_BEFORE, M32RBF_SFMT_EMPTY }, | |
46 | { VIRTUAL_INSN_X_CTI_CHAIN, M32RBF_INSN_X_CTI_CHAIN, M32RBF_SFMT_EMPTY }, | |
47 | { VIRTUAL_INSN_X_CHAIN, M32RBF_INSN_X_CHAIN, M32RBF_SFMT_EMPTY }, | |
48 | { VIRTUAL_INSN_X_BEGIN, M32RBF_INSN_X_BEGIN, M32RBF_SFMT_EMPTY }, | |
49 | { M32R_INSN_ADD, M32RBF_INSN_ADD, M32RBF_SFMT_ADD }, | |
50 | { M32R_INSN_ADD3, M32RBF_INSN_ADD3, M32RBF_SFMT_ADD3 }, | |
51 | { M32R_INSN_AND, M32RBF_INSN_AND, M32RBF_SFMT_ADD }, | |
52 | { M32R_INSN_AND3, M32RBF_INSN_AND3, M32RBF_SFMT_AND3 }, | |
53 | { M32R_INSN_OR, M32RBF_INSN_OR, M32RBF_SFMT_ADD }, | |
54 | { M32R_INSN_OR3, M32RBF_INSN_OR3, M32RBF_SFMT_OR3 }, | |
55 | { M32R_INSN_XOR, M32RBF_INSN_XOR, M32RBF_SFMT_ADD }, | |
56 | { M32R_INSN_XOR3, M32RBF_INSN_XOR3, M32RBF_SFMT_AND3 }, | |
57 | { M32R_INSN_ADDI, M32RBF_INSN_ADDI, M32RBF_SFMT_ADDI }, | |
58 | { M32R_INSN_ADDV, M32RBF_INSN_ADDV, M32RBF_SFMT_ADDV }, | |
59 | { M32R_INSN_ADDV3, M32RBF_INSN_ADDV3, M32RBF_SFMT_ADDV3 }, | |
60 | { M32R_INSN_ADDX, M32RBF_INSN_ADDX, M32RBF_SFMT_ADDX }, | |
61 | { M32R_INSN_BC8, M32RBF_INSN_BC8, M32RBF_SFMT_BC8 }, | |
62 | { M32R_INSN_BC24, M32RBF_INSN_BC24, M32RBF_SFMT_BC24 }, | |
63 | { M32R_INSN_BEQ, M32RBF_INSN_BEQ, M32RBF_SFMT_BEQ }, | |
64 | { M32R_INSN_BEQZ, M32RBF_INSN_BEQZ, M32RBF_SFMT_BEQZ }, | |
65 | { M32R_INSN_BGEZ, M32RBF_INSN_BGEZ, M32RBF_SFMT_BEQZ }, | |
66 | { M32R_INSN_BGTZ, M32RBF_INSN_BGTZ, M32RBF_SFMT_BEQZ }, | |
67 | { M32R_INSN_BLEZ, M32RBF_INSN_BLEZ, M32RBF_SFMT_BEQZ }, | |
68 | { M32R_INSN_BLTZ, M32RBF_INSN_BLTZ, M32RBF_SFMT_BEQZ }, | |
69 | { M32R_INSN_BNEZ, M32RBF_INSN_BNEZ, M32RBF_SFMT_BEQZ }, | |
70 | { M32R_INSN_BL8, M32RBF_INSN_BL8, M32RBF_SFMT_BL8 }, | |
71 | { M32R_INSN_BL24, M32RBF_INSN_BL24, M32RBF_SFMT_BL24 }, | |
72 | { M32R_INSN_BNC8, M32RBF_INSN_BNC8, M32RBF_SFMT_BC8 }, | |
73 | { M32R_INSN_BNC24, M32RBF_INSN_BNC24, M32RBF_SFMT_BC24 }, | |
74 | { M32R_INSN_BNE, M32RBF_INSN_BNE, M32RBF_SFMT_BEQ }, | |
75 | { M32R_INSN_BRA8, M32RBF_INSN_BRA8, M32RBF_SFMT_BRA8 }, | |
76 | { M32R_INSN_BRA24, M32RBF_INSN_BRA24, M32RBF_SFMT_BRA24 }, | |
77 | { M32R_INSN_CMP, M32RBF_INSN_CMP, M32RBF_SFMT_CMP }, | |
78 | { M32R_INSN_CMPI, M32RBF_INSN_CMPI, M32RBF_SFMT_CMPI }, | |
79 | { M32R_INSN_CMPU, M32RBF_INSN_CMPU, M32RBF_SFMT_CMP }, | |
80 | { M32R_INSN_CMPUI, M32RBF_INSN_CMPUI, M32RBF_SFMT_CMPI }, | |
81 | { M32R_INSN_DIV, M32RBF_INSN_DIV, M32RBF_SFMT_DIV }, | |
82 | { M32R_INSN_DIVU, M32RBF_INSN_DIVU, M32RBF_SFMT_DIV }, | |
83 | { M32R_INSN_REM, M32RBF_INSN_REM, M32RBF_SFMT_DIV }, | |
84 | { M32R_INSN_REMU, M32RBF_INSN_REMU, M32RBF_SFMT_DIV }, | |
85 | { M32R_INSN_JL, M32RBF_INSN_JL, M32RBF_SFMT_JL }, | |
86 | { M32R_INSN_JMP, M32RBF_INSN_JMP, M32RBF_SFMT_JMP }, | |
87 | { M32R_INSN_LD, M32RBF_INSN_LD, M32RBF_SFMT_LD }, | |
88 | { M32R_INSN_LD_D, M32RBF_INSN_LD_D, M32RBF_SFMT_LD_D }, | |
89 | { M32R_INSN_LDB, M32RBF_INSN_LDB, M32RBF_SFMT_LD }, | |
90 | { M32R_INSN_LDB_D, M32RBF_INSN_LDB_D, M32RBF_SFMT_LD_D }, | |
91 | { M32R_INSN_LDH, M32RBF_INSN_LDH, M32RBF_SFMT_LD }, | |
92 | { M32R_INSN_LDH_D, M32RBF_INSN_LDH_D, M32RBF_SFMT_LD_D }, | |
93 | { M32R_INSN_LDUB, M32RBF_INSN_LDUB, M32RBF_SFMT_LD }, | |
94 | { M32R_INSN_LDUB_D, M32RBF_INSN_LDUB_D, M32RBF_SFMT_LD_D }, | |
95 | { M32R_INSN_LDUH, M32RBF_INSN_LDUH, M32RBF_SFMT_LD }, | |
96 | { M32R_INSN_LDUH_D, M32RBF_INSN_LDUH_D, M32RBF_SFMT_LD_D }, | |
97 | { M32R_INSN_LD_PLUS, M32RBF_INSN_LD_PLUS, M32RBF_SFMT_LD_PLUS }, | |
98 | { M32R_INSN_LD24, M32RBF_INSN_LD24, M32RBF_SFMT_LD24 }, | |
99 | { M32R_INSN_LDI8, M32RBF_INSN_LDI8, M32RBF_SFMT_LDI8 }, | |
100 | { M32R_INSN_LDI16, M32RBF_INSN_LDI16, M32RBF_SFMT_LDI16 }, | |
101 | { M32R_INSN_LOCK, M32RBF_INSN_LOCK, M32RBF_SFMT_LOCK }, | |
102 | { M32R_INSN_MACHI, M32RBF_INSN_MACHI, M32RBF_SFMT_MACHI }, | |
103 | { M32R_INSN_MACLO, M32RBF_INSN_MACLO, M32RBF_SFMT_MACHI }, | |
104 | { M32R_INSN_MACWHI, M32RBF_INSN_MACWHI, M32RBF_SFMT_MACHI }, | |
105 | { M32R_INSN_MACWLO, M32RBF_INSN_MACWLO, M32RBF_SFMT_MACHI }, | |
106 | { M32R_INSN_MUL, M32RBF_INSN_MUL, M32RBF_SFMT_ADD }, | |
107 | { M32R_INSN_MULHI, M32RBF_INSN_MULHI, M32RBF_SFMT_MULHI }, | |
108 | { M32R_INSN_MULLO, M32RBF_INSN_MULLO, M32RBF_SFMT_MULHI }, | |
109 | { M32R_INSN_MULWHI, M32RBF_INSN_MULWHI, M32RBF_SFMT_MULHI }, | |
110 | { M32R_INSN_MULWLO, M32RBF_INSN_MULWLO, M32RBF_SFMT_MULHI }, | |
111 | { M32R_INSN_MV, M32RBF_INSN_MV, M32RBF_SFMT_MV }, | |
112 | { M32R_INSN_MVFACHI, M32RBF_INSN_MVFACHI, M32RBF_SFMT_MVFACHI }, | |
113 | { M32R_INSN_MVFACLO, M32RBF_INSN_MVFACLO, M32RBF_SFMT_MVFACHI }, | |
114 | { M32R_INSN_MVFACMI, M32RBF_INSN_MVFACMI, M32RBF_SFMT_MVFACHI }, | |
115 | { M32R_INSN_MVFC, M32RBF_INSN_MVFC, M32RBF_SFMT_MVFC }, | |
116 | { M32R_INSN_MVTACHI, M32RBF_INSN_MVTACHI, M32RBF_SFMT_MVTACHI }, | |
117 | { M32R_INSN_MVTACLO, M32RBF_INSN_MVTACLO, M32RBF_SFMT_MVTACHI }, | |
118 | { M32R_INSN_MVTC, M32RBF_INSN_MVTC, M32RBF_SFMT_MVTC }, | |
119 | { M32R_INSN_NEG, M32RBF_INSN_NEG, M32RBF_SFMT_MV }, | |
120 | { M32R_INSN_NOP, M32RBF_INSN_NOP, M32RBF_SFMT_NOP }, | |
121 | { M32R_INSN_NOT, M32RBF_INSN_NOT, M32RBF_SFMT_MV }, | |
122 | { M32R_INSN_RAC, M32RBF_INSN_RAC, M32RBF_SFMT_RAC }, | |
123 | { M32R_INSN_RACH, M32RBF_INSN_RACH, M32RBF_SFMT_RAC }, | |
124 | { M32R_INSN_RTE, M32RBF_INSN_RTE, M32RBF_SFMT_RTE }, | |
125 | { M32R_INSN_SETH, M32RBF_INSN_SETH, M32RBF_SFMT_SETH }, | |
126 | { M32R_INSN_SLL, M32RBF_INSN_SLL, M32RBF_SFMT_ADD }, | |
127 | { M32R_INSN_SLL3, M32RBF_INSN_SLL3, M32RBF_SFMT_SLL3 }, | |
128 | { M32R_INSN_SLLI, M32RBF_INSN_SLLI, M32RBF_SFMT_SLLI }, | |
129 | { M32R_INSN_SRA, M32RBF_INSN_SRA, M32RBF_SFMT_ADD }, | |
130 | { M32R_INSN_SRA3, M32RBF_INSN_SRA3, M32RBF_SFMT_SLL3 }, | |
131 | { M32R_INSN_SRAI, M32RBF_INSN_SRAI, M32RBF_SFMT_SLLI }, | |
132 | { M32R_INSN_SRL, M32RBF_INSN_SRL, M32RBF_SFMT_ADD }, | |
133 | { M32R_INSN_SRL3, M32RBF_INSN_SRL3, M32RBF_SFMT_SLL3 }, | |
134 | { M32R_INSN_SRLI, M32RBF_INSN_SRLI, M32RBF_SFMT_SLLI }, | |
135 | { M32R_INSN_ST, M32RBF_INSN_ST, M32RBF_SFMT_ST }, | |
136 | { M32R_INSN_ST_D, M32RBF_INSN_ST_D, M32RBF_SFMT_ST_D }, | |
137 | { M32R_INSN_STB, M32RBF_INSN_STB, M32RBF_SFMT_STB }, | |
138 | { M32R_INSN_STB_D, M32RBF_INSN_STB_D, M32RBF_SFMT_STB_D }, | |
139 | { M32R_INSN_STH, M32RBF_INSN_STH, M32RBF_SFMT_STH }, | |
140 | { M32R_INSN_STH_D, M32RBF_INSN_STH_D, M32RBF_SFMT_STH_D }, | |
141 | { M32R_INSN_ST_PLUS, M32RBF_INSN_ST_PLUS, M32RBF_SFMT_ST_PLUS }, | |
142 | { M32R_INSN_ST_MINUS, M32RBF_INSN_ST_MINUS, M32RBF_SFMT_ST_PLUS }, | |
143 | { M32R_INSN_SUB, M32RBF_INSN_SUB, M32RBF_SFMT_ADD }, | |
144 | { M32R_INSN_SUBV, M32RBF_INSN_SUBV, M32RBF_SFMT_ADDV }, | |
145 | { M32R_INSN_SUBX, M32RBF_INSN_SUBX, M32RBF_SFMT_ADDX }, | |
146 | { M32R_INSN_TRAP, M32RBF_INSN_TRAP, M32RBF_SFMT_TRAP }, | |
147 | { M32R_INSN_UNLOCK, M32RBF_INSN_UNLOCK, M32RBF_SFMT_UNLOCK }, | |
c906108c SS |
148 | }; |
149 | ||
96baa820 JM |
150 | static const struct insn_sem m32rbf_insn_sem_invalid = { |
151 | VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY | |
c906108c SS |
152 | }; |
153 | ||
c906108c SS |
154 | /* Initialize an IDESC from the compile-time computable parts. */ |
155 | ||
156 | static INLINE void | |
157 | init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) | |
158 | { | |
159 | const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; | |
160 | ||
161 | id->num = t->index; | |
96baa820 | 162 | id->sfmt = t->sfmt; |
c906108c SS |
163 | if ((int) t->type <= 0) |
164 | id->idata = & cgen_virtual_insn_table[- (int) t->type]; | |
165 | else | |
166 | id->idata = & insn_table[t->type]; | |
167 | id->attrs = CGEN_INSN_ATTRS (id->idata); | |
168 | /* Oh my god, a magic number. */ | |
169 | id->length = CGEN_INSN_BITSIZE (id->idata) / 8; | |
96baa820 | 170 | |
c906108c SS |
171 | #if WITH_PROFILE_MODEL_P |
172 | id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; | |
173 | { | |
174 | SIM_DESC sd = CPU_STATE (cpu); | |
175 | SIM_ASSERT (t->index == id->timing->num); | |
176 | } | |
177 | #endif | |
96baa820 JM |
178 | |
179 | /* Semantic pointers are initialized elsewhere. */ | |
c906108c SS |
180 | } |
181 | ||
182 | /* Initialize the instruction descriptor table. */ | |
183 | ||
184 | void | |
185 | m32rbf_init_idesc_table (SIM_CPU *cpu) | |
186 | { | |
187 | IDESC *id,*tabend; | |
188 | const struct insn_sem *t,*tend; | |
189 | int tabsize = M32RBF_INSN_MAX; | |
190 | IDESC *table = m32rbf_insn_data; | |
191 | ||
192 | memset (table, 0, tabsize * sizeof (IDESC)); | |
193 | ||
194 | /* First set all entries to the `invalid insn'. */ | |
195 | t = & m32rbf_insn_sem_invalid; | |
196 | for (id = table, tabend = table + tabsize; id < tabend; ++id) | |
197 | init_idesc (cpu, id, t); | |
198 | ||
199 | /* Now fill in the values for the chosen cpu. */ | |
200 | for (t = m32rbf_insn_sem, tend = t + sizeof (m32rbf_insn_sem) / sizeof (*t); | |
201 | t != tend; ++t) | |
202 | { | |
203 | init_idesc (cpu, & table[t->index], t); | |
204 | } | |
205 | ||
206 | /* Link the IDESC table into the cpu. */ | |
207 | CPU_IDESC (cpu) = table; | |
208 | } | |
209 | ||
c906108c SS |
210 | /* Given an instruction, return a pointer to its IDESC entry. */ |
211 | ||
212 | const IDESC * | |
213 | m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, | |
214 | CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn, | |
215 | ARGBUF *abuf) | |
216 | { | |
7a292a7a SS |
217 | /* Result of decoder. */ |
218 | M32RBF_INSN_TYPE itype; | |
c906108c SS |
219 | |
220 | { | |
c906108c | 221 | CGEN_INSN_INT insn = base_insn; |
c906108c SS |
222 | |
223 | { | |
7a292a7a SS |
224 | unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0))); |
225 | switch (val) | |
226 | { | |
96baa820 JM |
227 | case 0 : itype = M32RBF_INSN_SUBV; goto extract_sfmt_addv; |
228 | case 1 : itype = M32RBF_INSN_SUBX; goto extract_sfmt_addx; | |
229 | case 2 : itype = M32RBF_INSN_SUB; goto extract_sfmt_add; | |
230 | case 3 : itype = M32RBF_INSN_NEG; goto extract_sfmt_mv; | |
231 | case 4 : itype = M32RBF_INSN_CMP; goto extract_sfmt_cmp; | |
232 | case 5 : itype = M32RBF_INSN_CMPU; goto extract_sfmt_cmp; | |
233 | case 8 : itype = M32RBF_INSN_ADDV; goto extract_sfmt_addv; | |
234 | case 9 : itype = M32RBF_INSN_ADDX; goto extract_sfmt_addx; | |
235 | case 10 : itype = M32RBF_INSN_ADD; goto extract_sfmt_add; | |
236 | case 11 : itype = M32RBF_INSN_NOT; goto extract_sfmt_mv; | |
237 | case 12 : itype = M32RBF_INSN_AND; goto extract_sfmt_add; | |
238 | case 13 : itype = M32RBF_INSN_XOR; goto extract_sfmt_add; | |
239 | case 14 : itype = M32RBF_INSN_OR; goto extract_sfmt_add; | |
240 | case 16 : itype = M32RBF_INSN_SRL; goto extract_sfmt_add; | |
241 | case 18 : itype = M32RBF_INSN_SRA; goto extract_sfmt_add; | |
242 | case 20 : itype = M32RBF_INSN_SLL; goto extract_sfmt_add; | |
243 | case 22 : itype = M32RBF_INSN_MUL; goto extract_sfmt_add; | |
244 | case 24 : itype = M32RBF_INSN_MV; goto extract_sfmt_mv; | |
245 | case 25 : itype = M32RBF_INSN_MVFC; goto extract_sfmt_mvfc; | |
246 | case 26 : itype = M32RBF_INSN_MVTC; goto extract_sfmt_mvtc; | |
7a292a7a | 247 | case 28 : |
c906108c | 248 | { |
7a292a7a SS |
249 | unsigned int val = (((insn >> 8) & (15 << 0))); |
250 | switch (val) | |
c906108c | 251 | { |
96baa820 JM |
252 | case 14 : itype = M32RBF_INSN_JL; goto extract_sfmt_jl; |
253 | case 15 : itype = M32RBF_INSN_JMP; goto extract_sfmt_jmp; | |
254 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 255 | } |
7a292a7a | 256 | } |
96baa820 JM |
257 | case 29 : itype = M32RBF_INSN_RTE; goto extract_sfmt_rte; |
258 | case 31 : itype = M32RBF_INSN_TRAP; goto extract_sfmt_trap; | |
259 | case 32 : itype = M32RBF_INSN_STB; goto extract_sfmt_stb; | |
260 | case 34 : itype = M32RBF_INSN_STH; goto extract_sfmt_sth; | |
261 | case 36 : itype = M32RBF_INSN_ST; goto extract_sfmt_st; | |
262 | case 37 : itype = M32RBF_INSN_UNLOCK; goto extract_sfmt_unlock; | |
263 | case 38 : itype = M32RBF_INSN_ST_PLUS; goto extract_sfmt_st_plus; | |
264 | case 39 : itype = M32RBF_INSN_ST_MINUS; goto extract_sfmt_st_plus; | |
265 | case 40 : itype = M32RBF_INSN_LDB; goto extract_sfmt_ld; | |
266 | case 41 : itype = M32RBF_INSN_LDUB; goto extract_sfmt_ld; | |
267 | case 42 : itype = M32RBF_INSN_LDH; goto extract_sfmt_ld; | |
268 | case 43 : itype = M32RBF_INSN_LDUH; goto extract_sfmt_ld; | |
269 | case 44 : itype = M32RBF_INSN_LD; goto extract_sfmt_ld; | |
270 | case 45 : itype = M32RBF_INSN_LOCK; goto extract_sfmt_lock; | |
271 | case 46 : itype = M32RBF_INSN_LD_PLUS; goto extract_sfmt_ld_plus; | |
272 | case 48 : itype = M32RBF_INSN_MULHI; goto extract_sfmt_mulhi; | |
273 | case 49 : itype = M32RBF_INSN_MULLO; goto extract_sfmt_mulhi; | |
274 | case 50 : itype = M32RBF_INSN_MULWHI; goto extract_sfmt_mulhi; | |
275 | case 51 : itype = M32RBF_INSN_MULWLO; goto extract_sfmt_mulhi; | |
276 | case 52 : itype = M32RBF_INSN_MACHI; goto extract_sfmt_machi; | |
277 | case 53 : itype = M32RBF_INSN_MACLO; goto extract_sfmt_machi; | |
278 | case 54 : itype = M32RBF_INSN_MACWHI; goto extract_sfmt_machi; | |
279 | case 55 : itype = M32RBF_INSN_MACWLO; goto extract_sfmt_machi; | |
7a292a7a SS |
280 | case 64 : /* fall through */ |
281 | case 65 : /* fall through */ | |
282 | case 66 : /* fall through */ | |
283 | case 67 : /* fall through */ | |
284 | case 68 : /* fall through */ | |
285 | case 69 : /* fall through */ | |
286 | case 70 : /* fall through */ | |
287 | case 71 : /* fall through */ | |
288 | case 72 : /* fall through */ | |
289 | case 73 : /* fall through */ | |
290 | case 74 : /* fall through */ | |
291 | case 75 : /* fall through */ | |
292 | case 76 : /* fall through */ | |
293 | case 77 : /* fall through */ | |
294 | case 78 : /* fall through */ | |
96baa820 | 295 | case 79 : itype = M32RBF_INSN_ADDI; goto extract_sfmt_addi; |
7a292a7a | 296 | case 80 : /* fall through */ |
96baa820 | 297 | case 81 : itype = M32RBF_INSN_SRLI; goto extract_sfmt_slli; |
7a292a7a | 298 | case 82 : /* fall through */ |
96baa820 | 299 | case 83 : itype = M32RBF_INSN_SRAI; goto extract_sfmt_slli; |
7a292a7a | 300 | case 84 : /* fall through */ |
96baa820 | 301 | case 85 : itype = M32RBF_INSN_SLLI; goto extract_sfmt_slli; |
7a292a7a SS |
302 | case 87 : |
303 | { | |
304 | unsigned int val = (((insn >> 0) & (15 << 0))); | |
305 | switch (val) | |
c906108c | 306 | { |
96baa820 JM |
307 | case 0 : itype = M32RBF_INSN_MVTACHI; goto extract_sfmt_mvtachi; |
308 | case 1 : itype = M32RBF_INSN_MVTACLO; goto extract_sfmt_mvtachi; | |
309 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 310 | } |
7a292a7a | 311 | } |
96baa820 JM |
312 | case 88 : itype = M32RBF_INSN_RACH; goto extract_sfmt_rac; |
313 | case 89 : itype = M32RBF_INSN_RAC; goto extract_sfmt_rac; | |
7a292a7a SS |
314 | case 95 : |
315 | { | |
316 | unsigned int val = (((insn >> 0) & (15 << 0))); | |
317 | switch (val) | |
c906108c | 318 | { |
96baa820 JM |
319 | case 0 : itype = M32RBF_INSN_MVFACHI; goto extract_sfmt_mvfachi; |
320 | case 1 : itype = M32RBF_INSN_MVFACLO; goto extract_sfmt_mvfachi; | |
321 | case 2 : itype = M32RBF_INSN_MVFACMI; goto extract_sfmt_mvfachi; | |
322 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 323 | } |
7a292a7a SS |
324 | } |
325 | case 96 : /* fall through */ | |
326 | case 97 : /* fall through */ | |
327 | case 98 : /* fall through */ | |
328 | case 99 : /* fall through */ | |
329 | case 100 : /* fall through */ | |
330 | case 101 : /* fall through */ | |
331 | case 102 : /* fall through */ | |
332 | case 103 : /* fall through */ | |
333 | case 104 : /* fall through */ | |
334 | case 105 : /* fall through */ | |
335 | case 106 : /* fall through */ | |
336 | case 107 : /* fall through */ | |
337 | case 108 : /* fall through */ | |
338 | case 109 : /* fall through */ | |
339 | case 110 : /* fall through */ | |
96baa820 | 340 | case 111 : itype = M32RBF_INSN_LDI8; goto extract_sfmt_ldi8; |
7a292a7a SS |
341 | case 112 : |
342 | { | |
343 | unsigned int val = (((insn >> 8) & (15 << 0))); | |
344 | switch (val) | |
c906108c | 345 | { |
96baa820 JM |
346 | case 0 : itype = M32RBF_INSN_NOP; goto extract_sfmt_nop; |
347 | case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8; | |
348 | case 13 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8; | |
349 | case 14 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8; | |
350 | case 15 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8; | |
351 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 352 | } |
7a292a7a SS |
353 | } |
354 | case 113 : /* fall through */ | |
355 | case 114 : /* fall through */ | |
356 | case 115 : /* fall through */ | |
357 | case 116 : /* fall through */ | |
358 | case 117 : /* fall through */ | |
359 | case 118 : /* fall through */ | |
360 | case 119 : /* fall through */ | |
361 | case 120 : /* fall through */ | |
362 | case 121 : /* fall through */ | |
363 | case 122 : /* fall through */ | |
364 | case 123 : /* fall through */ | |
365 | case 124 : /* fall through */ | |
366 | case 125 : /* fall through */ | |
367 | case 126 : /* fall through */ | |
368 | case 127 : | |
369 | { | |
370 | unsigned int val = (((insn >> 8) & (15 << 0))); | |
371 | switch (val) | |
c906108c | 372 | { |
96baa820 JM |
373 | case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8; |
374 | case 13 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8; | |
375 | case 14 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8; | |
376 | case 15 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8; | |
377 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 378 | } |
7a292a7a | 379 | } |
96baa820 JM |
380 | case 132 : itype = M32RBF_INSN_CMPI; goto extract_sfmt_cmpi; |
381 | case 133 : itype = M32RBF_INSN_CMPUI; goto extract_sfmt_cmpi; | |
382 | case 136 : itype = M32RBF_INSN_ADDV3; goto extract_sfmt_addv3; | |
383 | case 138 : itype = M32RBF_INSN_ADD3; goto extract_sfmt_add3; | |
384 | case 140 : itype = M32RBF_INSN_AND3; goto extract_sfmt_and3; | |
385 | case 141 : itype = M32RBF_INSN_XOR3; goto extract_sfmt_and3; | |
386 | case 142 : itype = M32RBF_INSN_OR3; goto extract_sfmt_or3; | |
387 | case 144 : itype = M32RBF_INSN_DIV; goto extract_sfmt_div; | |
388 | case 145 : itype = M32RBF_INSN_DIVU; goto extract_sfmt_div; | |
389 | case 146 : itype = M32RBF_INSN_REM; goto extract_sfmt_div; | |
390 | case 147 : itype = M32RBF_INSN_REMU; goto extract_sfmt_div; | |
391 | case 152 : itype = M32RBF_INSN_SRL3; goto extract_sfmt_sll3; | |
392 | case 154 : itype = M32RBF_INSN_SRA3; goto extract_sfmt_sll3; | |
393 | case 156 : itype = M32RBF_INSN_SLL3; goto extract_sfmt_sll3; | |
394 | case 159 : itype = M32RBF_INSN_LDI16; goto extract_sfmt_ldi16; | |
395 | case 160 : itype = M32RBF_INSN_STB_D; goto extract_sfmt_stb_d; | |
396 | case 162 : itype = M32RBF_INSN_STH_D; goto extract_sfmt_sth_d; | |
397 | case 164 : itype = M32RBF_INSN_ST_D; goto extract_sfmt_st_d; | |
398 | case 168 : itype = M32RBF_INSN_LDB_D; goto extract_sfmt_ld_d; | |
399 | case 169 : itype = M32RBF_INSN_LDUB_D; goto extract_sfmt_ld_d; | |
400 | case 170 : itype = M32RBF_INSN_LDH_D; goto extract_sfmt_ld_d; | |
401 | case 171 : itype = M32RBF_INSN_LDUH_D; goto extract_sfmt_ld_d; | |
402 | case 172 : itype = M32RBF_INSN_LD_D; goto extract_sfmt_ld_d; | |
403 | case 176 : itype = M32RBF_INSN_BEQ; goto extract_sfmt_beq; | |
404 | case 177 : itype = M32RBF_INSN_BNE; goto extract_sfmt_beq; | |
405 | case 184 : itype = M32RBF_INSN_BEQZ; goto extract_sfmt_beqz; | |
406 | case 185 : itype = M32RBF_INSN_BNEZ; goto extract_sfmt_beqz; | |
407 | case 186 : itype = M32RBF_INSN_BLTZ; goto extract_sfmt_beqz; | |
408 | case 187 : itype = M32RBF_INSN_BGEZ; goto extract_sfmt_beqz; | |
409 | case 188 : itype = M32RBF_INSN_BLEZ; goto extract_sfmt_beqz; | |
410 | case 189 : itype = M32RBF_INSN_BGTZ; goto extract_sfmt_beqz; | |
411 | case 220 : itype = M32RBF_INSN_SETH; goto extract_sfmt_seth; | |
7a292a7a SS |
412 | case 224 : /* fall through */ |
413 | case 225 : /* fall through */ | |
414 | case 226 : /* fall through */ | |
415 | case 227 : /* fall through */ | |
416 | case 228 : /* fall through */ | |
417 | case 229 : /* fall through */ | |
418 | case 230 : /* fall through */ | |
419 | case 231 : /* fall through */ | |
420 | case 232 : /* fall through */ | |
421 | case 233 : /* fall through */ | |
422 | case 234 : /* fall through */ | |
423 | case 235 : /* fall through */ | |
424 | case 236 : /* fall through */ | |
425 | case 237 : /* fall through */ | |
426 | case 238 : /* fall through */ | |
96baa820 | 427 | case 239 : itype = M32RBF_INSN_LD24; goto extract_sfmt_ld24; |
7a292a7a SS |
428 | case 240 : /* fall through */ |
429 | case 241 : /* fall through */ | |
430 | case 242 : /* fall through */ | |
431 | case 243 : /* fall through */ | |
432 | case 244 : /* fall through */ | |
433 | case 245 : /* fall through */ | |
434 | case 246 : /* fall through */ | |
435 | case 247 : /* fall through */ | |
436 | case 248 : /* fall through */ | |
437 | case 249 : /* fall through */ | |
438 | case 250 : /* fall through */ | |
439 | case 251 : /* fall through */ | |
440 | case 252 : /* fall through */ | |
441 | case 253 : /* fall through */ | |
442 | case 254 : /* fall through */ | |
443 | case 255 : | |
444 | { | |
445 | unsigned int val = (((insn >> 8) & (15 << 0))); | |
446 | switch (val) | |
c906108c | 447 | { |
96baa820 JM |
448 | case 12 : itype = M32RBF_INSN_BC24; goto extract_sfmt_bc24; |
449 | case 13 : itype = M32RBF_INSN_BNC24; goto extract_sfmt_bc24; | |
450 | case 14 : itype = M32RBF_INSN_BL24; goto extract_sfmt_bl24; | |
451 | case 15 : itype = M32RBF_INSN_BRA24; goto extract_sfmt_bra24; | |
452 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 453 | } |
c906108c | 454 | } |
96baa820 | 455 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
7a292a7a | 456 | } |
c906108c | 457 | } |
c906108c SS |
458 | } |
459 | ||
460 | /* The instruction has been decoded, now extract the fields. */ | |
461 | ||
96baa820 | 462 | extract_sfmt_empty: |
c906108c | 463 | { |
7a292a7a | 464 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c SS |
465 | CGEN_INSN_INT insn = entire_insn; |
466 | #define FLD(f) abuf->fields.fmt_empty.f | |
c906108c | 467 | |
c906108c SS |
468 | |
469 | /* Record the fields for the semantic handler. */ | |
96baa820 | 470 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); |
c906108c SS |
471 | |
472 | #undef FLD | |
7a292a7a | 473 | return idesc; |
c906108c SS |
474 | } |
475 | ||
96baa820 | 476 | extract_sfmt_add: |
c906108c | 477 | { |
7a292a7a | 478 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 479 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
480 | #define FLD(f) abuf->fields.sfmt_add.f |
481 | UINT f_r1; | |
482 | UINT f_r2; | |
c906108c | 483 | |
96baa820 JM |
484 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
485 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
486 | |
487 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
488 | FLD (f_r1) = f_r1; |
489 | FLD (f_r2) = f_r2; | |
c906108c SS |
490 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
491 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 492 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
493 | |
494 | #if WITH_PROFILE_MODEL_P | |
495 | /* Record the fields for profiling. */ | |
496 | if (PROFILE_MODEL_P (current_cpu)) | |
497 | { | |
498 | FLD (in_dr) = f_r1; | |
499 | FLD (in_sr) = f_r2; | |
500 | FLD (out_dr) = f_r1; | |
501 | } | |
502 | #endif | |
503 | #undef FLD | |
7a292a7a | 504 | return idesc; |
c906108c SS |
505 | } |
506 | ||
96baa820 | 507 | extract_sfmt_add3: |
c906108c | 508 | { |
7a292a7a | 509 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 510 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
511 | #define FLD(f) abuf->fields.sfmt_add3.f |
512 | UINT f_r1; | |
513 | UINT f_r2; | |
514 | INT f_simm16; | |
c906108c | 515 | |
96baa820 JM |
516 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
517 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
518 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
519 | |
520 | /* Record the fields for the semantic handler. */ | |
521 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
522 | FLD (f_r2) = f_r2; |
523 | FLD (f_r1) = f_r1; | |
c906108c SS |
524 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
525 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 526 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
527 | |
528 | #if WITH_PROFILE_MODEL_P | |
529 | /* Record the fields for profiling. */ | |
530 | if (PROFILE_MODEL_P (current_cpu)) | |
531 | { | |
532 | FLD (in_sr) = f_r2; | |
533 | FLD (out_dr) = f_r1; | |
534 | } | |
535 | #endif | |
536 | #undef FLD | |
7a292a7a | 537 | return idesc; |
c906108c SS |
538 | } |
539 | ||
96baa820 | 540 | extract_sfmt_and3: |
c906108c | 541 | { |
7a292a7a | 542 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 543 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
544 | #define FLD(f) abuf->fields.sfmt_and3.f |
545 | UINT f_r1; | |
546 | UINT f_r2; | |
547 | UINT f_uimm16; | |
c906108c | 548 | |
96baa820 JM |
549 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
550 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
551 | f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); | |
c906108c SS |
552 | |
553 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 554 | FLD (f_r2) = f_r2; |
c906108c | 555 | FLD (f_uimm16) = f_uimm16; |
de8f5985 | 556 | FLD (f_r1) = f_r1; |
c906108c SS |
557 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
558 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 559 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
560 | |
561 | #if WITH_PROFILE_MODEL_P | |
562 | /* Record the fields for profiling. */ | |
563 | if (PROFILE_MODEL_P (current_cpu)) | |
564 | { | |
565 | FLD (in_sr) = f_r2; | |
566 | FLD (out_dr) = f_r1; | |
567 | } | |
568 | #endif | |
569 | #undef FLD | |
7a292a7a | 570 | return idesc; |
c906108c SS |
571 | } |
572 | ||
96baa820 | 573 | extract_sfmt_or3: |
c906108c | 574 | { |
7a292a7a | 575 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 576 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
577 | #define FLD(f) abuf->fields.sfmt_and3.f |
578 | UINT f_r1; | |
579 | UINT f_r2; | |
580 | UINT f_uimm16; | |
c906108c | 581 | |
96baa820 JM |
582 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
583 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
584 | f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); | |
c906108c SS |
585 | |
586 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 587 | FLD (f_r2) = f_r2; |
c906108c | 588 | FLD (f_uimm16) = f_uimm16; |
de8f5985 | 589 | FLD (f_r1) = f_r1; |
c906108c SS |
590 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
591 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 592 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
593 | |
594 | #if WITH_PROFILE_MODEL_P | |
595 | /* Record the fields for profiling. */ | |
596 | if (PROFILE_MODEL_P (current_cpu)) | |
597 | { | |
598 | FLD (in_sr) = f_r2; | |
599 | FLD (out_dr) = f_r1; | |
600 | } | |
601 | #endif | |
602 | #undef FLD | |
7a292a7a | 603 | return idesc; |
c906108c SS |
604 | } |
605 | ||
96baa820 | 606 | extract_sfmt_addi: |
c906108c | 607 | { |
7a292a7a | 608 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 609 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
610 | #define FLD(f) abuf->fields.sfmt_addi.f |
611 | UINT f_r1; | |
612 | INT f_simm8; | |
c906108c | 613 | |
96baa820 JM |
614 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
615 | f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); | |
c906108c SS |
616 | |
617 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 618 | FLD (f_r1) = f_r1; |
c906108c SS |
619 | FLD (f_simm8) = f_simm8; |
620 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 621 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_r1 0x%x", 'x', f_r1, "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
622 | |
623 | #if WITH_PROFILE_MODEL_P | |
624 | /* Record the fields for profiling. */ | |
625 | if (PROFILE_MODEL_P (current_cpu)) | |
626 | { | |
627 | FLD (in_dr) = f_r1; | |
628 | FLD (out_dr) = f_r1; | |
629 | } | |
630 | #endif | |
631 | #undef FLD | |
7a292a7a | 632 | return idesc; |
c906108c SS |
633 | } |
634 | ||
96baa820 | 635 | extract_sfmt_addv: |
c906108c | 636 | { |
7a292a7a | 637 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 638 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
639 | #define FLD(f) abuf->fields.sfmt_add.f |
640 | UINT f_r1; | |
641 | UINT f_r2; | |
c906108c | 642 | |
96baa820 JM |
643 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
644 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
645 | |
646 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
647 | FLD (f_r1) = f_r1; |
648 | FLD (f_r2) = f_r2; | |
c906108c SS |
649 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
650 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 651 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
652 | |
653 | #if WITH_PROFILE_MODEL_P | |
654 | /* Record the fields for profiling. */ | |
655 | if (PROFILE_MODEL_P (current_cpu)) | |
656 | { | |
657 | FLD (in_dr) = f_r1; | |
658 | FLD (in_sr) = f_r2; | |
659 | FLD (out_dr) = f_r1; | |
660 | } | |
661 | #endif | |
662 | #undef FLD | |
7a292a7a | 663 | return idesc; |
c906108c SS |
664 | } |
665 | ||
96baa820 | 666 | extract_sfmt_addv3: |
c906108c | 667 | { |
7a292a7a | 668 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 669 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
670 | #define FLD(f) abuf->fields.sfmt_add3.f |
671 | UINT f_r1; | |
672 | UINT f_r2; | |
673 | INT f_simm16; | |
c906108c | 674 | |
96baa820 JM |
675 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
676 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
677 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
678 | |
679 | /* Record the fields for the semantic handler. */ | |
680 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
681 | FLD (f_r2) = f_r2; |
682 | FLD (f_r1) = f_r1; | |
c906108c SS |
683 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
684 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 685 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
686 | |
687 | #if WITH_PROFILE_MODEL_P | |
688 | /* Record the fields for profiling. */ | |
689 | if (PROFILE_MODEL_P (current_cpu)) | |
690 | { | |
691 | FLD (in_sr) = f_r2; | |
692 | FLD (out_dr) = f_r1; | |
693 | } | |
694 | #endif | |
695 | #undef FLD | |
7a292a7a | 696 | return idesc; |
c906108c SS |
697 | } |
698 | ||
96baa820 | 699 | extract_sfmt_addx: |
c906108c | 700 | { |
7a292a7a | 701 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 702 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
703 | #define FLD(f) abuf->fields.sfmt_add.f |
704 | UINT f_r1; | |
705 | UINT f_r2; | |
c906108c | 706 | |
96baa820 JM |
707 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
708 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
709 | |
710 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
711 | FLD (f_r1) = f_r1; |
712 | FLD (f_r2) = f_r2; | |
c906108c SS |
713 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
714 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 715 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
716 | |
717 | #if WITH_PROFILE_MODEL_P | |
718 | /* Record the fields for profiling. */ | |
719 | if (PROFILE_MODEL_P (current_cpu)) | |
720 | { | |
721 | FLD (in_dr) = f_r1; | |
722 | FLD (in_sr) = f_r2; | |
723 | FLD (out_dr) = f_r1; | |
724 | } | |
725 | #endif | |
726 | #undef FLD | |
7a292a7a | 727 | return idesc; |
c906108c SS |
728 | } |
729 | ||
96baa820 | 730 | extract_sfmt_bc8: |
c906108c | 731 | { |
7a292a7a | 732 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 733 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
734 | #define FLD(f) abuf->fields.sfmt_bl8.f |
735 | SI f_disp8; | |
c906108c | 736 | |
96baa820 | 737 | f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); |
c906108c SS |
738 | |
739 | /* Record the fields for the semantic handler. */ | |
740 | FLD (i_disp8) = f_disp8; | |
96baa820 | 741 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); |
c906108c SS |
742 | |
743 | #if WITH_PROFILE_MODEL_P | |
744 | /* Record the fields for profiling. */ | |
745 | if (PROFILE_MODEL_P (current_cpu)) | |
746 | { | |
747 | } | |
748 | #endif | |
749 | #undef FLD | |
7a292a7a | 750 | return idesc; |
c906108c SS |
751 | } |
752 | ||
96baa820 | 753 | extract_sfmt_bc24: |
c906108c | 754 | { |
7a292a7a | 755 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 756 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
757 | #define FLD(f) abuf->fields.sfmt_bl24.f |
758 | SI f_disp24; | |
c906108c | 759 | |
96baa820 | 760 | f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); |
c906108c SS |
761 | |
762 | /* Record the fields for the semantic handler. */ | |
763 | FLD (i_disp24) = f_disp24; | |
96baa820 | 764 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); |
c906108c SS |
765 | |
766 | #if WITH_PROFILE_MODEL_P | |
767 | /* Record the fields for profiling. */ | |
768 | if (PROFILE_MODEL_P (current_cpu)) | |
769 | { | |
770 | } | |
771 | #endif | |
772 | #undef FLD | |
7a292a7a | 773 | return idesc; |
c906108c SS |
774 | } |
775 | ||
96baa820 | 776 | extract_sfmt_beq: |
c906108c | 777 | { |
7a292a7a | 778 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 779 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
780 | #define FLD(f) abuf->fields.sfmt_beq.f |
781 | UINT f_r1; | |
782 | UINT f_r2; | |
783 | SI f_disp16; | |
c906108c | 784 | |
96baa820 JM |
785 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
786 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
787 | f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); | |
c906108c SS |
788 | |
789 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
790 | FLD (f_r1) = f_r1; |
791 | FLD (f_r2) = f_r2; | |
c906108c SS |
792 | FLD (i_disp16) = f_disp16; |
793 | FLD (i_src1) = & CPU (h_gr)[f_r1]; | |
794 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 795 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
796 | |
797 | #if WITH_PROFILE_MODEL_P | |
798 | /* Record the fields for profiling. */ | |
799 | if (PROFILE_MODEL_P (current_cpu)) | |
800 | { | |
801 | FLD (in_src1) = f_r1; | |
802 | FLD (in_src2) = f_r2; | |
803 | } | |
804 | #endif | |
805 | #undef FLD | |
7a292a7a | 806 | return idesc; |
c906108c SS |
807 | } |
808 | ||
96baa820 | 809 | extract_sfmt_beqz: |
c906108c | 810 | { |
7a292a7a | 811 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 812 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
813 | #define FLD(f) abuf->fields.sfmt_beq.f |
814 | UINT f_r2; | |
815 | SI f_disp16; | |
c906108c | 816 | |
96baa820 JM |
817 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); |
818 | f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); | |
c906108c SS |
819 | |
820 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 821 | FLD (f_r2) = f_r2; |
c906108c SS |
822 | FLD (i_disp16) = f_disp16; |
823 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 824 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
825 | |
826 | #if WITH_PROFILE_MODEL_P | |
827 | /* Record the fields for profiling. */ | |
828 | if (PROFILE_MODEL_P (current_cpu)) | |
829 | { | |
830 | FLD (in_src2) = f_r2; | |
831 | } | |
832 | #endif | |
833 | #undef FLD | |
7a292a7a | 834 | return idesc; |
c906108c SS |
835 | } |
836 | ||
96baa820 | 837 | extract_sfmt_bl8: |
c906108c | 838 | { |
7a292a7a | 839 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 840 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
841 | #define FLD(f) abuf->fields.sfmt_bl8.f |
842 | SI f_disp8; | |
c906108c | 843 | |
96baa820 | 844 | f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); |
c906108c SS |
845 | |
846 | /* Record the fields for the semantic handler. */ | |
847 | FLD (i_disp8) = f_disp8; | |
96baa820 | 848 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); |
c906108c SS |
849 | |
850 | #if WITH_PROFILE_MODEL_P | |
851 | /* Record the fields for profiling. */ | |
852 | if (PROFILE_MODEL_P (current_cpu)) | |
853 | { | |
854 | FLD (out_h_gr_14) = 14; | |
855 | } | |
856 | #endif | |
857 | #undef FLD | |
7a292a7a | 858 | return idesc; |
c906108c SS |
859 | } |
860 | ||
96baa820 | 861 | extract_sfmt_bl24: |
c906108c | 862 | { |
7a292a7a | 863 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 864 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
865 | #define FLD(f) abuf->fields.sfmt_bl24.f |
866 | SI f_disp24; | |
c906108c | 867 | |
96baa820 | 868 | f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); |
c906108c SS |
869 | |
870 | /* Record the fields for the semantic handler. */ | |
871 | FLD (i_disp24) = f_disp24; | |
96baa820 | 872 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); |
c906108c SS |
873 | |
874 | #if WITH_PROFILE_MODEL_P | |
875 | /* Record the fields for profiling. */ | |
876 | if (PROFILE_MODEL_P (current_cpu)) | |
877 | { | |
878 | FLD (out_h_gr_14) = 14; | |
879 | } | |
880 | #endif | |
881 | #undef FLD | |
7a292a7a | 882 | return idesc; |
c906108c SS |
883 | } |
884 | ||
96baa820 | 885 | extract_sfmt_bra8: |
c906108c | 886 | { |
7a292a7a | 887 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 888 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
889 | #define FLD(f) abuf->fields.sfmt_bl8.f |
890 | SI f_disp8; | |
c906108c | 891 | |
96baa820 | 892 | f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); |
c906108c SS |
893 | |
894 | /* Record the fields for the semantic handler. */ | |
895 | FLD (i_disp8) = f_disp8; | |
96baa820 | 896 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); |
c906108c SS |
897 | |
898 | #if WITH_PROFILE_MODEL_P | |
899 | /* Record the fields for profiling. */ | |
900 | if (PROFILE_MODEL_P (current_cpu)) | |
901 | { | |
902 | } | |
903 | #endif | |
904 | #undef FLD | |
7a292a7a | 905 | return idesc; |
c906108c SS |
906 | } |
907 | ||
96baa820 | 908 | extract_sfmt_bra24: |
c906108c | 909 | { |
7a292a7a | 910 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 911 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
912 | #define FLD(f) abuf->fields.sfmt_bl24.f |
913 | SI f_disp24; | |
c906108c | 914 | |
96baa820 | 915 | f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); |
c906108c SS |
916 | |
917 | /* Record the fields for the semantic handler. */ | |
918 | FLD (i_disp24) = f_disp24; | |
96baa820 | 919 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); |
c906108c SS |
920 | |
921 | #if WITH_PROFILE_MODEL_P | |
922 | /* Record the fields for profiling. */ | |
923 | if (PROFILE_MODEL_P (current_cpu)) | |
924 | { | |
925 | } | |
926 | #endif | |
927 | #undef FLD | |
7a292a7a | 928 | return idesc; |
c906108c SS |
929 | } |
930 | ||
96baa820 | 931 | extract_sfmt_cmp: |
c906108c | 932 | { |
7a292a7a | 933 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 934 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
935 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
936 | UINT f_r1; | |
937 | UINT f_r2; | |
c906108c | 938 | |
96baa820 JM |
939 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
940 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
941 | |
942 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
943 | FLD (f_r1) = f_r1; |
944 | FLD (f_r2) = f_r2; | |
c906108c SS |
945 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
946 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 947 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
948 | |
949 | #if WITH_PROFILE_MODEL_P | |
950 | /* Record the fields for profiling. */ | |
951 | if (PROFILE_MODEL_P (current_cpu)) | |
952 | { | |
953 | FLD (in_src1) = f_r1; | |
954 | FLD (in_src2) = f_r2; | |
955 | } | |
956 | #endif | |
957 | #undef FLD | |
7a292a7a | 958 | return idesc; |
c906108c SS |
959 | } |
960 | ||
96baa820 | 961 | extract_sfmt_cmpi: |
c906108c | 962 | { |
7a292a7a | 963 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 964 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
965 | #define FLD(f) abuf->fields.sfmt_st_d.f |
966 | UINT f_r2; | |
967 | INT f_simm16; | |
c906108c | 968 | |
96baa820 JM |
969 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); |
970 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
971 | |
972 | /* Record the fields for the semantic handler. */ | |
973 | FLD (f_simm16) = f_simm16; | |
de8f5985 | 974 | FLD (f_r2) = f_r2; |
c906108c | 975 | FLD (i_src2) = & CPU (h_gr)[f_r2]; |
de8f5985 | 976 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
977 | |
978 | #if WITH_PROFILE_MODEL_P | |
979 | /* Record the fields for profiling. */ | |
980 | if (PROFILE_MODEL_P (current_cpu)) | |
981 | { | |
982 | FLD (in_src2) = f_r2; | |
983 | } | |
984 | #endif | |
985 | #undef FLD | |
7a292a7a | 986 | return idesc; |
c906108c SS |
987 | } |
988 | ||
96baa820 | 989 | extract_sfmt_div: |
c906108c | 990 | { |
7a292a7a | 991 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 992 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
993 | #define FLD(f) abuf->fields.sfmt_add.f |
994 | UINT f_r1; | |
995 | UINT f_r2; | |
c906108c | 996 | |
96baa820 JM |
997 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
998 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
c906108c SS |
999 | |
1000 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1001 | FLD (f_r1) = f_r1; |
1002 | FLD (f_r2) = f_r2; | |
c906108c SS |
1003 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
1004 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1005 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1006 | |
1007 | #if WITH_PROFILE_MODEL_P | |
1008 | /* Record the fields for profiling. */ | |
1009 | if (PROFILE_MODEL_P (current_cpu)) | |
1010 | { | |
1011 | FLD (in_dr) = f_r1; | |
1012 | FLD (in_sr) = f_r2; | |
1013 | FLD (out_dr) = f_r1; | |
1014 | } | |
1015 | #endif | |
1016 | #undef FLD | |
7a292a7a | 1017 | return idesc; |
c906108c SS |
1018 | } |
1019 | ||
96baa820 | 1020 | extract_sfmt_jl: |
c906108c | 1021 | { |
7a292a7a | 1022 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1023 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1024 | #define FLD(f) abuf->fields.sfmt_jl.f |
1025 | UINT f_r2; | |
c906108c | 1026 | |
96baa820 | 1027 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); |
c906108c SS |
1028 | |
1029 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1030 | FLD (f_r2) = f_r2; |
c906108c | 1031 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
de8f5985 | 1032 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jl", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1033 | |
1034 | #if WITH_PROFILE_MODEL_P | |
1035 | /* Record the fields for profiling. */ | |
1036 | if (PROFILE_MODEL_P (current_cpu)) | |
1037 | { | |
1038 | FLD (in_sr) = f_r2; | |
1039 | FLD (out_h_gr_14) = 14; | |
1040 | } | |
1041 | #endif | |
1042 | #undef FLD | |
7a292a7a | 1043 | return idesc; |
c906108c SS |
1044 | } |
1045 | ||
96baa820 | 1046 | extract_sfmt_jmp: |
c906108c | 1047 | { |
7a292a7a | 1048 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1049 | CGEN_INSN_INT insn = entire_insn; |
de8f5985 | 1050 | #define FLD(f) abuf->fields.sfmt_jl.f |
96baa820 | 1051 | UINT f_r2; |
c906108c | 1052 | |
96baa820 | 1053 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); |
c906108c SS |
1054 | |
1055 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1056 | FLD (f_r2) = f_r2; |
c906108c | 1057 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
de8f5985 | 1058 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1059 | |
1060 | #if WITH_PROFILE_MODEL_P | |
1061 | /* Record the fields for profiling. */ | |
1062 | if (PROFILE_MODEL_P (current_cpu)) | |
1063 | { | |
1064 | FLD (in_sr) = f_r2; | |
c906108c SS |
1065 | } |
1066 | #endif | |
1067 | #undef FLD | |
7a292a7a | 1068 | return idesc; |
c906108c SS |
1069 | } |
1070 | ||
96baa820 | 1071 | extract_sfmt_ld: |
c906108c | 1072 | { |
7a292a7a | 1073 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1074 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1075 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1076 | UINT f_r1; | |
1077 | UINT f_r2; | |
c906108c | 1078 | |
96baa820 JM |
1079 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1080 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1081 | |
1082 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1083 | FLD (f_r2) = f_r2; |
1084 | FLD (f_r1) = f_r1; | |
c906108c SS |
1085 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1086 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1087 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1088 | |
1089 | #if WITH_PROFILE_MODEL_P | |
1090 | /* Record the fields for profiling. */ | |
1091 | if (PROFILE_MODEL_P (current_cpu)) | |
1092 | { | |
1093 | FLD (in_sr) = f_r2; | |
1094 | FLD (out_dr) = f_r1; | |
1095 | } | |
1096 | #endif | |
1097 | #undef FLD | |
7a292a7a | 1098 | return idesc; |
c906108c SS |
1099 | } |
1100 | ||
96baa820 | 1101 | extract_sfmt_ld_d: |
c906108c | 1102 | { |
7a292a7a | 1103 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1104 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1105 | #define FLD(f) abuf->fields.sfmt_add3.f |
1106 | UINT f_r1; | |
1107 | UINT f_r2; | |
1108 | INT f_simm16; | |
c906108c | 1109 | |
96baa820 JM |
1110 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1111 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1112 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1113 | |
1114 | /* Record the fields for the semantic handler. */ | |
1115 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1116 | FLD (f_r2) = f_r2; |
1117 | FLD (f_r1) = f_r1; | |
c906108c SS |
1118 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1119 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1120 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1121 | |
1122 | #if WITH_PROFILE_MODEL_P | |
1123 | /* Record the fields for profiling. */ | |
1124 | if (PROFILE_MODEL_P (current_cpu)) | |
1125 | { | |
1126 | FLD (in_sr) = f_r2; | |
1127 | FLD (out_dr) = f_r1; | |
1128 | } | |
1129 | #endif | |
1130 | #undef FLD | |
7a292a7a | 1131 | return idesc; |
c906108c SS |
1132 | } |
1133 | ||
96baa820 | 1134 | extract_sfmt_ld_plus: |
c906108c | 1135 | { |
7a292a7a | 1136 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1137 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1138 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1139 | UINT f_r1; | |
1140 | UINT f_r2; | |
c906108c | 1141 | |
96baa820 JM |
1142 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1143 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1144 | |
1145 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1146 | FLD (f_r2) = f_r2; |
1147 | FLD (f_r1) = f_r1; | |
c906108c SS |
1148 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1149 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1150 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1151 | |
1152 | #if WITH_PROFILE_MODEL_P | |
1153 | /* Record the fields for profiling. */ | |
1154 | if (PROFILE_MODEL_P (current_cpu)) | |
1155 | { | |
1156 | FLD (in_sr) = f_r2; | |
1157 | FLD (out_dr) = f_r1; | |
1158 | FLD (out_sr) = f_r2; | |
1159 | } | |
1160 | #endif | |
1161 | #undef FLD | |
7a292a7a | 1162 | return idesc; |
c906108c SS |
1163 | } |
1164 | ||
96baa820 | 1165 | extract_sfmt_ld24: |
c906108c | 1166 | { |
7a292a7a | 1167 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1168 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1169 | #define FLD(f) abuf->fields.sfmt_ld24.f |
1170 | UINT f_r1; | |
1171 | UINT f_uimm24; | |
c906108c | 1172 | |
96baa820 JM |
1173 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1174 | f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24); | |
c906108c SS |
1175 | |
1176 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1177 | FLD (f_r1) = f_r1; |
c906108c SS |
1178 | FLD (i_uimm24) = f_uimm24; |
1179 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1180 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1181 | |
1182 | #if WITH_PROFILE_MODEL_P | |
1183 | /* Record the fields for profiling. */ | |
1184 | if (PROFILE_MODEL_P (current_cpu)) | |
1185 | { | |
1186 | FLD (out_dr) = f_r1; | |
1187 | } | |
1188 | #endif | |
1189 | #undef FLD | |
7a292a7a | 1190 | return idesc; |
c906108c SS |
1191 | } |
1192 | ||
96baa820 | 1193 | extract_sfmt_ldi8: |
c906108c | 1194 | { |
7a292a7a | 1195 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1196 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1197 | #define FLD(f) abuf->fields.sfmt_addi.f |
1198 | UINT f_r1; | |
1199 | INT f_simm8; | |
c906108c | 1200 | |
96baa820 JM |
1201 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1202 | f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); | |
c906108c SS |
1203 | |
1204 | /* Record the fields for the semantic handler. */ | |
1205 | FLD (f_simm8) = f_simm8; | |
de8f5985 | 1206 | FLD (f_r1) = f_r1; |
c906108c | 1207 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1208 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1209 | |
1210 | #if WITH_PROFILE_MODEL_P | |
1211 | /* Record the fields for profiling. */ | |
1212 | if (PROFILE_MODEL_P (current_cpu)) | |
1213 | { | |
1214 | FLD (out_dr) = f_r1; | |
1215 | } | |
1216 | #endif | |
1217 | #undef FLD | |
7a292a7a | 1218 | return idesc; |
c906108c SS |
1219 | } |
1220 | ||
96baa820 | 1221 | extract_sfmt_ldi16: |
c906108c | 1222 | { |
7a292a7a | 1223 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1224 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1225 | #define FLD(f) abuf->fields.sfmt_add3.f |
1226 | UINT f_r1; | |
1227 | INT f_simm16; | |
c906108c | 1228 | |
96baa820 JM |
1229 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1230 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1231 | |
1232 | /* Record the fields for the semantic handler. */ | |
1233 | FLD (f_simm16) = f_simm16; | |
de8f5985 | 1234 | FLD (f_r1) = f_r1; |
c906108c | 1235 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1236 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1237 | |
1238 | #if WITH_PROFILE_MODEL_P | |
1239 | /* Record the fields for profiling. */ | |
1240 | if (PROFILE_MODEL_P (current_cpu)) | |
1241 | { | |
1242 | FLD (out_dr) = f_r1; | |
1243 | } | |
1244 | #endif | |
1245 | #undef FLD | |
7a292a7a | 1246 | return idesc; |
c906108c SS |
1247 | } |
1248 | ||
96baa820 | 1249 | extract_sfmt_lock: |
c906108c | 1250 | { |
7a292a7a | 1251 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1252 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1253 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1254 | UINT f_r1; | |
1255 | UINT f_r2; | |
c906108c | 1256 | |
96baa820 JM |
1257 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1258 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1259 | |
1260 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1261 | FLD (f_r2) = f_r2; |
1262 | FLD (f_r1) = f_r1; | |
c906108c SS |
1263 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1264 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1265 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lock", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1266 | |
1267 | #if WITH_PROFILE_MODEL_P | |
1268 | /* Record the fields for profiling. */ | |
1269 | if (PROFILE_MODEL_P (current_cpu)) | |
1270 | { | |
1271 | FLD (in_sr) = f_r2; | |
1272 | FLD (out_dr) = f_r1; | |
1273 | } | |
1274 | #endif | |
1275 | #undef FLD | |
7a292a7a | 1276 | return idesc; |
c906108c SS |
1277 | } |
1278 | ||
96baa820 | 1279 | extract_sfmt_machi: |
c906108c | 1280 | { |
7a292a7a | 1281 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1282 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1283 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1284 | UINT f_r1; | |
1285 | UINT f_r2; | |
c906108c | 1286 | |
96baa820 JM |
1287 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1288 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1289 | |
1290 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1291 | FLD (f_r1) = f_r1; |
1292 | FLD (f_r2) = f_r2; | |
c906108c SS |
1293 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1294 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1295 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_machi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1296 | |
1297 | #if WITH_PROFILE_MODEL_P | |
1298 | /* Record the fields for profiling. */ | |
1299 | if (PROFILE_MODEL_P (current_cpu)) | |
1300 | { | |
1301 | FLD (in_src1) = f_r1; | |
1302 | FLD (in_src2) = f_r2; | |
1303 | } | |
1304 | #endif | |
1305 | #undef FLD | |
7a292a7a | 1306 | return idesc; |
c906108c SS |
1307 | } |
1308 | ||
96baa820 | 1309 | extract_sfmt_mulhi: |
c906108c | 1310 | { |
7a292a7a | 1311 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1312 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1313 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1314 | UINT f_r1; | |
1315 | UINT f_r2; | |
c906108c | 1316 | |
96baa820 JM |
1317 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1318 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1319 | |
1320 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1321 | FLD (f_r1) = f_r1; |
1322 | FLD (f_r2) = f_r2; | |
c906108c SS |
1323 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1324 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1325 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulhi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1326 | |
1327 | #if WITH_PROFILE_MODEL_P | |
1328 | /* Record the fields for profiling. */ | |
1329 | if (PROFILE_MODEL_P (current_cpu)) | |
1330 | { | |
1331 | FLD (in_src1) = f_r1; | |
1332 | FLD (in_src2) = f_r2; | |
1333 | } | |
1334 | #endif | |
1335 | #undef FLD | |
7a292a7a | 1336 | return idesc; |
c906108c SS |
1337 | } |
1338 | ||
96baa820 | 1339 | extract_sfmt_mv: |
c906108c | 1340 | { |
7a292a7a | 1341 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1342 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1343 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1344 | UINT f_r1; | |
1345 | UINT f_r2; | |
c906108c | 1346 | |
96baa820 JM |
1347 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1348 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1349 | |
1350 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1351 | FLD (f_r2) = f_r2; |
1352 | FLD (f_r1) = f_r1; | |
c906108c SS |
1353 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1354 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1355 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mv", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1356 | |
1357 | #if WITH_PROFILE_MODEL_P | |
1358 | /* Record the fields for profiling. */ | |
1359 | if (PROFILE_MODEL_P (current_cpu)) | |
1360 | { | |
1361 | FLD (in_sr) = f_r2; | |
1362 | FLD (out_dr) = f_r1; | |
1363 | } | |
1364 | #endif | |
1365 | #undef FLD | |
7a292a7a | 1366 | return idesc; |
c906108c SS |
1367 | } |
1368 | ||
96baa820 | 1369 | extract_sfmt_mvfachi: |
c906108c | 1370 | { |
7a292a7a | 1371 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1372 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1373 | #define FLD(f) abuf->fields.sfmt_seth.f |
1374 | UINT f_r1; | |
c906108c | 1375 | |
96baa820 | 1376 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
c906108c SS |
1377 | |
1378 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1379 | FLD (f_r1) = f_r1; |
c906108c | 1380 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1381 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfachi", "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1382 | |
1383 | #if WITH_PROFILE_MODEL_P | |
1384 | /* Record the fields for profiling. */ | |
1385 | if (PROFILE_MODEL_P (current_cpu)) | |
1386 | { | |
1387 | FLD (out_dr) = f_r1; | |
1388 | } | |
1389 | #endif | |
1390 | #undef FLD | |
7a292a7a | 1391 | return idesc; |
c906108c SS |
1392 | } |
1393 | ||
96baa820 | 1394 | extract_sfmt_mvfc: |
c906108c | 1395 | { |
7a292a7a | 1396 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1397 | CGEN_INSN_INT insn = entire_insn; |
de8f5985 | 1398 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
96baa820 JM |
1399 | UINT f_r1; |
1400 | UINT f_r2; | |
c906108c | 1401 | |
96baa820 JM |
1402 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1403 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1404 | |
1405 | /* Record the fields for the semantic handler. */ | |
1406 | FLD (f_r2) = f_r2; | |
de8f5985 | 1407 | FLD (f_r1) = f_r1; |
c906108c | 1408 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1409 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1410 | |
1411 | #if WITH_PROFILE_MODEL_P | |
1412 | /* Record the fields for profiling. */ | |
1413 | if (PROFILE_MODEL_P (current_cpu)) | |
1414 | { | |
1415 | FLD (out_dr) = f_r1; | |
1416 | } | |
1417 | #endif | |
1418 | #undef FLD | |
7a292a7a | 1419 | return idesc; |
c906108c SS |
1420 | } |
1421 | ||
96baa820 | 1422 | extract_sfmt_mvtachi: |
c906108c | 1423 | { |
7a292a7a | 1424 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1425 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1426 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1427 | UINT f_r1; | |
c906108c | 1428 | |
96baa820 | 1429 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
c906108c SS |
1430 | |
1431 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1432 | FLD (f_r1) = f_r1; |
c906108c | 1433 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1434 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtachi", "f_r1 0x%x", 'x', f_r1, "src1 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1435 | |
1436 | #if WITH_PROFILE_MODEL_P | |
1437 | /* Record the fields for profiling. */ | |
1438 | if (PROFILE_MODEL_P (current_cpu)) | |
1439 | { | |
1440 | FLD (in_src1) = f_r1; | |
1441 | } | |
1442 | #endif | |
1443 | #undef FLD | |
7a292a7a | 1444 | return idesc; |
c906108c SS |
1445 | } |
1446 | ||
96baa820 | 1447 | extract_sfmt_mvtc: |
c906108c | 1448 | { |
7a292a7a | 1449 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1450 | CGEN_INSN_INT insn = entire_insn; |
de8f5985 | 1451 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
96baa820 JM |
1452 | UINT f_r1; |
1453 | UINT f_r2; | |
c906108c | 1454 | |
96baa820 JM |
1455 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1456 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1457 | |
1458 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1459 | FLD (f_r2) = f_r2; |
c906108c SS |
1460 | FLD (f_r1) = f_r1; |
1461 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1462 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1463 | |
1464 | #if WITH_PROFILE_MODEL_P | |
1465 | /* Record the fields for profiling. */ | |
1466 | if (PROFILE_MODEL_P (current_cpu)) | |
1467 | { | |
1468 | FLD (in_sr) = f_r2; | |
1469 | } | |
1470 | #endif | |
1471 | #undef FLD | |
7a292a7a | 1472 | return idesc; |
c906108c SS |
1473 | } |
1474 | ||
96baa820 | 1475 | extract_sfmt_nop: |
c906108c | 1476 | { |
7a292a7a | 1477 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1478 | CGEN_INSN_INT insn = entire_insn; |
96baa820 | 1479 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 1480 | |
c906108c SS |
1481 | |
1482 | /* Record the fields for the semantic handler. */ | |
96baa820 | 1483 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop", (char *) 0)); |
c906108c SS |
1484 | |
1485 | #undef FLD | |
7a292a7a | 1486 | return idesc; |
c906108c SS |
1487 | } |
1488 | ||
96baa820 | 1489 | extract_sfmt_rac: |
c906108c | 1490 | { |
7a292a7a | 1491 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1492 | CGEN_INSN_INT insn = entire_insn; |
96baa820 | 1493 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 1494 | |
c906108c SS |
1495 | |
1496 | /* Record the fields for the semantic handler. */ | |
96baa820 | 1497 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rac", (char *) 0)); |
c906108c SS |
1498 | |
1499 | #undef FLD | |
7a292a7a | 1500 | return idesc; |
c906108c SS |
1501 | } |
1502 | ||
96baa820 | 1503 | extract_sfmt_rte: |
c906108c | 1504 | { |
7a292a7a | 1505 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1506 | CGEN_INSN_INT insn = entire_insn; |
96baa820 | 1507 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 1508 | |
c906108c SS |
1509 | |
1510 | /* Record the fields for the semantic handler. */ | |
96baa820 | 1511 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rte", (char *) 0)); |
c906108c SS |
1512 | |
1513 | #if WITH_PROFILE_MODEL_P | |
1514 | /* Record the fields for profiling. */ | |
1515 | if (PROFILE_MODEL_P (current_cpu)) | |
1516 | { | |
1517 | } | |
1518 | #endif | |
1519 | #undef FLD | |
7a292a7a | 1520 | return idesc; |
c906108c SS |
1521 | } |
1522 | ||
96baa820 | 1523 | extract_sfmt_seth: |
c906108c | 1524 | { |
7a292a7a | 1525 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1526 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1527 | #define FLD(f) abuf->fields.sfmt_seth.f |
1528 | UINT f_r1; | |
1529 | UINT f_hi16; | |
c906108c | 1530 | |
96baa820 JM |
1531 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1532 | f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); | |
c906108c SS |
1533 | |
1534 | /* Record the fields for the semantic handler. */ | |
1535 | FLD (f_hi16) = f_hi16; | |
de8f5985 | 1536 | FLD (f_r1) = f_r1; |
c906108c | 1537 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1538 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1539 | |
1540 | #if WITH_PROFILE_MODEL_P | |
1541 | /* Record the fields for profiling. */ | |
1542 | if (PROFILE_MODEL_P (current_cpu)) | |
1543 | { | |
1544 | FLD (out_dr) = f_r1; | |
1545 | } | |
1546 | #endif | |
1547 | #undef FLD | |
7a292a7a | 1548 | return idesc; |
c906108c SS |
1549 | } |
1550 | ||
96baa820 | 1551 | extract_sfmt_sll3: |
c906108c | 1552 | { |
7a292a7a | 1553 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1554 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1555 | #define FLD(f) abuf->fields.sfmt_add3.f |
1556 | UINT f_r1; | |
1557 | UINT f_r2; | |
1558 | INT f_simm16; | |
c906108c | 1559 | |
96baa820 JM |
1560 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1561 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1562 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1563 | |
1564 | /* Record the fields for the semantic handler. */ | |
1565 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1566 | FLD (f_r2) = f_r2; |
1567 | FLD (f_r1) = f_r1; | |
c906108c SS |
1568 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1569 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1570 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1571 | |
1572 | #if WITH_PROFILE_MODEL_P | |
1573 | /* Record the fields for profiling. */ | |
1574 | if (PROFILE_MODEL_P (current_cpu)) | |
1575 | { | |
1576 | FLD (in_sr) = f_r2; | |
1577 | FLD (out_dr) = f_r1; | |
1578 | } | |
1579 | #endif | |
1580 | #undef FLD | |
7a292a7a | 1581 | return idesc; |
c906108c SS |
1582 | } |
1583 | ||
96baa820 | 1584 | extract_sfmt_slli: |
c906108c | 1585 | { |
7a292a7a | 1586 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1587 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1588 | #define FLD(f) abuf->fields.sfmt_slli.f |
1589 | UINT f_r1; | |
1590 | UINT f_uimm5; | |
c906108c | 1591 | |
96baa820 JM |
1592 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1593 | f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5); | |
c906108c SS |
1594 | |
1595 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1596 | FLD (f_r1) = f_r1; |
c906108c SS |
1597 | FLD (f_uimm5) = f_uimm5; |
1598 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1599 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slli", "f_r1 0x%x", 'x', f_r1, "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1600 | |
1601 | #if WITH_PROFILE_MODEL_P | |
1602 | /* Record the fields for profiling. */ | |
1603 | if (PROFILE_MODEL_P (current_cpu)) | |
1604 | { | |
1605 | FLD (in_dr) = f_r1; | |
1606 | FLD (out_dr) = f_r1; | |
1607 | } | |
1608 | #endif | |
1609 | #undef FLD | |
7a292a7a | 1610 | return idesc; |
c906108c SS |
1611 | } |
1612 | ||
96baa820 | 1613 | extract_sfmt_st: |
c906108c | 1614 | { |
7a292a7a | 1615 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1616 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1617 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1618 | UINT f_r1; | |
1619 | UINT f_r2; | |
c906108c | 1620 | |
96baa820 JM |
1621 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1622 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1623 | |
1624 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1625 | FLD (f_r1) = f_r1; |
1626 | FLD (f_r2) = f_r2; | |
c906108c SS |
1627 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1628 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1629 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1630 | |
1631 | #if WITH_PROFILE_MODEL_P | |
1632 | /* Record the fields for profiling. */ | |
1633 | if (PROFILE_MODEL_P (current_cpu)) | |
1634 | { | |
1635 | FLD (in_src1) = f_r1; | |
1636 | FLD (in_src2) = f_r2; | |
1637 | } | |
1638 | #endif | |
1639 | #undef FLD | |
7a292a7a | 1640 | return idesc; |
c906108c SS |
1641 | } |
1642 | ||
96baa820 | 1643 | extract_sfmt_st_d: |
c906108c | 1644 | { |
7a292a7a | 1645 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1646 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1647 | #define FLD(f) abuf->fields.sfmt_st_d.f |
1648 | UINT f_r1; | |
1649 | UINT f_r2; | |
1650 | INT f_simm16; | |
c906108c | 1651 | |
96baa820 JM |
1652 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1653 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1654 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1655 | |
1656 | /* Record the fields for the semantic handler. */ | |
1657 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1658 | FLD (f_r1) = f_r1; |
1659 | FLD (f_r2) = f_r2; | |
c906108c SS |
1660 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1661 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1662 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1663 | |
1664 | #if WITH_PROFILE_MODEL_P | |
1665 | /* Record the fields for profiling. */ | |
1666 | if (PROFILE_MODEL_P (current_cpu)) | |
1667 | { | |
1668 | FLD (in_src1) = f_r1; | |
1669 | FLD (in_src2) = f_r2; | |
1670 | } | |
1671 | #endif | |
1672 | #undef FLD | |
7a292a7a | 1673 | return idesc; |
c906108c SS |
1674 | } |
1675 | ||
96baa820 | 1676 | extract_sfmt_stb: |
c906108c | 1677 | { |
7a292a7a | 1678 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1679 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1680 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1681 | UINT f_r1; | |
1682 | UINT f_r2; | |
c906108c | 1683 | |
96baa820 JM |
1684 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1685 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1686 | |
1687 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1688 | FLD (f_r1) = f_r1; |
1689 | FLD (f_r2) = f_r2; | |
c906108c SS |
1690 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1691 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1692 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1693 | |
1694 | #if WITH_PROFILE_MODEL_P | |
1695 | /* Record the fields for profiling. */ | |
1696 | if (PROFILE_MODEL_P (current_cpu)) | |
1697 | { | |
1698 | FLD (in_src1) = f_r1; | |
1699 | FLD (in_src2) = f_r2; | |
1700 | } | |
1701 | #endif | |
1702 | #undef FLD | |
7a292a7a | 1703 | return idesc; |
c906108c SS |
1704 | } |
1705 | ||
96baa820 | 1706 | extract_sfmt_stb_d: |
c906108c | 1707 | { |
7a292a7a | 1708 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1709 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1710 | #define FLD(f) abuf->fields.sfmt_st_d.f |
1711 | UINT f_r1; | |
1712 | UINT f_r2; | |
1713 | INT f_simm16; | |
c906108c | 1714 | |
96baa820 JM |
1715 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1716 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1717 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1718 | |
1719 | /* Record the fields for the semantic handler. */ | |
1720 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1721 | FLD (f_r1) = f_r1; |
1722 | FLD (f_r2) = f_r2; | |
c906108c SS |
1723 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1724 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1725 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1726 | |
1727 | #if WITH_PROFILE_MODEL_P | |
1728 | /* Record the fields for profiling. */ | |
1729 | if (PROFILE_MODEL_P (current_cpu)) | |
1730 | { | |
1731 | FLD (in_src1) = f_r1; | |
1732 | FLD (in_src2) = f_r2; | |
1733 | } | |
1734 | #endif | |
1735 | #undef FLD | |
7a292a7a | 1736 | return idesc; |
c906108c SS |
1737 | } |
1738 | ||
96baa820 | 1739 | extract_sfmt_sth: |
c906108c | 1740 | { |
7a292a7a | 1741 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1742 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1743 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1744 | UINT f_r1; | |
1745 | UINT f_r2; | |
c906108c | 1746 | |
96baa820 JM |
1747 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1748 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1749 | |
1750 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1751 | FLD (f_r1) = f_r1; |
1752 | FLD (f_r2) = f_r2; | |
c906108c SS |
1753 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1754 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1755 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1756 | |
1757 | #if WITH_PROFILE_MODEL_P | |
1758 | /* Record the fields for profiling. */ | |
1759 | if (PROFILE_MODEL_P (current_cpu)) | |
1760 | { | |
1761 | FLD (in_src1) = f_r1; | |
1762 | FLD (in_src2) = f_r2; | |
1763 | } | |
1764 | #endif | |
1765 | #undef FLD | |
7a292a7a | 1766 | return idesc; |
c906108c SS |
1767 | } |
1768 | ||
96baa820 | 1769 | extract_sfmt_sth_d: |
c906108c | 1770 | { |
7a292a7a | 1771 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1772 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1773 | #define FLD(f) abuf->fields.sfmt_st_d.f |
1774 | UINT f_r1; | |
1775 | UINT f_r2; | |
1776 | INT f_simm16; | |
c906108c | 1777 | |
96baa820 JM |
1778 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1779 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1780 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1781 | |
1782 | /* Record the fields for the semantic handler. */ | |
1783 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1784 | FLD (f_r1) = f_r1; |
1785 | FLD (f_r2) = f_r2; | |
c906108c SS |
1786 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1787 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1788 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1789 | |
1790 | #if WITH_PROFILE_MODEL_P | |
1791 | /* Record the fields for profiling. */ | |
1792 | if (PROFILE_MODEL_P (current_cpu)) | |
1793 | { | |
1794 | FLD (in_src1) = f_r1; | |
1795 | FLD (in_src2) = f_r2; | |
1796 | } | |
1797 | #endif | |
1798 | #undef FLD | |
7a292a7a | 1799 | return idesc; |
c906108c SS |
1800 | } |
1801 | ||
96baa820 | 1802 | extract_sfmt_st_plus: |
c906108c | 1803 | { |
7a292a7a | 1804 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1805 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1806 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1807 | UINT f_r1; | |
1808 | UINT f_r2; | |
c906108c | 1809 | |
96baa820 JM |
1810 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1811 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1812 | |
1813 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1814 | FLD (f_r1) = f_r1; |
1815 | FLD (f_r2) = f_r2; | |
c906108c SS |
1816 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1817 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1818 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1819 | |
1820 | #if WITH_PROFILE_MODEL_P | |
1821 | /* Record the fields for profiling. */ | |
1822 | if (PROFILE_MODEL_P (current_cpu)) | |
1823 | { | |
1824 | FLD (in_src1) = f_r1; | |
1825 | FLD (in_src2) = f_r2; | |
1826 | FLD (out_src2) = f_r2; | |
1827 | } | |
1828 | #endif | |
1829 | #undef FLD | |
7a292a7a | 1830 | return idesc; |
c906108c SS |
1831 | } |
1832 | ||
96baa820 | 1833 | extract_sfmt_trap: |
c906108c | 1834 | { |
7a292a7a | 1835 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1836 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1837 | #define FLD(f) abuf->fields.sfmt_trap.f |
1838 | UINT f_uimm4; | |
c906108c | 1839 | |
96baa820 | 1840 | f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); |
c906108c SS |
1841 | |
1842 | /* Record the fields for the semantic handler. */ | |
1843 | FLD (f_uimm4) = f_uimm4; | |
96baa820 | 1844 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0)); |
c906108c SS |
1845 | |
1846 | #if WITH_PROFILE_MODEL_P | |
1847 | /* Record the fields for profiling. */ | |
1848 | if (PROFILE_MODEL_P (current_cpu)) | |
1849 | { | |
1850 | } | |
1851 | #endif | |
1852 | #undef FLD | |
7a292a7a | 1853 | return idesc; |
c906108c SS |
1854 | } |
1855 | ||
96baa820 | 1856 | extract_sfmt_unlock: |
c906108c | 1857 | { |
7a292a7a | 1858 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1859 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1860 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1861 | UINT f_r1; | |
1862 | UINT f_r2; | |
c906108c | 1863 | |
96baa820 JM |
1864 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1865 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1866 | |
1867 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1868 | FLD (f_r1) = f_r1; |
1869 | FLD (f_r2) = f_r2; | |
c906108c SS |
1870 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1871 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1872 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1873 | |
1874 | #if WITH_PROFILE_MODEL_P | |
1875 | /* Record the fields for profiling. */ | |
1876 | if (PROFILE_MODEL_P (current_cpu)) | |
1877 | { | |
1878 | FLD (in_src1) = f_r1; | |
1879 | FLD (in_src2) = f_r2; | |
1880 | } | |
1881 | #endif | |
1882 | #undef FLD | |
7a292a7a | 1883 | return idesc; |
c906108c SS |
1884 | } |
1885 | ||
c906108c | 1886 | } |