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(DVP_OPCODE_IGNORE_DIS): New macro.
[thirdparty/binutils-gdb.git] / sim / m32r / decode.c
CommitLineData
b8a9943d
DE		 1/* Simulator instruction decoder for m32r.
2
3This file is machine generated with CGEN.
4
5Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
6
7This file is part of the GNU Simulators.
8
9This program is free software; you can redistribute it and/or modify
10it under the terms of the GNU General Public License as published by
11the Free Software Foundation; either version 2, or (at your option)
12any later version.
13
14This program is distributed in the hope that it will be useful,
15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License along
20with this program; if not, write to the Free Software Foundation, Inc.,
2159 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23*/
24
25#define WANT_CPU
26#define WANT_CPU_M32R
27
28#include "sim-main.h"
29#include "sim-xcat.h"
30#include "cpu-sim.h"
31#include "cpu-opc.h"
32
33/* FIXME: wip, may eventually only want one form so this would then go
34 away. However, in the mean time, having both keeps a stable version
35 around while the cache version is being developed.
36 It may still be useful to allow two versions to exist though. */
37#if WITH_SCACHE
38#define EX(fn) XCONCAT3 (m32r,_ex_,fn)
39#else
40#define EX(fn) 0
41#endif
42
e0bd6e18
DE		 43#ifdef HAVE_PARALLEL_EXEC
44#ifdef __GNUC__
45#define READ(n) 0
46#else
47#define READ(n) XCONCAT3 (READ,_,n)
48#endif
49#endif
50
b8a9943d
DE		 51#if WITH_SEM_SWITCH_FULL
52#define FULL(fn) 0
53#else
54#define FULL(fn) XCONCAT3 (m32r,_sem_,fn)
55#endif
56
57#if WITH_SEM_SWITCH_FAST
58#define FAST(fn) 0
59#else
60#if WITH_SCACHE
61#define FAST(fn) XCONCAT3 (m32r,_semc_,fn)
62#else
63#define FAST(fn) 0
64#endif
65#endif
66
67/*#define DECODE M32R_DECODE*/
68
69/* The decode_illegal case is currently non-static and the generator doesn't
70 prepend m32r_, so simplify things by handling it here. */
71#define decode_illegal m32r_decode_illegal
72
e0bd6e18
DE		 73#define ITAB(n) m32r_cgen_insn_table_entries[n]
74
75static DECODE decode_add = { M32R_INSN_ADD, & ITAB (M32R_INSN_ADD), EX (fmt_0_add), FULL (add), FAST (add) };
76static DECODE decode_add3 = { M32R_INSN_ADD3, & ITAB (M32R_INSN_ADD3), EX (fmt_1_add3), FULL (add3), FAST (add3) };
77static DECODE decode_and = { M32R_INSN_AND, & ITAB (M32R_INSN_AND), EX (fmt_0_add), FULL (and), FAST (and) };
78static DECODE decode_and3 = { M32R_INSN_AND3, & ITAB (M32R_INSN_AND3), EX (fmt_2_and3), FULL (and3), FAST (and3) };
79static DECODE decode_or = { M32R_INSN_OR, & ITAB (M32R_INSN_OR), EX (fmt_0_add), FULL (or), FAST (or) };
80static DECODE decode_or3 = { M32R_INSN_OR3, & ITAB (M32R_INSN_OR3), EX (fmt_3_or3), FULL (or3), FAST (or3) };
81static DECODE decode_xor = { M32R_INSN_XOR, & ITAB (M32R_INSN_XOR), EX (fmt_0_add), FULL (xor), FAST (xor) };
82static DECODE decode_xor3 = { M32R_INSN_XOR3, & ITAB (M32R_INSN_XOR3), EX (fmt_2_and3), FULL (xor3), FAST (xor3) };
83static DECODE decode_addi = { M32R_INSN_ADDI, & ITAB (M32R_INSN_ADDI), EX (fmt_4_addi), FULL (addi), FAST (addi) };
84static DECODE decode_addv = { M32R_INSN_ADDV, & ITAB (M32R_INSN_ADDV), EX (fmt_0_add), FULL (addv), FAST (addv) };
85static DECODE decode_addv3 = { M32R_INSN_ADDV3, & ITAB (M32R_INSN_ADDV3), EX (fmt_5_addv3), FULL (addv3), FAST (addv3) };
86static DECODE decode_addx = { M32R_INSN_ADDX, & ITAB (M32R_INSN_ADDX), EX (fmt_6_addx), FULL (addx), FAST (addx) };
87static DECODE decode_bc8 = { M32R_INSN_BC8, & ITAB (M32R_INSN_BC8), EX (fmt_7_bc8), FULL (bc8), FAST (bc8) };
88static DECODE decode_bc24 = { M32R_INSN_BC24, & ITAB (M32R_INSN_BC24), EX (fmt_8_bc24), FULL (bc24), FAST (bc24) };
89static DECODE decode_beq = { M32R_INSN_BEQ, & ITAB (M32R_INSN_BEQ), EX (fmt_9_beq), FULL (beq), FAST (beq) };
90static DECODE decode_beqz = { M32R_INSN_BEQZ, & ITAB (M32R_INSN_BEQZ), EX (fmt_10_beqz), FULL (beqz), FAST (beqz) };
91static DECODE decode_bgez = { M32R_INSN_BGEZ, & ITAB (M32R_INSN_BGEZ), EX (fmt_10_beqz), FULL (bgez), FAST (bgez) };
92static DECODE decode_bgtz = { M32R_INSN_BGTZ, & ITAB (M32R_INSN_BGTZ), EX (fmt_10_beqz), FULL (bgtz), FAST (bgtz) };
93static DECODE decode_blez = { M32R_INSN_BLEZ, & ITAB (M32R_INSN_BLEZ), EX (fmt_10_beqz), FULL (blez), FAST (blez) };
94static DECODE decode_bltz = { M32R_INSN_BLTZ, & ITAB (M32R_INSN_BLTZ), EX (fmt_10_beqz), FULL (bltz), FAST (bltz) };
95static DECODE decode_bnez = { M32R_INSN_BNEZ, & ITAB (M32R_INSN_BNEZ), EX (fmt_10_beqz), FULL (bnez), FAST (bnez) };
96static DECODE decode_bl8 = { M32R_INSN_BL8, & ITAB (M32R_INSN_BL8), EX (fmt_11_bl8), FULL (bl8), FAST (bl8) };
97static DECODE decode_bl24 = { M32R_INSN_BL24, & ITAB (M32R_INSN_BL24), EX (fmt_12_bl24), FULL (bl24), FAST (bl24) };
98static DECODE decode_bnc8 = { M32R_INSN_BNC8, & ITAB (M32R_INSN_BNC8), EX (fmt_7_bc8), FULL (bnc8), FAST (bnc8) };
99static DECODE decode_bnc24 = { M32R_INSN_BNC24, & ITAB (M32R_INSN_BNC24), EX (fmt_8_bc24), FULL (bnc24), FAST (bnc24) };
100static DECODE decode_bne = { M32R_INSN_BNE, & ITAB (M32R_INSN_BNE), EX (fmt_9_beq), FULL (bne), FAST (bne) };
101static DECODE decode_bra8 = { M32R_INSN_BRA8, & ITAB (M32R_INSN_BRA8), EX (fmt_13_bra8), FULL (bra8), FAST (bra8) };
102static DECODE decode_bra24 = { M32R_INSN_BRA24, & ITAB (M32R_INSN_BRA24), EX (fmt_14_bra24), FULL (bra24), FAST (bra24) };
103static DECODE decode_cmp = { M32R_INSN_CMP, & ITAB (M32R_INSN_CMP), EX (fmt_15_cmp), FULL (cmp), FAST (cmp) };
104static DECODE decode_cmpi = { M32R_INSN_CMPI, & ITAB (M32R_INSN_CMPI), EX (fmt_16_cmpi), FULL (cmpi), FAST (cmpi) };
105static DECODE decode_cmpu = { M32R_INSN_CMPU, & ITAB (M32R_INSN_CMPU), EX (fmt_15_cmp), FULL (cmpu), FAST (cmpu) };
106static DECODE decode_cmpui = { M32R_INSN_CMPUI, & ITAB (M32R_INSN_CMPUI), EX (fmt_17_cmpui), FULL (cmpui), FAST (cmpui) };
107static DECODE decode_div = { M32R_INSN_DIV, & ITAB (M32R_INSN_DIV), EX (fmt_18_div), FULL (div), FAST (div) };
108static DECODE decode_divu = { M32R_INSN_DIVU, & ITAB (M32R_INSN_DIVU), EX (fmt_18_div), FULL (divu), FAST (divu) };
109static DECODE decode_rem = { M32R_INSN_REM, & ITAB (M32R_INSN_REM), EX (fmt_18_div), FULL (rem), FAST (rem) };
110static DECODE decode_remu = { M32R_INSN_REMU, & ITAB (M32R_INSN_REMU), EX (fmt_18_div), FULL (remu), FAST (remu) };
111static DECODE decode_divh = { M32R_INSN_DIVH, & ITAB (M32R_INSN_DIVH), EX (fmt_18_div), FULL (divh), FAST (divh) };
112static DECODE decode_jl = { M32R_INSN_JL, & ITAB (M32R_INSN_JL), EX (fmt_19_jl), FULL (jl), FAST (jl) };
113static DECODE decode_jmp = { M32R_INSN_JMP, & ITAB (M32R_INSN_JMP), EX (fmt_20_jmp), FULL (jmp), FAST (jmp) };
114static DECODE decode_ld = { M32R_INSN_LD, & ITAB (M32R_INSN_LD), EX (fmt_21_ld), FULL (ld), FAST (ld) };
115static DECODE decode_ld_d = { M32R_INSN_LD_D, & ITAB (M32R_INSN_LD_D), EX (fmt_22_ld_d), FULL (ld_d), FAST (ld_d) };
116static DECODE decode_ldb = { M32R_INSN_LDB, & ITAB (M32R_INSN_LDB), EX (fmt_23_ldb), FULL (ldb), FAST (ldb) };
117static DECODE decode_ldb_d = { M32R_INSN_LDB_D, & ITAB (M32R_INSN_LDB_D), EX (fmt_24_ldb_d), FULL (ldb_d), FAST (ldb_d) };
118static DECODE decode_ldh = { M32R_INSN_LDH, & ITAB (M32R_INSN_LDH), EX (fmt_25_ldh), FULL (ldh), FAST (ldh) };
119static DECODE decode_ldh_d = { M32R_INSN_LDH_D, & ITAB (M32R_INSN_LDH_D), EX (fmt_26_ldh_d), FULL (ldh_d), FAST (ldh_d) };
120static DECODE decode_ldub = { M32R_INSN_LDUB, & ITAB (M32R_INSN_LDUB), EX (fmt_23_ldb), FULL (ldub), FAST (ldub) };
121static DECODE decode_ldub_d = { M32R_INSN_LDUB_D, & ITAB (M32R_INSN_LDUB_D), EX (fmt_24_ldb_d), FULL (ldub_d), FAST (ldub_d) };
122static DECODE decode_lduh = { M32R_INSN_LDUH, & ITAB (M32R_INSN_LDUH), EX (fmt_25_ldh), FULL (lduh), FAST (lduh) };
123static DECODE decode_lduh_d = { M32R_INSN_LDUH_D, & ITAB (M32R_INSN_LDUH_D), EX (fmt_26_ldh_d), FULL (lduh_d), FAST (lduh_d) };
124static DECODE decode_ld_plus = { M32R_INSN_LD_PLUS, & ITAB (M32R_INSN_LD_PLUS), EX (fmt_21_ld), FULL (ld_plus), FAST (ld_plus) };
125static DECODE decode_ld24 = { M32R_INSN_LD24, & ITAB (M32R_INSN_LD24), EX (fmt_27_ld24), FULL (ld24), FAST (ld24) };
126static DECODE decode_ldi8 = { M32R_INSN_LDI8, & ITAB (M32R_INSN_LDI8), EX (fmt_28_ldi8), FULL (ldi8), FAST (ldi8) };
127static DECODE decode_ldi16 = { M32R_INSN_LDI16, & ITAB (M32R_INSN_LDI16), EX (fmt_29_ldi16), FULL (ldi16), FAST (ldi16) };
128static DECODE decode_lock = { M32R_INSN_LOCK, & ITAB (M32R_INSN_LOCK), EX (fmt_0_add), FULL (lock), FAST (lock) };
129static DECODE decode_machi = { M32R_INSN_MACHI, & ITAB (M32R_INSN_MACHI), EX (fmt_30_machi), FULL (machi), FAST (machi) };
130static DECODE decode_maclo = { M32R_INSN_MACLO, & ITAB (M32R_INSN_MACLO), EX (fmt_30_machi), FULL (maclo), FAST (maclo) };
131static DECODE decode_macwhi = { M32R_INSN_MACWHI, & ITAB (M32R_INSN_MACWHI), EX (fmt_30_machi), FULL (macwhi), FAST (macwhi) };
132static DECODE decode_macwlo = { M32R_INSN_MACWLO, & ITAB (M32R_INSN_MACWLO), EX (fmt_30_machi), FULL (macwlo), FAST (macwlo) };
133static DECODE decode_mul = { M32R_INSN_MUL, & ITAB (M32R_INSN_MUL), EX (fmt_0_add), FULL (mul), FAST (mul) };
134static DECODE decode_mulhi = { M32R_INSN_MULHI, & ITAB (M32R_INSN_MULHI), EX (fmt_15_cmp), FULL (mulhi), FAST (mulhi) };
135static DECODE decode_mullo = { M32R_INSN_MULLO, & ITAB (M32R_INSN_MULLO), EX (fmt_15_cmp), FULL (mullo), FAST (mullo) };
136static DECODE decode_mulwhi = { M32R_INSN_MULWHI, & ITAB (M32R_INSN_MULWHI), EX (fmt_15_cmp), FULL (mulwhi), FAST (mulwhi) };
137static DECODE decode_mulwlo = { M32R_INSN_MULWLO, & ITAB (M32R_INSN_MULWLO), EX (fmt_15_cmp), FULL (mulwlo), FAST (mulwlo) };
138static DECODE decode_mv = { M32R_INSN_MV, & ITAB (M32R_INSN_MV), EX (fmt_31_mv), FULL (mv), FAST (mv) };
139static DECODE decode_mvfachi = { M32R_INSN_MVFACHI, & ITAB (M32R_INSN_MVFACHI), EX (fmt_32_mvfachi), FULL (mvfachi), FAST (mvfachi) };
140static DECODE decode_mvfaclo = { M32R_INSN_MVFACLO, & ITAB (M32R_INSN_MVFACLO), EX (fmt_32_mvfachi), FULL (mvfaclo), FAST (mvfaclo) };
141static DECODE decode_mvfacmi = { M32R_INSN_MVFACMI, & ITAB (M32R_INSN_MVFACMI), EX (fmt_32_mvfachi), FULL (mvfacmi), FAST (mvfacmi) };
142static DECODE decode_mvfc = { M32R_INSN_MVFC, & ITAB (M32R_INSN_MVFC), EX (fmt_33_mvfc), FULL (mvfc), FAST (mvfc) };
143static DECODE decode_mvtachi = { M32R_INSN_MVTACHI, & ITAB (M32R_INSN_MVTACHI), EX (fmt_34_mvtachi), FULL (mvtachi), FAST (mvtachi) };
144static DECODE decode_mvtaclo = { M32R_INSN_MVTACLO, & ITAB (M32R_INSN_MVTACLO), EX (fmt_34_mvtachi), FULL (mvtaclo), FAST (mvtaclo) };
145static DECODE decode_mvtc = { M32R_INSN_MVTC, & ITAB (M32R_INSN_MVTC), EX (fmt_35_mvtc), FULL (mvtc), FAST (mvtc) };
146static DECODE decode_neg = { M32R_INSN_NEG, & ITAB (M32R_INSN_NEG), EX (fmt_31_mv), FULL (neg), FAST (neg) };
147static DECODE decode_nop = { M32R_INSN_NOP, & ITAB (M32R_INSN_NOP), EX (fmt_36_nop), FULL (nop), FAST (nop) };
148static DECODE decode_not = { M32R_INSN_NOT, & ITAB (M32R_INSN_NOT), EX (fmt_31_mv), FULL (not), FAST (not) };
149static DECODE decode_rac = { M32R_INSN_RAC, & ITAB (M32R_INSN_RAC), EX (fmt_37_rac), FULL (rac), FAST (rac) };
150static DECODE decode_rach = { M32R_INSN_RACH, & ITAB (M32R_INSN_RACH), EX (fmt_37_rac), FULL (rach), FAST (rach) };
151static DECODE decode_rte = { M32R_INSN_RTE, & ITAB (M32R_INSN_RTE), EX (fmt_38_rte), FULL (rte), FAST (rte) };
152static DECODE decode_seth = { M32R_INSN_SETH, & ITAB (M32R_INSN_SETH), EX (fmt_39_seth), FULL (seth), FAST (seth) };
153static DECODE decode_sll = { M32R_INSN_SLL, & ITAB (M32R_INSN_SLL), EX (fmt_0_add), FULL (sll), FAST (sll) };
154static DECODE decode_sll3 = { M32R_INSN_SLL3, & ITAB (M32R_INSN_SLL3), EX (fmt_5_addv3), FULL (sll3), FAST (sll3) };
155static DECODE decode_slli = { M32R_INSN_SLLI, & ITAB (M32R_INSN_SLLI), EX (fmt_40_slli), FULL (slli), FAST (slli) };
156static DECODE decode_sra = { M32R_INSN_SRA, & ITAB (M32R_INSN_SRA), EX (fmt_0_add), FULL (sra), FAST (sra) };
157static DECODE decode_sra3 = { M32R_INSN_SRA3, & ITAB (M32R_INSN_SRA3), EX (fmt_5_addv3), FULL (sra3), FAST (sra3) };
158static DECODE decode_srai = { M32R_INSN_SRAI, & ITAB (M32R_INSN_SRAI), EX (fmt_40_slli), FULL (srai), FAST (srai) };
159static DECODE decode_srl = { M32R_INSN_SRL, & ITAB (M32R_INSN_SRL), EX (fmt_0_add), FULL (srl), FAST (srl) };
160static DECODE decode_srl3 = { M32R_INSN_SRL3, & ITAB (M32R_INSN_SRL3), EX (fmt_5_addv3), FULL (srl3), FAST (srl3) };
161static DECODE decode_srli = { M32R_INSN_SRLI, & ITAB (M32R_INSN_SRLI), EX (fmt_40_slli), FULL (srli), FAST (srli) };
162static DECODE decode_st = { M32R_INSN_ST, & ITAB (M32R_INSN_ST), EX (fmt_15_cmp), FULL (st), FAST (st) };
163static DECODE decode_st_d = { M32R_INSN_ST_D, & ITAB (M32R_INSN_ST_D), EX (fmt_41_st_d), FULL (st_d), FAST (st_d) };
164static DECODE decode_stb = { M32R_INSN_STB, & ITAB (M32R_INSN_STB), EX (fmt_15_cmp), FULL (stb), FAST (stb) };
165static DECODE decode_stb_d = { M32R_INSN_STB_D, & ITAB (M32R_INSN_STB_D), EX (fmt_41_st_d), FULL (stb_d), FAST (stb_d) };
166static DECODE decode_sth = { M32R_INSN_STH, & ITAB (M32R_INSN_STH), EX (fmt_15_cmp), FULL (sth), FAST (sth) };
167static DECODE decode_sth_d = { M32R_INSN_STH_D, & ITAB (M32R_INSN_STH_D), EX (fmt_41_st_d), FULL (sth_d), FAST (sth_d) };
168static DECODE decode_st_plus = { M32R_INSN_ST_PLUS, & ITAB (M32R_INSN_ST_PLUS), EX (fmt_15_cmp), FULL (st_plus), FAST (st_plus) };
169static DECODE decode_st_minus = { M32R_INSN_ST_MINUS, & ITAB (M32R_INSN_ST_MINUS), EX (fmt_15_cmp), FULL (st_minus), FAST (st_minus) };
170static DECODE decode_sub = { M32R_INSN_SUB, & ITAB (M32R_INSN_SUB), EX (fmt_0_add), FULL (sub), FAST (sub) };
171static DECODE decode_subv = { M32R_INSN_SUBV, & ITAB (M32R_INSN_SUBV), EX (fmt_0_add), FULL (subv), FAST (subv) };
172static DECODE decode_subx = { M32R_INSN_SUBX, & ITAB (M32R_INSN_SUBX), EX (fmt_6_addx), FULL (subx), FAST (subx) };
173static DECODE decode_trap = { M32R_INSN_TRAP, & ITAB (M32R_INSN_TRAP), EX (fmt_42_trap), FULL (trap), FAST (trap) };
174static DECODE decode_unlock = { M32R_INSN_UNLOCK, & ITAB (M32R_INSN_UNLOCK), EX (fmt_15_cmp), FULL (unlock), FAST (unlock) };
175
b8a9943d 176DECODE m32r_decode_illegal = {
e0bd6e18
DE		 177 M32R_INSN_ILLEGAL, & ITAB (M32R_INSN_ILLEGAL),
178 EX (illegal), FULL (illegal), FAST (illegal)
b8a9943d
DE		 179};
180
e0bd6e18 181/* The order must match that of `labels' in sem-switch.c/read.c. */
b8a9943d
DE		 182
183DECODE *m32r_decode_vars[] = {
184 & m32r_decode_illegal,
185 & decode_add,
186 & decode_add3,
187 & decode_and,
188 & decode_and3,
189 & decode_or,
190 & decode_or3,
191 & decode_xor,
192 & decode_xor3,
193 & decode_addi,
194 & decode_addv,
195 & decode_addv3,
196 & decode_addx,
197 & decode_bc8,
198 & decode_bc24,
199 & decode_beq,
200 & decode_beqz,
201 & decode_bgez,
202 & decode_bgtz,
203 & decode_blez,
204 & decode_bltz,
205 & decode_bnez,
206 & decode_bl8,
207 & decode_bl24,
208 & decode_bnc8,
209 & decode_bnc24,
210 & decode_bne,
211 & decode_bra8,
212 & decode_bra24,
213 & decode_cmp,
214 & decode_cmpi,
215 & decode_cmpu,
216 & decode_cmpui,
217 & decode_div,
218 & decode_divu,
219 & decode_rem,
220 & decode_remu,
e0bd6e18 221 & decode_divh,
b8a9943d
DE		 222 & decode_jl,
223 & decode_jmp,
224 & decode_ld,
225 & decode_ld_d,
226 & decode_ldb,
227 & decode_ldb_d,
228 & decode_ldh,
229 & decode_ldh_d,
230 & decode_ldub,
231 & decode_ldub_d,
232 & decode_lduh,
233 & decode_lduh_d,
234 & decode_ld_plus,
235 & decode_ld24,
236 & decode_ldi8,
237 & decode_ldi16,
238 & decode_lock,
239 & decode_machi,
240 & decode_maclo,
241 & decode_macwhi,
242 & decode_macwlo,
243 & decode_mul,
244 & decode_mulhi,
245 & decode_mullo,
246 & decode_mulwhi,
247 & decode_mulwlo,
248 & decode_mv,
249 & decode_mvfachi,
250 & decode_mvfaclo,
251 & decode_mvfacmi,
252 & decode_mvfc,
253 & decode_mvtachi,
254 & decode_mvtaclo,
255 & decode_mvtc,
256 & decode_neg,
257 & decode_nop,
258 & decode_not,
259 & decode_rac,
260 & decode_rach,
261 & decode_rte,
262 & decode_seth,
263 & decode_sll,
264 & decode_sll3,
265 & decode_slli,
266 & decode_sra,
267 & decode_sra3,
268 & decode_srai,
269 & decode_srl,
270 & decode_srl3,
271 & decode_srli,
272 & decode_st,
273 & decode_st_d,
274 & decode_stb,
275 & decode_stb_d,
276 & decode_sth,
277 & decode_sth_d,
278 & decode_st_plus,
279 & decode_st_minus,
280 & decode_sub,
281 & decode_subv,
282 & decode_subx,
283 & decode_trap,
284 & decode_unlock,
285 0
286};
287
288/* The decoder needs a slightly different computed goto switch control. */
289#ifdef __GNUC__
290#define DECODE_SWITCH(N, X) goto *labels_##N[X];
291#else
292#define DECODE_SWITCH(N, X) switch (X)
293#endif
294
295/* Given an instruction, return a pointer to its DECODE entry. */
296
297DECODE *
298m32r_decode (current_cpu, pc, insn)
299 SIM_CPU *current_cpu;
300 PCADDR pc;
301 insn_t insn;
302{
303 {
304#ifdef __GNUC__
305 static void *labels_0[256] = {
306 && default_0, && default_0, && default_0, && default_0,
307 && default_0, && default_0, && default_0, && default_0,
308 && default_0, && default_0, && default_0, && default_0,
309 && default_0, && default_0, && default_0, && default_0,
310 && default_0, && default_0, && default_0, && default_0,
311 && default_0, && default_0, && default_0, && default_0,
312 && default_0, && default_0, && default_0, && default_0,
313 && case_0_28, && default_0, && default_0, && default_0,
314 && default_0, && default_0, && default_0, && default_0,
315 && default_0, && default_0, && default_0, && default_0,
316 && default_0, && default_0, && default_0, && default_0,
317 && default_0, && default_0, && default_0, && default_0,
318 && default_0, && default_0, && default_0, && default_0,
319 && default_0, && default_0, && default_0, && default_0,
320 && default_0, && default_0, && default_0, && default_0,
321 && default_0, && default_0, && default_0, && default_0,
322 && default_0, && default_0, && default_0, && default_0,
323 && default_0, && default_0, && default_0, && default_0,
324 && default_0, && default_0, && default_0, && default_0,
325 && default_0, && default_0, && default_0, && default_0,
326 && default_0, && default_0, && default_0, && default_0,
327 && default_0, && default_0, && default_0, && case_0_87,
328 && default_0, && default_0, && default_0, && default_0,
329 && default_0, && default_0, && default_0, && case_0_95,
330 && default_0, && default_0, && default_0, && default_0,
331 && default_0, && default_0, && default_0, && default_0,
332 && default_0, && default_0, && default_0, && default_0,
333 && default_0, && default_0, && default_0, && default_0,
334 && case_0_112, && case_0_113, && case_0_114, && case_0_115,
335 && case_0_116, && case_0_117, && case_0_118, && case_0_119,
336 && case_0_120, && case_0_121, && case_0_122, && case_0_123,
337 && case_0_124, && case_0_125, && case_0_126, && case_0_127,
338 && default_0, && default_0, && default_0, && default_0,
339 && default_0, && default_0, && default_0, && default_0,
340 && default_0, && default_0, && default_0, && default_0,
341 && default_0, && default_0, && default_0, && default_0,
e0bd6e18 342 && case_0_144, && default_0, && default_0, && default_0,
b8a9943d
DE		 343 && default_0, && default_0, && default_0, && default_0,
344 && default_0, && default_0, && default_0, && default_0,
345 && default_0, && default_0, && default_0, && default_0,
346 && default_0, && default_0, && default_0, && default_0,
347 && default_0, && default_0, && default_0, && default_0,
348 && default_0, && default_0, && default_0, && default_0,
349 && default_0, && default_0, && default_0, && default_0,
350 && default_0, && default_0, && default_0, && default_0,
351 && default_0, && default_0, && default_0, && default_0,
352 && default_0, && default_0, && default_0, && default_0,
353 && default_0, && default_0, && default_0, && default_0,
354 && default_0, && default_0, && default_0, && default_0,
355 && default_0, && default_0, && default_0, && default_0,
356 && default_0, && default_0, && default_0, && default_0,
357 && default_0, && default_0, && default_0, && default_0,
358 && default_0, && default_0, && default_0, && default_0,
359 && default_0, && default_0, && default_0, && default_0,
360 && default_0, && default_0, && default_0, && default_0,
361 && default_0, && default_0, && default_0, && default_0,
362 && default_0, && default_0, && default_0, && default_0,
363 && default_0, && default_0, && default_0, && default_0,
364 && default_0, && default_0, && default_0, && default_0,
365 && default_0, && default_0, && default_0, && default_0,
366 && case_0_240, && case_0_241, && case_0_242, && case_0_243,
367 && case_0_244, && case_0_245, && case_0_246, && case_0_247,
368 && case_0_248, && case_0_249, && case_0_250, && case_0_251,
369 && case_0_252, && case_0_253, && case_0_254, && case_0_255,
370 };
371#endif
372 static DECODE *insns[256] = {
373 &decode_subv, &decode_subx, &decode_sub, &decode_neg,
374 &decode_cmp, &decode_cmpu, &decode_illegal, &decode_illegal,
375 &decode_addv, &decode_addx, &decode_add, &decode_not,
376 &decode_and, &decode_xor, &decode_or, &decode_illegal,
377 &decode_srl, &decode_illegal, &decode_sra, &decode_illegal,
378 &decode_sll, &decode_illegal, &decode_mul, &decode_illegal,
379 &decode_mv, &decode_mvfc, &decode_mvtc, &decode_illegal,
380 0, &decode_rte, &decode_illegal, &decode_trap,
381 &decode_stb, &decode_illegal, &decode_sth, &decode_illegal,
382 &decode_st, &decode_unlock, &decode_st_plus, &decode_st_minus,
383 &decode_ldb, &decode_ldub, &decode_ldh, &decode_lduh,
384 &decode_ld, &decode_lock, &decode_ld_plus, &decode_illegal,
385 &decode_mulhi, &decode_mullo, &decode_mulwhi, &decode_mulwlo,
386 &decode_machi, &decode_maclo, &decode_macwhi, &decode_macwlo,
387 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
388 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
389 &decode_addi, &decode_addi, &decode_addi, &decode_addi,
390 &decode_addi, &decode_addi, &decode_addi, &decode_addi,
391 &decode_addi, &decode_addi, &decode_addi, &decode_addi,
392 &decode_addi, &decode_addi, &decode_addi, &decode_addi,
393 &decode_srli, &decode_srli, &decode_srai, &decode_srai,
394 &decode_slli, &decode_slli, &decode_illegal, 0,
395 &decode_rach, &decode_rac, &decode_illegal, &decode_illegal,
396 &decode_illegal, &decode_illegal, &decode_illegal, 0,
397 &decode_ldi8, &decode_ldi8, &decode_ldi8, &decode_ldi8,
398 &decode_ldi8, &decode_ldi8, &decode_ldi8, &decode_ldi8,
399 &decode_ldi8, &decode_ldi8, &decode_ldi8, &decode_ldi8,
400 &decode_ldi8, &decode_ldi8, &decode_ldi8, &decode_ldi8,
401 0, 0, 0, 0,
402 0, 0, 0, 0,
403 0, 0, 0, 0,
404 0, 0, 0, 0,
405 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
406 &decode_cmpi, &decode_cmpui, &decode_illegal, &decode_illegal,
407 &decode_addv3, &decode_illegal, &decode_add3, &decode_illegal,
408 &decode_and3, &decode_xor3, &decode_or3, &decode_illegal,
e0bd6e18 409 0, &decode_divu, &decode_rem, &decode_remu,
b8a9943d
DE		 410 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
411 &decode_srl3, &decode_illegal, &decode_sra3, &decode_illegal,
412 &decode_sll3, &decode_illegal, &decode_illegal, &decode_ldi16,
413 &decode_stb_d, &decode_illegal, &decode_sth_d, &decode_illegal,
414 &decode_st_d, &decode_illegal, &decode_illegal, &decode_illegal,
415 &decode_ldb_d, &decode_ldub_d, &decode_ldh_d, &decode_lduh_d,
416 &decode_ld_d, &decode_illegal, &decode_illegal, &decode_illegal,
417 &decode_beq, &decode_bne, &decode_illegal, &decode_illegal,
418 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
419 &decode_beqz, &decode_bnez, &decode_bltz, &decode_bgez,
420 &decode_blez, &decode_bgtz, &decode_illegal, &decode_illegal,
421 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
422 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
423 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
424 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
425 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
426 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
427 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
428 &decode_seth, &decode_illegal, &decode_illegal, &decode_illegal,
429 &decode_ld24, &decode_ld24, &decode_ld24, &decode_ld24,
430 &decode_ld24, &decode_ld24, &decode_ld24, &decode_ld24,
431 &decode_ld24, &decode_ld24, &decode_ld24, &decode_ld24,
432 &decode_ld24, &decode_ld24, &decode_ld24, &decode_ld24,
433 0, 0, 0, 0,
434 0, 0, 0, 0,
435 0, 0, 0, 0,
436 0, 0, 0, 0,
437 };
438 unsigned int val;
439 val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0)));
440 DECODE_SWITCH (0, val)
441 {
442 CASE (0, 28) :
443 {
444 static DECODE *insns[16] = {
445 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
446 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
447 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
448 &decode_illegal, &decode_illegal, &decode_jl, &decode_jmp,
449 };
450 unsigned int val = (((insn >> 8) & (15 << 0)));
451 return insns[val];
452 }
453 CASE (0, 87) :
454 {
455 static DECODE *insns[16] = {
456 &decode_mvtachi, &decode_mvtaclo, &decode_illegal, &decode_illegal,
457 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
458 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
459 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
460 };
461 unsigned int val = (((insn >> 0) & (15 << 0)));
462 return insns[val];
463 }
464 CASE (0, 95) :
465 {
466 static DECODE *insns[16] = {
467 &decode_mvfachi, &decode_mvfaclo, &decode_mvfacmi, &decode_illegal,
468 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
469 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
470 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
471 };
472 unsigned int val = (((insn >> 0) & (15 << 0)));
473 return insns[val];
474 }
475 CASE (0, 112) :
476 {
477 static DECODE *insns[16] = {
478 &decode_nop, &decode_illegal, &decode_illegal, &decode_illegal,
479 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
480 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
481 &decode_bc8, &decode_bnc8, &decode_bl8, &decode_bra8,
482 };
483 unsigned int val = (((insn >> 8) & (15 << 0)));
484 return insns[val];
485 }
486 CASE (0, 113) : /* fall through */
487 CASE (0, 114) : /* fall through */
488 CASE (0, 115) : /* fall through */
489 CASE (0, 116) : /* fall through */
490 CASE (0, 117) : /* fall through */
491 CASE (0, 118) : /* fall through */
492 CASE (0, 119) : /* fall through */
493 CASE (0, 120) : /* fall through */
494 CASE (0, 121) : /* fall through */
495 CASE (0, 122) : /* fall through */
496 CASE (0, 123) : /* fall through */
497 CASE (0, 124) : /* fall through */
498 CASE (0, 125) : /* fall through */
499 CASE (0, 126) : /* fall through */
500 CASE (0, 127) :
501 {
502 static DECODE *insns[16] = {
503 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
504 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
505 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
506 &decode_bc8, &decode_bnc8, &decode_bl8, &decode_bra8,
507 };
508 unsigned int val = (((insn >> 8) & (15 << 0)));
509 return insns[val];
510 }
e0bd6e18
DE		 511 CASE (0, 144) :
512 {
513#ifdef __GNUC__
514 static void *labels_0_144[16] = {
515 && case_0_144_0, && default_0_144, && default_0_144, && default_0_144,
516 && default_0_144, && default_0_144, && default_0_144, && default_0_144,
517 && default_0_144, && default_0_144, && default_0_144, && default_0_144,
518 && default_0_144, && default_0_144, && default_0_144, && default_0_144,
519 };
520#endif
521 static DECODE *insns[16] = {
522 0, &decode_illegal, &decode_illegal, &decode_illegal,
523 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
524 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
525 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
526 };
527 unsigned int val;
528 /* Must fetch more bits. */
529 insn = GETIMEMUHI (current_cpu, CPU (h_pc) + 2);
530 val = (((insn >> 12) & (15 << 0)));
531 DECODE_SWITCH (0_144, val)
532 {
533 CASE (0_144, 0) :
534 {
535#ifdef __GNUC__
536 static void *labels_0_144_0[16] = {
537 && case_0_144_0_0, && default_0_144_0, && default_0_144_0, && default_0_144_0,
538 && default_0_144_0, && default_0_144_0, && default_0_144_0, && default_0_144_0,
539 && default_0_144_0, && default_0_144_0, && default_0_144_0, && default_0_144_0,
540 && default_0_144_0, && default_0_144_0, && default_0_144_0, && default_0_144_0,
541 };
542#endif
543 static DECODE *insns[16] = {
544 0, &decode_illegal, &decode_illegal, &decode_illegal,
545 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
546 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
547 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
548 };
549 unsigned int val;
550 val = (((insn >> 8) & (15 << 0)));
551 DECODE_SWITCH (0_144_0, val)
552 {
553 CASE (0_144_0, 0) :
554 {
555 static DECODE *insns[16] = {
556 &decode_div, &decode_divh, &decode_illegal, &decode_illegal,
557 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
558 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
559 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
560 };
561 unsigned int val = (((insn >> 4) & (15 << 0)));
562 return insns[val];
563 }
564 DEFAULT (0_144_0) : return insns[val];
565 }
566 ENDSWITCH (0_144_0)
567 }
568 DEFAULT (0_144) : return insns[val];
569 }
570 ENDSWITCH (0_144)
571 }
b8a9943d
DE		 572 CASE (0, 240) : /* fall through */
573 CASE (0, 241) : /* fall through */
574 CASE (0, 242) : /* fall through */
575 CASE (0, 243) : /* fall through */
576 CASE (0, 244) : /* fall through */
577 CASE (0, 245) : /* fall through */
578 CASE (0, 246) : /* fall through */
579 CASE (0, 247) : /* fall through */
580 CASE (0, 248) : /* fall through */
581 CASE (0, 249) : /* fall through */
582 CASE (0, 250) : /* fall through */
583 CASE (0, 251) : /* fall through */
584 CASE (0, 252) : /* fall through */
585 CASE (0, 253) : /* fall through */
586 CASE (0, 254) : /* fall through */
587 CASE (0, 255) :
588 {
589 static DECODE *insns[16] = {
590 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
591 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
592 &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
593 &decode_bc24, &decode_bnc24, &decode_bl24, &decode_bra24,
594 };
595 unsigned int val = (((insn >> 8) & (15 << 0)));
596 return insns[val];
597 }
598 DEFAULT (0) : return insns[val];
599 }
600 ENDSWITCH (0)
601 }
602}
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