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8e420152 DE |
1 | /* Simulator instruction operand reader for m32r. |
2 | ||
b8a9943d DE |
3 | This file is machine generated with CGEN. |
4 | ||
8e420152 DE |
5 | Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. |
6 | ||
7 | This file is part of the GNU Simulators. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2, or (at your option) | |
12 | any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License along | |
20 | with this program; if not, write to the Free Software Foundation, Inc., | |
21 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
22 | ||
23 | */ | |
24 | ||
8e420152 DE |
25 | #ifdef DEFINE_LABELS |
26 | #undef DEFINE_LABELS | |
27 | ||
8e420152 DE |
28 | /* The labels have the case they have because the enum of insn types |
29 | is all uppercase and in the non-stdc case the fmt symbol is built | |
30 | into the enum name. | |
31 | ||
32 | The order here must match the order in m32rx_decode_vars in decode.c. */ | |
33 | ||
34 | static void *labels[] = { | |
35 | && case_read_READ_ILLEGAL, | |
36 | && case_read_READ_FMT_0_ADD, | |
37 | && case_read_READ_FMT_1_ADD3, | |
dc4e95ad | 38 | && case_read_READ_FMT_0_ADD, |
8e420152 | 39 | && case_read_READ_FMT_2_AND3, |
dc4e95ad | 40 | && case_read_READ_FMT_0_ADD, |
8e420152 | 41 | && case_read_READ_FMT_3_OR3, |
dc4e95ad DE |
42 | && case_read_READ_FMT_0_ADD, |
43 | && case_read_READ_FMT_2_AND3, | |
8e420152 | 44 | && case_read_READ_FMT_4_ADDI, |
b8641a4d DE |
45 | && case_read_READ_FMT_5_ADDV, |
46 | && case_read_READ_FMT_6_ADDV3, | |
47 | && case_read_READ_FMT_7_ADDX, | |
48 | && case_read_READ_FMT_8_BC8, | |
49 | && case_read_READ_FMT_9_BC24, | |
50 | && case_read_READ_FMT_10_BEQ, | |
51 | && case_read_READ_FMT_11_BEQZ, | |
52 | && case_read_READ_FMT_11_BEQZ, | |
53 | && case_read_READ_FMT_11_BEQZ, | |
54 | && case_read_READ_FMT_11_BEQZ, | |
55 | && case_read_READ_FMT_11_BEQZ, | |
56 | && case_read_READ_FMT_11_BEQZ, | |
57 | && case_read_READ_FMT_12_BL8, | |
58 | && case_read_READ_FMT_13_BL24, | |
59 | && case_read_READ_FMT_14_BCL8, | |
60 | && case_read_READ_FMT_15_BCL24, | |
61 | && case_read_READ_FMT_8_BC8, | |
62 | && case_read_READ_FMT_9_BC24, | |
63 | && case_read_READ_FMT_10_BEQ, | |
64 | && case_read_READ_FMT_16_BRA8, | |
65 | && case_read_READ_FMT_17_BRA24, | |
66 | && case_read_READ_FMT_14_BCL8, | |
67 | && case_read_READ_FMT_15_BCL24, | |
68 | && case_read_READ_FMT_18_CMP, | |
69 | && case_read_READ_FMT_19_CMPI, | |
70 | && case_read_READ_FMT_18_CMP, | |
71 | && case_read_READ_FMT_20_CMPUI, | |
72 | && case_read_READ_FMT_18_CMP, | |
73 | && case_read_READ_FMT_21_CMPZ, | |
74 | && case_read_READ_FMT_22_DIV, | |
75 | && case_read_READ_FMT_22_DIV, | |
76 | && case_read_READ_FMT_22_DIV, | |
77 | && case_read_READ_FMT_22_DIV, | |
78 | && case_read_READ_FMT_22_DIV, | |
79 | && case_read_READ_FMT_23_JC, | |
80 | && case_read_READ_FMT_23_JC, | |
81 | && case_read_READ_FMT_24_JL, | |
82 | && case_read_READ_FMT_25_JMP, | |
83 | && case_read_READ_FMT_26_LD, | |
84 | && case_read_READ_FMT_27_LD_D, | |
85 | && case_read_READ_FMT_28_LDB, | |
86 | && case_read_READ_FMT_29_LDB_D, | |
87 | && case_read_READ_FMT_30_LDH, | |
88 | && case_read_READ_FMT_31_LDH_D, | |
89 | && case_read_READ_FMT_28_LDB, | |
90 | && case_read_READ_FMT_29_LDB_D, | |
91 | && case_read_READ_FMT_30_LDH, | |
92 | && case_read_READ_FMT_31_LDH_D, | |
93 | && case_read_READ_FMT_32_LD_PLUS, | |
94 | && case_read_READ_FMT_33_LD24, | |
95 | && case_read_READ_FMT_34_LDI8, | |
96 | && case_read_READ_FMT_35_LDI16, | |
97 | && case_read_READ_FMT_36_LOCK, | |
98 | && case_read_READ_FMT_37_MACHI_A, | |
99 | && case_read_READ_FMT_37_MACHI_A, | |
dc4e95ad | 100 | && case_read_READ_FMT_0_ADD, |
b8641a4d DE |
101 | && case_read_READ_FMT_38_MULHI_A, |
102 | && case_read_READ_FMT_38_MULHI_A, | |
103 | && case_read_READ_FMT_39_MV, | |
104 | && case_read_READ_FMT_40_MVFACHI_A, | |
105 | && case_read_READ_FMT_40_MVFACHI_A, | |
106 | && case_read_READ_FMT_40_MVFACHI_A, | |
107 | && case_read_READ_FMT_41_MVFC, | |
108 | && case_read_READ_FMT_42_MVTACHI_A, | |
109 | && case_read_READ_FMT_42_MVTACHI_A, | |
110 | && case_read_READ_FMT_43_MVTC, | |
111 | && case_read_READ_FMT_39_MV, | |
112 | && case_read_READ_FMT_44_NOP, | |
113 | && case_read_READ_FMT_39_MV, | |
cab58155 DE |
114 | && case_read_READ_FMT_45_RAC_DSI, |
115 | && case_read_READ_FMT_45_RAC_DSI, | |
116 | && case_read_READ_FMT_46_RTE, | |
117 | && case_read_READ_FMT_47_SETH, | |
dc4e95ad | 118 | && case_read_READ_FMT_0_ADD, |
cab58155 DE |
119 | && case_read_READ_FMT_48_SLL3, |
120 | && case_read_READ_FMT_49_SLLI, | |
dc4e95ad | 121 | && case_read_READ_FMT_0_ADD, |
cab58155 DE |
122 | && case_read_READ_FMT_48_SLL3, |
123 | && case_read_READ_FMT_49_SLLI, | |
dc4e95ad | 124 | && case_read_READ_FMT_0_ADD, |
cab58155 DE |
125 | && case_read_READ_FMT_48_SLL3, |
126 | && case_read_READ_FMT_49_SLLI, | |
127 | && case_read_READ_FMT_50_ST, | |
128 | && case_read_READ_FMT_51_ST_D, | |
129 | && case_read_READ_FMT_52_STB, | |
130 | && case_read_READ_FMT_53_STB_D, | |
131 | && case_read_READ_FMT_54_STH, | |
132 | && case_read_READ_FMT_55_STH_D, | |
133 | && case_read_READ_FMT_56_ST_PLUS, | |
134 | && case_read_READ_FMT_56_ST_PLUS, | |
dc4e95ad | 135 | && case_read_READ_FMT_0_ADD, |
b8641a4d DE |
136 | && case_read_READ_FMT_5_ADDV, |
137 | && case_read_READ_FMT_7_ADDX, | |
cab58155 DE |
138 | && case_read_READ_FMT_57_TRAP, |
139 | && case_read_READ_FMT_58_UNLOCK, | |
140 | && case_read_READ_FMT_59_SATB, | |
141 | && case_read_READ_FMT_59_SATB, | |
142 | && case_read_READ_FMT_60_SAT, | |
b8641a4d | 143 | && case_read_READ_FMT_21_CMPZ, |
cab58155 DE |
144 | && case_read_READ_FMT_61_SADD, |
145 | && case_read_READ_FMT_62_MACWU1, | |
146 | && case_read_READ_FMT_63_MSBLO, | |
147 | && case_read_READ_FMT_64_MULWU1, | |
148 | && case_read_READ_FMT_62_MACWU1, | |
149 | && case_read_READ_FMT_65_SC, | |
150 | && case_read_READ_FMT_65_SC, | |
8e420152 DE |
151 | 0 |
152 | }; | |
153 | extern DECODE *m32rx_decode_vars[]; | |
154 | int i; | |
155 | ||
156 | for (i = 0; m32rx_decode_vars[i] != 0; ++i) | |
157 | m32rx_decode_vars[i]->read = labels[i]; | |
158 | ||
159 | #endif /* DEFINE_LABELS */ | |
160 | ||
161 | #ifdef DEFINE_SWITCH | |
162 | #undef DEFINE_SWITCH | |
163 | ||
164 | { | |
165 | SWITCH (read, decode->read) | |
166 | { | |
167 | ||
168 | CASE (read, READ_ILLEGAL) : | |
169 | { | |
170 | sim_engine_illegal_insn (current_cpu, NULL_CIA /*FIXME*/); | |
171 | } | |
172 | BREAK (read); | |
173 | ||
174 | CASE (read, READ_FMT_0_ADD) : /* e.g. add $dr,$sr */ | |
175 | { | |
dc4e95ad | 176 | #define OPRND(f) par_exec->operands.fmt_0_add.f |
8e420152 | 177 | EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */ |
8e420152 DE |
178 | EXTRACT_FMT_0_ADD_CODE |
179 | ||
180 | /* Fetch the input operands for the semantic handler. */ | |
181 | OPRND (dr) = CPU (h_gr[f_r1]); | |
182 | OPRND (sr) = CPU (h_gr[f_r2]); | |
183 | #undef OPRND | |
184 | } | |
185 | BREAK (read); | |
186 | ||
187 | CASE (read, READ_FMT_1_ADD3) : /* e.g. add3 $dr,$sr,#$slo16 */ | |
188 | { | |
dc4e95ad | 189 | #define OPRND(f) par_exec->operands.fmt_1_add3.f |
8e420152 | 190 | EXTRACT_FMT_1_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ |
8e420152 DE |
191 | EXTRACT_FMT_1_ADD3_CODE |
192 | ||
193 | /* Fetch the input operands for the semantic handler. */ | |
194 | OPRND (slo16) = f_simm16; | |
195 | OPRND (sr) = CPU (h_gr[f_r2]); | |
196 | #undef OPRND | |
197 | } | |
198 | BREAK (read); | |
199 | ||
200 | CASE (read, READ_FMT_2_AND3) : /* e.g. and3 $dr,$sr,#$uimm16 */ | |
201 | { | |
dc4e95ad | 202 | #define OPRND(f) par_exec->operands.fmt_2_and3.f |
8e420152 | 203 | EXTRACT_FMT_2_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */ |
8e420152 DE |
204 | EXTRACT_FMT_2_AND3_CODE |
205 | ||
206 | /* Fetch the input operands for the semantic handler. */ | |
207 | OPRND (sr) = CPU (h_gr[f_r2]); | |
208 | OPRND (uimm16) = f_uimm16; | |
209 | #undef OPRND | |
210 | } | |
211 | BREAK (read); | |
212 | ||
213 | CASE (read, READ_FMT_3_OR3) : /* e.g. or3 $dr,$sr,#$ulo16 */ | |
214 | { | |
dc4e95ad | 215 | #define OPRND(f) par_exec->operands.fmt_3_or3.f |
8e420152 | 216 | EXTRACT_FMT_3_OR3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */ |
8e420152 DE |
217 | EXTRACT_FMT_3_OR3_CODE |
218 | ||
219 | /* Fetch the input operands for the semantic handler. */ | |
220 | OPRND (sr) = CPU (h_gr[f_r2]); | |
221 | OPRND (ulo16) = f_uimm16; | |
222 | #undef OPRND | |
223 | } | |
224 | BREAK (read); | |
225 | ||
226 | CASE (read, READ_FMT_4_ADDI) : /* e.g. addi $dr,#$simm8 */ | |
227 | { | |
dc4e95ad | 228 | #define OPRND(f) par_exec->operands.fmt_4_addi.f |
8e420152 | 229 | EXTRACT_FMT_4_ADDI_VARS /* f-op1 f-r1 f-simm8 */ |
8e420152 DE |
230 | EXTRACT_FMT_4_ADDI_CODE |
231 | ||
232 | /* Fetch the input operands for the semantic handler. */ | |
233 | OPRND (dr) = CPU (h_gr[f_r1]); | |
234 | OPRND (simm8) = f_simm8; | |
235 | #undef OPRND | |
236 | } | |
237 | BREAK (read); | |
238 | ||
b8641a4d | 239 | CASE (read, READ_FMT_5_ADDV) : /* e.g. addv $dr,$sr */ |
8e420152 | 240 | { |
b8641a4d DE |
241 | #define OPRND(f) par_exec->operands.fmt_5_addv.f |
242 | EXTRACT_FMT_5_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
243 | EXTRACT_FMT_5_ADDV_CODE | |
244 | ||
245 | /* Fetch the input operands for the semantic handler. */ | |
246 | OPRND (dr) = CPU (h_gr[f_r1]); | |
247 | OPRND (sr) = CPU (h_gr[f_r2]); | |
248 | #undef OPRND | |
249 | } | |
250 | BREAK (read); | |
251 | ||
252 | CASE (read, READ_FMT_6_ADDV3) : /* e.g. addv3 $dr,$sr,#$simm16 */ | |
253 | { | |
254 | #define OPRND(f) par_exec->operands.fmt_6_addv3.f | |
255 | EXTRACT_FMT_6_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
256 | EXTRACT_FMT_6_ADDV3_CODE | |
8e420152 DE |
257 | |
258 | /* Fetch the input operands for the semantic handler. */ | |
259 | OPRND (simm16) = f_simm16; | |
260 | OPRND (sr) = CPU (h_gr[f_r2]); | |
261 | #undef OPRND | |
262 | } | |
263 | BREAK (read); | |
264 | ||
b8641a4d | 265 | CASE (read, READ_FMT_7_ADDX) : /* e.g. addx $dr,$sr */ |
8e420152 | 266 | { |
b8641a4d DE |
267 | #define OPRND(f) par_exec->operands.fmt_7_addx.f |
268 | EXTRACT_FMT_7_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
269 | EXTRACT_FMT_7_ADDX_CODE | |
8e420152 DE |
270 | |
271 | /* Fetch the input operands for the semantic handler. */ | |
272 | OPRND (condbit) = CPU (h_cond); | |
273 | OPRND (dr) = CPU (h_gr[f_r1]); | |
274 | OPRND (sr) = CPU (h_gr[f_r2]); | |
275 | #undef OPRND | |
276 | } | |
277 | BREAK (read); | |
278 | ||
b8641a4d | 279 | CASE (read, READ_FMT_8_BC8) : /* e.g. bc $disp8 */ |
8e420152 | 280 | { |
b8641a4d DE |
281 | #define OPRND(f) par_exec->operands.fmt_8_bc8.f |
282 | EXTRACT_FMT_8_BC8_VARS /* f-op1 f-r1 f-disp8 */ | |
283 | EXTRACT_FMT_8_BC8_CODE | |
8e420152 DE |
284 | |
285 | /* Fetch the input operands for the semantic handler. */ | |
286 | OPRND (condbit) = CPU (h_cond); | |
b8641a4d | 287 | RECORD_IADDR (OPRND (disp8), (pc & -4L) + f_disp8); |
8e420152 DE |
288 | #undef OPRND |
289 | } | |
290 | BREAK (read); | |
291 | ||
b8641a4d | 292 | CASE (read, READ_FMT_9_BC24) : /* e.g. bc $disp24 */ |
8e420152 | 293 | { |
b8641a4d DE |
294 | #define OPRND(f) par_exec->operands.fmt_9_bc24.f |
295 | EXTRACT_FMT_9_BC24_VARS /* f-op1 f-r1 f-disp24 */ | |
296 | EXTRACT_FMT_9_BC24_CODE | |
8e420152 DE |
297 | |
298 | /* Fetch the input operands for the semantic handler. */ | |
299 | OPRND (condbit) = CPU (h_cond); | |
b8641a4d | 300 | OPRND (disp24) = pc + f_disp24; |
8e420152 DE |
301 | #undef OPRND |
302 | } | |
303 | BREAK (read); | |
304 | ||
b8641a4d | 305 | CASE (read, READ_FMT_10_BEQ) : /* e.g. beq $src1,$src2,$disp16 */ |
8e420152 | 306 | { |
b8641a4d DE |
307 | #define OPRND(f) par_exec->operands.fmt_10_beq.f |
308 | EXTRACT_FMT_10_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */ | |
309 | EXTRACT_FMT_10_BEQ_CODE | |
8e420152 DE |
310 | |
311 | /* Fetch the input operands for the semantic handler. */ | |
b8641a4d | 312 | OPRND (disp16) = pc + f_disp16; |
8e420152 DE |
313 | OPRND (src1) = CPU (h_gr[f_r1]); |
314 | OPRND (src2) = CPU (h_gr[f_r2]); | |
315 | #undef OPRND | |
316 | } | |
317 | BREAK (read); | |
318 | ||
b8641a4d | 319 | CASE (read, READ_FMT_11_BEQZ) : /* e.g. beqz $src2,$disp16 */ |
8e420152 | 320 | { |
b8641a4d DE |
321 | #define OPRND(f) par_exec->operands.fmt_11_beqz.f |
322 | EXTRACT_FMT_11_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */ | |
323 | EXTRACT_FMT_11_BEQZ_CODE | |
8e420152 DE |
324 | |
325 | /* Fetch the input operands for the semantic handler. */ | |
b8641a4d | 326 | OPRND (disp16) = pc + f_disp16; |
8e420152 DE |
327 | OPRND (src2) = CPU (h_gr[f_r2]); |
328 | #undef OPRND | |
329 | } | |
330 | BREAK (read); | |
331 | ||
b8641a4d | 332 | CASE (read, READ_FMT_12_BL8) : /* e.g. bl $disp8 */ |
8e420152 | 333 | { |
b8641a4d DE |
334 | #define OPRND(f) par_exec->operands.fmt_12_bl8.f |
335 | EXTRACT_FMT_12_BL8_VARS /* f-op1 f-r1 f-disp8 */ | |
336 | EXTRACT_FMT_12_BL8_CODE | |
8e420152 DE |
337 | |
338 | /* Fetch the input operands for the semantic handler. */ | |
b8641a4d | 339 | RECORD_IADDR (OPRND (disp8), (pc & -4L) + f_disp8); |
8e420152 DE |
340 | OPRND (pc) = CPU (h_pc); |
341 | #undef OPRND | |
342 | } | |
343 | BREAK (read); | |
344 | ||
b8641a4d | 345 | CASE (read, READ_FMT_13_BL24) : /* e.g. bl $disp24 */ |
8e420152 | 346 | { |
b8641a4d DE |
347 | #define OPRND(f) par_exec->operands.fmt_13_bl24.f |
348 | EXTRACT_FMT_13_BL24_VARS /* f-op1 f-r1 f-disp24 */ | |
349 | EXTRACT_FMT_13_BL24_CODE | |
8e420152 DE |
350 | |
351 | /* Fetch the input operands for the semantic handler. */ | |
b8641a4d | 352 | OPRND (disp24) = pc + f_disp24; |
8e420152 DE |
353 | OPRND (pc) = CPU (h_pc); |
354 | #undef OPRND | |
355 | } | |
356 | BREAK (read); | |
357 | ||
b8641a4d | 358 | CASE (read, READ_FMT_14_BCL8) : /* e.g. bcl $disp8 */ |
8e420152 | 359 | { |
b8641a4d DE |
360 | #define OPRND(f) par_exec->operands.fmt_14_bcl8.f |
361 | EXTRACT_FMT_14_BCL8_VARS /* f-op1 f-r1 f-disp8 */ | |
362 | EXTRACT_FMT_14_BCL8_CODE | |
8e420152 DE |
363 | |
364 | /* Fetch the input operands for the semantic handler. */ | |
365 | OPRND (condbit) = CPU (h_cond); | |
b8641a4d | 366 | RECORD_IADDR (OPRND (disp8), (pc & -4L) + f_disp8); |
8e420152 DE |
367 | OPRND (pc) = CPU (h_pc); |
368 | #undef OPRND | |
369 | } | |
370 | BREAK (read); | |
371 | ||
b8641a4d | 372 | CASE (read, READ_FMT_15_BCL24) : /* e.g. bcl $disp24 */ |
8e420152 | 373 | { |
b8641a4d DE |
374 | #define OPRND(f) par_exec->operands.fmt_15_bcl24.f |
375 | EXTRACT_FMT_15_BCL24_VARS /* f-op1 f-r1 f-disp24 */ | |
376 | EXTRACT_FMT_15_BCL24_CODE | |
8e420152 DE |
377 | |
378 | /* Fetch the input operands for the semantic handler. */ | |
379 | OPRND (condbit) = CPU (h_cond); | |
b8641a4d | 380 | OPRND (disp24) = pc + f_disp24; |
8e420152 DE |
381 | OPRND (pc) = CPU (h_pc); |
382 | #undef OPRND | |
383 | } | |
384 | BREAK (read); | |
385 | ||
b8641a4d | 386 | CASE (read, READ_FMT_16_BRA8) : /* e.g. bra $disp8 */ |
8e420152 | 387 | { |
b8641a4d DE |
388 | #define OPRND(f) par_exec->operands.fmt_16_bra8.f |
389 | EXTRACT_FMT_16_BRA8_VARS /* f-op1 f-r1 f-disp8 */ | |
390 | EXTRACT_FMT_16_BRA8_CODE | |
8e420152 DE |
391 | |
392 | /* Fetch the input operands for the semantic handler. */ | |
b8641a4d | 393 | RECORD_IADDR (OPRND (disp8), (pc & -4L) + f_disp8); |
8e420152 DE |
394 | #undef OPRND |
395 | } | |
396 | BREAK (read); | |
397 | ||
b8641a4d | 398 | CASE (read, READ_FMT_17_BRA24) : /* e.g. bra $disp24 */ |
8e420152 | 399 | { |
b8641a4d DE |
400 | #define OPRND(f) par_exec->operands.fmt_17_bra24.f |
401 | EXTRACT_FMT_17_BRA24_VARS /* f-op1 f-r1 f-disp24 */ | |
402 | EXTRACT_FMT_17_BRA24_CODE | |
8e420152 DE |
403 | |
404 | /* Fetch the input operands for the semantic handler. */ | |
b8641a4d | 405 | OPRND (disp24) = pc + f_disp24; |
8e420152 DE |
406 | #undef OPRND |
407 | } | |
408 | BREAK (read); | |
409 | ||
b8641a4d | 410 | CASE (read, READ_FMT_18_CMP) : /* e.g. cmp $src1,$src2 */ |
8e420152 | 411 | { |
b8641a4d DE |
412 | #define OPRND(f) par_exec->operands.fmt_18_cmp.f |
413 | EXTRACT_FMT_18_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
414 | EXTRACT_FMT_18_CMP_CODE | |
8e420152 DE |
415 | |
416 | /* Fetch the input operands for the semantic handler. */ | |
417 | OPRND (src1) = CPU (h_gr[f_r1]); | |
418 | OPRND (src2) = CPU (h_gr[f_r2]); | |
419 | #undef OPRND | |
420 | } | |
421 | BREAK (read); | |
422 | ||
b8641a4d | 423 | CASE (read, READ_FMT_19_CMPI) : /* e.g. cmpi $src2,#$simm16 */ |
8e420152 | 424 | { |
b8641a4d DE |
425 | #define OPRND(f) par_exec->operands.fmt_19_cmpi.f |
426 | EXTRACT_FMT_19_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
427 | EXTRACT_FMT_19_CMPI_CODE | |
8e420152 DE |
428 | |
429 | /* Fetch the input operands for the semantic handler. */ | |
430 | OPRND (simm16) = f_simm16; | |
431 | OPRND (src2) = CPU (h_gr[f_r2]); | |
432 | #undef OPRND | |
433 | } | |
434 | BREAK (read); | |
435 | ||
b8641a4d | 436 | CASE (read, READ_FMT_20_CMPUI) : /* e.g. cmpui $src2,#$uimm16 */ |
8e420152 | 437 | { |
b8641a4d DE |
438 | #define OPRND(f) par_exec->operands.fmt_20_cmpui.f |
439 | EXTRACT_FMT_20_CMPUI_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */ | |
440 | EXTRACT_FMT_20_CMPUI_CODE | |
8e420152 DE |
441 | |
442 | /* Fetch the input operands for the semantic handler. */ | |
443 | OPRND (src2) = CPU (h_gr[f_r2]); | |
444 | OPRND (uimm16) = f_uimm16; | |
445 | #undef OPRND | |
446 | } | |
447 | BREAK (read); | |
448 | ||
b8641a4d | 449 | CASE (read, READ_FMT_21_CMPZ) : /* e.g. cmpz $src2 */ |
8e420152 | 450 | { |
b8641a4d DE |
451 | #define OPRND(f) par_exec->operands.fmt_21_cmpz.f |
452 | EXTRACT_FMT_21_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
453 | EXTRACT_FMT_21_CMPZ_CODE | |
8e420152 DE |
454 | |
455 | /* Fetch the input operands for the semantic handler. */ | |
456 | OPRND (src2) = CPU (h_gr[f_r2]); | |
457 | #undef OPRND | |
458 | } | |
459 | BREAK (read); | |
460 | ||
b8641a4d | 461 | CASE (read, READ_FMT_22_DIV) : /* e.g. div $dr,$sr */ |
8e420152 | 462 | { |
b8641a4d DE |
463 | #define OPRND(f) par_exec->operands.fmt_22_div.f |
464 | EXTRACT_FMT_22_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
465 | EXTRACT_FMT_22_DIV_CODE | |
8e420152 DE |
466 | |
467 | /* Fetch the input operands for the semantic handler. */ | |
468 | OPRND (dr) = CPU (h_gr[f_r1]); | |
469 | OPRND (sr) = CPU (h_gr[f_r2]); | |
470 | #undef OPRND | |
471 | } | |
472 | BREAK (read); | |
473 | ||
b8641a4d | 474 | CASE (read, READ_FMT_23_JC) : /* e.g. jc $sr */ |
8e420152 | 475 | { |
b8641a4d DE |
476 | #define OPRND(f) par_exec->operands.fmt_23_jc.f |
477 | EXTRACT_FMT_23_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
478 | EXTRACT_FMT_23_JC_CODE | |
8e420152 DE |
479 | |
480 | /* Fetch the input operands for the semantic handler. */ | |
481 | OPRND (condbit) = CPU (h_cond); | |
482 | OPRND (sr) = CPU (h_gr[f_r2]); | |
483 | #undef OPRND | |
484 | } | |
485 | BREAK (read); | |
486 | ||
b8641a4d | 487 | CASE (read, READ_FMT_24_JL) : /* e.g. jl $sr */ |
8e420152 | 488 | { |
b8641a4d DE |
489 | #define OPRND(f) par_exec->operands.fmt_24_jl.f |
490 | EXTRACT_FMT_24_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
491 | EXTRACT_FMT_24_JL_CODE | |
8e420152 DE |
492 | |
493 | /* Fetch the input operands for the semantic handler. */ | |
494 | OPRND (pc) = CPU (h_pc); | |
495 | OPRND (sr) = CPU (h_gr[f_r2]); | |
496 | #undef OPRND | |
497 | } | |
498 | BREAK (read); | |
499 | ||
b8641a4d | 500 | CASE (read, READ_FMT_25_JMP) : /* e.g. jmp $sr */ |
8e420152 | 501 | { |
b8641a4d DE |
502 | #define OPRND(f) par_exec->operands.fmt_25_jmp.f |
503 | EXTRACT_FMT_25_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
504 | EXTRACT_FMT_25_JMP_CODE | |
8e420152 DE |
505 | |
506 | /* Fetch the input operands for the semantic handler. */ | |
507 | OPRND (sr) = CPU (h_gr[f_r2]); | |
508 | #undef OPRND | |
509 | } | |
510 | BREAK (read); | |
511 | ||
b8641a4d | 512 | CASE (read, READ_FMT_26_LD) : /* e.g. ld $dr,@$sr */ |
8e420152 | 513 | { |
b8641a4d DE |
514 | #define OPRND(f) par_exec->operands.fmt_26_ld.f |
515 | EXTRACT_FMT_26_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
516 | EXTRACT_FMT_26_LD_CODE | |
8e420152 DE |
517 | |
518 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d | 519 | OPRND (h_memory_sr) = GETMEMSI (current_cpu, CPU (h_gr[f_r2])); |
8e420152 DE |
520 | OPRND (sr) = CPU (h_gr[f_r2]); |
521 | #undef OPRND | |
522 | } | |
523 | BREAK (read); | |
524 | ||
b8641a4d | 525 | CASE (read, READ_FMT_27_LD_D) : /* e.g. ld $dr,@($slo16,$sr) */ |
8e420152 | 526 | { |
b8641a4d DE |
527 | #define OPRND(f) par_exec->operands.fmt_27_ld_d.f |
528 | EXTRACT_FMT_27_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
529 | EXTRACT_FMT_27_LD_D_CODE | |
8e420152 DE |
530 | |
531 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d | 532 | OPRND (h_memory_add_WI_sr_slo16) = GETMEMSI (current_cpu, ADDSI (CPU (h_gr[f_r2]), f_simm16)); |
8e420152 DE |
533 | OPRND (slo16) = f_simm16; |
534 | OPRND (sr) = CPU (h_gr[f_r2]); | |
535 | #undef OPRND | |
536 | } | |
537 | BREAK (read); | |
538 | ||
b8641a4d | 539 | CASE (read, READ_FMT_28_LDB) : /* e.g. ldb $dr,@$sr */ |
8e420152 | 540 | { |
b8641a4d DE |
541 | #define OPRND(f) par_exec->operands.fmt_28_ldb.f |
542 | EXTRACT_FMT_28_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
543 | EXTRACT_FMT_28_LDB_CODE | |
8e420152 DE |
544 | |
545 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d | 546 | OPRND (h_memory_sr) = GETMEMQI (current_cpu, CPU (h_gr[f_r2])); |
8e420152 DE |
547 | OPRND (sr) = CPU (h_gr[f_r2]); |
548 | #undef OPRND | |
549 | } | |
550 | BREAK (read); | |
551 | ||
b8641a4d | 552 | CASE (read, READ_FMT_29_LDB_D) : /* e.g. ldb $dr,@($slo16,$sr) */ |
8e420152 | 553 | { |
b8641a4d DE |
554 | #define OPRND(f) par_exec->operands.fmt_29_ldb_d.f |
555 | EXTRACT_FMT_29_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
556 | EXTRACT_FMT_29_LDB_D_CODE | |
8e420152 DE |
557 | |
558 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d | 559 | OPRND (h_memory_add_WI_sr_slo16) = GETMEMQI (current_cpu, ADDSI (CPU (h_gr[f_r2]), f_simm16)); |
8e420152 DE |
560 | OPRND (slo16) = f_simm16; |
561 | OPRND (sr) = CPU (h_gr[f_r2]); | |
562 | #undef OPRND | |
563 | } | |
564 | BREAK (read); | |
565 | ||
b8641a4d | 566 | CASE (read, READ_FMT_30_LDH) : /* e.g. ldh $dr,@$sr */ |
8e420152 | 567 | { |
b8641a4d DE |
568 | #define OPRND(f) par_exec->operands.fmt_30_ldh.f |
569 | EXTRACT_FMT_30_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
570 | EXTRACT_FMT_30_LDH_CODE | |
8e420152 DE |
571 | |
572 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d | 573 | OPRND (h_memory_sr) = GETMEMHI (current_cpu, CPU (h_gr[f_r2])); |
8e420152 DE |
574 | OPRND (sr) = CPU (h_gr[f_r2]); |
575 | #undef OPRND | |
576 | } | |
577 | BREAK (read); | |
578 | ||
b8641a4d | 579 | CASE (read, READ_FMT_31_LDH_D) : /* e.g. ldh $dr,@($slo16,$sr) */ |
8e420152 | 580 | { |
b8641a4d DE |
581 | #define OPRND(f) par_exec->operands.fmt_31_ldh_d.f |
582 | EXTRACT_FMT_31_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
583 | EXTRACT_FMT_31_LDH_D_CODE | |
8e420152 DE |
584 | |
585 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d | 586 | OPRND (h_memory_add_WI_sr_slo16) = GETMEMHI (current_cpu, ADDSI (CPU (h_gr[f_r2]), f_simm16)); |
8e420152 DE |
587 | OPRND (slo16) = f_simm16; |
588 | OPRND (sr) = CPU (h_gr[f_r2]); | |
589 | #undef OPRND | |
590 | } | |
591 | BREAK (read); | |
592 | ||
b8641a4d | 593 | CASE (read, READ_FMT_32_LD_PLUS) : /* e.g. ld $dr,@$sr+ */ |
8e420152 | 594 | { |
b8641a4d DE |
595 | #define OPRND(f) par_exec->operands.fmt_32_ld_plus.f |
596 | EXTRACT_FMT_32_LD_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
597 | EXTRACT_FMT_32_LD_PLUS_CODE | |
598 | ||
599 | /* Fetch the input operands for the semantic handler. */ | |
600 | OPRND (h_memory_sr) = GETMEMSI (current_cpu, CPU (h_gr[f_r2])); | |
601 | OPRND (sr) = CPU (h_gr[f_r2]); | |
602 | #undef OPRND | |
603 | } | |
604 | BREAK (read); | |
605 | ||
606 | CASE (read, READ_FMT_33_LD24) : /* e.g. ld24 $dr,#$uimm24 */ | |
607 | { | |
608 | #define OPRND(f) par_exec->operands.fmt_33_ld24.f | |
609 | EXTRACT_FMT_33_LD24_VARS /* f-op1 f-r1 f-uimm24 */ | |
610 | EXTRACT_FMT_33_LD24_CODE | |
8e420152 DE |
611 | |
612 | /* Fetch the input operands for the semantic handler. */ | |
613 | OPRND (uimm24) = f_uimm24; | |
614 | #undef OPRND | |
615 | } | |
616 | BREAK (read); | |
617 | ||
b8641a4d | 618 | CASE (read, READ_FMT_34_LDI8) : /* e.g. ldi $dr,#$simm8 */ |
8e420152 | 619 | { |
b8641a4d DE |
620 | #define OPRND(f) par_exec->operands.fmt_34_ldi8.f |
621 | EXTRACT_FMT_34_LDI8_VARS /* f-op1 f-r1 f-simm8 */ | |
622 | EXTRACT_FMT_34_LDI8_CODE | |
8e420152 DE |
623 | |
624 | /* Fetch the input operands for the semantic handler. */ | |
625 | OPRND (simm8) = f_simm8; | |
626 | #undef OPRND | |
627 | } | |
628 | BREAK (read); | |
629 | ||
b8641a4d | 630 | CASE (read, READ_FMT_35_LDI16) : /* e.g. ldi $dr,$slo16 */ |
8e420152 | 631 | { |
b8641a4d DE |
632 | #define OPRND(f) par_exec->operands.fmt_35_ldi16.f |
633 | EXTRACT_FMT_35_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
634 | EXTRACT_FMT_35_LDI16_CODE | |
8e420152 DE |
635 | |
636 | /* Fetch the input operands for the semantic handler. */ | |
637 | OPRND (slo16) = f_simm16; | |
638 | #undef OPRND | |
639 | } | |
640 | BREAK (read); | |
641 | ||
b8641a4d DE |
642 | CASE (read, READ_FMT_36_LOCK) : /* e.g. lock $dr,@$sr */ |
643 | { | |
644 | #define OPRND(f) par_exec->operands.fmt_36_lock.f | |
645 | EXTRACT_FMT_36_LOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
646 | EXTRACT_FMT_36_LOCK_CODE | |
647 | ||
648 | /* Fetch the input operands for the semantic handler. */ | |
cab58155 | 649 | OPRND (h_memory_sr) = GETMEMSI (current_cpu, CPU (h_gr[f_r2])); |
b8641a4d DE |
650 | OPRND (sr) = CPU (h_gr[f_r2]); |
651 | #undef OPRND | |
652 | } | |
653 | BREAK (read); | |
654 | ||
655 | CASE (read, READ_FMT_37_MACHI_A) : /* e.g. machi $src1,$src2,$acc */ | |
8e420152 | 656 | { |
b8641a4d DE |
657 | #define OPRND(f) par_exec->operands.fmt_37_machi_a.f |
658 | EXTRACT_FMT_37_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */ | |
659 | EXTRACT_FMT_37_MACHI_A_CODE | |
8e420152 DE |
660 | |
661 | /* Fetch the input operands for the semantic handler. */ | |
662 | OPRND (acc) = m32rx_h_accums_get (current_cpu, f_acc); | |
663 | OPRND (src1) = CPU (h_gr[f_r1]); | |
664 | OPRND (src2) = CPU (h_gr[f_r2]); | |
665 | #undef OPRND | |
666 | } | |
667 | BREAK (read); | |
668 | ||
b8641a4d | 669 | CASE (read, READ_FMT_38_MULHI_A) : /* e.g. mulhi $src1,$src2,$acc */ |
8e420152 | 670 | { |
b8641a4d DE |
671 | #define OPRND(f) par_exec->operands.fmt_38_mulhi_a.f |
672 | EXTRACT_FMT_38_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */ | |
673 | EXTRACT_FMT_38_MULHI_A_CODE | |
8e420152 DE |
674 | |
675 | /* Fetch the input operands for the semantic handler. */ | |
676 | OPRND (src1) = CPU (h_gr[f_r1]); | |
677 | OPRND (src2) = CPU (h_gr[f_r2]); | |
678 | #undef OPRND | |
679 | } | |
680 | BREAK (read); | |
681 | ||
b8641a4d | 682 | CASE (read, READ_FMT_39_MV) : /* e.g. mv $dr,$sr */ |
8e420152 | 683 | { |
b8641a4d DE |
684 | #define OPRND(f) par_exec->operands.fmt_39_mv.f |
685 | EXTRACT_FMT_39_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
686 | EXTRACT_FMT_39_MV_CODE | |
8e420152 DE |
687 | |
688 | /* Fetch the input operands for the semantic handler. */ | |
689 | OPRND (sr) = CPU (h_gr[f_r2]); | |
690 | #undef OPRND | |
691 | } | |
692 | BREAK (read); | |
693 | ||
b8641a4d | 694 | CASE (read, READ_FMT_40_MVFACHI_A) : /* e.g. mvfachi $dr,$accs */ |
8e420152 | 695 | { |
b8641a4d DE |
696 | #define OPRND(f) par_exec->operands.fmt_40_mvfachi_a.f |
697 | EXTRACT_FMT_40_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */ | |
698 | EXTRACT_FMT_40_MVFACHI_A_CODE | |
8e420152 DE |
699 | |
700 | /* Fetch the input operands for the semantic handler. */ | |
701 | OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs); | |
702 | #undef OPRND | |
703 | } | |
704 | BREAK (read); | |
705 | ||
b8641a4d | 706 | CASE (read, READ_FMT_41_MVFC) : /* e.g. mvfc $dr,$scr */ |
8e420152 | 707 | { |
b8641a4d DE |
708 | #define OPRND(f) par_exec->operands.fmt_41_mvfc.f |
709 | EXTRACT_FMT_41_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
710 | EXTRACT_FMT_41_MVFC_CODE | |
8e420152 DE |
711 | |
712 | /* Fetch the input operands for the semantic handler. */ | |
713 | OPRND (scr) = m32rx_h_cr_get (current_cpu, f_r2); | |
714 | #undef OPRND | |
715 | } | |
716 | BREAK (read); | |
717 | ||
b8641a4d | 718 | CASE (read, READ_FMT_42_MVTACHI_A) : /* e.g. mvtachi $src1,$accs */ |
8e420152 | 719 | { |
b8641a4d DE |
720 | #define OPRND(f) par_exec->operands.fmt_42_mvtachi_a.f |
721 | EXTRACT_FMT_42_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */ | |
722 | EXTRACT_FMT_42_MVTACHI_A_CODE | |
8e420152 DE |
723 | |
724 | /* Fetch the input operands for the semantic handler. */ | |
725 | OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs); | |
726 | OPRND (src1) = CPU (h_gr[f_r1]); | |
727 | #undef OPRND | |
728 | } | |
729 | BREAK (read); | |
730 | ||
b8641a4d | 731 | CASE (read, READ_FMT_43_MVTC) : /* e.g. mvtc $sr,$dcr */ |
8e420152 | 732 | { |
b8641a4d DE |
733 | #define OPRND(f) par_exec->operands.fmt_43_mvtc.f |
734 | EXTRACT_FMT_43_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
735 | EXTRACT_FMT_43_MVTC_CODE | |
8e420152 DE |
736 | |
737 | /* Fetch the input operands for the semantic handler. */ | |
738 | OPRND (sr) = CPU (h_gr[f_r2]); | |
739 | #undef OPRND | |
740 | } | |
741 | BREAK (read); | |
742 | ||
b8641a4d | 743 | CASE (read, READ_FMT_44_NOP) : /* e.g. nop */ |
8e420152 | 744 | { |
b8641a4d DE |
745 | #define OPRND(f) par_exec->operands.fmt_44_nop.f |
746 | EXTRACT_FMT_44_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
747 | EXTRACT_FMT_44_NOP_CODE | |
8e420152 DE |
748 | |
749 | /* Fetch the input operands for the semantic handler. */ | |
750 | #undef OPRND | |
751 | } | |
752 | BREAK (read); | |
753 | ||
cab58155 | 754 | CASE (read, READ_FMT_45_RAC_DSI) : /* e.g. rac $accd,$accs,#$imm1 */ |
e0bd6e18 | 755 | { |
cab58155 DE |
756 | #define OPRND(f) par_exec->operands.fmt_45_rac_dsi.f |
757 | EXTRACT_FMT_45_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */ | |
758 | EXTRACT_FMT_45_RAC_DSI_CODE | |
8e420152 DE |
759 | |
760 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d | 761 | OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs); |
e0bd6e18 | 762 | OPRND (imm1) = f_imm1; |
8e420152 DE |
763 | #undef OPRND |
764 | } | |
765 | BREAK (read); | |
766 | ||
cab58155 | 767 | CASE (read, READ_FMT_46_RTE) : /* e.g. rte */ |
8e420152 | 768 | { |
cab58155 DE |
769 | #define OPRND(f) par_exec->operands.fmt_46_rte.f |
770 | EXTRACT_FMT_46_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
771 | EXTRACT_FMT_46_RTE_CODE | |
8e420152 DE |
772 | |
773 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d DE |
774 | OPRND (h_bcond_0) = CPU (h_bcond); |
775 | OPRND (h_bie_0) = CPU (h_bie); | |
776 | OPRND (h_bpc_0) = CPU (h_bpc); | |
777 | OPRND (h_bsm_0) = CPU (h_bsm); | |
8e420152 DE |
778 | #undef OPRND |
779 | } | |
780 | BREAK (read); | |
781 | ||
cab58155 | 782 | CASE (read, READ_FMT_47_SETH) : /* e.g. seth $dr,#$hi16 */ |
8e420152 | 783 | { |
cab58155 DE |
784 | #define OPRND(f) par_exec->operands.fmt_47_seth.f |
785 | EXTRACT_FMT_47_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */ | |
786 | EXTRACT_FMT_47_SETH_CODE | |
8e420152 DE |
787 | |
788 | /* Fetch the input operands for the semantic handler. */ | |
789 | OPRND (hi16) = f_hi16; | |
790 | #undef OPRND | |
791 | } | |
792 | BREAK (read); | |
793 | ||
cab58155 | 794 | CASE (read, READ_FMT_48_SLL3) : /* e.g. sll3 $dr,$sr,#$simm16 */ |
8e420152 | 795 | { |
cab58155 DE |
796 | #define OPRND(f) par_exec->operands.fmt_48_sll3.f |
797 | EXTRACT_FMT_48_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
798 | EXTRACT_FMT_48_SLL3_CODE | |
b8641a4d DE |
799 | |
800 | /* Fetch the input operands for the semantic handler. */ | |
801 | OPRND (simm16) = f_simm16; | |
802 | OPRND (sr) = CPU (h_gr[f_r2]); | |
803 | #undef OPRND | |
804 | } | |
805 | BREAK (read); | |
806 | ||
cab58155 | 807 | CASE (read, READ_FMT_49_SLLI) : /* e.g. slli $dr,#$uimm5 */ |
b8641a4d | 808 | { |
cab58155 DE |
809 | #define OPRND(f) par_exec->operands.fmt_49_slli.f |
810 | EXTRACT_FMT_49_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */ | |
811 | EXTRACT_FMT_49_SLLI_CODE | |
8e420152 DE |
812 | |
813 | /* Fetch the input operands for the semantic handler. */ | |
814 | OPRND (dr) = CPU (h_gr[f_r1]); | |
815 | OPRND (uimm5) = f_uimm5; | |
816 | #undef OPRND | |
817 | } | |
818 | BREAK (read); | |
819 | ||
cab58155 | 820 | CASE (read, READ_FMT_50_ST) : /* e.g. st $src1,@$src2 */ |
8e420152 | 821 | { |
cab58155 DE |
822 | #define OPRND(f) par_exec->operands.fmt_50_st.f |
823 | EXTRACT_FMT_50_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
824 | EXTRACT_FMT_50_ST_CODE | |
b8641a4d DE |
825 | |
826 | /* Fetch the input operands for the semantic handler. */ | |
827 | OPRND (src1) = CPU (h_gr[f_r1]); | |
828 | OPRND (src2) = CPU (h_gr[f_r2]); | |
829 | #undef OPRND | |
830 | } | |
831 | BREAK (read); | |
832 | ||
cab58155 | 833 | CASE (read, READ_FMT_51_ST_D) : /* e.g. st $src1,@($slo16,$src2) */ |
b8641a4d | 834 | { |
cab58155 DE |
835 | #define OPRND(f) par_exec->operands.fmt_51_st_d.f |
836 | EXTRACT_FMT_51_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
837 | EXTRACT_FMT_51_ST_D_CODE | |
8e420152 DE |
838 | |
839 | /* Fetch the input operands for the semantic handler. */ | |
840 | OPRND (slo16) = f_simm16; | |
841 | OPRND (src1) = CPU (h_gr[f_r1]); | |
842 | OPRND (src2) = CPU (h_gr[f_r2]); | |
843 | #undef OPRND | |
844 | } | |
845 | BREAK (read); | |
846 | ||
cab58155 | 847 | CASE (read, READ_FMT_52_STB) : /* e.g. stb $src1,@$src2 */ |
b8641a4d | 848 | { |
cab58155 DE |
849 | #define OPRND(f) par_exec->operands.fmt_52_stb.f |
850 | EXTRACT_FMT_52_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
851 | EXTRACT_FMT_52_STB_CODE | |
b8641a4d DE |
852 | |
853 | /* Fetch the input operands for the semantic handler. */ | |
854 | OPRND (src1) = CPU (h_gr[f_r1]); | |
855 | OPRND (src2) = CPU (h_gr[f_r2]); | |
856 | #undef OPRND | |
857 | } | |
858 | BREAK (read); | |
859 | ||
cab58155 | 860 | CASE (read, READ_FMT_53_STB_D) : /* e.g. stb $src1,@($slo16,$src2) */ |
8e420152 | 861 | { |
cab58155 DE |
862 | #define OPRND(f) par_exec->operands.fmt_53_stb_d.f |
863 | EXTRACT_FMT_53_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
864 | EXTRACT_FMT_53_STB_D_CODE | |
b8641a4d DE |
865 | |
866 | /* Fetch the input operands for the semantic handler. */ | |
867 | OPRND (slo16) = f_simm16; | |
868 | OPRND (src1) = CPU (h_gr[f_r1]); | |
869 | OPRND (src2) = CPU (h_gr[f_r2]); | |
870 | #undef OPRND | |
871 | } | |
872 | BREAK (read); | |
873 | ||
cab58155 | 874 | CASE (read, READ_FMT_54_STH) : /* e.g. sth $src1,@$src2 */ |
b8641a4d | 875 | { |
cab58155 DE |
876 | #define OPRND(f) par_exec->operands.fmt_54_sth.f |
877 | EXTRACT_FMT_54_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
878 | EXTRACT_FMT_54_STH_CODE | |
b8641a4d DE |
879 | |
880 | /* Fetch the input operands for the semantic handler. */ | |
881 | OPRND (src1) = CPU (h_gr[f_r1]); | |
882 | OPRND (src2) = CPU (h_gr[f_r2]); | |
883 | #undef OPRND | |
884 | } | |
885 | BREAK (read); | |
886 | ||
cab58155 | 887 | CASE (read, READ_FMT_55_STH_D) : /* e.g. sth $src1,@($slo16,$src2) */ |
b8641a4d | 888 | { |
cab58155 DE |
889 | #define OPRND(f) par_exec->operands.fmt_55_sth_d.f |
890 | EXTRACT_FMT_55_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
891 | EXTRACT_FMT_55_STH_D_CODE | |
b8641a4d DE |
892 | |
893 | /* Fetch the input operands for the semantic handler. */ | |
894 | OPRND (slo16) = f_simm16; | |
895 | OPRND (src1) = CPU (h_gr[f_r1]); | |
896 | OPRND (src2) = CPU (h_gr[f_r2]); | |
897 | #undef OPRND | |
898 | } | |
899 | BREAK (read); | |
900 | ||
cab58155 | 901 | CASE (read, READ_FMT_56_ST_PLUS) : /* e.g. st $src1,@+$src2 */ |
b8641a4d | 902 | { |
cab58155 DE |
903 | #define OPRND(f) par_exec->operands.fmt_56_st_plus.f |
904 | EXTRACT_FMT_56_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
905 | EXTRACT_FMT_56_ST_PLUS_CODE | |
b8641a4d DE |
906 | |
907 | /* Fetch the input operands for the semantic handler. */ | |
908 | OPRND (src1) = CPU (h_gr[f_r1]); | |
909 | OPRND (src2) = CPU (h_gr[f_r2]); | |
910 | #undef OPRND | |
911 | } | |
912 | BREAK (read); | |
913 | ||
cab58155 | 914 | CASE (read, READ_FMT_57_TRAP) : /* e.g. trap #$uimm4 */ |
b8641a4d | 915 | { |
cab58155 DE |
916 | #define OPRND(f) par_exec->operands.fmt_57_trap.f |
917 | EXTRACT_FMT_57_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */ | |
918 | EXTRACT_FMT_57_TRAP_CODE | |
8e420152 DE |
919 | |
920 | /* Fetch the input operands for the semantic handler. */ | |
cab58155 DE |
921 | OPRND (pc) = CPU (h_pc); |
922 | OPRND (h_cr_0) = m32rx_h_cr_get (current_cpu, 0); | |
8e420152 DE |
923 | OPRND (uimm4) = f_uimm4; |
924 | #undef OPRND | |
925 | } | |
926 | BREAK (read); | |
927 | ||
cab58155 | 928 | CASE (read, READ_FMT_58_UNLOCK) : /* e.g. unlock $src1,@$src2 */ |
8e420152 | 929 | { |
cab58155 DE |
930 | #define OPRND(f) par_exec->operands.fmt_58_unlock.f |
931 | EXTRACT_FMT_58_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
932 | EXTRACT_FMT_58_UNLOCK_CODE | |
8e420152 DE |
933 | |
934 | /* Fetch the input operands for the semantic handler. */ | |
cab58155 | 935 | OPRND (h_lock_0) = CPU (h_lock); |
b8641a4d | 936 | OPRND (src1) = CPU (h_gr[f_r1]); |
b8a9943d | 937 | OPRND (src2) = CPU (h_gr[f_r2]); |
8e420152 DE |
938 | #undef OPRND |
939 | } | |
940 | BREAK (read); | |
941 | ||
cab58155 | 942 | CASE (read, READ_FMT_59_SATB) : /* e.g. satb $dr,$sr */ |
b8641a4d | 943 | { |
cab58155 DE |
944 | #define OPRND(f) par_exec->operands.fmt_59_satb.f |
945 | EXTRACT_FMT_59_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */ | |
946 | EXTRACT_FMT_59_SATB_CODE | |
b8641a4d DE |
947 | |
948 | /* Fetch the input operands for the semantic handler. */ | |
949 | OPRND (sr) = CPU (h_gr[f_r2]); | |
950 | #undef OPRND | |
951 | } | |
952 | BREAK (read); | |
953 | ||
cab58155 | 954 | CASE (read, READ_FMT_60_SAT) : /* e.g. sat $dr,$sr */ |
8e420152 | 955 | { |
cab58155 DE |
956 | #define OPRND(f) par_exec->operands.fmt_60_sat.f |
957 | EXTRACT_FMT_60_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */ | |
958 | EXTRACT_FMT_60_SAT_CODE | |
8e420152 DE |
959 | |
960 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d | 961 | OPRND (condbit) = CPU (h_cond); |
b8641a4d | 962 | OPRND (sr) = CPU (h_gr[f_r2]); |
8e420152 DE |
963 | #undef OPRND |
964 | } | |
965 | BREAK (read); | |
966 | ||
cab58155 | 967 | CASE (read, READ_FMT_61_SADD) : /* e.g. sadd */ |
8e420152 | 968 | { |
cab58155 DE |
969 | #define OPRND(f) par_exec->operands.fmt_61_sadd.f |
970 | EXTRACT_FMT_61_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
971 | EXTRACT_FMT_61_SADD_CODE | |
8e420152 DE |
972 | |
973 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d DE |
974 | OPRND (h_accums_0) = m32rx_h_accums_get (current_cpu, 0); |
975 | OPRND (h_accums_1) = m32rx_h_accums_get (current_cpu, 1); | |
8e420152 DE |
976 | #undef OPRND |
977 | } | |
978 | BREAK (read); | |
979 | ||
cab58155 | 980 | CASE (read, READ_FMT_62_MACWU1) : /* e.g. macwu1 $src1,$src2 */ |
8e420152 | 981 | { |
cab58155 DE |
982 | #define OPRND(f) par_exec->operands.fmt_62_macwu1.f |
983 | EXTRACT_FMT_62_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
984 | EXTRACT_FMT_62_MACWU1_CODE | |
8e420152 DE |
985 | |
986 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d | 987 | OPRND (h_accums_1) = m32rx_h_accums_get (current_cpu, 1); |
8e420152 DE |
988 | OPRND (src1) = CPU (h_gr[f_r1]); |
989 | OPRND (src2) = CPU (h_gr[f_r2]); | |
990 | #undef OPRND | |
991 | } | |
992 | BREAK (read); | |
993 | ||
cab58155 | 994 | CASE (read, READ_FMT_63_MSBLO) : /* e.g. msblo $src1,$src2 */ |
8e420152 | 995 | { |
cab58155 DE |
996 | #define OPRND(f) par_exec->operands.fmt_63_msblo.f |
997 | EXTRACT_FMT_63_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
998 | EXTRACT_FMT_63_MSBLO_CODE | |
b8a9943d DE |
999 | |
1000 | /* Fetch the input operands for the semantic handler. */ | |
1001 | OPRND (accum) = CPU (h_accum); | |
1002 | OPRND (src1) = CPU (h_gr[f_r1]); | |
1003 | OPRND (src2) = CPU (h_gr[f_r2]); | |
1004 | #undef OPRND | |
1005 | } | |
1006 | BREAK (read); | |
8e420152 | 1007 | |
cab58155 | 1008 | CASE (read, READ_FMT_64_MULWU1) : /* e.g. mulwu1 $src1,$src2 */ |
b8641a4d | 1009 | { |
cab58155 DE |
1010 | #define OPRND(f) par_exec->operands.fmt_64_mulwu1.f |
1011 | EXTRACT_FMT_64_MULWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
1012 | EXTRACT_FMT_64_MULWU1_CODE | |
b8641a4d DE |
1013 | |
1014 | /* Fetch the input operands for the semantic handler. */ | |
1015 | OPRND (src1) = CPU (h_gr[f_r1]); | |
1016 | OPRND (src2) = CPU (h_gr[f_r2]); | |
1017 | #undef OPRND | |
1018 | } | |
1019 | BREAK (read); | |
1020 | ||
cab58155 | 1021 | CASE (read, READ_FMT_65_SC) : /* e.g. sc */ |
b8a9943d | 1022 | { |
cab58155 DE |
1023 | #define OPRND(f) par_exec->operands.fmt_65_sc.f |
1024 | EXTRACT_FMT_65_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
1025 | EXTRACT_FMT_65_SC_CODE | |
8e420152 DE |
1026 | |
1027 | /* Fetch the input operands for the semantic handler. */ | |
1028 | OPRND (condbit) = CPU (h_cond); | |
1029 | #undef OPRND | |
1030 | } | |
1031 | BREAK (read); | |
1032 | ||
1033 | } | |
1034 | ENDSWITCH (read) /* End of read switch. */ | |
1035 | } | |
1036 | ||
1037 | #endif /* DEFINE_SWITCH */ |