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import gdb-1999-08-09 snapshot
[thirdparty/binutils-gdb.git] / sim / m32r / sem-switch.c
CommitLineData
c906108c
SS		 1/* Simulator instruction semantics for m32rbf.
2
3THIS FILE IS MACHINE GENERATED WITH CGEN.
4
5Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
6
7This file is part of the GNU Simulators.
8
9This program is free software; you can redistribute it and/or modify
10it under the terms of the GNU General Public License as published by
11the Free Software Foundation; either version 2, or (at your option)
12any later version.
13
14This program is distributed in the hope that it will be useful,
15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License along
20with this program; if not, write to the Free Software Foundation, Inc.,
2159 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23*/
24
25#ifdef DEFINE_LABELS
26
27 /* The labels have the case they have because the enum of insn types
28 is all uppercase and in the non-stdc case the insn symbol is built
29 into the enum name. */
30
31 static struct {
32 int index;
33 void *label;
34 } labels[] = {
35 { M32RBF_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
36 { M32RBF_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
37 { M32RBF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
38 { M32RBF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
39 { M32RBF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
40 { M32RBF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
41 { M32RBF_INSN_ADD, && case_sem_INSN_ADD },
42 { M32RBF_INSN_ADD3, && case_sem_INSN_ADD3 },
43 { M32RBF_INSN_AND, && case_sem_INSN_AND },
44 { M32RBF_INSN_AND3, && case_sem_INSN_AND3 },
45 { M32RBF_INSN_OR, && case_sem_INSN_OR },
46 { M32RBF_INSN_OR3, && case_sem_INSN_OR3 },
47 { M32RBF_INSN_XOR, && case_sem_INSN_XOR },
48 { M32RBF_INSN_XOR3, && case_sem_INSN_XOR3 },
49 { M32RBF_INSN_ADDI, && case_sem_INSN_ADDI },
50 { M32RBF_INSN_ADDV, && case_sem_INSN_ADDV },
51 { M32RBF_INSN_ADDV3, && case_sem_INSN_ADDV3 },
52 { M32RBF_INSN_ADDX, && case_sem_INSN_ADDX },
53 { M32RBF_INSN_BC8, && case_sem_INSN_BC8 },
54 { M32RBF_INSN_BC24, && case_sem_INSN_BC24 },
55 { M32RBF_INSN_BEQ, && case_sem_INSN_BEQ },
56 { M32RBF_INSN_BEQZ, && case_sem_INSN_BEQZ },
57 { M32RBF_INSN_BGEZ, && case_sem_INSN_BGEZ },
58 { M32RBF_INSN_BGTZ, && case_sem_INSN_BGTZ },
59 { M32RBF_INSN_BLEZ, && case_sem_INSN_BLEZ },
60 { M32RBF_INSN_BLTZ, && case_sem_INSN_BLTZ },
61 { M32RBF_INSN_BNEZ, && case_sem_INSN_BNEZ },
62 { M32RBF_INSN_BL8, && case_sem_INSN_BL8 },
63 { M32RBF_INSN_BL24, && case_sem_INSN_BL24 },
64 { M32RBF_INSN_BNC8, && case_sem_INSN_BNC8 },
65 { M32RBF_INSN_BNC24, && case_sem_INSN_BNC24 },
66 { M32RBF_INSN_BNE, && case_sem_INSN_BNE },
67 { M32RBF_INSN_BRA8, && case_sem_INSN_BRA8 },
68 { M32RBF_INSN_BRA24, && case_sem_INSN_BRA24 },
69 { M32RBF_INSN_CMP, && case_sem_INSN_CMP },
70 { M32RBF_INSN_CMPI, && case_sem_INSN_CMPI },
71 { M32RBF_INSN_CMPU, && case_sem_INSN_CMPU },
72 { M32RBF_INSN_CMPUI, && case_sem_INSN_CMPUI },
73 { M32RBF_INSN_DIV, && case_sem_INSN_DIV },
74 { M32RBF_INSN_DIVU, && case_sem_INSN_DIVU },
75 { M32RBF_INSN_REM, && case_sem_INSN_REM },
76 { M32RBF_INSN_REMU, && case_sem_INSN_REMU },
77 { M32RBF_INSN_JL, && case_sem_INSN_JL },
78 { M32RBF_INSN_JMP, && case_sem_INSN_JMP },
79 { M32RBF_INSN_LD, && case_sem_INSN_LD },
80 { M32RBF_INSN_LD_D, && case_sem_INSN_LD_D },
81 { M32RBF_INSN_LDB, && case_sem_INSN_LDB },
82 { M32RBF_INSN_LDB_D, && case_sem_INSN_LDB_D },
83 { M32RBF_INSN_LDH, && case_sem_INSN_LDH },
84 { M32RBF_INSN_LDH_D, && case_sem_INSN_LDH_D },
85 { M32RBF_INSN_LDUB, && case_sem_INSN_LDUB },
86 { M32RBF_INSN_LDUB_D, && case_sem_INSN_LDUB_D },
87 { M32RBF_INSN_LDUH, && case_sem_INSN_LDUH },
88 { M32RBF_INSN_LDUH_D, && case_sem_INSN_LDUH_D },
89 { M32RBF_INSN_LD_PLUS, && case_sem_INSN_LD_PLUS },
90 { M32RBF_INSN_LD24, && case_sem_INSN_LD24 },
91 { M32RBF_INSN_LDI8, && case_sem_INSN_LDI8 },
92 { M32RBF_INSN_LDI16, && case_sem_INSN_LDI16 },
93 { M32RBF_INSN_LOCK, && case_sem_INSN_LOCK },
94 { M32RBF_INSN_MACHI, && case_sem_INSN_MACHI },
95 { M32RBF_INSN_MACLO, && case_sem_INSN_MACLO },
96 { M32RBF_INSN_MACWHI, && case_sem_INSN_MACWHI },
97 { M32RBF_INSN_MACWLO, && case_sem_INSN_MACWLO },
98 { M32RBF_INSN_MUL, && case_sem_INSN_MUL },
99 { M32RBF_INSN_MULHI, && case_sem_INSN_MULHI },
100 { M32RBF_INSN_MULLO, && case_sem_INSN_MULLO },
101 { M32RBF_INSN_MULWHI, && case_sem_INSN_MULWHI },
102 { M32RBF_INSN_MULWLO, && case_sem_INSN_MULWLO },
103 { M32RBF_INSN_MV, && case_sem_INSN_MV },
104 { M32RBF_INSN_MVFACHI, && case_sem_INSN_MVFACHI },
105 { M32RBF_INSN_MVFACLO, && case_sem_INSN_MVFACLO },
106 { M32RBF_INSN_MVFACMI, && case_sem_INSN_MVFACMI },
107 { M32RBF_INSN_MVFC, && case_sem_INSN_MVFC },
108 { M32RBF_INSN_MVTACHI, && case_sem_INSN_MVTACHI },
109 { M32RBF_INSN_MVTACLO, && case_sem_INSN_MVTACLO },
110 { M32RBF_INSN_MVTC, && case_sem_INSN_MVTC },
111 { M32RBF_INSN_NEG, && case_sem_INSN_NEG },
112 { M32RBF_INSN_NOP, && case_sem_INSN_NOP },
113 { M32RBF_INSN_NOT, && case_sem_INSN_NOT },
114 { M32RBF_INSN_RAC, && case_sem_INSN_RAC },
115 { M32RBF_INSN_RACH, && case_sem_INSN_RACH },
116 { M32RBF_INSN_RTE, && case_sem_INSN_RTE },
117 { M32RBF_INSN_SETH, && case_sem_INSN_SETH },
118 { M32RBF_INSN_SLL, && case_sem_INSN_SLL },
119 { M32RBF_INSN_SLL3, && case_sem_INSN_SLL3 },
120 { M32RBF_INSN_SLLI, && case_sem_INSN_SLLI },
121 { M32RBF_INSN_SRA, && case_sem_INSN_SRA },
122 { M32RBF_INSN_SRA3, && case_sem_INSN_SRA3 },
123 { M32RBF_INSN_SRAI, && case_sem_INSN_SRAI },
124 { M32RBF_INSN_SRL, && case_sem_INSN_SRL },
125 { M32RBF_INSN_SRL3, && case_sem_INSN_SRL3 },
126 { M32RBF_INSN_SRLI, && case_sem_INSN_SRLI },
127 { M32RBF_INSN_ST, && case_sem_INSN_ST },
128 { M32RBF_INSN_ST_D, && case_sem_INSN_ST_D },
129 { M32RBF_INSN_STB, && case_sem_INSN_STB },
130 { M32RBF_INSN_STB_D, && case_sem_INSN_STB_D },
131 { M32RBF_INSN_STH, && case_sem_INSN_STH },
132 { M32RBF_INSN_STH_D, && case_sem_INSN_STH_D },
133 { M32RBF_INSN_ST_PLUS, && case_sem_INSN_ST_PLUS },
134 { M32RBF_INSN_ST_MINUS, && case_sem_INSN_ST_MINUS },
135 { M32RBF_INSN_SUB, && case_sem_INSN_SUB },
136 { M32RBF_INSN_SUBV, && case_sem_INSN_SUBV },
137 { M32RBF_INSN_SUBX, && case_sem_INSN_SUBX },
138 { M32RBF_INSN_TRAP, && case_sem_INSN_TRAP },
139 { M32RBF_INSN_UNLOCK, && case_sem_INSN_UNLOCK },
140 { 0, 0 }
141 };
142 int i;
143
144 for (i = 0; labels[i].label != 0; ++i)
96baa820 145 {
c906108c 146#if FAST_P
96baa820 147 CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
c906108c 148#else
96baa820 149 CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
c906108c 150#endif
96baa820 151 }
c906108c
SS		 152
153#undef DEFINE_LABELS
154#endif /* DEFINE_LABELS */
155
156#ifdef DEFINE_SWITCH
157
158/* If hyper-fast [well not unnecessarily slow] execution is selected, turn
159 off frills like tracing and profiling. */
160/* FIXME: A better way would be to have TRACE_RESULT check for something
161 that can cause it to be optimized out. Another way would be to emit
162 special handlers into the instruction "stream". */
163
164#if FAST_P
165#undef TRACE_RESULT
166#define TRACE_RESULT(cpu, abuf, name, type, val)
167#endif
168
169#undef GET_ATTR
170#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
171
172{
173
174#if WITH_SCACHE_PBB
175
176/* Branch to next handler without going around main loop. */
177#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
178SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
179
180#else /* ! WITH_SCACHE_PBB */
181
182#define NEXT(vpc) BREAK (sem)
183#ifdef __GNUC__
184#if FAST_P
185 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
186#else
187 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
188#endif
189#else
190 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
191#endif
192
193#endif /* ! WITH_SCACHE_PBB */
194
195 {
196
197 CASE (sem, INSN_X_INVALID) : /* --invalid-- */
198{
199 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
200 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
201#define FLD(f) abuf->fields.fmt_empty.f
202 int UNUSED written = 0;
203 IADDR UNUSED pc = abuf->addr;
204 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
205
206 {
207#if WITH_SCACHE
208 /* Update the recorded pc in the cpu state struct. */
209 SET_H_PC (pc);
210#endif
211 sim_engine_invalid_insn (current_cpu, pc);
212 sim_io_error (CPU_STATE (current_cpu), "invalid insn not handled\n");
213 /* NOTREACHED */
214 }
215
216#undef FLD
217}
218 NEXT (vpc);
219
220 CASE (sem, INSN_X_AFTER) : /* --after-- */
221{
222 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
223 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
224#define FLD(f) abuf->fields.fmt_empty.f
225 int UNUSED written = 0;
226 IADDR UNUSED pc = abuf->addr;
227 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
228
229 {
230#if WITH_SCACHE_PBB_M32RBF
231 m32rbf_pbb_after (current_cpu, sem_arg);
232#endif
233 }
234
235#undef FLD
236}
237 NEXT (vpc);
238
239 CASE (sem, INSN_X_BEFORE) : /* --before-- */
240{
241 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
242 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
243#define FLD(f) abuf->fields.fmt_empty.f
244 int UNUSED written = 0;
245 IADDR UNUSED pc = abuf->addr;
246 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
247
248 {
249#if WITH_SCACHE_PBB_M32RBF
250 m32rbf_pbb_before (current_cpu, sem_arg);
251#endif
252 }
253
254#undef FLD
255}
256 NEXT (vpc);
257
258 CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
259{
260 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
261 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
262#define FLD(f) abuf->fields.fmt_empty.f
263 int UNUSED written = 0;
264 IADDR UNUSED pc = abuf->addr;
265 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
266
267 {
268#if WITH_SCACHE_PBB_M32RBF
269#ifdef DEFINE_SWITCH
270 vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg,
96baa820 271 pbb_br_type, pbb_br_npc);
c906108c
SS		 272 BREAK (sem);
273#else
274 /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
275 vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg,
96baa820 276 CPU_PBB_BR_TYPE (current_cpu),
c906108c
SS		 277 CPU_PBB_BR_NPC (current_cpu));
278#endif
279#endif
280 }
281
282#undef FLD
283}
284 NEXT (vpc);
285
286 CASE (sem, INSN_X_CHAIN) : /* --chain-- */
287{
288 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
289 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
290#define FLD(f) abuf->fields.fmt_empty.f
291 int UNUSED written = 0;
292 IADDR UNUSED pc = abuf->addr;
293 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
294
295 {
296#if WITH_SCACHE_PBB_M32RBF
297 vpc = m32rbf_pbb_chain (current_cpu, sem_arg);
298#ifdef DEFINE_SWITCH
299 BREAK (sem);
300#endif
301#endif
302 }
303
304#undef FLD
305}
306 NEXT (vpc);
307
308 CASE (sem, INSN_X_BEGIN) : /* --begin-- */
309{
310 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
311 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
312#define FLD(f) abuf->fields.fmt_empty.f
313 int UNUSED written = 0;
314 IADDR UNUSED pc = abuf->addr;
315 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
316
317 {
318#if WITH_SCACHE_PBB_M32RBF
319#ifdef DEFINE_SWITCH
320 /* In the switch case FAST_P is a constant, allowing several optimizations
321 in any called inline functions. */
322 vpc = m32rbf_pbb_begin (current_cpu, FAST_P);
323#else
324 vpc = m32rbf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
325#endif
326#endif
327 }
328
329#undef FLD
330}
331 NEXT (vpc);
332
333 CASE (sem, INSN_ADD) : /* add $dr,$sr */
334{
335 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
336 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 337#define FLD(f) abuf->fields.sfmt_add.f
c906108c
SS		 338 int UNUSED written = 0;
339 IADDR UNUSED pc = abuf->addr;
340 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
341
342 {
343 SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
344 * FLD (i_dr) = opval;
345 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
346 }
347
348#undef FLD
349}
350 NEXT (vpc);
351
352 CASE (sem, INSN_ADD3) : /* add3 $dr,$sr,$hash$slo16 */
353{
354 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
355 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 356#define FLD(f) abuf->fields.sfmt_add3.f
c906108c
SS		 357 int UNUSED written = 0;
358 IADDR UNUSED pc = abuf->addr;
359 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
360
361 {
362 SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16));
363 * FLD (i_dr) = opval;
364 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
365 }
366
367#undef FLD
368}
369 NEXT (vpc);
370
371 CASE (sem, INSN_AND) : /* and $dr,$sr */
372{
373 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
374 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 375#define FLD(f) abuf->fields.sfmt_add.f
c906108c
SS		 376 int UNUSED written = 0;
377 IADDR UNUSED pc = abuf->addr;
378 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
379
380 {
381 SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
382 * FLD (i_dr) = opval;
383 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
384 }
385
386#undef FLD
387}
388 NEXT (vpc);
389
390 CASE (sem, INSN_AND3) : /* and3 $dr,$sr,$uimm16 */
391{
392 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
393 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 394#define FLD(f) abuf->fields.sfmt_and3.f
c906108c
SS		 395 int UNUSED written = 0;
396 IADDR UNUSED pc = abuf->addr;
397 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
398
399 {
400 SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16));
401 * FLD (i_dr) = opval;
402 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
403 }
404
405#undef FLD
406}
407 NEXT (vpc);
408
409 CASE (sem, INSN_OR) : /* or $dr,$sr */
410{
411 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
412 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 413#define FLD(f) abuf->fields.sfmt_add.f
c906108c
SS		 414 int UNUSED written = 0;
415 IADDR UNUSED pc = abuf->addr;
416 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
417
418 {
419 SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
420 * FLD (i_dr) = opval;
421 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
422 }
423
424#undef FLD
425}
426 NEXT (vpc);
427
428 CASE (sem, INSN_OR3) : /* or3 $dr,$sr,$hash$ulo16 */
429{
430 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
431 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 432#define FLD(f) abuf->fields.sfmt_and3.f
c906108c
SS		 433 int UNUSED written = 0;
434 IADDR UNUSED pc = abuf->addr;
435 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
436
437 {
438 SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16));
439 * FLD (i_dr) = opval;
440 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
441 }
442
443#undef FLD
444}
445 NEXT (vpc);
446
447 CASE (sem, INSN_XOR) : /* xor $dr,$sr */
448{
449 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
450 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 451#define FLD(f) abuf->fields.sfmt_add.f
c906108c
SS		 452 int UNUSED written = 0;
453 IADDR UNUSED pc = abuf->addr;
454 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
455
456 {
457 SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
458 * FLD (i_dr) = opval;
459 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
460 }
461
462#undef FLD
463}
464 NEXT (vpc);
465
466 CASE (sem, INSN_XOR3) : /* xor3 $dr,$sr,$uimm16 */
467{
468 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
469 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 470#define FLD(f) abuf->fields.sfmt_and3.f
c906108c
SS		 471 int UNUSED written = 0;
472 IADDR UNUSED pc = abuf->addr;
473 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
474
475 {
476 SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16));
477 * FLD (i_dr) = opval;
478 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
479 }
480
481#undef FLD
482}
483 NEXT (vpc);
484
485 CASE (sem, INSN_ADDI) : /* addi $dr,$simm8 */
486{
487 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
488 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 489#define FLD(f) abuf->fields.sfmt_addi.f
c906108c
SS		 490 int UNUSED written = 0;
491 IADDR UNUSED pc = abuf->addr;
492 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
493
494 {
495 SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
496 * FLD (i_dr) = opval;
497 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
498 }
499
500#undef FLD
501}
502 NEXT (vpc);
503
504 CASE (sem, INSN_ADDV) : /* addv $dr,$sr */
505{
506 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
507 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 508#define FLD(f) abuf->fields.sfmt_add.f
c906108c
SS		 509 int UNUSED written = 0;
510 IADDR UNUSED pc = abuf->addr;
511 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
512
7a292a7a
SS		 513{
514 SI temp0;BI temp1;
c906108c
SS		 515 temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
516 temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
517 {
518 SI opval = temp0;
519 * FLD (i_dr) = opval;
520 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
521 }
522 {
523 BI opval = temp1;
524 CPU (h_cond) = opval;
525 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
526 }
7a292a7a 527}
c906108c
SS		 528
529#undef FLD
530}
531 NEXT (vpc);
532
533 CASE (sem, INSN_ADDV3) : /* addv3 $dr,$sr,$simm16 */
534{
535 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
536 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 537#define FLD(f) abuf->fields.sfmt_add3.f
c906108c
SS		 538 int UNUSED written = 0;
539 IADDR UNUSED pc = abuf->addr;
540 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
541
7a292a7a
SS		 542{
543 SI temp0;BI temp1;
c906108c
SS		 544 temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16));
545 temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0);
546 {
547 SI opval = temp0;
548 * FLD (i_dr) = opval;
549 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
550 }
551 {
552 BI opval = temp1;
553 CPU (h_cond) = opval;
554 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
555 }
7a292a7a 556}
c906108c
SS		 557
558#undef FLD
559}
560 NEXT (vpc);
561
562 CASE (sem, INSN_ADDX) : /* addx $dr,$sr */
563{
564 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
565 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 566#define FLD(f) abuf->fields.sfmt_add.f
c906108c
SS		 567 int UNUSED written = 0;
568 IADDR UNUSED pc = abuf->addr;
569 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
570
7a292a7a
SS		 571{
572 SI temp0;BI temp1;
c906108c
SS		 573 temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
574 temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
575 {
576 SI opval = temp0;
577 * FLD (i_dr) = opval;
578 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
579 }
580 {
581 BI opval = temp1;
582 CPU (h_cond) = opval;
583 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
584 }
7a292a7a 585}
c906108c
SS		 586
587#undef FLD
588}
589 NEXT (vpc);
590
591 CASE (sem, INSN_BC8) : /* bc.s $disp8 */
592{
593 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
594 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 595#define FLD(f) abuf->fields.sfmt_bl8.f
c906108c
SS		 596 int UNUSED written = 0;
597 IADDR UNUSED pc = abuf->addr;
598 SEM_BRANCH_INIT
599 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
600
601if (CPU (h_cond)) {
602 {
603 USI opval = FLD (i_disp8);
96baa820 604 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
c906108c
SS		 605 written |= (1 << 2);
606 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
607 }
608}
609
610 abuf->written = written;
611 SEM_BRANCH_FINI (vpc);
612#undef FLD
613}
614 NEXT (vpc);
615
616 CASE (sem, INSN_BC24) : /* bc.l $disp24 */
617{
618 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
619 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 620#define FLD(f) abuf->fields.sfmt_bl24.f
c906108c
SS		 621 int UNUSED written = 0;
622 IADDR UNUSED pc = abuf->addr;
623 SEM_BRANCH_INIT
624 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
625
626if (CPU (h_cond)) {
627 {
628 USI opval = FLD (i_disp24);
96baa820 629 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
c906108c
SS		 630 written |= (1 << 2);
631 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
632 }
633}
634
635 abuf->written = written;
636 SEM_BRANCH_FINI (vpc);
637#undef FLD
638}
639 NEXT (vpc);
640
641 CASE (sem, INSN_BEQ) : /* beq $src1,$src2,$disp16 */
642{
643 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
644 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 645#define FLD(f) abuf->fields.sfmt_beq.f
c906108c
SS		 646 int UNUSED written = 0;
647 IADDR UNUSED pc = abuf->addr;
648 SEM_BRANCH_INIT
649 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
650
651if (EQSI (* FLD (i_src1), * FLD (i_src2))) {
652 {
653 USI opval = FLD (i_disp16);
96baa820 654 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
c906108c
SS		 655 written |= (1 << 3);
656 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
657 }
658}
659
660 abuf->written = written;
661 SEM_BRANCH_FINI (vpc);
662#undef FLD
663}
664 NEXT (vpc);
665
666 CASE (sem, INSN_BEQZ) : /* beqz $src2,$disp16 */
667{
668 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
669 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 670#define FLD(f) abuf->fields.sfmt_beq.f
c906108c
SS		 671 int UNUSED written = 0;
672 IADDR UNUSED pc = abuf->addr;
673 SEM_BRANCH_INIT
674 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
675
676if (EQSI (* FLD (i_src2), 0)) {
677 {
678 USI opval = FLD (i_disp16);
96baa820 679 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
c906108c
SS		 680 written |= (1 << 2);
681 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
682 }
683}
684
685 abuf->written = written;
686 SEM_BRANCH_FINI (vpc);
687#undef FLD
688}
689 NEXT (vpc);
690
691 CASE (sem, INSN_BGEZ) : /* bgez $src2,$disp16 */
692{
693 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
694 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 695#define FLD(f) abuf->fields.sfmt_beq.f
c906108c
SS		 696 int UNUSED written = 0;
697 IADDR UNUSED pc = abuf->addr;
698 SEM_BRANCH_INIT
699 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
700
701if (GESI (* FLD (i_src2), 0)) {
702 {
703 USI opval = FLD (i_disp16);
96baa820 704 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
c906108c
SS		 705 written |= (1 << 2);
706 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
707 }
708}
709
710 abuf->written = written;
711 SEM_BRANCH_FINI (vpc);
712#undef FLD
713}
714 NEXT (vpc);
715
716 CASE (sem, INSN_BGTZ) : /* bgtz $src2,$disp16 */
717{
718 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
719 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 720#define FLD(f) abuf->fields.sfmt_beq.f
c906108c
SS		 721 int UNUSED written = 0;
722 IADDR UNUSED pc = abuf->addr;
723 SEM_BRANCH_INIT
724 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
725
726if (GTSI (* FLD (i_src2), 0)) {
727 {
728 USI opval = FLD (i_disp16);
96baa820 729 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
c906108c
SS		 730 written |= (1 << 2);
731 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
732 }
733}
734
735 abuf->written = written;
736 SEM_BRANCH_FINI (vpc);
737#undef FLD
738}
739 NEXT (vpc);
740
741 CASE (sem, INSN_BLEZ) : /* blez $src2,$disp16 */
742{
743 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
744 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 745#define FLD(f) abuf->fields.sfmt_beq.f
c906108c
SS		 746 int UNUSED written = 0;
747 IADDR UNUSED pc = abuf->addr;
748 SEM_BRANCH_INIT
749 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
750
751if (LESI (* FLD (i_src2), 0)) {
752 {
753 USI opval = FLD (i_disp16);
96baa820 754 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
c906108c
SS		 755 written |= (1 << 2);
756 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
757 }
758}
759
760 abuf->written = written;
761 SEM_BRANCH_FINI (vpc);
762#undef FLD
763}
764 NEXT (vpc);
765
766 CASE (sem, INSN_BLTZ) : /* bltz $src2,$disp16 */
767{
768 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
769 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 770#define FLD(f) abuf->fields.sfmt_beq.f
c906108c
SS		 771 int UNUSED written = 0;
772 IADDR UNUSED pc = abuf->addr;
773 SEM_BRANCH_INIT
774 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
775
776if (LTSI (* FLD (i_src2), 0)) {
777 {
778 USI opval = FLD (i_disp16);
96baa820 779 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
c906108c
SS		 780 written |= (1 << 2);
781 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
782 }
783}
784
785 abuf->written = written;
786 SEM_BRANCH_FINI (vpc);
787#undef FLD
788}
789 NEXT (vpc);
790
791 CASE (sem, INSN_BNEZ) : /* bnez $src2,$disp16 */
792{
793 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
794 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 795#define FLD(f) abuf->fields.sfmt_beq.f
c906108c
SS		 796 int UNUSED written = 0;
797 IADDR UNUSED pc = abuf->addr;
798 SEM_BRANCH_INIT
799 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
800
801if (NESI (* FLD (i_src2), 0)) {
802 {
803 USI opval = FLD (i_disp16);
96baa820 804 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
c906108c
SS		 805 written |= (1 << 2);
806 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
807 }
808}
809
810 abuf->written = written;
811 SEM_BRANCH_FINI (vpc);
812#undef FLD
813}
814 NEXT (vpc);
815
816 CASE (sem, INSN_BL8) : /* bl.s $disp8 */
817{
818 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
819 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 820#define FLD(f) abuf->fields.sfmt_bl8.f
c906108c
SS		 821 int UNUSED written = 0;
822 IADDR UNUSED pc = abuf->addr;
823 SEM_BRANCH_INIT
824 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
825
7a292a7a 826{
c906108c
SS		 827 {
828 SI opval = ADDSI (ANDSI (pc, -4), 4);
829 CPU (h_gr[((UINT) 14)]) = opval;
830 TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
831 }
832 {
833 USI opval = FLD (i_disp8);
96baa820 834 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
c906108c
SS		 835 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
836 }
7a292a7a 837}
c906108c
SS		 838
839 SEM_BRANCH_FINI (vpc);
840#undef FLD
841}
842 NEXT (vpc);
843
844 CASE (sem, INSN_BL24) : /* bl.l $disp24 */
845{
846 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
847 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 848#define FLD(f) abuf->fields.sfmt_bl24.f
c906108c
SS		 849 int UNUSED written = 0;
850 IADDR UNUSED pc = abuf->addr;
851 SEM_BRANCH_INIT
852 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
853
7a292a7a 854{
c906108c
SS		 855 {
856 SI opval = ADDSI (pc, 4);
857 CPU (h_gr[((UINT) 14)]) = opval;
858 TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
859 }
860 {
861 USI opval = FLD (i_disp24);
96baa820 862 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
c906108c
SS		 863 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
864 }
7a292a7a 865}
c906108c
SS		 866
867 SEM_BRANCH_FINI (vpc);
868#undef FLD
869}
870 NEXT (vpc);
871
872 CASE (sem, INSN_BNC8) : /* bnc.s $disp8 */
873{
874 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
875 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 876#define FLD(f) abuf->fields.sfmt_bl8.f
c906108c
SS		 877 int UNUSED written = 0;
878 IADDR UNUSED pc = abuf->addr;
879 SEM_BRANCH_INIT
880 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
881
882if (NOTBI (CPU (h_cond))) {
883 {
884 USI opval = FLD (i_disp8);
96baa820 885 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
c906108c
SS		 886 written |= (1 << 2);
887 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
888 }
889}
890
891 abuf->written = written;
892 SEM_BRANCH_FINI (vpc);
893#undef FLD
894}
895 NEXT (vpc);
896
897 CASE (sem, INSN_BNC24) : /* bnc.l $disp24 */
898{
899 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
900 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 901#define FLD(f) abuf->fields.sfmt_bl24.f
c906108c
SS		 902 int UNUSED written = 0;
903 IADDR UNUSED pc = abuf->addr;
904 SEM_BRANCH_INIT
905 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
906
907if (NOTBI (CPU (h_cond))) {
908 {
909 USI opval = FLD (i_disp24);
96baa820 910 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
c906108c
SS		 911 written |= (1 << 2);
912 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
913 }
914}
915
916 abuf->written = written;
917 SEM_BRANCH_FINI (vpc);
918#undef FLD
919}
920 NEXT (vpc);
921
922 CASE (sem, INSN_BNE) : /* bne $src1,$src2,$disp16 */
923{
924 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
925 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 926#define FLD(f) abuf->fields.sfmt_beq.f
c906108c
SS		 927 int UNUSED written = 0;
928 IADDR UNUSED pc = abuf->addr;
929 SEM_BRANCH_INIT
930 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
931
932if (NESI (* FLD (i_src1), * FLD (i_src2))) {
933 {
934 USI opval = FLD (i_disp16);
96baa820 935 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
c906108c
SS		 936 written |= (1 << 3);
937 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
938 }
939}
940
941 abuf->written = written;
942 SEM_BRANCH_FINI (vpc);
943#undef FLD
944}
945 NEXT (vpc);
946
947 CASE (sem, INSN_BRA8) : /* bra.s $disp8 */
948{
949 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
950 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 951#define FLD(f) abuf->fields.sfmt_bl8.f
c906108c
SS		 952 int UNUSED written = 0;
953 IADDR UNUSED pc = abuf->addr;
954 SEM_BRANCH_INIT
955 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
956
957 {
958 USI opval = FLD (i_disp8);
96baa820 959 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
c906108c
SS		 960 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
961 }
962
963 SEM_BRANCH_FINI (vpc);
964#undef FLD
965}
966 NEXT (vpc);
967
968 CASE (sem, INSN_BRA24) : /* bra.l $disp24 */
969{
970 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
971 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 972#define FLD(f) abuf->fields.sfmt_bl24.f
c906108c
SS		 973 int UNUSED written = 0;
974 IADDR UNUSED pc = abuf->addr;
975 SEM_BRANCH_INIT
976 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
977
978 {
979 USI opval = FLD (i_disp24);
96baa820 980 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
c906108c
SS		 981 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
982 }
983
984 SEM_BRANCH_FINI (vpc);
985#undef FLD
986}
987 NEXT (vpc);
988
989 CASE (sem, INSN_CMP) : /* cmp $src1,$src2 */
990{
991 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
992 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 993#define FLD(f) abuf->fields.sfmt_st_plus.f
c906108c
SS		 994 int UNUSED written = 0;
995 IADDR UNUSED pc = abuf->addr;
996 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
997
998 {
999 BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
1000 CPU (h_cond) = opval;
1001 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1002 }
1003
1004#undef FLD
1005}
1006 NEXT (vpc);
1007
1008 CASE (sem, INSN_CMPI) : /* cmpi $src2,$simm16 */
1009{
1010 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1011 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1012#define FLD(f) abuf->fields.sfmt_st_d.f
c906108c
SS		 1013 int UNUSED written = 0;
1014 IADDR UNUSED pc = abuf->addr;
1015 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1016
1017 {
1018 BI opval = LTSI (* FLD (i_src2), FLD (f_simm16));
1019 CPU (h_cond) = opval;
1020 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1021 }
1022
1023#undef FLD
1024}
1025 NEXT (vpc);
1026
1027 CASE (sem, INSN_CMPU) : /* cmpu $src1,$src2 */
1028{
1029 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1030 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1031#define FLD(f) abuf->fields.sfmt_st_plus.f
c906108c
SS		 1032 int UNUSED written = 0;
1033 IADDR UNUSED pc = abuf->addr;
1034 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1035
1036 {
1037 BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
1038 CPU (h_cond) = opval;
1039 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1040 }
1041
1042#undef FLD
1043}
1044 NEXT (vpc);
1045
1046 CASE (sem, INSN_CMPUI) : /* cmpui $src2,$simm16 */
1047{
1048 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1049 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1050#define FLD(f) abuf->fields.sfmt_st_d.f
c906108c
SS		 1051 int UNUSED written = 0;
1052 IADDR UNUSED pc = abuf->addr;
1053 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1054
1055 {
1056 BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16));
1057 CPU (h_cond) = opval;
1058 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1059 }
1060
1061#undef FLD
1062}
1063 NEXT (vpc);
1064
1065 CASE (sem, INSN_DIV) : /* div $dr,$sr */
1066{
1067 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1068 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1069#define FLD(f) abuf->fields.sfmt_add.f
c906108c
SS		 1070 int UNUSED written = 0;
1071 IADDR UNUSED pc = abuf->addr;
1072 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1073
1074if (NESI (* FLD (i_sr), 0)) {
1075 {
1076 SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr));
1077 * FLD (i_dr) = opval;
1078 written |= (1 << 2);
1079 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1080 }
1081}
1082
1083 abuf->written = written;
1084#undef FLD
1085}
1086 NEXT (vpc);
1087
1088 CASE (sem, INSN_DIVU) : /* divu $dr,$sr */
1089{
1090 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1091 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1092#define FLD(f) abuf->fields.sfmt_add.f
c906108c
SS		 1093 int UNUSED written = 0;
1094 IADDR UNUSED pc = abuf->addr;
1095 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1096
1097if (NESI (* FLD (i_sr), 0)) {
1098 {
1099 SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
1100 * FLD (i_dr) = opval;
1101 written |= (1 << 2);
1102 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1103 }
1104}
1105
1106 abuf->written = written;
1107#undef FLD
1108}
1109 NEXT (vpc);
1110
1111 CASE (sem, INSN_REM) : /* rem $dr,$sr */
1112{
1113 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1114 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1115#define FLD(f) abuf->fields.sfmt_add.f
c906108c
SS		 1116 int UNUSED written = 0;
1117 IADDR UNUSED pc = abuf->addr;
1118 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1119
1120if (NESI (* FLD (i_sr), 0)) {
1121 {
1122 SI opval = MODSI (* FLD (i_dr), * FLD (i_sr));
1123 * FLD (i_dr) = opval;
1124 written |= (1 << 2);
1125 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1126 }
1127}
1128
1129 abuf->written = written;
1130#undef FLD
1131}
1132 NEXT (vpc);
1133
1134 CASE (sem, INSN_REMU) : /* remu $dr,$sr */
1135{
1136 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1137 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1138#define FLD(f) abuf->fields.sfmt_add.f
c906108c
SS		 1139 int UNUSED written = 0;
1140 IADDR UNUSED pc = abuf->addr;
1141 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1142
1143if (NESI (* FLD (i_sr), 0)) {
1144 {
1145 SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
1146 * FLD (i_dr) = opval;
1147 written |= (1 << 2);
1148 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1149 }
1150}
1151
1152 abuf->written = written;
1153#undef FLD
1154}
1155 NEXT (vpc);
1156
1157 CASE (sem, INSN_JL) : /* jl $sr */
1158{
1159 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1160 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1161#define FLD(f) abuf->fields.sfmt_jl.f
c906108c
SS		 1162 int UNUSED written = 0;
1163 IADDR UNUSED pc = abuf->addr;
1164 SEM_BRANCH_INIT
1165 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1166
7a292a7a
SS		 1167{
1168 SI temp0;USI temp1;
c906108c
SS		 1169 temp0 = ADDSI (ANDSI (pc, -4), 4);
1170 temp1 = ANDSI (* FLD (i_sr), -4);
1171 {
1172 SI opval = temp0;
1173 CPU (h_gr[((UINT) 14)]) = opval;
1174 TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1175 }
1176 {
1177 USI opval = temp1;
1178 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1179 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1180 }
7a292a7a 1181}
c906108c
SS		 1182
1183 SEM_BRANCH_FINI (vpc);
1184#undef FLD
1185}
1186 NEXT (vpc);
1187
1188 CASE (sem, INSN_JMP) : /* jmp $sr */
1189{
1190 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1191 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1192#define FLD(f) abuf->fields.sfmt_mvtc.f
c906108c
SS		 1193 int UNUSED written = 0;
1194 IADDR UNUSED pc = abuf->addr;
1195 SEM_BRANCH_INIT
1196 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1197
1198 {
1199 USI opval = ANDSI (* FLD (i_sr), -4);
1200 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1201 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1202 }
1203
1204 SEM_BRANCH_FINI (vpc);
1205#undef FLD
1206}
1207 NEXT (vpc);
1208
1209 CASE (sem, INSN_LD) : /* ld $dr,@$sr */
1210{
1211 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1212 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1213#define FLD(f) abuf->fields.sfmt_ld_plus.f
c906108c
SS		 1214 int UNUSED written = 0;
1215 IADDR UNUSED pc = abuf->addr;
1216 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1217
1218 {
1219 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1220 * FLD (i_dr) = opval;
1221 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1222 }
1223
1224#undef FLD
1225}
1226 NEXT (vpc);
1227
1228 CASE (sem, INSN_LD_D) : /* ld $dr,@($slo16,$sr) */
1229{
1230 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1231 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1232#define FLD(f) abuf->fields.sfmt_add3.f
c906108c
SS		 1233 int UNUSED written = 0;
1234 IADDR UNUSED pc = abuf->addr;
1235 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1236
1237 {
1238 SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)));
1239 * FLD (i_dr) = opval;
1240 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1241 }
1242
1243#undef FLD
1244}
1245 NEXT (vpc);
1246
1247 CASE (sem, INSN_LDB) : /* ldb $dr,@$sr */
1248{
1249 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1250 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1251#define FLD(f) abuf->fields.sfmt_ld_plus.f
c906108c
SS		 1252 int UNUSED written = 0;
1253 IADDR UNUSED pc = abuf->addr;
1254 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1255
1256 {
1257 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1258 * FLD (i_dr) = opval;
1259 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1260 }
1261
1262#undef FLD
1263}
1264 NEXT (vpc);
1265
1266 CASE (sem, INSN_LDB_D) : /* ldb $dr,@($slo16,$sr) */
1267{
1268 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1269 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1270#define FLD(f) abuf->fields.sfmt_add3.f
c906108c
SS		 1271 int UNUSED written = 0;
1272 IADDR UNUSED pc = abuf->addr;
1273 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1274
1275 {
1276 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1277 * FLD (i_dr) = opval;
1278 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1279 }
1280
1281#undef FLD
1282}
1283 NEXT (vpc);
1284
1285 CASE (sem, INSN_LDH) : /* ldh $dr,@$sr */
1286{
1287 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1288 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1289#define FLD(f) abuf->fields.sfmt_ld_plus.f
c906108c
SS		 1290 int UNUSED written = 0;
1291 IADDR UNUSED pc = abuf->addr;
1292 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1293
1294 {
1295 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1296 * FLD (i_dr) = opval;
1297 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1298 }
1299
1300#undef FLD
1301}
1302 NEXT (vpc);
1303
1304 CASE (sem, INSN_LDH_D) : /* ldh $dr,@($slo16,$sr) */
1305{
1306 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1307 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1308#define FLD(f) abuf->fields.sfmt_add3.f
c906108c
SS		 1309 int UNUSED written = 0;
1310 IADDR UNUSED pc = abuf->addr;
1311 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1312
1313 {
1314 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1315 * FLD (i_dr) = opval;
1316 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1317 }
1318
1319#undef FLD
1320}
1321 NEXT (vpc);
1322
1323 CASE (sem, INSN_LDUB) : /* ldub $dr,@$sr */
1324{
1325 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1326 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1327#define FLD(f) abuf->fields.sfmt_ld_plus.f
c906108c
SS		 1328 int UNUSED written = 0;
1329 IADDR UNUSED pc = abuf->addr;
1330 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1331
1332 {
1333 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1334 * FLD (i_dr) = opval;
1335 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1336 }
1337
1338#undef FLD
1339}
1340 NEXT (vpc);
1341
1342 CASE (sem, INSN_LDUB_D) : /* ldub $dr,@($slo16,$sr) */
1343{
1344 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1345 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1346#define FLD(f) abuf->fields.sfmt_add3.f
c906108c
SS		 1347 int UNUSED written = 0;
1348 IADDR UNUSED pc = abuf->addr;
1349 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1350
1351 {
1352 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1353 * FLD (i_dr) = opval;
1354 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1355 }
1356
1357#undef FLD
1358}
1359 NEXT (vpc);
1360
1361 CASE (sem, INSN_LDUH) : /* lduh $dr,@$sr */
1362{
1363 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1364 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1365#define FLD(f) abuf->fields.sfmt_ld_plus.f
c906108c
SS		 1366 int UNUSED written = 0;
1367 IADDR UNUSED pc = abuf->addr;
1368 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1369
1370 {
1371 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1372 * FLD (i_dr) = opval;
1373 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1374 }
1375
1376#undef FLD
1377}
1378 NEXT (vpc);
1379
1380 CASE (sem, INSN_LDUH_D) : /* lduh $dr,@($slo16,$sr) */
1381{
1382 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1383 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1384#define FLD(f) abuf->fields.sfmt_add3.f
c906108c
SS		 1385 int UNUSED written = 0;
1386 IADDR UNUSED pc = abuf->addr;
1387 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1388
1389 {
1390 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1391 * FLD (i_dr) = opval;
1392 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1393 }
1394
1395#undef FLD
1396}
1397 NEXT (vpc);
1398
1399 CASE (sem, INSN_LD_PLUS) : /* ld $dr,@$sr+ */
1400{
1401 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1402 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1403#define FLD(f) abuf->fields.sfmt_ld_plus.f
c906108c
SS		 1404 int UNUSED written = 0;
1405 IADDR UNUSED pc = abuf->addr;
1406 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1407
7a292a7a
SS		 1408{
1409 SI temp0;SI temp1;
c906108c
SS		 1410 temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1411 temp1 = ADDSI (* FLD (i_sr), 4);
1412 {
1413 SI opval = temp0;
1414 * FLD (i_dr) = opval;
1415 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1416 }
1417 {
1418 SI opval = temp1;
1419 * FLD (i_sr) = opval;
1420 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
1421 }
7a292a7a 1422}
c906108c
SS		 1423
1424#undef FLD
1425}
1426 NEXT (vpc);
1427
1428 CASE (sem, INSN_LD24) : /* ld24 $dr,$uimm24 */
1429{
1430 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1431 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1432#define FLD(f) abuf->fields.sfmt_ld24.f
c906108c
SS		 1433 int UNUSED written = 0;
1434 IADDR UNUSED pc = abuf->addr;
1435 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1436
1437 {
1438 SI opval = FLD (i_uimm24);
1439 * FLD (i_dr) = opval;
1440 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1441 }
1442
1443#undef FLD
1444}
1445 NEXT (vpc);
1446
1447 CASE (sem, INSN_LDI8) : /* ldi8 $dr,$simm8 */
1448{
1449 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1450 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1451#define FLD(f) abuf->fields.sfmt_addi.f
c906108c
SS		 1452 int UNUSED written = 0;
1453 IADDR UNUSED pc = abuf->addr;
1454 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1455
1456 {
1457 SI opval = FLD (f_simm8);
1458 * FLD (i_dr) = opval;
1459 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1460 }
1461
1462#undef FLD
1463}
1464 NEXT (vpc);
1465
1466 CASE (sem, INSN_LDI16) : /* ldi16 $dr,$hash$slo16 */
1467{
1468 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1469 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1470#define FLD(f) abuf->fields.sfmt_add3.f
c906108c
SS		 1471 int UNUSED written = 0;
1472 IADDR UNUSED pc = abuf->addr;
1473 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1474
1475 {
1476 SI opval = FLD (f_simm16);
1477 * FLD (i_dr) = opval;
1478 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1479 }
1480
1481#undef FLD
1482}
1483 NEXT (vpc);
1484
1485 CASE (sem, INSN_LOCK) : /* lock $dr,@$sr */
1486{
1487 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1488 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1489#define FLD(f) abuf->fields.sfmt_ld_plus.f
c906108c
SS		 1490 int UNUSED written = 0;
1491 IADDR UNUSED pc = abuf->addr;
1492 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1493
7a292a7a 1494{
c906108c
SS		 1495 {
1496 BI opval = 1;
1497 CPU (h_lock) = opval;
7a292a7a 1498 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
c906108c
SS		 1499 }
1500 {
1501 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1502 * FLD (i_dr) = opval;
1503 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1504 }
7a292a7a 1505}
c906108c
SS		 1506
1507#undef FLD
1508}
1509 NEXT (vpc);
1510
1511 CASE (sem, INSN_MACHI) : /* machi $src1,$src2 */
1512{
1513 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1514 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1515#define FLD(f) abuf->fields.sfmt_st_plus.f
c906108c
SS		 1516 int UNUSED written = 0;
1517 IADDR UNUSED pc = abuf->addr;
1518 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1519
1520 {
1521 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
1522 SET_H_ACCUM (opval);
1523 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1524 }
1525
1526#undef FLD
1527}
1528 NEXT (vpc);
1529
1530 CASE (sem, INSN_MACLO) : /* maclo $src1,$src2 */
1531{
1532 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1533 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1534#define FLD(f) abuf->fields.sfmt_st_plus.f
c906108c
SS		 1535 int UNUSED written = 0;
1536 IADDR UNUSED pc = abuf->addr;
1537 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1538
1539 {
1540 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
1541 SET_H_ACCUM (opval);
1542 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1543 }
1544
1545#undef FLD
1546}
1547 NEXT (vpc);
1548
1549 CASE (sem, INSN_MACWHI) : /* macwhi $src1,$src2 */
1550{
1551 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1552 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1553#define FLD(f) abuf->fields.sfmt_st_plus.f
c906108c
SS		 1554 int UNUSED written = 0;
1555 IADDR UNUSED pc = abuf->addr;
1556 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1557
1558 {
1559 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
1560 SET_H_ACCUM (opval);
1561 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1562 }
1563
1564#undef FLD
1565}
1566 NEXT (vpc);
1567
1568 CASE (sem, INSN_MACWLO) : /* macwlo $src1,$src2 */
1569{
1570 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1571 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1572#define FLD(f) abuf->fields.sfmt_st_plus.f
c906108c
SS		 1573 int UNUSED written = 0;
1574 IADDR UNUSED pc = abuf->addr;
1575 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1576
1577 {
1578 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
1579 SET_H_ACCUM (opval);
1580 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1581 }
1582
1583#undef FLD
1584}
1585 NEXT (vpc);
1586
1587 CASE (sem, INSN_MUL) : /* mul $dr,$sr */
1588{
1589 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1590 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1591#define FLD(f) abuf->fields.sfmt_add.f
c906108c
SS		 1592 int UNUSED written = 0;
1593 IADDR UNUSED pc = abuf->addr;
1594 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1595
1596 {
1597 SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
1598 * FLD (i_dr) = opval;
1599 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1600 }
1601
1602#undef FLD
1603}
1604 NEXT (vpc);
1605
1606 CASE (sem, INSN_MULHI) : /* mulhi $src1,$src2 */
1607{
1608 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1609 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1610#define FLD(f) abuf->fields.sfmt_st_plus.f
c906108c
SS		 1611 int UNUSED written = 0;
1612 IADDR UNUSED pc = abuf->addr;
1613 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1614
1615 {
1616 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
1617 SET_H_ACCUM (opval);
1618 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1619 }
1620
1621#undef FLD
1622}
1623 NEXT (vpc);
1624
1625 CASE (sem, INSN_MULLO) : /* mullo $src1,$src2 */
1626{
1627 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1628 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1629#define FLD(f) abuf->fields.sfmt_st_plus.f
c906108c
SS		 1630 int UNUSED written = 0;
1631 IADDR UNUSED pc = abuf->addr;
1632 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1633
1634 {
1635 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
1636 SET_H_ACCUM (opval);
1637 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1638 }
1639
1640#undef FLD
1641}
1642 NEXT (vpc);
1643
1644 CASE (sem, INSN_MULWHI) : /* mulwhi $src1,$src2 */
1645{
1646 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1647 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1648#define FLD(f) abuf->fields.sfmt_st_plus.f
c906108c
SS		 1649 int UNUSED written = 0;
1650 IADDR UNUSED pc = abuf->addr;
1651 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1652
1653 {
1654 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 8), 8);
1655 SET_H_ACCUM (opval);
1656 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1657 }
1658
1659#undef FLD
1660}
1661 NEXT (vpc);
1662
1663 CASE (sem, INSN_MULWLO) : /* mulwlo $src1,$src2 */
1664{
1665 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1666 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1667#define FLD(f) abuf->fields.sfmt_st_plus.f
c906108c
SS		 1668 int UNUSED written = 0;
1669 IADDR UNUSED pc = abuf->addr;
1670 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1671
1672 {
1673 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 8), 8);
1674 SET_H_ACCUM (opval);
1675 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1676 }
1677
1678#undef FLD
1679}
1680 NEXT (vpc);
1681
1682 CASE (sem, INSN_MV) : /* mv $dr,$sr */
1683{
1684 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1685 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1686#define FLD(f) abuf->fields.sfmt_ld_plus.f
c906108c
SS		 1687 int UNUSED written = 0;
1688 IADDR UNUSED pc = abuf->addr;
1689 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1690
1691 {
1692 SI opval = * FLD (i_sr);
1693 * FLD (i_dr) = opval;
1694 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1695 }
1696
1697#undef FLD
1698}
1699 NEXT (vpc);
1700
1701 CASE (sem, INSN_MVFACHI) : /* mvfachi $dr */
1702{
1703 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1704 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1705#define FLD(f) abuf->fields.sfmt_seth.f
c906108c
SS		 1706 int UNUSED written = 0;
1707 IADDR UNUSED pc = abuf->addr;
1708 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1709
1710 {
1711 SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 32));
1712 * FLD (i_dr) = opval;
1713 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1714 }
1715
1716#undef FLD
1717}
1718 NEXT (vpc);
1719
1720 CASE (sem, INSN_MVFACLO) : /* mvfaclo $dr */
1721{
1722 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1723 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1724#define FLD(f) abuf->fields.sfmt_seth.f
c906108c
SS		 1725 int UNUSED written = 0;
1726 IADDR UNUSED pc = abuf->addr;
1727 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1728
1729 {
1730 SI opval = TRUNCDISI (GET_H_ACCUM ());
1731 * FLD (i_dr) = opval;
1732 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1733 }
1734
1735#undef FLD
1736}
1737 NEXT (vpc);
1738
1739 CASE (sem, INSN_MVFACMI) : /* mvfacmi $dr */
1740{
1741 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1742 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1743#define FLD(f) abuf->fields.sfmt_seth.f
c906108c
SS		 1744 int UNUSED written = 0;
1745 IADDR UNUSED pc = abuf->addr;
1746 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1747
1748 {
1749 SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 16));
1750 * FLD (i_dr) = opval;
1751 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1752 }
1753
1754#undef FLD
1755}
1756 NEXT (vpc);
1757
1758 CASE (sem, INSN_MVFC) : /* mvfc $dr,$scr */
1759{
1760 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1761 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1762#define FLD(f) abuf->fields.sfmt_mvfc.f
c906108c
SS		 1763 int UNUSED written = 0;
1764 IADDR UNUSED pc = abuf->addr;
1765 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1766
1767 {
1768 SI opval = GET_H_CR (FLD (f_r2));
1769 * FLD (i_dr) = opval;
1770 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1771 }
1772
1773#undef FLD
1774}
1775 NEXT (vpc);
1776
1777 CASE (sem, INSN_MVTACHI) : /* mvtachi $src1 */
1778{
1779 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1780 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1781#define FLD(f) abuf->fields.sfmt_st_plus.f
c906108c
SS		 1782 int UNUSED written = 0;
1783 IADDR UNUSED pc = abuf->addr;
1784 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1785
1786 {
1787 DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
1788 SET_H_ACCUM (opval);
1789 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1790 }
1791
1792#undef FLD
1793}
1794 NEXT (vpc);
1795
1796 CASE (sem, INSN_MVTACLO) : /* mvtaclo $src1 */
1797{
1798 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1799 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1800#define FLD(f) abuf->fields.sfmt_st_plus.f
c906108c
SS		 1801 int UNUSED written = 0;
1802 IADDR UNUSED pc = abuf->addr;
1803 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1804
1805 {
1806 DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
1807 SET_H_ACCUM (opval);
1808 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1809 }
1810
1811#undef FLD
1812}
1813 NEXT (vpc);
1814
1815 CASE (sem, INSN_MVTC) : /* mvtc $sr,$dcr */
1816{
1817 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1818 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1819#define FLD(f) abuf->fields.sfmt_mvtc.f
c906108c
SS		 1820 int UNUSED written = 0;
1821 IADDR UNUSED pc = abuf->addr;
1822 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1823
1824 {
1825 USI opval = * FLD (i_sr);
1826 SET_H_CR (FLD (f_r1), opval);
1827 TRACE_RESULT (current_cpu, abuf, "dcr", 'x', opval);
1828 }
1829
1830#undef FLD
1831}
1832 NEXT (vpc);
1833
1834 CASE (sem, INSN_NEG) : /* neg $dr,$sr */
1835{
1836 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1837 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1838#define FLD(f) abuf->fields.sfmt_ld_plus.f
c906108c
SS		 1839 int UNUSED written = 0;
1840 IADDR UNUSED pc = abuf->addr;
1841 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1842
1843 {
1844 SI opval = NEGSI (* FLD (i_sr));
1845 * FLD (i_dr) = opval;
1846 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1847 }
1848
1849#undef FLD
1850}
1851 NEXT (vpc);
1852
1853 CASE (sem, INSN_NOP) : /* nop */
1854{
1855 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1856 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1857#define FLD(f) abuf->fields.fmt_empty.f
c906108c
SS		 1858 int UNUSED written = 0;
1859 IADDR UNUSED pc = abuf->addr;
1860 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1861
1862PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
1863
1864#undef FLD
1865}
1866 NEXT (vpc);
1867
1868 CASE (sem, INSN_NOT) : /* not $dr,$sr */
1869{
1870 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1871 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1872#define FLD(f) abuf->fields.sfmt_ld_plus.f
c906108c
SS		 1873 int UNUSED written = 0;
1874 IADDR UNUSED pc = abuf->addr;
1875 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1876
1877 {
1878 SI opval = INVSI (* FLD (i_sr));
1879 * FLD (i_dr) = opval;
1880 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1881 }
1882
1883#undef FLD
1884}
1885 NEXT (vpc);
1886
1887 CASE (sem, INSN_RAC) : /* rac */
1888{
1889 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1890 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1891#define FLD(f) abuf->fields.fmt_empty.f
c906108c
SS		 1892 int UNUSED written = 0;
1893 IADDR UNUSED pc = abuf->addr;
1894 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1895
7a292a7a 1896{
c906108c
SS		 1897 DI tmp_tmp1;
1898 tmp_tmp1 = SLLDI (GET_H_ACCUM (), 1);
1899 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
1900 {
1901 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
1902 SET_H_ACCUM (opval);
1903 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1904 }
7a292a7a 1905}
c906108c
SS		 1906
1907#undef FLD
1908}
1909 NEXT (vpc);
1910
1911 CASE (sem, INSN_RACH) : /* rach */
1912{
1913 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1914 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1915#define FLD(f) abuf->fields.fmt_empty.f
c906108c
SS		 1916 int UNUSED written = 0;
1917 IADDR UNUSED pc = abuf->addr;
1918 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1919
7a292a7a 1920{
c906108c
SS		 1921 DI tmp_tmp1;
1922 tmp_tmp1 = ANDDI (GET_H_ACCUM (), MAKEDI (16777215, 0xffffffff));
1923if (ANDIF (GEDI (tmp_tmp1, MAKEDI (16383, 0x80000000)), LEDI (tmp_tmp1, MAKEDI (8388607, 0xffffffff)))) {
1924 tmp_tmp1 = MAKEDI (16383, 0x80000000);
1925} else {
1926if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (16760832, 0)))) {
1927 tmp_tmp1 = MAKEDI (16760832, 0);
1928} else {
1929 tmp_tmp1 = ANDDI (ADDDI (GET_H_ACCUM (), MAKEDI (0, 1073741824)), MAKEDI (0xffffffff, 0x80000000));
1930}
1931}
1932 tmp_tmp1 = SLLDI (tmp_tmp1, 1);
1933 {
1934 DI opval = SRADI (SLLDI (tmp_tmp1, 7), 7);
1935 SET_H_ACCUM (opval);
1936 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1937 }
7a292a7a 1938}
c906108c
SS		 1939
1940#undef FLD
1941}
1942 NEXT (vpc);
1943
1944 CASE (sem, INSN_RTE) : /* rte */
1945{
1946 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1947 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1948#define FLD(f) abuf->fields.fmt_empty.f
c906108c
SS		 1949 int UNUSED written = 0;
1950 IADDR UNUSED pc = abuf->addr;
1951 SEM_BRANCH_INIT
1952 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1953
7a292a7a 1954{
c906108c
SS		 1955 {
1956 USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
1957 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1958 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1959 }
1960 {
1961 USI opval = GET_H_CR (((UINT) 14));
1962 SET_H_CR (((UINT) 6), opval);
1963 TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
1964 }
1965 {
1966 UQI opval = CPU (h_bpsw);
1967 SET_H_PSW (opval);
7a292a7a 1968 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
c906108c
SS		 1969 }
1970 {
1971 UQI opval = CPU (h_bbpsw);
1972 CPU (h_bpsw) = opval;
7a292a7a 1973 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
c906108c 1974 }
7a292a7a 1975}
c906108c
SS		 1976
1977 SEM_BRANCH_FINI (vpc);
1978#undef FLD
1979}
1980 NEXT (vpc);
1981
1982 CASE (sem, INSN_SETH) : /* seth $dr,$hash$hi16 */
1983{
1984 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1985 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 1986#define FLD(f) abuf->fields.sfmt_seth.f
c906108c
SS		 1987 int UNUSED written = 0;
1988 IADDR UNUSED pc = abuf->addr;
1989 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1990
1991 {
1992 SI opval = SLLSI (FLD (f_hi16), 16);
1993 * FLD (i_dr) = opval;
1994 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1995 }
1996
1997#undef FLD
1998}
1999 NEXT (vpc);
2000
2001 CASE (sem, INSN_SLL) : /* sll $dr,$sr */
2002{
2003 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2004 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2005#define FLD(f) abuf->fields.sfmt_add.f
c906108c
SS		 2006 int UNUSED written = 0;
2007 IADDR UNUSED pc = abuf->addr;
2008 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2009
2010 {
2011 SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2012 * FLD (i_dr) = opval;
2013 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2014 }
2015
2016#undef FLD
2017}
2018 NEXT (vpc);
2019
2020 CASE (sem, INSN_SLL3) : /* sll3 $dr,$sr,$simm16 */
2021{
2022 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2023 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2024#define FLD(f) abuf->fields.sfmt_add3.f
c906108c
SS		 2025 int UNUSED written = 0;
2026 IADDR UNUSED pc = abuf->addr;
2027 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2028
2029 {
2030 SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2031 * FLD (i_dr) = opval;
2032 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2033 }
2034
2035#undef FLD
2036}
2037 NEXT (vpc);
2038
2039 CASE (sem, INSN_SLLI) : /* slli $dr,$uimm5 */
2040{
2041 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2042 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2043#define FLD(f) abuf->fields.sfmt_slli.f
c906108c
SS		 2044 int UNUSED written = 0;
2045 IADDR UNUSED pc = abuf->addr;
2046 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2047
2048 {
2049 SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
2050 * FLD (i_dr) = opval;
2051 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2052 }
2053
2054#undef FLD
2055}
2056 NEXT (vpc);
2057
2058 CASE (sem, INSN_SRA) : /* sra $dr,$sr */
2059{
2060 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2061 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2062#define FLD(f) abuf->fields.sfmt_add.f
c906108c
SS		 2063 int UNUSED written = 0;
2064 IADDR UNUSED pc = abuf->addr;
2065 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2066
2067 {
2068 SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2069 * FLD (i_dr) = opval;
2070 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2071 }
2072
2073#undef FLD
2074}
2075 NEXT (vpc);
2076
2077 CASE (sem, INSN_SRA3) : /* sra3 $dr,$sr,$simm16 */
2078{
2079 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2080 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2081#define FLD(f) abuf->fields.sfmt_add3.f
c906108c
SS		 2082 int UNUSED written = 0;
2083 IADDR UNUSED pc = abuf->addr;
2084 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2085
2086 {
2087 SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2088 * FLD (i_dr) = opval;
2089 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2090 }
2091
2092#undef FLD
2093}
2094 NEXT (vpc);
2095
2096 CASE (sem, INSN_SRAI) : /* srai $dr,$uimm5 */
2097{
2098 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2099 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2100#define FLD(f) abuf->fields.sfmt_slli.f
c906108c
SS		 2101 int UNUSED written = 0;
2102 IADDR UNUSED pc = abuf->addr;
2103 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2104
2105 {
2106 SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
2107 * FLD (i_dr) = opval;
2108 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2109 }
2110
2111#undef FLD
2112}
2113 NEXT (vpc);
2114
2115 CASE (sem, INSN_SRL) : /* srl $dr,$sr */
2116{
2117 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2118 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2119#define FLD(f) abuf->fields.sfmt_add.f
c906108c
SS		 2120 int UNUSED written = 0;
2121 IADDR UNUSED pc = abuf->addr;
2122 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2123
2124 {
2125 SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2126 * FLD (i_dr) = opval;
2127 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2128 }
2129
2130#undef FLD
2131}
2132 NEXT (vpc);
2133
2134 CASE (sem, INSN_SRL3) : /* srl3 $dr,$sr,$simm16 */
2135{
2136 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2137 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2138#define FLD(f) abuf->fields.sfmt_add3.f
c906108c
SS		 2139 int UNUSED written = 0;
2140 IADDR UNUSED pc = abuf->addr;
2141 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2142
2143 {
2144 SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2145 * FLD (i_dr) = opval;
2146 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2147 }
2148
2149#undef FLD
2150}
2151 NEXT (vpc);
2152
2153 CASE (sem, INSN_SRLI) : /* srli $dr,$uimm5 */
2154{
2155 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2156 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2157#define FLD(f) abuf->fields.sfmt_slli.f
c906108c
SS		 2158 int UNUSED written = 0;
2159 IADDR UNUSED pc = abuf->addr;
2160 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2161
2162 {
2163 SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
2164 * FLD (i_dr) = opval;
2165 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2166 }
2167
2168#undef FLD
2169}
2170 NEXT (vpc);
2171
2172 CASE (sem, INSN_ST) : /* st $src1,@$src2 */
2173{
2174 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2175 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2176#define FLD(f) abuf->fields.sfmt_st_plus.f
c906108c
SS		 2177 int UNUSED written = 0;
2178 IADDR UNUSED pc = abuf->addr;
2179 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2180
2181 {
2182 SI opval = * FLD (i_src1);
2183 SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2184 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2185 }
2186
2187#undef FLD
2188}
2189 NEXT (vpc);
2190
2191 CASE (sem, INSN_ST_D) : /* st $src1,@($slo16,$src2) */
2192{
2193 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2194 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2195#define FLD(f) abuf->fields.sfmt_st_d.f
c906108c
SS		 2196 int UNUSED written = 0;
2197 IADDR UNUSED pc = abuf->addr;
2198 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2199
2200 {
2201 SI opval = * FLD (i_src1);
2202 SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2203 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2204 }
2205
2206#undef FLD
2207}
2208 NEXT (vpc);
2209
2210 CASE (sem, INSN_STB) : /* stb $src1,@$src2 */
2211{
2212 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2213 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2214#define FLD(f) abuf->fields.sfmt_st_plus.f
c906108c
SS		 2215 int UNUSED written = 0;
2216 IADDR UNUSED pc = abuf->addr;
2217 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2218
2219 {
2220 QI opval = * FLD (i_src1);
2221 SETMEMQI (current_cpu, pc, * FLD (i_src2), opval);
2222 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2223 }
2224
2225#undef FLD
2226}
2227 NEXT (vpc);
2228
2229 CASE (sem, INSN_STB_D) : /* stb $src1,@($slo16,$src2) */
2230{
2231 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2232 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2233#define FLD(f) abuf->fields.sfmt_st_d.f
c906108c
SS		 2234 int UNUSED written = 0;
2235 IADDR UNUSED pc = abuf->addr;
2236 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2237
2238 {
2239 QI opval = * FLD (i_src1);
2240 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2241 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2242 }
2243
2244#undef FLD
2245}
2246 NEXT (vpc);
2247
2248 CASE (sem, INSN_STH) : /* sth $src1,@$src2 */
2249{
2250 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2251 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2252#define FLD(f) abuf->fields.sfmt_st_plus.f
c906108c
SS		 2253 int UNUSED written = 0;
2254 IADDR UNUSED pc = abuf->addr;
2255 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2256
2257 {
2258 HI opval = * FLD (i_src1);
2259 SETMEMHI (current_cpu, pc, * FLD (i_src2), opval);
2260 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2261 }
2262
2263#undef FLD
2264}
2265 NEXT (vpc);
2266
2267 CASE (sem, INSN_STH_D) : /* sth $src1,@($slo16,$src2) */
2268{
2269 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2270 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2271#define FLD(f) abuf->fields.sfmt_st_d.f
c906108c
SS		 2272 int UNUSED written = 0;
2273 IADDR UNUSED pc = abuf->addr;
2274 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2275
2276 {
2277 HI opval = * FLD (i_src1);
2278 SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2279 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2280 }
2281
2282#undef FLD
2283}
2284 NEXT (vpc);
2285
2286 CASE (sem, INSN_ST_PLUS) : /* st $src1,@+$src2 */
2287{
2288 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2289 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2290#define FLD(f) abuf->fields.sfmt_st_plus.f
c906108c
SS		 2291 int UNUSED written = 0;
2292 IADDR UNUSED pc = abuf->addr;
2293 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2294
7a292a7a 2295{
c906108c
SS		 2296 SI tmp_new_src2;
2297 tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
2298 {
2299 SI opval = * FLD (i_src1);
2300 SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2301 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2302 }
2303 {
2304 SI opval = tmp_new_src2;
2305 * FLD (i_src2) = opval;
2306 TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
2307 }
7a292a7a 2308}
c906108c
SS		 2309
2310#undef FLD
2311}
2312 NEXT (vpc);
2313
2314 CASE (sem, INSN_ST_MINUS) : /* st $src1,@-$src2 */
2315{
2316 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2317 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2318#define FLD(f) abuf->fields.sfmt_st_plus.f
c906108c
SS		 2319 int UNUSED written = 0;
2320 IADDR UNUSED pc = abuf->addr;
2321 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2322
7a292a7a 2323{
c906108c
SS		 2324 SI tmp_new_src2;
2325 tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
2326 {
2327 SI opval = * FLD (i_src1);
2328 SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2329 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2330 }
2331 {
2332 SI opval = tmp_new_src2;
2333 * FLD (i_src2) = opval;
2334 TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
2335 }
7a292a7a 2336}
c906108c
SS		 2337
2338#undef FLD
2339}
2340 NEXT (vpc);
2341
2342 CASE (sem, INSN_SUB) : /* sub $dr,$sr */
2343{
2344 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2345 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2346#define FLD(f) abuf->fields.sfmt_add.f
c906108c
SS		 2347 int UNUSED written = 0;
2348 IADDR UNUSED pc = abuf->addr;
2349 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2350
2351 {
2352 SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
2353 * FLD (i_dr) = opval;
2354 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2355 }
2356
2357#undef FLD
2358}
2359 NEXT (vpc);
2360
2361 CASE (sem, INSN_SUBV) : /* subv $dr,$sr */
2362{
2363 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2364 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2365#define FLD(f) abuf->fields.sfmt_add.f
c906108c
SS		 2366 int UNUSED written = 0;
2367 IADDR UNUSED pc = abuf->addr;
2368 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2369
7a292a7a
SS		 2370{
2371 SI temp0;BI temp1;
c906108c
SS		 2372 temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
2373 temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
2374 {
2375 SI opval = temp0;
2376 * FLD (i_dr) = opval;
2377 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2378 }
2379 {
2380 BI opval = temp1;
2381 CPU (h_cond) = opval;
2382 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
2383 }
7a292a7a 2384}
c906108c
SS		 2385
2386#undef FLD
2387}
2388 NEXT (vpc);
2389
2390 CASE (sem, INSN_SUBX) : /* subx $dr,$sr */
2391{
2392 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2393 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2394#define FLD(f) abuf->fields.sfmt_add.f
c906108c
SS		 2395 int UNUSED written = 0;
2396 IADDR UNUSED pc = abuf->addr;
2397 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2398
7a292a7a
SS		 2399{
2400 SI temp0;BI temp1;
c906108c
SS		 2401 temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2402 temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2403 {
2404 SI opval = temp0;
2405 * FLD (i_dr) = opval;
2406 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2407 }
2408 {
2409 BI opval = temp1;
2410 CPU (h_cond) = opval;
2411 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
2412 }
7a292a7a 2413}
c906108c
SS		 2414
2415#undef FLD
2416}
2417 NEXT (vpc);
2418
2419 CASE (sem, INSN_TRAP) : /* trap $uimm4 */
2420{
2421 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2422 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2423#define FLD(f) abuf->fields.sfmt_trap.f
c906108c
SS		 2424 int UNUSED written = 0;
2425 IADDR UNUSED pc = abuf->addr;
2426 SEM_BRANCH_INIT
2427 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2428
7a292a7a 2429{
c906108c
SS		 2430 {
2431 USI opval = GET_H_CR (((UINT) 6));
2432 SET_H_CR (((UINT) 14), opval);
2433 TRACE_RESULT (current_cpu, abuf, "cr-14", 'x', opval);
2434 }
2435 {
2436 USI opval = ADDSI (pc, 4);
2437 SET_H_CR (((UINT) 6), opval);
2438 TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
2439 }
2440 {
2441 UQI opval = CPU (h_bpsw);
2442 CPU (h_bbpsw) = opval;
7a292a7a 2443 TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
c906108c
SS		 2444 }
2445 {
2446 UQI opval = GET_H_PSW ();
2447 CPU (h_bpsw) = opval;
7a292a7a 2448 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
c906108c
SS		 2449 }
2450 {
2451 UQI opval = ANDQI (GET_H_PSW (), 128);
2452 SET_H_PSW (opval);
7a292a7a 2453 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
c906108c
SS		 2454 }
2455 {
2456 SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
2457 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2458 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2459 }
7a292a7a 2460}
c906108c
SS		 2461
2462 SEM_BRANCH_FINI (vpc);
2463#undef FLD
2464}
2465 NEXT (vpc);
2466
2467 CASE (sem, INSN_UNLOCK) : /* unlock $src1,@$src2 */
2468{
2469 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2470 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
96baa820 2471#define FLD(f) abuf->fields.sfmt_st_plus.f
c906108c
SS		 2472 int UNUSED written = 0;
2473 IADDR UNUSED pc = abuf->addr;
2474 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2475
7a292a7a 2476{
c906108c
SS		 2477if (CPU (h_lock)) {
2478 {
2479 SI opval = * FLD (i_src1);
2480 SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2481 written |= (1 << 4);
2482 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2483 }
2484}
2485 {
2486 BI opval = 0;
2487 CPU (h_lock) = opval;
7a292a7a 2488 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
c906108c 2489 }
7a292a7a 2490}
c906108c
SS		 2491
2492 abuf->written = written;
2493#undef FLD
2494}
2495 NEXT (vpc);
2496
2497
2498 }
2499 ENDSWITCH (sem) /* End of semantic switch. */
2500
2501 /* At this point `vpc' contains the next insn to execute. */
2502}
2503
2504#undef DEFINE_SWITCH
2505#endif /* DEFINE_SWITCH */
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