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sim: sim-close: unify sim_close logic
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c906108c 1/* Main simulator entry points specific to the M32R.
32d0add0 2 Copyright (C) 1996-2015 Free Software Foundation, Inc.
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3 Contributed by Cygnus Support.
4
16b47b25 5 This file is part of GDB, the GNU debugger.
c906108c 6
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7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
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9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
c906108c 11
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12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
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17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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19
20#include "sim-main.h"
21#include "sim-options.h"
22#include "libiberty.h"
23#include "bfd.h"
24
25#ifdef HAVE_STRING_H
26#include <string.h>
27#else
28#ifdef HAVE_STRINGS_H
29#include <strings.h>
30#endif
31#endif
32#ifdef HAVE_STDLIB_H
33#include <stdlib.h>
34#endif
35
36static void free_state (SIM_DESC);
37static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
38
39/* Records simulator descriptor so utilities like m32r_dump_regs can be
40 called from gdb. */
41SIM_DESC current_state;
42\f
43/* Cover function of sim_state_free to free the cpu buffers as well. */
44
45static void
46free_state (SIM_DESC sd)
47{
48 if (STATE_MODULES (sd) != NULL)
49 sim_module_uninstall (sd);
50 sim_cpu_free_all (sd);
51 sim_state_free (sd);
52}
53
54/* Create an instance of the simulator. */
55
56SIM_DESC
57sim_open (kind, callback, abfd, argv)
58 SIM_OPEN_KIND kind;
59 host_callback *callback;
6b4a8935 60 struct bfd *abfd;
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61 char **argv;
62{
63 SIM_DESC sd = sim_state_alloc (kind, callback);
64 char c;
65 int i;
66
67 /* The cpu data is kept in a separately allocated chunk of memory. */
68 if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK)
69 {
70 free_state (sd);
71 return 0;
72 }
73
74#if 0 /* FIXME: pc is in mach-specific struct */
75 /* FIXME: watchpoints code shouldn't need this */
76 {
77 SIM_CPU *current_cpu = STATE_CPU (sd, 0);
78 STATE_WATCHPOINTS (sd)->pc = &(PC);
79 STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
80 }
81#endif
82
83 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
84 {
85 free_state (sd);
86 return 0;
87 }
88
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89#if 0 /* FIXME: 'twould be nice if we could do this */
90 /* These options override any module options.
91 Obviously ambiguity should be avoided, however the caller may wish to
92 augment the meaning of an option. */
93 if (extra_options != NULL)
94 sim_add_option_table (sd, extra_options);
95#endif
96
97 /* getopt will print the error message so we just have to exit if this fails.
98 FIXME: Hmmm... in the case of gdb we need getopt to call
99 print_filtered. */
100 if (sim_parse_args (sd, argv) != SIM_RC_OK)
101 {
102 free_state (sd);
103 return 0;
104 }
105
106 /* Allocate a handler for the control registers and other devices
107 if no memory for that range has been allocated by the user.
108 All are allocated in one chunk to keep things from being
109 unnecessarily complicated. */
110 if (sim_core_read_buffer (sd, NULL, read_map, &c, M32R_DEVICE_ADDR, 1) == 0)
111 sim_core_attach (sd, NULL,
112 0 /*level*/,
113 access_read_write,
114 0 /*space ???*/,
115 M32R_DEVICE_ADDR, M32R_DEVICE_LEN /*nr_bytes*/,
116 0 /*modulo*/,
117 &m32r_devices,
118 NULL /*buffer*/);
119
120 /* Allocate core managed memory if none specified by user.
121 Use address 4 here in case the user wanted address 0 unmapped. */
122 if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
123 sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE);
124
125 /* check for/establish the reference program image */
126 if (sim_analyze_program (sd,
127 (STATE_PROG_ARGV (sd) != NULL
128 ? *STATE_PROG_ARGV (sd)
129 : NULL),
130 abfd) != SIM_RC_OK)
131 {
132 free_state (sd);
133 return 0;
134 }
135
136 /* Establish any remaining configuration options. */
137 if (sim_config (sd) != SIM_RC_OK)
138 {
139 free_state (sd);
140 return 0;
141 }
142
143 if (sim_post_argv_init (sd) != SIM_RC_OK)
144 {
145 free_state (sd);
146 return 0;
147 }
148
149 /* Open a copy of the cpu descriptor table. */
150 {
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151 CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
152 CGEN_ENDIAN_BIG);
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153 for (i = 0; i < MAX_NR_PROCESSORS; ++i)
154 {
155 SIM_CPU *cpu = STATE_CPU (sd, i);
156 CPU_CPU_DESC (cpu) = cd;
157 CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
158 }
159 m32r_cgen_init_dis (cd);
160 }
161
162 /* Initialize various cgen things not done by common framework.
163 Must be done after m32r_cgen_cpu_open. */
164 cgen_init (sd);
165
166 for (c = 0; c < MAX_NR_PROCESSORS; ++c)
167 {
168 /* Only needed for profiling, but the structure member is small. */
169 memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
170 sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
171 /* Hook in callback for reporting these stats */
172 PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
173 = print_m32r_misc_cpu;
174 }
175
176 /* Store in a global so things like sparc32_dump_regs can be invoked
177 from the gdb command line. */
178 current_state = sd;
179
180 return sd;
181}
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182\f
183SIM_RC
184sim_create_inferior (sd, abfd, argv, envp)
185 SIM_DESC sd;
6b4a8935 186 struct bfd *abfd;
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187 char **argv;
188 char **envp;
189{
190 SIM_CPU *current_cpu = STATE_CPU (sd, 0);
191 SIM_ADDR addr;
192
193 if (abfd != NULL)
194 addr = bfd_get_start_address (abfd);
195 else
196 addr = 0;
197 sim_pc_set (current_cpu, addr);
198
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199#ifdef M32R_LINUX
200 m32rbf_h_cr_set (current_cpu,
201 m32r_decode_gdb_ctrl_regnum(SPI_REGNUM), 0x1f00000);
202 m32rbf_h_cr_set (current_cpu,
203 m32r_decode_gdb_ctrl_regnum(SPU_REGNUM), 0x1f00000);
204#endif
205
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206#if 0
207 STATE_ARGV (sd) = sim_copy_argv (argv);
208 STATE_ENVP (sd) = sim_copy_argv (envp);
209#endif
210
211 return SIM_RC_OK;
212}
213
214/* PROFILE_CPU_CALLBACK */
215
216static void
217print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
218{
219 SIM_DESC sd = CPU_STATE (cpu);
220 char buf[20];
221
222 if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
223 {
224 sim_io_printf (sd, "Miscellaneous Statistics\n\n");
225 sim_io_printf (sd, " %-*s %s\n\n",
226 PROFILE_LABEL_WIDTH, "Fill nops:",
227 sim_add_commas (buf, sizeof (buf),
228 CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
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229 if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
230 sim_io_printf (sd, " %-*s %s\n\n",
231 PROFILE_LABEL_WIDTH, "Parallel insns:",
232 sim_add_commas (buf, sizeof (buf),
233 CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
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234 if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32r2)
235 sim_io_printf (sd, " %-*s %s\n\n",
236 PROFILE_LABEL_WIDTH, "Parallel insns:",
237 sim_add_commas (buf, sizeof (buf),
238 CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
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239 }
240}