projects / thirdparty / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 5f186447 | 1 | # Makefile template for Configure for the 68HC11 sim library. |
| 32d0add0 | 2 | # Copyright (C) 1999-2015 Free Software Foundation, Inc. |
| 5f186447 SC |
3 | # Written by Cygnus Support. |
| 4 | # | |
| 5 | # This program is free software; you can redistribute it and/or modify | |
| 6 | # it under the terms of the GNU General Public License as published by | |
| 4744ac1b | 7 | # the Free Software Foundation; either version 3 of the License, or |
| 5f186447 | 8 | # (at your option) any later version. |
| 4744ac1b | 9 | # |
| 5f186447 SC |
10 | # This program is distributed in the hope that it will be useful, |
| 11 | # but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 12 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 13 | # GNU General Public License for more details. | |
| 4744ac1b | 14 | # |
| 5f186447 | 15 | # You should have received a copy of the GNU General Public License |
| 4744ac1b | 16 | # along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 5f186447 SC |
17 | |
| 18 | ## COMMON_PRE_CONFIG_FRAG | |
| 19 | ||
| 81e09ed8 SC |
20 | M68HC11_OBJS = interp.o m68hc11int.o m68hc12int.o \ |
| 21 | emulos.o interrupts.o m68hc11_sim.o | |
| 5f186447 | 22 | |
| 5f186447 SC |
23 | SIM_OBJS = $(M68HC11_OBJS) \ |
| 24 | $(SIM_NEW_COMMON_OBJS) \ | |
| 25 | sim-load.o \ | |
| 26 | sim-hload.o \ | |
| 27 | sim-engine.o \ | |
| 28 | sim-stop.o \ | |
| 5f186447 SC |
29 | sim-hrw.o \ |
| 30 | sim-reason.o \ | |
| 31 | $(SIM_EXTRA_OBJS) | |
| 32 | ||
| 33 | SIM_PROFILE= -DPROFILE=1 -DWITH_PROFILE=-1 | |
| 9b9f7b3c SC |
34 | # We must use 32-bit addresses to support memory bank switching. |
| 35 | # The WORD_BITSIZE is normally 16 but must be switched (temporarily) | |
| 36 | # to 32 to avoid a bug in the sim-common which uses 'unsigned_word' | |
| 37 | # instead of 'address_word' in some places (the result is a truncation | |
| 38 | # of the 32-bit address to 16-bit; and this breaks the simulator). | |
| 39 | SIM_EXTRA_CFLAGS = -DWITH_TARGET_WORD_BITSIZE=32 \ | |
| 5f186447 | 40 | -DWITH_TARGET_CELL_BITSIZE=32 \ |
| 9b9f7b3c SC |
41 | -DWITH_TARGET_ADDRESS_BITSIZE=32 \ |
| 42 | -DWITH_TARGET_WORD_MSB=31 | |
| 5f186447 SC |
43 | SIM_EXTRA_CLEAN = clean-extra |
| 44 | ||
| 45 | SIM_EXTRA_OBJS = @m68hc11_extra_objs@ | |
| 46 | ||
| 3c25f8c7 | 47 | INCLUDE = $(srcdir)/../../include/gdb/callback.h \ |
| 5f186447 SC |
48 | interrupts.h sim-main.h |
| 49 | ||
| 50 | ||
| 51 | ## COMMON_POST_CONFIG_FRAG | |
| 52 | ||
| 53 | m68hc11int.c: gencode | |
| 81e09ed8 SC |
54 | ./gencode -m6811 > $@ |
| 55 | ||
| 56 | m68hc12int.c: gencode | |
| 57 | ./gencode -m6812 > $@ | |
| 5f186447 SC |
58 | |
| 59 | gencode: gencode.c | |
| b51c7603 | 60 | $(CC_FOR_BUILD) $(BUILD_CFLAGS) -o gencode $(srcdir)/gencode.c |
| 5f186447 SC |
61 | |
| 62 | interp.o: interp.c $(INCLUDE) | |
| 63 | ||
| 64 | clean-extra: | |
| 65 | rm -f gencode m68hc11int.c |