[thirdparty/binutils-gdb.git] / sim / mips / Makefile.in

#    Makefile template for Configure for the MIPS simulator.
#    Written by Cygnus Support.

SHELL = @SHELL@

## COMMON_PRE_CONFIG_FRAG

srcdir=@srcdir@
srcroot=$(srcdir)/../../

# Object files created by various simulator generators.


SIM_IGEN_OBJ = \
	support.o \
	itable.o \
	semantics.o \
	idecode.o \
	icache.o \
	engine.o \
	irun.o \


SIM_M16_OBJ = \
	m16_support.o \
	m16_semantics.o \
	m16_idecode.o \
	m16_icache.o \
	\
	m32_support.o \
	m32_semantics.o \
	m32_idecode.o \
	m32_icache.o \
	\
	itable.o \
	m16run.o \

SIM_MICROMIPS_OBJ = \
	micromips16_support.o \
	micromips16_semantics.o \
	micromips16_idecode.o \
	micromips16_icache.o \
	\
	micromips32_support.o \
	micromips32_semantics.o \
	micromips32_idecode.o \
	micromips32_icache.o \
	\
	micromips_m32_support.o \
	micromips_m32_semantics.o \
	micromips_m32_idecode.o \
	micromips_m32_icache.o \
	\
	itable.o \
	micromipsrun.o \


SIM_MULTI_OBJ = @sim_multi_obj@ \
		itable.o \
		multi-run.o \

SIM_OBJS = \
	interp.o \
	$(SIM_@sim_gen@_OBJ) \
	$(SIM_NEW_COMMON_OBJS) \
	cp1.o \
	mdmx.o \
	dsp.o \
	sim-main.o \
	sim-resume.o \


# List of flags to always pass to $(CC).
SIM_SUBTARGET=@SIM_SUBTARGET@
SIM_EXTRA_CFLAGS = $(SIM_SUBTARGET)

SIM_EXTRA_CLEAN = clean-extra
SIM_EXTRA_DISTCLEAN = distclean-extra

all: $(SIM_@sim_gen@_ALL)

SIM_EXTRA_DEPS = itable.h

# Code doesn't build cleanly yet.
SIM_WERROR_CFLAGS =

## COMMON_POST_CONFIG_FRAG

IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
IGEN_INSN=$(srcdir)/mips.igen
IGEN_DC=$(srcdir)/mips.dc
M16_DC=$(srcdir)/m16.dc
MICROMIPS32_DC=$(srcdir)/micromips.dc
MICROMIPS16_DC=$(srcdir)/micromips16.dc
IGEN_INCLUDE=\
	$(srcdir)/micromipsdsp.igen \
	$(srcdir)/micromips.igen \
	$(srcdir)/m16.igen \
	$(srcdir)/m16e.igen \
	$(srcdir)/mdmx.igen \
	$(srcdir)/mips3d.igen \
	$(srcdir)/sb1.igen \
	$(srcdir)/tx.igen \
	$(srcdir)/vr.igen \
	$(srcdir)/dsp.igen \
	$(srcdir)/dsp2.igen \
	$(srcdir)/mips3264r2.igen \

# NB:	Since these can be built by a number of generators, care
#	must be taken to ensure that they are only dependant on
#	one of those generators.
BUILT_SRC_FROM_GEN = \
	itable.h \
	itable.c \

SIM_IGEN_ALL = tmp-igen
SIM_M16_ALL = tmp-m16
SIM_MICROMIPS_ALL = tmp-micromips
SIM_MULTI_ALL = tmp-multi

$(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL)


BUILT_SRC_FROM_IGEN = \
	icache.h \
	icache.c \
	idecode.h \
	idecode.c \
	semantics.h \
	semantics.c \
	model.h \
	model.c \
	support.h \
	support.c \
	engine.h \
	engine.c \
	irun.c \

$(BUILT_SRC_FROM_IGEN): tmp-igen

tmp-igen: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
	$(IGEN_RUN) \
		$(IGEN_TRACE) \
		-I $(srcdir) \
		-Werror \
		-Wnodiscard \
		@sim_igen_flags@ \
		-G gen-direct-access \
		-G gen-zero-r0 \
		-B 32 \
		-H 31 \
		-i $(IGEN_INSN) \
		-o $(IGEN_DC) \
		-x \
		-n icache.h    -hc tmp-icache.h \
		-n icache.c    -c  tmp-icache.c \
		-n semantics.h -hs tmp-semantics.h \
		-n semantics.c -s  tmp-semantics.c \
		-n idecode.h   -hd tmp-idecode.h \
		-n idecode.c   -d  tmp-idecode.c \
		-n model.h     -hm tmp-model.h \
		-n model.c     -m  tmp-model.c \
		-n support.h   -hf tmp-support.h \
		-n support.c   -f  tmp-support.c \
		-n itable.h    -ht tmp-itable.h \
		-n itable.c    -t  tmp-itable.c \
		-n engine.h    -he tmp-engine.h \
		-n engine.c    -e  tmp-engine.c \
		-n irun.c      -r  tmp-irun.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h icache.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c icache.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h model.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c model.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h support.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c support.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-engine.h engine.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-engine.c engine.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-irun.c irun.c
	touch tmp-igen

BUILT_SRC_FROM_M16 = \
	m16_icache.h \
	m16_icache.c \
	m16_idecode.h \
	m16_idecode.c \
	m16_semantics.h \
	m16_semantics.c \
	m16_model.h \
	m16_model.c \
	m16_support.h \
	m16_support.c \
	\
	m32_icache.h \
	m32_icache.c \
	m32_idecode.h \
	m32_idecode.c \
	m32_semantics.h \
	m32_semantics.c \
	m32_model.h \
	m32_model.c \
	m32_support.h \
	m32_support.c \

$(BUILT_SRC_FROM_M16): tmp-m16

tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
	$(IGEN_RUN) \
		$(IGEN_TRACE) \
		-I $(srcdir) \
		-Werror \
		-Wnodiscard \
		@sim_m16_flags@ \
		-G gen-direct-access \
		-G gen-zero-r0 \
		-B 16 \
		-H 15 \
		-i $(IGEN_INSN) \
		-o $(M16_DC) \
		-P m16_ \
		-x \
		-n m16_icache.h    -hc tmp-icache.h \
		-n m16_icache.c    -c  tmp-icache.c \
		-n m16_semantics.h -hs tmp-semantics.h \
		-n m16_semantics.c -s  tmp-semantics.c \
		-n m16_idecode.h   -hd tmp-idecode.h \
		-n m16_idecode.c   -d  tmp-idecode.c \
		-n m16_model.h     -hm tmp-model.h \
		-n m16_model.c     -m  tmp-model.c \
		-n m16_support.h   -hf tmp-support.h \
		-n m16_support.c   -f  tmp-support.c \
		#
	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h m16_model.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c m16_model.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h m16_support.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c m16_support.c
	$(IGEN_RUN) \
		$(IGEN_TRACE) \
		-I $(srcdir) \
		-Werror \
		-Wnodiscard \
		@sim_igen_flags@ \
		-G gen-direct-access \
		-G gen-zero-r0 \
		-B 32 \
		-H 31 \
		-i $(IGEN_INSN) \
		-o $(IGEN_DC) \
		-P m32_ \
		-x \
		-n m32_icache.h    -hc tmp-icache.h \
		-n m32_icache.c    -c  tmp-icache.c \
		-n m32_semantics.h -hs tmp-semantics.h \
		-n m32_semantics.c -s  tmp-semantics.c \
		-n m32_idecode.h   -hd tmp-idecode.h \
		-n m32_idecode.c   -d  tmp-idecode.c \
		-n m32_model.h     -hm tmp-model.h \
		-n m32_model.c     -m  tmp-model.c \
		-n m32_support.h   -hf tmp-support.h \
		-n m32_support.c   -f  tmp-support.c \
		#
	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h m32_icache.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c m32_icache.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h m32_idecode.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c m32_idecode.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h \
						m32_semantics.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c \
						m32_semantics.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h m32_model.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c m32_model.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h m32_support.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c m32_support.c
	$(IGEN_RUN) \
		$(IGEN_TRACE) \
		-I $(srcdir) \
		-Werror \
		-Wnodiscard \
		-Wnowidth \
		@sim_igen_flags@ @sim_m16_flags@ \
		-G gen-direct-access \
		-G gen-zero-r0 \
		-i $(IGEN_INSN) \
		-n itable.h    -ht tmp-itable.h \
		-n itable.c    -t  tmp-itable.c \
		#
	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
	touch tmp-m16

BUILT_SRC_FROM_MICROMIPS = \
	micromips16_icache.h \
	micromips16_icache.c \
	micromips16_idecode.h \
	micromips16_idecode.c \
	micromips16_semantics.h \
	micromips16_semantics.c \
	micromips16_model.h \
	micromips16_model.c \
	micromips16_support.h \
	micromips16_support.c \
	\
	micromips32_icache.h \
	micromips32_icache.c \
	micromips32_idecode.h \
	micromips32_idecode.c \
	micromips32_semantics.h \
	micromips32_semantics.c \
	micromips32_model.h \
	micromips32_model.c \
	micromips32_support.h \
	micromips32_support.c \
	\
	micromips_m32_icache.h \
	micromips_m32_icache.c \
	micromips_m32_idecode.h \
	micromips_m32_idecode.c \
	micromips_m32_semantics.h \
	micromips_m32_semantics.c \
	micromips_m32_model.h \
	micromips_m32_model.c \
	micromips_m32_support.h \
	micromips_m32_support.c \

$(BUILT_SRC_FROM_MICROMIPS): tmp-micromips

tmp-micromips: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
	$(IGEN_RUN) \
		$(IGEN_TRACE) \
		-I $(srcdir) \
		-Werror \
		-Wnodiscard \
		@sim_micromips16_flags@ \
		-G gen-direct-access \
		-G gen-zero-r0 \
		-B 16 \
		-H 15 \
		-i $(IGEN_INSN) \
		-o $(MICROMIPS16_DC) \
		-P micromips16_ \
		-x \
		-n micromips16_icache.h    -hc tmp-icache.h \
		-n micromips16_icache.c    -c  tmp-icache.c \
		-n micromips16_semantics.h -hs tmp-semantics.h \
		-n micromips16_semantics.c -s  tmp-semantics.c \
		-n micromips16_idecode.h   -hd tmp-idecode.h \
		-n micromips16_idecode.c   -d  tmp-idecode.c \
		-n micromips16_model.h     -hm tmp-model.h \
		-n micromips16_model.c     -m  tmp-model.c \
		-n micromips16_support.h   -hf tmp-support.h \
		-n micromips16_support.c   -f  tmp-support.c \
		#
	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h \
						micromips16_icache.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c \
						micromips16_icache.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h \
						micromips16_idecode.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c \
						micromips16_idecode.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h \
						micromips16_semantics.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c \
						micromips16_semantics.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h \
						micromips16_model.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c \
						micromips16_model.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h \
						micromips16_support.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c \
						micromips16_support.c
	$(IGEN_RUN) \
		$(IGEN_TRACE) \
		-I $(srcdir) \
		-Werror \
		-Wnodiscard \
		@sim_micromips_flags@ \
		-G gen-direct-access \
		-G gen-zero-r0 \
		-B 32 \
		-H 31 \
		-i $(IGEN_INSN) \
		-o $(MICROMIPS32_DC) \
		-P micromips32_ \
		-x \
		-n micromips32_icache.h    -hc tmp-icache.h \
		-n micromips32_icache.c    -c  tmp-icache.c \
		-n micromips32_semantics.h -hs tmp-semantics.h \
		-n micromips32_semantics.c -s  tmp-semantics.c \
		-n micromips32_idecode.h   -hd tmp-idecode.h \
		-n micromips32_idecode.c   -d  tmp-idecode.c \
		-n micromips32_model.h     -hm tmp-model.h \
		-n micromips32_model.c     -m  tmp-model.c \
		-n micromips32_support.h   -hf tmp-support.h \
		-n micromips32_support.c   -f  tmp-support.c \
		#
	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h \
						micromips32_icache.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c \
						micromips32_icache.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h  \
						micromips32_idecode.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c \
						micromips32_idecode.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h \
						micromips32_semantics.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c \
						micromips32_semantics.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h \
						micromips32_model.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c  \
						micromips32_model.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h \
						micromips32_support.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c \
						micromips32_support.c
	$(IGEN_RUN) \
		$(IGEN_TRACE) \
		-I $(srcdir) \
		-Werror \
		-Wnodiscard \
		@sim_igen_flags@ \
		-G gen-direct-access \
		-G gen-zero-r0 \
		-B 32 \
		-H 31 \
		-i $(IGEN_INSN) \
		-o $(IGEN_DC) \
		-P micromips_m32_ \
		-x \
		-n micromips_m32_icache.h    -hc tmp-icache.h \
		-n micromips_m32_icache.c    -c  tmp-icache.c \
		-n micromips_m32_semantics.h -hs tmp-semantics.h \
		-n micromips_m32_semantics.c -s  tmp-semantics.c \
		-n micromips_m32_idecode.h   -hd tmp-idecode.h \
		-n micromips_m32_idecode.c   -d  tmp-idecode.c \
		-n micromips_m32_model.h     -hm tmp-model.h \
		-n micromips_m32_model.c     -m  tmp-model.c \
		-n micromips_m32_support.h   -hf tmp-support.h \
		-n micromips_m32_support.c   -f  tmp-support.c \
		#
	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h \
						micromips_m32_icache.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c \
						micromips_m32_icache.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h \
						micromips_m32_idecode.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c \
						micromips_m32_idecode.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h \
						micromips_m32_semantics.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c \
						micromips_m32_semantics.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h \
						micromips_m32_model.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c \
						micromips_m32_model.c
	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h \
						micromips_m32_support.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c \
						micromips_m32_support.c
	$(IGEN_RUN) \
		$(IGEN_TRACE) \
		-I $(srcdir) \
		-Werror \
		-Wnodiscard \
		-Wnowidth \
		@sim_igen_flags@ @sim_micromips_flags@ @sim_micromips16_flags@\
		-G gen-direct-access \
		-G gen-zero-r0 \
		-i $(IGEN_INSN) \
		-n itable.h    -ht tmp-itable.h \
		-n itable.c    -t  tmp-itable.c \
		#
	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
	touch tmp-micromips

BUILT_SRC_FROM_MULTI = @sim_multi_src@
SIM_MULTI_IGEN_CONFIGS = @sim_multi_igen_configs@

$(BUILT_SRC_FROM_MULTI): tmp-multi
tmp-multi: tmp-mach-multi tmp-itable-multi tmp-run-multi targ-vals.h
tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
	for t in $(SIM_MULTI_IGEN_CONFIGS); do \
	  p=`echo $${t} | sed -e 's/:.*//'` ; \
	  m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
	  f=`echo $${t} | sed -e 's/.*://'` ; \
	  case $${p} in \
	    micromips16*) e="-B 16 -H 15 -o $(MICROMIPS16_DC) -F 16" ;; \
	    micromips32* | micromips64*) \
		e="-B 32 -H 31 -o $(MICROMIPS32_DC) -F $${f}" ;; \
	    micromips_m32*) \
		e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}"; \
		m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
	    micromips_m64*) \
		e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}"; \
		m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
	    m16*) e="-B 16 -H 15 -o $(M16_DC) -F 16" ;; \
	    *) e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}" ;; \
	  esac; \
	  $(IGEN_RUN) \
		$(IGEN_TRACE) \
		$${e} \
		-I $(srcdir) \
		-Werror \
		-Wnodiscard \
		-N 0 \
		-M $${m} \
		-G gen-direct-access \
		-G gen-zero-r0 \
		-i $(IGEN_INSN) \
		-P $${p}_ \
		-x \
		-n $${p}_icache.h    -hc tmp-icache.h \
		-n $${p}_icache.c    -c  tmp-icache.c \
		-n $${p}_semantics.h -hs tmp-semantics.h \
		-n $${p}_semantics.c -s  tmp-semantics.c \
		-n $${p}_idecode.h   -hd tmp-idecode.h \
		-n $${p}_idecode.c   -d  tmp-idecode.c \
		-n $${p}_model.h     -hm tmp-model.h \
		-n $${p}_model.c     -m  tmp-model.c \
		-n $${p}_support.h   -hf tmp-support.h \
		-n $${p}_support.c   -f  tmp-support.c \
		-n $${p}_engine.h    -he tmp-engine.h \
		-n $${p}_engine.c    -e  tmp-engine.c \
	  || exit; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-icache.h \
						  $${p}_icache.h ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-icache.c \
						  $${p}_icache.c ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h \
						  $${p}_idecode.h ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c \
						  $${p}_idecode.c ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h \
						  $${p}_semantics.h ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c \
						  $${p}_semantics.c ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-model.h \
						  $${p}_model.h ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-model.c \
						  $${p}_model.c ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-support.h \
						  $${p}_support.h ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-support.c \
						  $${p}_support.c ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-engine.h \
						  $${p}_engine.h ; \
	  $(SHELL) $(srcdir)/../../move-if-change tmp-engine.c \
						  $${p}_engine.c ; \
	done
	touch tmp-mach-multi
tmp-itable-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
	$(IGEN_RUN) \
		$(IGEN_TRACE) \
		-I $(srcdir) \
		-Werror \
		-Wnodiscard \
		-Wnowidth \
		-N 0 \
		@sim_multi_flags@ \
		-G gen-direct-access \
		-G gen-zero-r0 \
		-i $(IGEN_INSN) \
		-n itable.h    -ht tmp-itable.h \
		-n itable.c    -t  tmp-itable.c \
		#
	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
	touch tmp-itable-multi
tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c
	for t in $(SIM_MULTI_IGEN_CONFIGS); do \
	  case $${t} in \
	    m16*) \
	      m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
	      sed <  $(srcdir)/m16run.c > tmp-run \
		    -e "s/^sim_/m16$${m}_/" \
		    -e "s/m16_/m16$${m}_/" \
		    -e "s/m32_/m32$${m}_/" ; \
	      $(SHELL) $(srcdir)/../../move-if-change tmp-run \
						      m16$${m}_run.c ; \
            ;;\
	    micromips32*) \
	      m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
	      sed <  $(srcdir)/micromipsrun.c > tmp-run \
		    -e "s/^sim_/micromips32$${m}_/" \
		    -e "s/micromips16_/micromips16$${m}_/" \
		    -e "s/micromips32_/micromips32$${m}_/" \
		    -e "s/m32_/m32$${m}_/" ; \
	      $(SHELL) $(srcdir)/../../move-if-change tmp-run \
						      micromips$${m}_run.c ; \
             ;;\
	    micromips64*) \
	      m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
	      sed <  $(srcdir)/micromipsrun.c > tmp-run \
		    -e "s/^sim_/micromips64$${m}_/" \
		    -e "s/micromips16_/micromips16$${m}_/" \
		    -e "s/micromips32_/micromips64$${m}_/" \
		    -e "s/m32_/m64$${m}_/" ; \
	      $(SHELL) $(srcdir)/../../move-if-change tmp-run \
						      micromips$${m}_run.c ; \
             ;;\
	  esac \
	done
	touch tmp-run-multi

clean-extra:
	rm -f $(BUILT_SRC_FROM_GEN)
	rm -f $(BUILT_SRC_FROM_IGEN)
	rm -f $(BUILT_SRC_FROM_M16)
	rm -f $(BUILT_SRC_FROM_MICROMIPS)
	rm -f $(BUILT_SRC_FROM_MULTI)
	rm -f tmp-*
	rm -f micromips16*.o micromips32*.o m16*.o m32*.o itable*.o

distclean-extra:
	rm -f multi-include.h multi-run.c
Commit	Line	Data
c906108c SS	1	# Makefile template for Configure for the MIPS simulator.
	2	# Written by Cygnus Support.
	3
ae451ac6 ILT	4	SHELL = @SHELL@
ae451ac6 ILT	5
c906108c SS	6	## COMMON_PRE_CONFIG_FRAG
	7
	8	srcdir=@srcdir@
	9	srcroot=$(srcdir)/../../
	10
	11	# Object files created by various simulator generators.
	12
	13
	14	SIM_IGEN_OBJ = \
	15	support.o \
	16	itable.o \
	17	semantics.o \
	18	idecode.o \
	19	icache.o \
d97ba9c6	20	engine.o \
c906108c SS	21	irun.o \
	22
	23
	24	SIM_M16_OBJ = \
	25	m16_support.o \
	26	m16_semantics.o \
	27	m16_idecode.o \
	28	m16_icache.o \
	29	\
	30	m32_support.o \
	31	m32_semantics.o \
	32	m32_idecode.o \
	33	m32_icache.o \
	34	\
	35	itable.o \
	36	m16run.o \
	37
8e394ffc AB	38	SIM_MICROMIPS_OBJ = \
	39	micromips16_support.o \
	40	micromips16_semantics.o \
	41	micromips16_idecode.o \
	42	micromips16_icache.o \
	43	\
	44	micromips32_support.o \
	45	micromips32_semantics.o \
	46	micromips32_idecode.o \
	47	micromips32_icache.o \
	48	\
	49	micromips_m32_support.o \
	50	micromips_m32_semantics.o \
	51	micromips_m32_idecode.o \
	52	micromips_m32_icache.o \
	53	\
	54	itable.o \
	55	micromipsrun.o \
	56
	57
	58	SIM_MULTI_OBJ = @sim_multi_obj@ \
	59	itable.o \
	60	multi-run.o \
c906108c	61
c906108c	62	SIM_OBJS = \
e787f858	63	interp.o \
c906108c SS	64	$(SIM_@sim_gen@_OBJ) \
c906108c SS	65	$(SIM_NEW_COMMON_OBJS) \
487f79b7	66	cp1.o \
f4f1b9f1	67	mdmx.o \
40a5538e	68	dsp.o \
c906108c	69	sim-main.o \
c906108c	70	sim-resume.o \
c906108c SS	71
	72
	73	# List of flags to always pass to $(CC).
	74	SIM_SUBTARGET=@SIM_SUBTARGET@
	75	SIM_EXTRA_CFLAGS = $(SIM_SUBTARGET)
	76
	77	SIM_EXTRA_CLEAN = clean-extra
4c54fc26	78	SIM_EXTRA_DISTCLEAN = distclean-extra
c906108c	79
f8069d55	80	all: $(SIM_@sim_gen@_ALL)
c906108c	81
e7d8f1da	82	SIM_EXTRA_DEPS = itable.h
c906108c	83
982c3a65 MF	84	# Code doesn't build cleanly yet.
982c3a65 MF	85	SIM_WERROR_CFLAGS =
c906108c	86
e7d8f1da	87	## COMMON_POST_CONFIG_FRAG
4c54fc26	88
c906108c SS	89	IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
	90	IGEN_INSN=$(srcdir)/mips.igen
	91	IGEN_DC=$(srcdir)/mips.dc
	92	M16_DC=$(srcdir)/m16.dc
8e394ffc AB	93	MICROMIPS32_DC=$(srcdir)/micromips.dc
8e394ffc AB	94	MICROMIPS16_DC=$(srcdir)/micromips16.dc
c906108c	95	IGEN_INCLUDE=\
8e394ffc AB	96	$(srcdir)/micromipsdsp.igen \
8e394ffc AB	97	$(srcdir)/micromips.igen \
c906108c	98	$(srcdir)/m16.igen \
d85c3a10	99	$(srcdir)/m16e.igen \
909daa82	100	$(srcdir)/mdmx.igen \
e7e81181	101	$(srcdir)/mips3d.igen \
7cbea089	102	$(srcdir)/sb1.igen \
c906108c SS	103	$(srcdir)/tx.igen \
c906108c SS	104	$(srcdir)/vr.igen \
40a5538e	105	$(srcdir)/dsp.igen \
8b082fb1	106	$(srcdir)/dsp2.igen \
d85c3a10	107	$(srcdir)/mips3264r2.igen \
c906108c SS	108
	109	# NB: Since these can be built by a number of generators, care
	110	# must be taken to ensure that they are only dependant on
	111	# one of those generators.
	112	BUILT_SRC_FROM_GEN = \
	113	itable.h \
	114	itable.c \
	115
	116	SIM_IGEN_ALL = tmp-igen
	117	SIM_M16_ALL = tmp-m16
8e394ffc	118	SIM_MICROMIPS_ALL = tmp-micromips
4c54fc26	119	SIM_MULTI_ALL = tmp-multi
c906108c SS	120
	121	$(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL)
	122
	123
	124
	125	BUILT_SRC_FROM_IGEN = \
	126	icache.h \
	127	icache.c \
	128	idecode.h \
	129	idecode.c \
	130	semantics.h \
	131	semantics.c \
	132	model.h \
	133	model.c \
	134	support.h \
	135	support.c \
	136	engine.h \
	137	engine.c \
	138	irun.c \
	139
	140	$(BUILT_SRC_FROM_IGEN): tmp-igen
	141
a55b92be MF	142	tmp-igen: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
a55b92be MF	143	$(IGEN_RUN) \
c906108c SS	144	$(IGEN_TRACE) \
	145	-I $(srcdir) \
	146	-Werror \
	147	-Wnodiscard \
	148	@sim_igen_flags@ \
	149	-G gen-direct-access \
	150	-G gen-zero-r0 \
	151	-B 32 \
	152	-H 31 \
	153	-i $(IGEN_INSN) \
	154	-o $(IGEN_DC) \
	155	-x \
	156	-n icache.h -hc tmp-icache.h \
	157	-n icache.c -c tmp-icache.c \
	158	-n semantics.h -hs tmp-semantics.h \
	159	-n semantics.c -s tmp-semantics.c \
	160	-n idecode.h -hd tmp-idecode.h \
	161	-n idecode.c -d tmp-idecode.c \
	162	-n model.h -hm tmp-model.h \
	163	-n model.c -m tmp-model.c \
	164	-n support.h -hf tmp-support.h \
	165	-n support.c -f tmp-support.c \
	166	-n itable.h -ht tmp-itable.h \
	167	-n itable.c -t tmp-itable.c \
	168	-n engine.h -he tmp-engine.h \
	169	-n engine.c -e tmp-engine.c \
	170	-n irun.c -r tmp-irun.c
ae451ac6 ILT	171	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h icache.h
	172	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c icache.c
	173	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
	174	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
	175	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
	176	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
	177	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h model.h
	178	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c model.c
	179	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h support.h
	180	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c support.c
	181	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
	182	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
	183	$(SHELL) $(srcdir)/../../move-if-change tmp-engine.h engine.h
	184	$(SHELL) $(srcdir)/../../move-if-change tmp-engine.c engine.c
	185	$(SHELL) $(srcdir)/../../move-if-change tmp-irun.c irun.c
c906108c SS	186	touch tmp-igen
c906108c SS	187
c906108c SS	188	BUILT_SRC_FROM_M16 = \
	189	m16_icache.h \
	190	m16_icache.c \
	191	m16_idecode.h \
	192	m16_idecode.c \
	193	m16_semantics.h \
	194	m16_semantics.c \
	195	m16_model.h \
	196	m16_model.c \
	197	m16_support.h \
	198	m16_support.c \
	199	\
	200	m32_icache.h \
	201	m32_icache.c \
	202	m32_idecode.h \
	203	m32_idecode.c \
	204	m32_semantics.h \
	205	m32_semantics.c \
	206	m32_model.h \
	207	m32_model.c \
	208	m32_support.h \
	209	m32_support.c \
	210
	211	$(BUILT_SRC_FROM_M16): tmp-m16
	212
a55b92be MF	213	tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
a55b92be MF	214	$(IGEN_RUN) \
c906108c SS	215	$(IGEN_TRACE) \
	216	-I $(srcdir) \
	217	-Werror \
	218	-Wnodiscard \
	219	@sim_m16_flags@ \
	220	-G gen-direct-access \
	221	-G gen-zero-r0 \
	222	-B 16 \
	223	-H 15 \
	224	-i $(IGEN_INSN) \
	225	-o $(M16_DC) \
	226	-P m16_ \
	227	-x \
	228	-n m16_icache.h -hc tmp-icache.h \
	229	-n m16_icache.c -c tmp-icache.c \
	230	-n m16_semantics.h -hs tmp-semantics.h \
	231	-n m16_semantics.c -s tmp-semantics.c \
	232	-n m16_idecode.h -hd tmp-idecode.h \
	233	-n m16_idecode.c -d tmp-idecode.c \
	234	-n m16_model.h -hm tmp-model.h \
	235	-n m16_model.c -m tmp-model.c \
	236	-n m16_support.h -hf tmp-support.h \
	237	-n m16_support.c -f tmp-support.c \
	238	#
ae451ac6 ILT	239	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h
	240	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c
	241	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h
	242	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c
	243	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h
	244	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c
	245	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h m16_model.h
	246	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c m16_model.c
	247	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h m16_support.h
	248	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c m16_support.c
a55b92be	249	$(IGEN_RUN) \
c906108c SS	250	$(IGEN_TRACE) \
	251	-I $(srcdir) \
	252	-Werror \
	253	-Wnodiscard \
	254	@sim_igen_flags@ \
	255	-G gen-direct-access \
	256	-G gen-zero-r0 \
	257	-B 32 \
	258	-H 31 \
	259	-i $(IGEN_INSN) \
	260	-o $(IGEN_DC) \
	261	-P m32_ \
	262	-x \
	263	-n m32_icache.h -hc tmp-icache.h \
	264	-n m32_icache.c -c tmp-icache.c \
	265	-n m32_semantics.h -hs tmp-semantics.h \
	266	-n m32_semantics.c -s tmp-semantics.c \
	267	-n m32_idecode.h -hd tmp-idecode.h \
	268	-n m32_idecode.c -d tmp-idecode.c \
	269	-n m32_model.h -hm tmp-model.h \
	270	-n m32_model.c -m tmp-model.c \
	271	-n m32_support.h -hf tmp-support.h \
	272	-n m32_support.c -f tmp-support.c \
	273	#
ae451ac6 ILT	274	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h m32_icache.h
	275	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c m32_icache.c
	276	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h m32_idecode.h
	277	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c m32_idecode.c
8e394ffc AB	278	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h \
	279	m32_semantics.h
	280	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c \
	281	m32_semantics.c
ae451ac6 ILT	282	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h m32_model.h
	283	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c m32_model.c
	284	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h m32_support.h
	285	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c m32_support.c
a55b92be	286	$(IGEN_RUN) \
c906108c SS	287	$(IGEN_TRACE) \
	288	-I $(srcdir) \
	289	-Werror \
	290	-Wnodiscard \
	291	-Wnowidth \
	292	@sim_igen_flags@ @sim_m16_flags@ \
	293	-G gen-direct-access \
	294	-G gen-zero-r0 \
	295	-i $(IGEN_INSN) \
	296	-n itable.h -ht tmp-itable.h \
	297	-n itable.c -t tmp-itable.c \
	298	#
ae451ac6 ILT	299	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
ae451ac6 ILT	300	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
c906108c SS	301	touch tmp-m16
c906108c SS	302
8e394ffc AB	303	BUILT_SRC_FROM_MICROMIPS = \
	304	micromips16_icache.h \
	305	micromips16_icache.c \
	306	micromips16_idecode.h \
	307	micromips16_idecode.c \
	308	micromips16_semantics.h \
	309	micromips16_semantics.c \
	310	micromips16_model.h \
	311	micromips16_model.c \
	312	micromips16_support.h \
	313	micromips16_support.c \
	314	\
	315	micromips32_icache.h \
	316	micromips32_icache.c \
	317	micromips32_idecode.h \
	318	micromips32_idecode.c \
	319	micromips32_semantics.h \
	320	micromips32_semantics.c \
	321	micromips32_model.h \
	322	micromips32_model.c \
	323	micromips32_support.h \
	324	micromips32_support.c \
	325	\
	326	micromips_m32_icache.h \
	327	micromips_m32_icache.c \
	328	micromips_m32_idecode.h \
	329	micromips_m32_idecode.c \
	330	micromips_m32_semantics.h \
	331	micromips_m32_semantics.c \
	332	micromips_m32_model.h \
	333	micromips_m32_model.c \
	334	micromips_m32_support.h \
	335	micromips_m32_support.c \
	336
	337	$(BUILT_SRC_FROM_MICROMIPS): tmp-micromips
	338
a55b92be MF	339	tmp-micromips: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
a55b92be MF	340	$(IGEN_RUN) \
8e394ffc AB	341	$(IGEN_TRACE) \
	342	-I $(srcdir) \
	343	-Werror \
	344	-Wnodiscard \
	345	@sim_micromips16_flags@ \
	346	-G gen-direct-access \
	347	-G gen-zero-r0 \
	348	-B 16 \
	349	-H 15 \
	350	-i $(IGEN_INSN) \
	351	-o $(MICROMIPS16_DC) \
	352	-P micromips16_ \
	353	-x \
	354	-n micromips16_icache.h -hc tmp-icache.h \
	355	-n micromips16_icache.c -c tmp-icache.c \
	356	-n micromips16_semantics.h -hs tmp-semantics.h \
	357	-n micromips16_semantics.c -s tmp-semantics.c \
	358	-n micromips16_idecode.h -hd tmp-idecode.h \
	359	-n micromips16_idecode.c -d tmp-idecode.c \
	360	-n micromips16_model.h -hm tmp-model.h \
	361	-n micromips16_model.c -m tmp-model.c \
	362	-n micromips16_support.h -hf tmp-support.h \
	363	-n micromips16_support.c -f tmp-support.c \
	364	#
	365	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h \
	366	micromips16_icache.h
	367	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c \
	368	micromips16_icache.c
	369	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h \
	370	micromips16_idecode.h
	371	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c \
	372	micromips16_idecode.c
	373	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h \
	374	micromips16_semantics.h
	375	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c \
	376	micromips16_semantics.c
	377	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h \
	378	micromips16_model.h
	379	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c \
	380	micromips16_model.c
	381	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h \
	382	micromips16_support.h
	383	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c \
	384	micromips16_support.c
a55b92be	385	$(IGEN_RUN) \
8e394ffc AB	386	$(IGEN_TRACE) \
	387	-I $(srcdir) \
	388	-Werror \
	389	-Wnodiscard \
	390	@sim_micromips_flags@ \
	391	-G gen-direct-access \
	392	-G gen-zero-r0 \
	393	-B 32 \
	394	-H 31 \
	395	-i $(IGEN_INSN) \
	396	-o $(MICROMIPS32_DC) \
	397	-P micromips32_ \
	398	-x \
	399	-n micromips32_icache.h -hc tmp-icache.h \
	400	-n micromips32_icache.c -c tmp-icache.c \
	401	-n micromips32_semantics.h -hs tmp-semantics.h \
	402	-n micromips32_semantics.c -s tmp-semantics.c \
	403	-n micromips32_idecode.h -hd tmp-idecode.h \
	404	-n micromips32_idecode.c -d tmp-idecode.c \
	405	-n micromips32_model.h -hm tmp-model.h \
	406	-n micromips32_model.c -m tmp-model.c \
	407	-n micromips32_support.h -hf tmp-support.h \
	408	-n micromips32_support.c -f tmp-support.c \
	409	#
	410	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h \
	411	micromips32_icache.h
	412	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c \
	413	micromips32_icache.c
	414	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h \
	415	micromips32_idecode.h
	416	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c \
	417	micromips32_idecode.c
	418	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h \
	419	micromips32_semantics.h
	420	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c \
	421	micromips32_semantics.c
	422	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h \
	423	micromips32_model.h
	424	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c \
	425	micromips32_model.c
	426	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h \
	427	micromips32_support.h
	428	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c \
	429	micromips32_support.c
a55b92be	430	$(IGEN_RUN) \
8e394ffc AB	431	$(IGEN_TRACE) \
	432	-I $(srcdir) \
	433	-Werror \
	434	-Wnodiscard \
	435	@sim_igen_flags@ \
	436	-G gen-direct-access \
	437	-G gen-zero-r0 \
	438	-B 32 \
	439	-H 31 \
	440	-i $(IGEN_INSN) \
	441	-o $(IGEN_DC) \
	442	-P micromips_m32_ \
	443	-x \
	444	-n micromips_m32_icache.h -hc tmp-icache.h \
	445	-n micromips_m32_icache.c -c tmp-icache.c \
	446	-n micromips_m32_semantics.h -hs tmp-semantics.h \
	447	-n micromips_m32_semantics.c -s tmp-semantics.c \
	448	-n micromips_m32_idecode.h -hd tmp-idecode.h \
	449	-n micromips_m32_idecode.c -d tmp-idecode.c \
	450	-n micromips_m32_model.h -hm tmp-model.h \
	451	-n micromips_m32_model.c -m tmp-model.c \
	452	-n micromips_m32_support.h -hf tmp-support.h \
	453	-n micromips_m32_support.c -f tmp-support.c \
	454	#
	455	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h \
	456	micromips_m32_icache.h
	457	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c \
	458	micromips_m32_icache.c
	459	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h \
	460	micromips_m32_idecode.h
	461	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c \
	462	micromips_m32_idecode.c
	463	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h \
	464	micromips_m32_semantics.h
	465	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c \
	466	micromips_m32_semantics.c
	467	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h \
	468	micromips_m32_model.h
	469	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c \
	470	micromips_m32_model.c
	471	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h \
	472	micromips_m32_support.h
	473	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c \
	474	micromips_m32_support.c
a55b92be	475	$(IGEN_RUN) \
8e394ffc AB	476	$(IGEN_TRACE) \
	477	-I $(srcdir) \
	478	-Werror \
	479	-Wnodiscard \
	480	-Wnowidth \
	481	@sim_igen_flags@ @sim_micromips_flags@ @sim_micromips16_flags@\
	482	-G gen-direct-access \
	483	-G gen-zero-r0 \
	484	-i $(IGEN_INSN) \
	485	-n itable.h -ht tmp-itable.h \
	486	-n itable.c -t tmp-itable.c \
	487	#
	488	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
	489	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
	490	touch tmp-micromips
c906108c	491
4c54fc26 CD	492	BUILT_SRC_FROM_MULTI = @sim_multi_src@
	493	SIM_MULTI_IGEN_CONFIGS = @sim_multi_igen_configs@
	494
	495	$(BUILT_SRC_FROM_MULTI): tmp-multi
	496	tmp-multi: tmp-mach-multi tmp-itable-multi tmp-run-multi targ-vals.h
a55b92be	497	tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
4c54fc26 CD	498	for t in $(SIM_MULTI_IGEN_CONFIGS); do \
	499	p=`echo $${t} \| sed -e 's/:.*//'` ; \
	500	m=`echo $${t} \| sed -e 's/.:\(.\):.*/\1/'` ; \
	501	f=`echo $${t} \| sed -e 's/.*://'` ; \
	502	case $${p} in \
8e394ffc AB	503	micromips16*) e="-B 16 -H 15 -o $(MICROMIPS16_DC) -F 16" ;; \
	504	micromips32* \| micromips64*) \
	505	e="-B 32 -H 31 -o $(MICROMIPS32_DC) -F $${f}" ;; \
	506	micromips_m32*) \
	507	e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}"; \
	508	m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
	509	micromips_m64*) \
	510	e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}"; \
	511	m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
4c54fc26 CD	512	m16*) e="-B 16 -H 15 -o $(M16_DC) -F 16" ;; \
	513	*) e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}" ;; \
	514	esac; \
a55b92be	515	$(IGEN_RUN) \
4c54fc26 CD	516	$(IGEN_TRACE) \
	517	$${e} \
	518	-I $(srcdir) \
	519	-Werror \
	520	-Wnodiscard \
	521	-N 0 \
	522	-M $${m} \
	523	-G gen-direct-access \
	524	-G gen-zero-r0 \
	525	-i $(IGEN_INSN) \
	526	-P $${p}_ \
	527	-x \
	528	-n $${p}_icache.h -hc tmp-icache.h \
	529	-n $${p}_icache.c -c tmp-icache.c \
	530	-n $${p}_semantics.h -hs tmp-semantics.h \
	531	-n $${p}_semantics.c -s tmp-semantics.c \
	532	-n $${p}_idecode.h -hd tmp-idecode.h \
	533	-n $${p}_idecode.c -d tmp-idecode.c \
	534	-n $${p}_model.h -hm tmp-model.h \
	535	-n $${p}_model.c -m tmp-model.c \
	536	-n $${p}_support.h -hf tmp-support.h \
	537	-n $${p}_support.c -f tmp-support.c \
	538	-n $${p}_engine.h -he tmp-engine.h \
	539	-n $${p}_engine.c -e tmp-engine.c \
31b28250	540	\|\| exit; \
8e394ffc AB	541	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h \
	542	$${p}_icache.h ; \
	543	$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c \
	544	$${p}_icache.c ; \
	545	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h \
	546	$${p}_idecode.h ; \
	547	$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c \
	548	$${p}_idecode.c ; \
	549	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h \
	550	$${p}_semantics.h ; \
	551	$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c \
	552	$${p}_semantics.c ; \
	553	$(SHELL) $(srcdir)/../../move-if-change tmp-model.h \
	554	$${p}_model.h ; \
	555	$(SHELL) $(srcdir)/../../move-if-change tmp-model.c \
	556	$${p}_model.c ; \
	557	$(SHELL) $(srcdir)/../../move-if-change tmp-support.h \
	558	$${p}_support.h ; \
	559	$(SHELL) $(srcdir)/../../move-if-change tmp-support.c \
	560	$${p}_support.c ; \
	561	$(SHELL) $(srcdir)/../../move-if-change tmp-engine.h \
	562	$${p}_engine.h ; \
	563	$(SHELL) $(srcdir)/../../move-if-change tmp-engine.c \
	564	$${p}_engine.c ; \
4c54fc26 CD	565	done
4c54fc26 CD	566	touch tmp-mach-multi
a55b92be MF	567	tmp-itable-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
a55b92be MF	568	$(IGEN_RUN) \
4c54fc26 CD	569	$(IGEN_TRACE) \
	570	-I $(srcdir) \
	571	-Werror \
	572	-Wnodiscard \
	573	-Wnowidth \
	574	-N 0 \
	575	@sim_multi_flags@ \
	576	-G gen-direct-access \
	577	-G gen-zero-r0 \
	578	-i $(IGEN_INSN) \
	579	-n itable.h -ht tmp-itable.h \
	580	-n itable.c -t tmp-itable.c \
	581	#
ae451ac6 ILT	582	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
ae451ac6 ILT	583	$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
4c54fc26	584	touch tmp-itable-multi
8e394ffc	585	tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c
4c54fc26 CD	586	for t in $(SIM_MULTI_IGEN_CONFIGS); do \
4c54fc26 CD	587	case $${t} in \
80551777	588	m16*) \
4c54fc26 CD	589	m=`echo $${t} \| sed -e 's/^m16//' -e 's/:.*//'`; \
	590	sed < $(srcdir)/m16run.c > tmp-run \
	591	-e "s/^sim_/m16$${m}_/" \
	592	-e "s/m16_/m16$${m}_/" \
	593	-e "s/m32_/m32$${m}_/" ; \
8e394ffc AB	594	$(SHELL) $(srcdir)/../../move-if-change tmp-run \
	595	m16$${m}_run.c ; \
	596	;;\
	597	micromips32*) \
	598	m=`echo $${t} \| sed -e 's/^micromips32//' -e 's/:.*//'`; \
	599	sed < $(srcdir)/micromipsrun.c > tmp-run \
	600	-e "s/^sim_/micromips32$${m}_/" \
	601	-e "s/micromips16_/micromips16$${m}_/" \
	602	-e "s/micromips32_/micromips32$${m}_/" \
	603	-e "s/m32_/m32$${m}_/" ; \
	604	$(SHELL) $(srcdir)/../../move-if-change tmp-run \
	605	micromips$${m}_run.c ; \
	606	;;\
	607	micromips64*) \
	608	m=`echo $${t} \| sed -e 's/^micromips64//' -e 's/:.*//'`; \
	609	sed < $(srcdir)/micromipsrun.c > tmp-run \
	610	-e "s/^sim_/micromips64$${m}_/" \
	611	-e "s/micromips16_/micromips16$${m}_/" \
	612	-e "s/micromips32_/micromips64$${m}_/" \
	613	-e "s/m32_/m64$${m}_/" ; \
	614	$(SHELL) $(srcdir)/../../move-if-change tmp-run \
	615	micromips$${m}_run.c ; \
	616	;;\
4c54fc26 CD	617	esac \
	618	done
	619	touch tmp-run-multi
	620
c906108c SS	621	clean-extra:
	622	rm -f $(BUILT_SRC_FROM_GEN)
	623	rm -f $(BUILT_SRC_FROM_IGEN)
	624	rm -f $(BUILT_SRC_FROM_M16)
8e394ffc	625	rm -f $(BUILT_SRC_FROM_MICROMIPS)
4c54fc26	626	rm -f $(BUILT_SRC_FROM_MULTI)
c906108c	627	rm -f tmp-*
8e394ffc	628	rm -f micromips16.o micromips32.o m16.o m32.o itable*.o
c906108c	629
4c54fc26 CD	630	distclean-extra:
4c54fc26 CD	631	rm -f multi-include.h multi-run.c