]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - sim/mips/configure.ac
sim: delete SIM_AC_COMMON macro
[thirdparty/binutils-gdb.git] / sim / mips / configure.ac
CommitLineData
c906108c 1dnl Process this file with autoconf to produce a configure script.
c906108c 2AC_INIT(Makefile.in)
760b3e8b 3AC_CONFIG_MACRO_DIRS([../m4 ../.. ../../config])
c906108c
SS
4
5dnl Options available in this module
e6c674b8 6SIM_AC_OPTION_RESERVED_BITS(1)
c906108c
SS
7
8# DEPRECATED
9#
10# Instead of defining a `subtarget' macro, code should be checking
11# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
12# in question.
13#
14case "${target}" in
4c54fc26 15 mips64vr*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;;
c906108c 16 mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
109ad085 17 mips*-sde-elf*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
cc220243 18 mips*-mti-elf*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
1e799e28
CD
19 mipsisa32*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
20 mipsisa64*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
c906108c
SS
21 *) SIM_SUBTARGET="";;
22esac
23AC_SUBST(SIM_SUBTARGET)
24
25
26
c906108c
SS
27#
28# Select the bitsize of the target
29#
30mips_addr_bitsize=
31case "${target}" in
4b5d35ee 32 mips*-sde-elf*) mips_bitsize=64 ; mips_msb=63 ;;
cc220243 33 mips*-mti-elf*) mips_bitsize=64 ; mips_msb=63 ;;
c906108c
SS
34 mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
35 mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
1e799e28
CD
36 mipsisa32*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
37 mipsisa64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
c906108c
SS
38 mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
39 *) mips_bitsize=64 ; mips_msb=63 ;;
40esac
41SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize)
42
43
44
45#
46# Select the floating hardware support of the target
47#
48mips_fpu=HARDWARE_FLOATING_POINT
49mips_fpu_bitsize=
50case "${target}" in
4b5d35ee
TS
51 mips*tx39*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
52 mips*-sde-elf*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
cc220243 53 mips*-mti-elf*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
c906108c
SS
54 mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
55 mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
1e799e28
CD
56 mipsisa32*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
57 mipsisa64*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
c906108c
SS
58 mips*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
59 *) mips_fpu=HARD_FLOATING_POINT ;;
60esac
61SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)
62
63
64
c906108c
SS
65#
66# Select the IGEN architecture
67#
68sim_gen=IGEN
69sim_igen_machine="-M mipsIV"
139181c8 70sim_m16_machine="-M mips16,mipsIII"
c906108c
SS
71sim_igen_filter="32,64,f"
72sim_m16_filter="16"
4c54fc26
CD
73sim_mach_default="mips8000"
74
c906108c
SS
75case "${target}" in
76 mips*tx39*) sim_gen=IGEN
77 sim_igen_filter="32,f"
78 sim_igen_machine="-M r3900"
79 ;;
80 mips64vr43*-*-*) sim_gen=IGEN
81 sim_igen_machine="-M mipsIV"
4c54fc26 82 sim_mach_default="mips8000"
c906108c
SS
83 ;;
84 mips64vr5*-*-*) sim_gen=IGEN
85 sim_igen_machine="-M vr5000"
4c54fc26 86 sim_mach_default="mips5000"
c906108c
SS
87 ;;
88 mips64vr41*) sim_gen=M16
89 sim_igen_machine="-M vr4100"
90 sim_m16_machine="-M vr4100"
91 sim_igen_filter="32,64,f"
92 sim_m16_filter="16"
4c54fc26 93 sim_mach_default="mips4100"
c906108c 94 ;;
4c54fc26
CD
95 mips64vr-*-* | mips64vrel-*-*)
96 sim_gen=MULTI
97 sim_multi_configs="\
98 vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
99 vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
100 vr5000:mipsIV:32,64,f:mips4300,mips5000\
101 vr5400:mipsIV,vr5400:32,64,f:mips5400\
102 vr5500:mipsIV,vr5500:32,64,f:mips5500"
103 sim_multi_default=mips5000
104 ;;
cc220243 105 mips*-sde-elf* | mips*-mti-elf*)
8e394ffc
AB
106 sim_gen=MULTI
107 sim_multi_configs="\
108 micromips:micromips64,micromipsdsp:32,64,f:mips_micromips\
109 mips64r2:mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,64,f:mipsisa64r2"
110 sim_multi_default=mipsisa64r2
3669427c 111 ;;
c906108c
SS
112 mips64*-*-*) sim_igen_filter="32,64,f"
113 sim_gen=IGEN
114 ;;
115 mips16*-*-*) sim_gen=M16
116 sim_igen_filter="32,64,f"
117 sim_m16_filter="16"
118 ;;
8e394ffc
AB
119 mipsisa32r2*-*-*) sim_gen=MULTI
120 sim_multi_configs="\
121 micromips:micromips32,micromipsdsp:32,f:mips_micromips\
122 mips32r2:mips32r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,f:mipsisa32r2"
123 sim_multi_default=mipsisa32r2
e70cb6cd 124 ;;
d5fb0879
RS
125 mipsisa32*-*-*) sim_gen=M16
126 sim_igen_machine="-M mips32,mips16,mips16e,smartmips"
127 sim_m16_machine="-M mips16,mips16e,mips32"
128 sim_igen_filter="32,f"
129 sim_mach_default="mipsisa32"
1e799e28 130 ;;
d5fb0879
RS
131 mipsisa64r2*-*-*) sim_gen=M16
132 sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
133 sim_m16_machine="-M mips16,mips16e,mips64r2"
134 sim_igen_filter="32,64,f"
135 sim_mach_default="mipsisa64r2"
e70cb6cd 136 ;;
7cbea089 137 mipsisa64sb1*-*-*) sim_gen=IGEN
109ad085 138 sim_igen_machine="-M mips64,mips3d,sb1"
7cbea089 139 sim_igen_filter="32,64,f"
4c54fc26 140 sim_mach_default="mips_sb1"
7cbea089 141 ;;
d5fb0879
RS
142 mipsisa64*-*-*) sim_gen=M16
143 sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
144 sim_m16_machine="-M mips16,mips16e,mips64"
145 sim_igen_filter="32,64,f"
146 sim_mach_default="mipsisa64"
1e799e28 147 ;;
109ad085 148 mips*lsi*) sim_gen=M16
c906108c
SS
149 sim_igen_machine="-M mipsIII,mips16"
150 sim_m16_machine="-M mips16,mipsIII"
151 sim_igen_filter="32,f"
152 sim_m16_filter="16"
4c54fc26 153 sim_mach_default="mips4000"
109ad085 154 ;;
c906108c
SS
155 mips*-*-*) sim_gen=IGEN
156 sim_igen_filter="32,f"
157 ;;
158esac
4c54fc26
CD
159
160# The MULTI generator can combine several simulation engines into one.
161# executable. A configuration which uses the MULTI should set two
162# variables: ${sim_multi_configs} and ${sim_multi_default}.
163#
164# ${sim_multi_configs} is the list of engines to build. Each
165# space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
166# where:
167#
168# - NAME is a C-compatible prefix for the engine,
169# - MACHINE is a -M argument,
170# - FILTER is a -F argument, and
171# - BFDMACHS is a comma-separated list of bfd machines that the
172# simulator can run.
173#
174# Each entry will have a separate simulation engine whose prefix is
175# m32<NAME>. If the machine list includes "mips16", there will also
176# be a mips16 engine, prefix m16<NAME>. The mips16 engine will be
177# generated using the same machine list as the 32-bit version,
178# but the filter will be "16" instead of FILTER.
179#
180# The simulator compares the bfd mach against BFDMACHS to decide
181# which engine to use. Entries in BFDMACHS should be bfd_mach
182# values with "bfd_mach_" removed. ${sim_multi_default} says
183# which entry should be the default.
184if test ${sim_gen} = MULTI; then
185
186 # Simple sanity check.
187 if test -z "${sim_multi_configs}" || test -z "${sim_multi_default}"; then
306f4178 188 AC_MSG_ERROR(Error in configure.ac: MULTI simulator not set up correctly)
4c54fc26
CD
189 fi
190
191 # Start in a known state.
192 rm -f multi-include.h multi-run.c
193 sim_multi_flags=
194 sim_multi_src=
8e394ffc 195 sim_multi_obj=
4c54fc26
CD
196 sim_multi_igen_configs=
197 sim_seen_default=no
198
199 cat << __EOF__ > multi-run.c
200/* Main entry point for MULTI simulators.
3666a048 201 Copyright (C) 2003-2021 Free Software Foundation, Inc.
4c54fc26
CD
202
203 This program is free software; you can redistribute it and/or modify
204 it under the terms of the GNU General Public License as published by
35ee6e1e 205 the Free Software Foundation; either version 3 of the License, or
4c54fc26
CD
206 (at your option) any later version.
207
208 This program is distributed in the hope that it will be useful,
209 but WITHOUT ANY WARRANTY; without even the implied warranty of
210 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
211 GNU General Public License for more details.
212
213 You should have received a copy of the GNU General Public License
35ee6e1e 214 along with this program. If not, see <http://www.gnu.org/licenses/>.
4c54fc26
CD
215
216 --
217
218 This file was generated by sim/mips/configure. */
219
220#include "sim-main.h"
221#include "multi-include.h"
8e394ffc
AB
222#include "elf-bfd.h"
223#include "elf/mips.h"
4c54fc26
CD
224
225#define SD sd
226#define CPU cpu
227
228void
229sim_engine_run (SIM_DESC sd,
230 int next_cpu_nr,
231 int nr_cpus,
232 int signal) /* ignore */
233{
234 int mach;
235
236 if (STATE_ARCHITECTURE (sd) == NULL)
237 mach = bfd_mach_${sim_multi_default};
1554f758 238 else if (elf_elfheader (STATE_PROG_BFD (sd))->e_flags
8e394ffc
AB
239 & EF_MIPS_ARCH_ASE_MICROMIPS)
240 mach = bfd_mach_mips_micromips;
4c54fc26
CD
241 else
242 mach = STATE_ARCHITECTURE (SD)->mach;
243
244 switch (mach)
245 {
246__EOF__
247
248 for fc in ${sim_multi_configs}; do
249
250 # Split up the entry. ${c} contains the first three elements.
251 # Note: outer sqaure brackets are m4 quotes.
252 c=`echo ${fc} | sed ['s/:[^:]*$//']`
253 bfdmachs=`echo ${fc} | sed 's/.*://'`
254 name=`echo ${c} | sed 's/:.*//'`
255 machine=`echo ${c} | sed 's/.*:\(.*\):.*/\1/'`
256 filter=`echo ${c} | sed 's/.*://'`
257
258 # Build the following lists:
259 #
260 # sim_multi_flags: all -M and -F flags used by the simulator
261 # sim_multi_src: all makefile-generated source files
262 # sim_multi_obj: the objects for ${sim_multi_src}
263 # sim_multi_igen_configs: igen configuration strings.
264 #
265 # Each entry in ${sim_multi_igen_configs} is a prefix (m32
266 # or m16) followed by the NAME, MACHINE and FILTER part of
267 # the ${sim_multi_configs} entry.
268 sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}"
269
8e394ffc 270 # Check whether special handling is needed.
4c54fc26
CD
271 case ${c} in
272 *:*mips16*:*)
273 # Run igen twice, once for normal mode and once for mips16.
274 ws="m32 m16"
275
276 # The top-level function for the mips16 simulator is
277 # in a file m16${name}_run.c, generated by the
278 # tmp-run-multi Makefile rule.
279 sim_multi_src="${sim_multi_src} m16${name}_run.c"
280 sim_multi_obj="${sim_multi_obj} m16${name}_run.o"
281 sim_multi_flags="${sim_multi_flags} -F 16"
282 ;;
8e394ffc
AB
283 *:*micromips32*:*)
284 # Run igen thrice, once for micromips32, once for micromips16,
285 # and once for m32.
286 ws="micromips_m32 micromips16 micromips32"
287
288 # The top-level function for the micromips simulator is
289 # in a file micromips${name}_run.c, generated by the
290 # tmp-run-multi Makefile rule.
291 sim_multi_src="${sim_multi_src} micromips${name}_run.c"
292 sim_multi_obj="${sim_multi_obj} micromips${name}_run.o"
293 sim_multi_flags="${sim_multi_flags} -F 16,32"
294 ;;
295 *:*micromips64*:*)
296 # Run igen thrice, once for micromips64, once for micromips16,
297 # and once for m64.
298 ws="micromips_m64 micromips16 micromips64"
299
300 # The top-level function for the micromips simulator is
301 # in a file micromips${name}_run.c, generated by the
302 # tmp-run-multi Makefile rule.
303 sim_multi_src="${sim_multi_src} micromips${name}_run.c"
304 sim_multi_obj="${sim_multi_obj} micromips${name}_run.o"
305 sim_multi_flags="${sim_multi_flags} -F 16,32,64"
306 ;;
4c54fc26
CD
307 *)
308 ws=m32
309 ;;
310 esac
311
312 # Now add the list of igen-generated files to ${sim_multi_src}
313 # and ${sim_multi_obj}.
314 for w in ${ws}; do
315 for base in engine icache idecode model semantics support; do
316 sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c"
317 sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h"
318 sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o"
319 done
320 sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}"
321 done
322
323 # Add an include for the engine.h file. This file declares the
324 # top-level foo_engine_run() function.
325 echo "#include \"${w}${name}_engine.h\"" >> multi-include.h
326
327 # Add case statements for this engine to sim_engine_run().
328 for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
329 echo " case bfd_mach_${mach}:" >> multi-run.c
330 if test ${mach} = ${sim_multi_default}; then
331 echo " default:" >> multi-run.c
332 sim_seen_default=yes
333 fi
334 done
335 echo " ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
336 >> multi-run.c
337 echo " break;" >> multi-run.c
338 done
339
340 # Check whether we added a 'default:' label.
341 if test ${sim_seen_default} = no; then
306f4178 342 AC_MSG_ERROR(Error in configure.ac: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default})
4c54fc26
CD
343 fi
344
345 cat << __EOF__ >> multi-run.c
346 }
347}
348
349int
350mips_mach_multi (SIM_DESC sd)
351{
352 if (STATE_ARCHITECTURE (sd) == NULL)
353 return bfd_mach_${sim_multi_default};
354
355 switch (STATE_ARCHITECTURE (SD)->mach)
356 {
357__EOF__
358
359 # Add case statements for this engine to mips_mach_multi().
360 for fc in ${sim_multi_configs}; do
361
362 # Split up the entry. ${c} contains the first three elements.
363 # Note: outer sqaure brackets are m4 quotes.
364 c=`echo ${fc} | sed ['s/:[^:]*$//']`
365 bfdmachs=`echo ${fc} | sed 's/.*://'`
366
367 for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
368 echo " case bfd_mach_${mach}:" >> multi-run.c
369 done
370 done
371
372 cat << __EOF__ >> multi-run.c
373 return (STATE_ARCHITECTURE (SD)->mach);
374 default:
375 return bfd_mach_${sim_multi_default};
376 }
377}
378__EOF__
379
380 SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI"
381else
382 # For clean-extra
383 sim_multi_src=doesnt-exist.c
384
385 if test x"${sim_mach_default}" = x""; then
306f4178 386 AC_MSG_ERROR(Error in configure.ac: \${sim_mach_default} not defined)
4c54fc26
CD
387 fi
388 SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}"
389fi
c906108c
SS
390sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
391sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}"
8e394ffc
AB
392sim_micromips16_flags=" -F ${sim_micromips16_filter} ${sim_micromips16_machine} ${sim_igen_smp}"
393sim_micromips_flags=" -F ${sim_micromips_filter} ${sim_micromips_machine} ${sim_igen_smp}"
c906108c
SS
394AC_SUBST(sim_igen_flags)
395AC_SUBST(sim_m16_flags)
8e394ffc
AB
396AC_SUBST(sim_micromips_flags)
397AC_SUBST(sim_micromips16_flags)
c906108c 398AC_SUBST(sim_gen)
4c54fc26
CD
399AC_SUBST(sim_multi_flags)
400AC_SUBST(sim_multi_igen_configs)
401AC_SUBST(sim_multi_src)
402AC_SUBST(sim_multi_obj)
c906108c
SS
403#
404# Add simulated hardware devices
405#
9b1af85c 406SIM_AC_OPTION_HARDWARE(tx3904cpu tx3904irc tx3904tmr tx3904sio)
c906108c 407
c906108c 408SIM_AC_OUTPUT