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Commit | Line | Data |
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c906108c | 1 | dnl Process this file with autoconf to produce a configure script. |
c906108c | 2 | AC_INIT(Makefile.in) |
760b3e8b | 3 | AC_CONFIG_MACRO_DIRS([../m4 ../.. ../../config]) |
c906108c | 4 | |
c906108c SS |
5 | # DEPRECATED |
6 | # | |
7 | # Instead of defining a `subtarget' macro, code should be checking | |
8 | # the value of {STATE,CPU}_ARCHITECTURE to identify the architecture | |
9 | # in question. | |
10 | # | |
11 | case "${target}" in | |
4c54fc26 | 12 | mips64vr*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;; |
c906108c | 13 | mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";; |
109ad085 | 14 | mips*-sde-elf*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; |
cc220243 | 15 | mips*-mti-elf*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; |
1e799e28 CD |
16 | mipsisa32*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; |
17 | mipsisa64*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; | |
c906108c SS |
18 | *) SIM_SUBTARGET="";; |
19 | esac | |
20 | AC_SUBST(SIM_SUBTARGET) | |
21 | ||
22 | ||
23 | ||
c906108c SS |
24 | # |
25 | # Select the bitsize of the target | |
26 | # | |
c906108c | 27 | case "${target}" in |
4b5d35ee | 28 | mips*-sde-elf*) mips_bitsize=64 ; mips_msb=63 ;; |
cc220243 | 29 | mips*-mti-elf*) mips_bitsize=64 ; mips_msb=63 ;; |
c906108c SS |
30 | mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;; |
31 | mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;; | |
1e799e28 CD |
32 | mipsisa32*-*-*) mips_bitsize=32 ; mips_msb=31 ;; |
33 | mipsisa64*-*-*) mips_bitsize=64 ; mips_msb=63 ;; | |
c906108c SS |
34 | mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;; |
35 | *) mips_bitsize=64 ; mips_msb=63 ;; | |
36 | esac | |
7d554943 | 37 | SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb) |
c906108c SS |
38 | |
39 | ||
40 | ||
41 | # | |
42 | # Select the floating hardware support of the target | |
43 | # | |
44 | mips_fpu=HARDWARE_FLOATING_POINT | |
45 | mips_fpu_bitsize= | |
46 | case "${target}" in | |
4b5d35ee TS |
47 | mips*tx39*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;; |
48 | mips*-sde-elf*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; | |
cc220243 | 49 | mips*-mti-elf*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; |
c906108c SS |
50 | mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;; |
51 | mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;; | |
1e799e28 CD |
52 | mipsisa32*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; |
53 | mipsisa64*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; | |
c906108c SS |
54 | mips*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;; |
55 | *) mips_fpu=HARD_FLOATING_POINT ;; | |
56 | esac | |
57 | SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize) | |
58 | ||
59 | ||
60 | ||
c906108c SS |
61 | # |
62 | # Select the IGEN architecture | |
63 | # | |
64 | sim_gen=IGEN | |
65 | sim_igen_machine="-M mipsIV" | |
139181c8 | 66 | sim_m16_machine="-M mips16,mipsIII" |
c906108c SS |
67 | sim_igen_filter="32,64,f" |
68 | sim_m16_filter="16" | |
4c54fc26 CD |
69 | sim_mach_default="mips8000" |
70 | ||
c906108c SS |
71 | case "${target}" in |
72 | mips*tx39*) sim_gen=IGEN | |
73 | sim_igen_filter="32,f" | |
74 | sim_igen_machine="-M r3900" | |
75 | ;; | |
76 | mips64vr43*-*-*) sim_gen=IGEN | |
77 | sim_igen_machine="-M mipsIV" | |
4c54fc26 | 78 | sim_mach_default="mips8000" |
c906108c SS |
79 | ;; |
80 | mips64vr5*-*-*) sim_gen=IGEN | |
81 | sim_igen_machine="-M vr5000" | |
4c54fc26 | 82 | sim_mach_default="mips5000" |
c906108c SS |
83 | ;; |
84 | mips64vr41*) sim_gen=M16 | |
85 | sim_igen_machine="-M vr4100" | |
86 | sim_m16_machine="-M vr4100" | |
87 | sim_igen_filter="32,64,f" | |
88 | sim_m16_filter="16" | |
4c54fc26 | 89 | sim_mach_default="mips4100" |
c906108c | 90 | ;; |
4c54fc26 CD |
91 | mips64vr-*-* | mips64vrel-*-*) |
92 | sim_gen=MULTI | |
93 | sim_multi_configs="\ | |
94 | vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\ | |
95 | vr4120:mipsIII,mips16,vr4120:32,64:mips4120\ | |
96 | vr5000:mipsIV:32,64,f:mips4300,mips5000\ | |
97 | vr5400:mipsIV,vr5400:32,64,f:mips5400\ | |
98 | vr5500:mipsIV,vr5500:32,64,f:mips5500" | |
99 | sim_multi_default=mips5000 | |
100 | ;; | |
cc220243 | 101 | mips*-sde-elf* | mips*-mti-elf*) |
8e394ffc AB |
102 | sim_gen=MULTI |
103 | sim_multi_configs="\ | |
104 | micromips:micromips64,micromipsdsp:32,64,f:mips_micromips\ | |
105 | mips64r2:mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,64,f:mipsisa64r2" | |
106 | sim_multi_default=mipsisa64r2 | |
3669427c | 107 | ;; |
c906108c SS |
108 | mips64*-*-*) sim_igen_filter="32,64,f" |
109 | sim_gen=IGEN | |
110 | ;; | |
111 | mips16*-*-*) sim_gen=M16 | |
112 | sim_igen_filter="32,64,f" | |
113 | sim_m16_filter="16" | |
114 | ;; | |
8e394ffc AB |
115 | mipsisa32r2*-*-*) sim_gen=MULTI |
116 | sim_multi_configs="\ | |
117 | micromips:micromips32,micromipsdsp:32,f:mips_micromips\ | |
118 | mips32r2:mips32r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,f:mipsisa32r2" | |
119 | sim_multi_default=mipsisa32r2 | |
e70cb6cd | 120 | ;; |
d5fb0879 RS |
121 | mipsisa32*-*-*) sim_gen=M16 |
122 | sim_igen_machine="-M mips32,mips16,mips16e,smartmips" | |
123 | sim_m16_machine="-M mips16,mips16e,mips32" | |
124 | sim_igen_filter="32,f" | |
125 | sim_mach_default="mipsisa32" | |
1e799e28 | 126 | ;; |
d5fb0879 RS |
127 | mipsisa64r2*-*-*) sim_gen=M16 |
128 | sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2" | |
129 | sim_m16_machine="-M mips16,mips16e,mips64r2" | |
130 | sim_igen_filter="32,64,f" | |
131 | sim_mach_default="mipsisa64r2" | |
e70cb6cd | 132 | ;; |
7cbea089 | 133 | mipsisa64sb1*-*-*) sim_gen=IGEN |
109ad085 | 134 | sim_igen_machine="-M mips64,mips3d,sb1" |
7cbea089 | 135 | sim_igen_filter="32,64,f" |
4c54fc26 | 136 | sim_mach_default="mips_sb1" |
7cbea089 | 137 | ;; |
d5fb0879 RS |
138 | mipsisa64*-*-*) sim_gen=M16 |
139 | sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx" | |
140 | sim_m16_machine="-M mips16,mips16e,mips64" | |
141 | sim_igen_filter="32,64,f" | |
142 | sim_mach_default="mipsisa64" | |
1e799e28 | 143 | ;; |
109ad085 | 144 | mips*lsi*) sim_gen=M16 |
c906108c SS |
145 | sim_igen_machine="-M mipsIII,mips16" |
146 | sim_m16_machine="-M mips16,mipsIII" | |
147 | sim_igen_filter="32,f" | |
148 | sim_m16_filter="16" | |
4c54fc26 | 149 | sim_mach_default="mips4000" |
109ad085 | 150 | ;; |
c906108c SS |
151 | mips*-*-*) sim_gen=IGEN |
152 | sim_igen_filter="32,f" | |
153 | ;; | |
154 | esac | |
4c54fc26 CD |
155 | |
156 | # The MULTI generator can combine several simulation engines into one. | |
157 | # executable. A configuration which uses the MULTI should set two | |
158 | # variables: ${sim_multi_configs} and ${sim_multi_default}. | |
159 | # | |
160 | # ${sim_multi_configs} is the list of engines to build. Each | |
161 | # space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS, | |
162 | # where: | |
163 | # | |
164 | # - NAME is a C-compatible prefix for the engine, | |
165 | # - MACHINE is a -M argument, | |
166 | # - FILTER is a -F argument, and | |
167 | # - BFDMACHS is a comma-separated list of bfd machines that the | |
168 | # simulator can run. | |
169 | # | |
170 | # Each entry will have a separate simulation engine whose prefix is | |
171 | # m32<NAME>. If the machine list includes "mips16", there will also | |
172 | # be a mips16 engine, prefix m16<NAME>. The mips16 engine will be | |
173 | # generated using the same machine list as the 32-bit version, | |
174 | # but the filter will be "16" instead of FILTER. | |
175 | # | |
176 | # The simulator compares the bfd mach against BFDMACHS to decide | |
177 | # which engine to use. Entries in BFDMACHS should be bfd_mach | |
178 | # values with "bfd_mach_" removed. ${sim_multi_default} says | |
179 | # which entry should be the default. | |
180 | if test ${sim_gen} = MULTI; then | |
181 | ||
182 | # Simple sanity check. | |
183 | if test -z "${sim_multi_configs}" || test -z "${sim_multi_default}"; then | |
306f4178 | 184 | AC_MSG_ERROR(Error in configure.ac: MULTI simulator not set up correctly) |
4c54fc26 CD |
185 | fi |
186 | ||
187 | # Start in a known state. | |
188 | rm -f multi-include.h multi-run.c | |
189 | sim_multi_flags= | |
190 | sim_multi_src= | |
8e394ffc | 191 | sim_multi_obj= |
4c54fc26 CD |
192 | sim_multi_igen_configs= |
193 | sim_seen_default=no | |
194 | ||
195 | cat << __EOF__ > multi-run.c | |
196 | /* Main entry point for MULTI simulators. | |
3666a048 | 197 | Copyright (C) 2003-2021 Free Software Foundation, Inc. |
4c54fc26 CD |
198 | |
199 | This program is free software; you can redistribute it and/or modify | |
200 | it under the terms of the GNU General Public License as published by | |
35ee6e1e | 201 | the Free Software Foundation; either version 3 of the License, or |
4c54fc26 CD |
202 | (at your option) any later version. |
203 | ||
204 | This program is distributed in the hope that it will be useful, | |
205 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
206 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
207 | GNU General Public License for more details. | |
208 | ||
209 | You should have received a copy of the GNU General Public License | |
35ee6e1e | 210 | along with this program. If not, see <http://www.gnu.org/licenses/>. |
4c54fc26 CD |
211 | |
212 | -- | |
213 | ||
214 | This file was generated by sim/mips/configure. */ | |
215 | ||
216 | #include "sim-main.h" | |
217 | #include "multi-include.h" | |
8e394ffc AB |
218 | #include "elf-bfd.h" |
219 | #include "elf/mips.h" | |
4c54fc26 CD |
220 | |
221 | #define SD sd | |
222 | #define CPU cpu | |
223 | ||
224 | void | |
225 | sim_engine_run (SIM_DESC sd, | |
226 | int next_cpu_nr, | |
227 | int nr_cpus, | |
228 | int signal) /* ignore */ | |
229 | { | |
230 | int mach; | |
231 | ||
232 | if (STATE_ARCHITECTURE (sd) == NULL) | |
233 | mach = bfd_mach_${sim_multi_default}; | |
1554f758 | 234 | else if (elf_elfheader (STATE_PROG_BFD (sd))->e_flags |
8e394ffc AB |
235 | & EF_MIPS_ARCH_ASE_MICROMIPS) |
236 | mach = bfd_mach_mips_micromips; | |
4c54fc26 CD |
237 | else |
238 | mach = STATE_ARCHITECTURE (SD)->mach; | |
239 | ||
240 | switch (mach) | |
241 | { | |
242 | __EOF__ | |
243 | ||
244 | for fc in ${sim_multi_configs}; do | |
245 | ||
246 | # Split up the entry. ${c} contains the first three elements. | |
247 | # Note: outer sqaure brackets are m4 quotes. | |
248 | c=`echo ${fc} | sed ['s/:[^:]*$//']` | |
249 | bfdmachs=`echo ${fc} | sed 's/.*://'` | |
250 | name=`echo ${c} | sed 's/:.*//'` | |
251 | machine=`echo ${c} | sed 's/.*:\(.*\):.*/\1/'` | |
252 | filter=`echo ${c} | sed 's/.*://'` | |
253 | ||
254 | # Build the following lists: | |
255 | # | |
256 | # sim_multi_flags: all -M and -F flags used by the simulator | |
257 | # sim_multi_src: all makefile-generated source files | |
258 | # sim_multi_obj: the objects for ${sim_multi_src} | |
259 | # sim_multi_igen_configs: igen configuration strings. | |
260 | # | |
261 | # Each entry in ${sim_multi_igen_configs} is a prefix (m32 | |
262 | # or m16) followed by the NAME, MACHINE and FILTER part of | |
263 | # the ${sim_multi_configs} entry. | |
264 | sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}" | |
265 | ||
8e394ffc | 266 | # Check whether special handling is needed. |
4c54fc26 CD |
267 | case ${c} in |
268 | *:*mips16*:*) | |
269 | # Run igen twice, once for normal mode and once for mips16. | |
270 | ws="m32 m16" | |
271 | ||
272 | # The top-level function for the mips16 simulator is | |
273 | # in a file m16${name}_run.c, generated by the | |
274 | # tmp-run-multi Makefile rule. | |
275 | sim_multi_src="${sim_multi_src} m16${name}_run.c" | |
276 | sim_multi_obj="${sim_multi_obj} m16${name}_run.o" | |
277 | sim_multi_flags="${sim_multi_flags} -F 16" | |
278 | ;; | |
8e394ffc AB |
279 | *:*micromips32*:*) |
280 | # Run igen thrice, once for micromips32, once for micromips16, | |
281 | # and once for m32. | |
282 | ws="micromips_m32 micromips16 micromips32" | |
283 | ||
284 | # The top-level function for the micromips simulator is | |
285 | # in a file micromips${name}_run.c, generated by the | |
286 | # tmp-run-multi Makefile rule. | |
287 | sim_multi_src="${sim_multi_src} micromips${name}_run.c" | |
288 | sim_multi_obj="${sim_multi_obj} micromips${name}_run.o" | |
289 | sim_multi_flags="${sim_multi_flags} -F 16,32" | |
290 | ;; | |
291 | *:*micromips64*:*) | |
292 | # Run igen thrice, once for micromips64, once for micromips16, | |
293 | # and once for m64. | |
294 | ws="micromips_m64 micromips16 micromips64" | |
295 | ||
296 | # The top-level function for the micromips simulator is | |
297 | # in a file micromips${name}_run.c, generated by the | |
298 | # tmp-run-multi Makefile rule. | |
299 | sim_multi_src="${sim_multi_src} micromips${name}_run.c" | |
300 | sim_multi_obj="${sim_multi_obj} micromips${name}_run.o" | |
301 | sim_multi_flags="${sim_multi_flags} -F 16,32,64" | |
302 | ;; | |
4c54fc26 CD |
303 | *) |
304 | ws=m32 | |
305 | ;; | |
306 | esac | |
307 | ||
308 | # Now add the list of igen-generated files to ${sim_multi_src} | |
309 | # and ${sim_multi_obj}. | |
310 | for w in ${ws}; do | |
311 | for base in engine icache idecode model semantics support; do | |
312 | sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c" | |
313 | sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h" | |
314 | sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o" | |
315 | done | |
316 | sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}" | |
317 | done | |
318 | ||
319 | # Add an include for the engine.h file. This file declares the | |
320 | # top-level foo_engine_run() function. | |
321 | echo "#include \"${w}${name}_engine.h\"" >> multi-include.h | |
322 | ||
323 | # Add case statements for this engine to sim_engine_run(). | |
324 | for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do | |
325 | echo " case bfd_mach_${mach}:" >> multi-run.c | |
326 | if test ${mach} = ${sim_multi_default}; then | |
327 | echo " default:" >> multi-run.c | |
328 | sim_seen_default=yes | |
329 | fi | |
330 | done | |
331 | echo " ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \ | |
332 | >> multi-run.c | |
333 | echo " break;" >> multi-run.c | |
334 | done | |
335 | ||
336 | # Check whether we added a 'default:' label. | |
337 | if test ${sim_seen_default} = no; then | |
306f4178 | 338 | AC_MSG_ERROR(Error in configure.ac: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default}) |
4c54fc26 CD |
339 | fi |
340 | ||
341 | cat << __EOF__ >> multi-run.c | |
342 | } | |
343 | } | |
344 | ||
345 | int | |
346 | mips_mach_multi (SIM_DESC sd) | |
347 | { | |
348 | if (STATE_ARCHITECTURE (sd) == NULL) | |
349 | return bfd_mach_${sim_multi_default}; | |
350 | ||
351 | switch (STATE_ARCHITECTURE (SD)->mach) | |
352 | { | |
353 | __EOF__ | |
354 | ||
355 | # Add case statements for this engine to mips_mach_multi(). | |
356 | for fc in ${sim_multi_configs}; do | |
357 | ||
358 | # Split up the entry. ${c} contains the first three elements. | |
359 | # Note: outer sqaure brackets are m4 quotes. | |
360 | c=`echo ${fc} | sed ['s/:[^:]*$//']` | |
361 | bfdmachs=`echo ${fc} | sed 's/.*://'` | |
362 | ||
363 | for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do | |
364 | echo " case bfd_mach_${mach}:" >> multi-run.c | |
365 | done | |
366 | done | |
367 | ||
368 | cat << __EOF__ >> multi-run.c | |
369 | return (STATE_ARCHITECTURE (SD)->mach); | |
370 | default: | |
371 | return bfd_mach_${sim_multi_default}; | |
372 | } | |
373 | } | |
374 | __EOF__ | |
375 | ||
376 | SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI" | |
377 | else | |
378 | # For clean-extra | |
379 | sim_multi_src=doesnt-exist.c | |
380 | ||
381 | if test x"${sim_mach_default}" = x""; then | |
306f4178 | 382 | AC_MSG_ERROR(Error in configure.ac: \${sim_mach_default} not defined) |
4c54fc26 CD |
383 | fi |
384 | SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}" | |
385 | fi | |
c906108c SS |
386 | sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}" |
387 | sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}" | |
8e394ffc AB |
388 | sim_micromips16_flags=" -F ${sim_micromips16_filter} ${sim_micromips16_machine} ${sim_igen_smp}" |
389 | sim_micromips_flags=" -F ${sim_micromips_filter} ${sim_micromips_machine} ${sim_igen_smp}" | |
c906108c SS |
390 | AC_SUBST(sim_igen_flags) |
391 | AC_SUBST(sim_m16_flags) | |
8e394ffc AB |
392 | AC_SUBST(sim_micromips_flags) |
393 | AC_SUBST(sim_micromips16_flags) | |
c906108c | 394 | AC_SUBST(sim_gen) |
4c54fc26 CD |
395 | AC_SUBST(sim_multi_flags) |
396 | AC_SUBST(sim_multi_igen_configs) | |
397 | AC_SUBST(sim_multi_src) | |
398 | AC_SUBST(sim_multi_obj) | |
c906108c | 399 | |
c906108c | 400 | SIM_AC_OUTPUT |