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Commit | Line | Data |
---|---|---|
f872d0d6 AC |
1 | Fri May 22 12:17:41 1998 Andrew Cagney <cagney@b1.cygnus.com> |
2 | ||
3 | * configure.in (SIM_AC_OPTION_HARDWARE): Add argument "yes". | |
4 | ||
26feb3a8 | 5 | start-sanitize-am30 |
26feb3a8 AC |
6 | Wed May 6 13:29:06 1998 Andrew Cagney <cagney@b1.cygnus.com> |
7 | ||
8 | * interp.c (sim_open): Create a polling PAL device. | |
9 | ||
10 | end-sanitize-am30 | |
11 | Fri May 1 16:39:15 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
12 | ||
13 | * dv-mn103int.c (mn103int_port_event): | |
14 | (mn103int_port_event): | |
15 | (mn103int_io_read_buffer): | |
16 | (mn103int_io_write_buffer): | |
17 | ||
18 | * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Drop CPU/CIA args. | |
19 | (mn103cpu_port_event): Ditto. | |
20 | (mn103cpu_io_read_buffer): Ditto. | |
21 | (mn103cpu_io_write_buffer): Ditto. | |
22 | ||
9d45df1b GN |
23 | Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com> |
24 | ||
25 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
26 | ||
5da9ce07 TT |
27 | Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche> |
28 | ||
29 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
30 | * config.in: Ditto. | |
31 | ||
32 | Sun Apr 26 15:19:55 1998 Tom Tromey <tromey@cygnus.com> | |
33 | ||
34 | * acconfig.h: New file. | |
35 | * configure.in: Reverted change of Apr 24; use sinclude again. | |
36 | ||
b1df34b9 TT |
37 | Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche> |
38 | ||
39 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
40 | * config.in: Ditto. | |
41 | ||
42 | Fri Apr 24 11:19:07 1998 Tom Tromey <tromey@cygnus.com> | |
43 | ||
44 | * configure.in: Don't call sinclude. | |
45 | ||
1e23866b AC |
46 | Tue Apr 14 10:03:02 1998 Andrew Cagney <cagney@b1.cygnus.com> |
47 | ||
b1df34b9 TT |
48 | * mn10300_sim.h: Declare all functions in op_utils.c using |
49 | INLINE_SIM_MAIN. | |
50 | * op_utils.c: Ditto. | |
51 | * sim-main.c: New file. Include op_utils.c. | |
52 | ||
1e23866b AC |
53 | * mn10300.igen (mov, cmp): Use new igen operators `!' and `=' to |
54 | differentiate between MOV/CMP immediate/register instructions. | |
55 | ||
56 | * configure.in (SIM_AC_OPTION_INLINE): Add and enable. | |
57 | * configure: Regenerate. | |
58 | ||
278bda40 AC |
59 | Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com> |
60 | ||
61 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
62 | ||
63 | start-sanitize-am30 | |
64 | Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
65 | ||
66 | * interp.c (hw): Delete variable, moved to SIM_DESC. | |
67 | (sim_open): Delete calls to hw_tree_create, hw_tree_finish. | |
68 | Handled by sim-module. | |
69 | (sim_open): Do not anotate tree with trace properties, handled by | |
70 | sim-hw.c | |
71 | (sim_open): Call sim_hw_parse instead of hw_tree_parse. | |
72 | ||
73 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
74 | ||
75 | end-sanitize-am30 | |
6d133cc9 AC |
76 | start-sanitize-am30 |
77 | Thu Mar 26 20:46:18 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk> | |
78 | ||
79 | * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Save the entire PC | |
80 | on the stack when delivering interrupts (not just the lower | |
81 | half)... | |
82 | * mn10300.igen (mov (Di,Am),Dn): Fix decode. Registers were | |
83 | specified in the wrong order. | |
84 | ||
85 | end-sanitize-am30 | |
86 | start-sanitize-am30 | |
1b756ba6 AC |
87 | Fri Mar 27 00:56:40 1998 Andrew Cagney <cagney@b1.cygnus.com> |
88 | ||
89 | * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Stop loss of | |
90 | succeeding interrupts, clear pending_handler when the handler | |
91 | isn't re-scheduled. | |
92 | ||
6d133cc9 | 93 | end-sanitize-am30 |
abf6ba25 SG |
94 | Thu Mar 26 10:11:01 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk> |
95 | ||
96 | * Makefile.in (tmp-igen): Prefix all usage of move-if-change | |
97 | script with $(SHELL) to make NT native builds happy. | |
98 | * configure: Regenerate because of change to ../common/aclocal.m4. | |
99 | ||
51ccd82f AC |
100 | Thu Mar 26 11:22:31 1998 Andrew Cagney <cagney@b1.cygnus.com> |
101 | ||
102 | * configure.in: Make --enable-sim-common the default. | |
103 | * configure: Re-generate. | |
104 | ||
105 | * sim-main.h (CIA_GET, CIA_SET): Save/restore current instruction | |
106 | address into Sate.regs[REG_PC] instead of common struct. | |
107 | ||
d1607ed3 JJ |
108 | Wed Mar 25 17:42:00 1998 Joyce Janczyn <janczyn@cygnus.com> |
109 | ||
110 | * mn10300.igen (cmp imm8,An): Do not sign extend imm8 value. | |
111 | ||
52ef605e JJ |
112 | Wed Mar 25 12:08:00 1998 Joyce Janczyn <janczyn@cygnus.com> |
113 | ||
114 | * simops.c (OP_F0FD): Initialise variable 'sp'. | |
115 | ||
6d133cc9 | 116 | start-sanitize-am30 |
c357e16a AC |
117 | Thu Mar 26 00:21:32 1998 Andrew Cagney <cagney@b1.cygnus.com> |
118 | ||
119 | * dv-mn103int.c (decode_group): A group register every 4 bytes not | |
120 | 8. | |
121 | (write_icr): Rewrite equation updating request field. | |
122 | (read_iagr): Fix check that interrupt is still pending. | |
123 | ||
6d133cc9 AC |
124 | end-sanitize-am30 |
125 | start-sanitize-am30 | |
8077fed5 AC |
126 | Wed Mar 25 16:14:50 1998 Andrew Cagney <cagney@b1.cygnus.com> |
127 | ||
128 | * interp.c (sim_open): Tidy up device creation. | |
129 | ||
130 | * dv-mn103int.c (mn103int_port_event): Drive NMI with non-zero | |
131 | value. | |
132 | (mn103int_io_read_buffer): Convert absolute address to register | |
133 | block offsets. | |
134 | (read_icr, write_icr): Convert block offset into group offset. | |
135 | ||
6d133cc9 | 136 | end-sanitize-am30 |
6100784a AC |
137 | Wed Mar 25 15:08:49 1998 Andrew Cagney <cagney@b1.cygnus.com> |
138 | ||
139 | * interp.c (sim_open): Create second 1mb memory region at | |
140 | 0x40000000. | |
141 | (sim_open): Create a device tree. | |
142 | (sim-hw.h): Include. | |
6d133cc9 | 143 | start-sanitize-am30 |
6100784a AC |
144 | (do_interrupt): Delete, needs to use dv-mn103cpu.c |
145 | ||
146 | * dv-mn103int.c, dv-mn103cpu.c: New files. | |
6d133cc9 | 147 | end-sanitize-am30 |
6100784a | 148 | |
8388c9a5 AC |
149 | Wed Mar 25 08:47:38 1998 Andrew Cagney <cagney@b1.cygnus.com> |
150 | ||
151 | * mn10300_sim.h (EXTRACT_PSW_LM, INSERT_PSW_LM, PSW_IE, PSW_LM): | |
152 | Define. | |
153 | (SP): Define. | |
154 | ||
d89fa2d8 AC |
155 | Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com> |
156 | ||
157 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
158 | ||
e855e576 AC |
159 | Wed Mar 25 10:24:48 1998 Andrew Cagney <cagney@b1.cygnus.com> |
160 | ||
161 | * interp.c (sim-options.h): Include. | |
162 | (sim_kind, myname): Declare when not using common framework. | |
163 | ||
164 | * mn10300_sim.h (do_syscall, generic*): Provide prototypes for | |
165 | functions found in op_utils.c | |
166 | ||
167 | * mn10300.igen (add): Discard unused variables. | |
168 | ||
169 | * configure, config.in: Re-generate with autoconf 2.12.1. | |
170 | ||
55045e7b JJ |
171 | Tue Mar 24 15:27:00 1998 Joyce Janczyn <janczyn@cygnus.com> |
172 | ||
173 | Add support for --enable-sim-common option. | |
174 | * Makefile.in (WITHOUT_COMMON_OBJS): Files included if | |
175 | ! --enable-sim-common | |
176 | (WITH_COMMON_OBJS): Files included if --enable-sim-common. | |
177 | (MN10300_OBJS,MN10300_INTERP_DEP): New variables. | |
178 | (SIM_OBJS): Rewrite. | |
179 | ({WITHOUT,WITH}_COMMON_RUN_OBJS,SIM_RUN_OBJS): New variables. | |
180 | (SIM_EXTRA_CFLAGS): New variable. | |
181 | (clean-extra): Clean up igen files. | |
182 | (../igen/igen,clean-igen,tmp-igen): New rules. | |
183 | * configure.in: Add support for common framework via | |
184 | --enable-sim-common. | |
185 | * configure: Regenerate. | |
186 | * interp.c: #include sim-main if WITH_COMMON, not mn10300_sim.h. | |
187 | (hash,dispatch,sim_size): Don't compile if ! WITH_COMMON. | |
188 | (init_system,sim_write,compare_simops): Likewise. | |
189 | (sim_set_profile,sim_set_profile_size): Likewise. | |
190 | (sim_stop,sim_resume,sim_trace,sim_info): Likewise. | |
191 | (sim_set_callbacks,sim_stop_reason,sim_read,sim_load): Likewise. | |
192 | (enum interrupt_type): New enum. | |
193 | (interrupt_names): New global. | |
194 | (do_interrupt): New function. | |
195 | (sim_open): Define differently if WITH_COMMON. | |
196 | (sim_close,sim_create_inferior,sim_do_command): Likewise. | |
197 | * mn10300_sim.h ({load,store}_{byte,half,word}): Define versions | |
198 | for WITH_COMMON. | |
199 | * mn10300.igen: New file. | |
200 | * mn10300.dc: New file. | |
201 | * op_utils.c: New file. | |
202 | * sim-main.h: New file. | |
203 | ||
204 | Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
205 | ||
206 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
207 | ||
208 | Fri Feb 27 18:36:04 1998 Jeffrey A Law (law@cygnus.com) | |
209 | ||
210 | * simops.c (inc): Fix typo. | |
211 | ||
097e6924 JL |
212 | Wed Feb 25 01:59:29 1998 Jeffrey A Law (law@cygnus.com) |
213 | ||
214 | * simops.c (signed multiply instructions): Cast input operands to | |
215 | signed32 before casting them to signed64 so that the sign bit | |
216 | is propagated properly. | |
217 | ||
a9faef12 MA |
218 | Mon Feb 23 20:23:19 1998 Mark Alexander <marka@cygnus.com> |
219 | ||
220 | * Makefile.in: Last change was bad. Define NL_TARGET | |
221 | so that targ-vals.h will be used instead of syscall.h. | |
222 | * simops.c: Use targ-vals.h instead of syscall.h. | |
223 | (OP_F020): Disable unsupported system calls. | |
224 | ||
e04b0d76 MA |
225 | Mon Feb 23 09:44:38 1998 Mark Alexander <marka@cygnus.com> |
226 | ||
227 | * Makefile.in: Get header files from libgloss/mn10300/sys. | |
228 | ||
7eab31b7 JL |
229 | Sun Feb 22 16:02:24 1998 Jeffrey A Law (law@cygnus.com) |
230 | ||
231 | * simops.c: Include sim-types.h. | |
232 | ||
233 | Wed Feb 18 13:07:08 1998 Jeffrey A Law (law@cygnus.com) | |
234 | ||
235 | * simops.c (multiply instructions): Cast input operands to a | |
236 | signed64/unsigned64 type as appropriate. | |
237 | ||
fbb8b6b9 AC |
238 | Tue Feb 17 12:47:16 1998 Andrew Cagney <cagney@b1.cygnus.com> |
239 | ||
240 | * interp.c (sim_store_register, sim_fetch_register): Pass in | |
241 | length parameter. Return -1. | |
242 | ||
243 | Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
244 | ||
245 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
246 | ||
412c4e94 AC |
247 | Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> |
248 | ||
249 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
250 | ||
462cfbc4 DE |
251 | Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> |
252 | ||
253 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
254 | ||
255 | Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
256 | ||
257 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
258 | * config.in: Ditto. | |
259 | ||
260 | Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> | |
261 | ||
262 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
263 | ||
264 | Tue Nov 11 10:38:52 1997 Jeffrey A Law (law@cygnus.com) | |
265 | ||
266 | * simops.c (call:16 call:32): Stack adjustment is determined solely | |
267 | by the imm8 field. | |
268 | ||
9e03a68f AC |
269 | Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com> |
270 | ||
b5da31ac | 271 | * interp.c (sim_load): Pass lma_p and sim_write args to |
9e03a68f AC |
272 | sim_load_file. |
273 | ||
f4ab2b2f JL |
274 | Tue Oct 21 10:12:03 1997 Jeffrey A Law (law@cygnus.com) |
275 | ||
276 | * simops.c: Correctly handle register restores for "ret" and "retf" | |
277 | instructions. | |
278 | ||
279 | Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
280 | ||
281 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
282 | ||
283 | Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
284 | ||
285 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
286 | ||
92f91d1f AC |
287 | Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> |
288 | ||
289 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
290 | ||
794e9ac9 AC |
291 | Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> |
292 | ||
293 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
294 | ||
b45caf05 AC |
295 | Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> |
296 | ||
297 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
298 | ||
299 | Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
300 | ||
301 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
302 | ||
6fea4763 DE |
303 | Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> |
304 | ||
305 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
306 | ||
88117054 AC |
307 | Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
308 | ||
309 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
310 | * config.in: Ditto. | |
311 | ||
7230ff0f AC |
312 | Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com> |
313 | ||
314 | * interp.c (sim_kill): Delete. | |
fafce69a AC |
315 | (sim_create_inferior): Add ABFD argument. |
316 | (sim_load): Move setting of PC from here. | |
317 | (sim_create_inferior): To here. | |
7230ff0f | 318 | |
247fccde AC |
319 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
320 | ||
321 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
322 | * config.in: Ditto. | |
323 | ||
324 | Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
325 | ||
326 | * interp.c (sim_open): Add ABFD argument. | |
327 | ||
328 | Tue Jun 24 13:46:20 1997 Jeffrey A Law (law@cygnus.com) | |
329 | ||
330 | * interp.c (sim_resume): Clear State.exited. | |
331 | (sim_stop_reason): If State.exited is nonzero, then indicate that | |
332 | the simulator exited instead of stopped. | |
333 | * mn10300_sim.h (struct _state): Add exited field. | |
334 | * simops.c (syscall): Set State.exited for SYS_exit. | |
335 | ||
c370b3cd JL |
336 | Wed Jun 11 22:07:56 1997 Jeffrey A Law (law@cygnus.com) |
337 | ||
338 | * simops.c: Fix thinko in last change. | |
339 | ||
0a8fa63c JL |
340 | Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com) |
341 | ||
dbdb5bd8 JL |
342 | * simops.c: "call" stores the callee saved registers into the |
343 | stack! Update the stack pointer properly when done with | |
344 | register saves. | |
345 | ||
0a8fa63c JL |
346 | * simops.c: Fix return address computation for "call" instructions. |
347 | ||
348 | Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com) | |
349 | ||
350 | * interp.c (sim_open): Fix typo. | |
351 | ||
09e142d5 JL |
352 | Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com) |
353 | ||
354 | * interp.c (sim_resume): Add missing case in big switch | |
355 | statement (for extb instruction). | |
356 | ||
003c91be JL |
357 | Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com) |
358 | ||
359 | * interp.c: Replace all references to load_mem and store_mem | |
360 | with references to load_byte, load_half, load_3_byte, load_word | |
361 | and store_byte, store_half, store_3_byte, store_word. | |
362 | (INLINE): Delete definition. | |
363 | (load_mem_big): Likewise. | |
364 | (max_mem): Make it global. | |
365 | (dispatch): Make this function inline. | |
366 | (load_mem, store_mem): Delete functions. | |
367 | * mn10300_sim.h (INLINE): Define. | |
368 | (RLW): Delete unused definition. | |
369 | (load_mem, store_mem): Delete declarations. | |
370 | (load_mem_big): New definition. | |
371 | (load_byte, load_half, load_3_byte, load_word): New functions. | |
372 | (store_byte, store_half, store_3_byte, store_word): New functions. | |
373 | * simops.c: Replace all references to load_mem and store_mem | |
374 | with references to load_byte, load_half, load_3_byte, load_word | |
375 | and store_byte, store_half, store_3_byte, store_word. | |
376 | ||
377 | Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
378 | ||
379 | * interp.c (sim_open): Add callback to arguments. | |
380 | (sim_set_callbacks): Delete SIM_DESC argument. | |
381 | ||
4df7aeb3 JL |
382 | Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com) |
383 | ||
384 | * interp.c (dispatch): Make this an inline function. | |
385 | ||
386 | * simops.c (syscall): Use callback->write regardless of | |
387 | what file descriptor we're writing too. | |
388 | ||
b07a1e78 JL |
389 | Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com) |
390 | ||
391 | * interp.c (load_mem_big): Remove function. It's now a macro | |
392 | defined elsewhere. | |
393 | (compare_simops): New function. | |
394 | (sim_open): Sort the Simops table before inserting entries | |
395 | into the hash table. | |
396 | * mn10300_sim.h: Remove unused #defines. | |
397 | (load_mem_big): Define. | |
398 | ||
234a9a49 JL |
399 | Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com) |
400 | ||
401 | * interp.c (load_mem): If we get a load from an out of range | |
402 | address, abort. | |
403 | (store_mem): Likewise for stores. | |
404 | (max_mem): New variable. | |
405 | ||
baa83bcc JL |
406 | Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com) |
407 | ||
8def9220 JL |
408 | * mn10300_sim.h: Fix ordering of bits in the PSW. |
409 | ||
baa83bcc JL |
410 | * interp.c: Improve hashing routine to avoid long list |
411 | traversals for common instructions. Add HASH_STAT support. | |
412 | Rewrite opcode dispatch code using a big switch instead of | |
413 | cascaded if/else statements. Avoid useless calls to load_mem. | |
414 | ||
26e9f63c JL |
415 | Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com) |
416 | ||
417 | * mn10300_sim.h (struct _state): Add space for mdrq register. | |
418 | (REG_MDRQ): Define. | |
419 | * simops.c: Don't abort for trap. Add support for the extended | |
420 | instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24", | |
421 | and "bsch". | |
422 | ||
423 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> | |
424 | ||
425 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
426 | ||
8517f62b AC |
427 | Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com> |
428 | ||
429 | * interp.c (sim_stop): Add stub function. | |
430 | ||
6cc6987e DE |
431 | Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com> |
432 | ||
433 | * Makefile.in (SIM_OBJS): Add sim-load.o. | |
434 | * interp.c (sim_kind, myname): New static locals. | |
435 | (sim_open): Set sim_kind, myname. Ignore -E arg. | |
436 | (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to | |
437 | load file into simulator. Set start address from bfd. | |
438 | (sim_create_inferior): Return SIM_RC. Delete arg start_address. | |
439 | ||
87e43259 AC |
440 | Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com> |
441 | ||
442 | * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime | |
443 | only include if implemented by host. | |
444 | (OP_F020): Typecast arg passed to time function; | |
445 | ||
446 | Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com) | |
447 | ||
448 | * simops.c (syscall): Handle new mn10300 calling conventions. | |
449 | ||
08db4a65 AC |
450 | Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
451 | ||
452 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
453 | * config.in: Ditto. | |
454 | ||
ea553f56 ILT |
455 | Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com> |
456 | ||
457 | * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match | |
458 | corresponding change in opcodes directory. | |
459 | ||
fbda74b1 DE |
460 | Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> |
461 | ||
8a7c3105 DE |
462 | * interp.c (sim_open): New arg `kind'. |
463 | ||
fbda74b1 DE |
464 | * configure: Regenerated to track ../common/aclocal.m4 changes. |
465 | ||
a35e91c3 AC |
466 | Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
467 | ||
468 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
469 | ||
470 | Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com) | |
471 | ||
472 | * simops.c: Fix register extraction for a two "movbu" variants. | |
473 | Somewhat simplify "sub" instructions. | |
474 | Correctly sign extend operands for "mul". Put the correct | |
475 | half of the result in MDR for "mul" and "mulu". | |
476 | Implement remaining instructions. | |
477 | Tweak opcode for "syscall". | |
478 | ||
479 | Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com) | |
480 | ||
481 | * simops.c: Do syscall emulation in "syscall" instruction. Add | |
482 | dummy "trap" instruction. | |
483 | ||
c695046a AC |
484 | Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
485 | ||
486 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
487 | ||
a77aa7ec AC |
488 | Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
489 | ||
490 | * configure: Re-generate. | |
491 | ||
601fb8ae MM |
492 | Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com> |
493 | ||
494 | * configure: Regenerate to track ../common/aclocal.m4 changes. | |
495 | ||
53b9417e DE |
496 | Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com> |
497 | ||
498 | * interp.c (sim_open): New SIM_DESC result. Argument is now | |
499 | in argv form. | |
500 | (other sim_*): New SIM_DESC argument. | |
501 | ||
09eef8af JL |
502 | Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com) |
503 | ||
0ade484f JL |
504 | * simops.c: Fix carry bit computation for "add" instructions. |
505 | ||
09eef8af JL |
506 | * simops.c: Fix typos in bset insns. Fix arguments to store_mem |
507 | for bset imm8,(d8,an) and bclr imm8,(d8,an). | |
508 | ||
509 | Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com) | |
510 | ||
511 | * simops.c: Fix register references when computing Z and N bits | |
512 | for lsr imm8,dn. | |
513 | ||
514 | Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com> | |
515 | ||
516 | * Makefile.in (@COMMON_MAKEFILE_FRAG): Use | |
517 | COMMON_{PRE,POST}_CONFIG_FRAG instead. | |
518 | * configure.in: sinclude ../common/aclocal.m4. | |
519 | * configure: Regenerated. | |
520 | ||
018f9eb4 JL |
521 | Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com) |
522 | ||
523 | * interp.c (init_system): Allocate 2^19 bytes of space for the | |
524 | simulator. | |
525 | ||
295dbbe4 SG |
526 | Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com) |
527 | ||
528 | * configure configure.in Makefile.in: Update to new configure | |
529 | scheme which is more compatible with WinGDB builds. | |
530 | * configure.in: Improve comment on how to run autoconf. | |
531 | * configure: Re-run autoconf to get new ../common/aclocal.m4. | |
532 | * Makefile.in: Use autoconf substitution to install common | |
533 | makefile fragment. | |
534 | ||
f95251f0 JL |
535 | Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com) |
536 | ||
537 | * simops.c: Undo last change to "rol" and "ror", original code | |
538 | was correct! | |
539 | ||
b4b290a0 JL |
540 | Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com) |
541 | ||
542 | * simops.c: Fix "rol" and "ror". | |
543 | ||
544 | Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com) | |
545 | ||
546 | * simops.c: Fix typo in last change. | |
547 | ||
2da0bc1b JL |
548 | Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com) |
549 | ||
550 | * simops.c: Use REG macros in few places not using them yet. | |
551 | ||
bbd17062 JL |
552 | Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com) |
553 | ||
554 | * mn10300_sim.h (struct _state): Fix number of registers! | |
555 | ||
b774c0e4 JL |
556 | Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com) |
557 | ||
558 | * mn10300_sim.h (struct _state): Put all registers into a single | |
559 | array to make gdb implementation easier. | |
560 | (REG_*): Add definitions for all registers in the state array. | |
561 | (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros. | |
562 | * simops.c: Related changes. | |
563 | ||
d657034d JL |
564 | Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com) |
565 | ||
566 | * interp.c (sim_resume): Handle 0xff as a single byte insn. | |
567 | ||
568 | * simops.c: Fix overflow computation for "add" and "inc" | |
569 | instructions. | |
570 | ||
16d2e2b6 JL |
571 | Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com) |
572 | ||
093e9a32 JL |
573 | * simops.c: Handle "break" instruction. |
574 | ||
16d2e2b6 JL |
575 | * simops.c: Fix restoring the PC for "ret" and "retf" instructions. |
576 | ||
577 | Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com) | |
578 | ||
579 | * gencode.c (write_opcodes): Also write out the format of the | |
580 | opcode. | |
581 | * mn10300_sim.h (simops): Add "format" field. | |
582 | * interp.c (sim_resume): Deal with endianness issues here. | |
583 | ||
95d18eb7 JL |
584 | Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com) |
585 | ||
586 | * simops.c (REG0_4): Define. | |
587 | Use REG0_4 for indexed loads/stores. | |
588 | ||
2e8f4133 JL |
589 | Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com) |
590 | ||
591 | * simops.c (REG0_16): Fix typo. | |
592 | ||
d2523010 JL |
593 | Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com) |
594 | ||
b2f7a7e5 JL |
595 | * simops.c: Call abort for any instruction that's not currently |
596 | simulated. | |
597 | ||
9f4a551e JL |
598 | * simops.c: Define accessor macros to extract register |
599 | values from instructions. Use them consistently. | |
600 | ||
7c52bf32 JL |
601 | * interp.c: Delete unused global variable "OP". |
602 | (sim_resume): Remove unused variable "opcode". | |
603 | * simops.c: Fix some uninitialized variable problems, add | |
604 | parens to fix various -Wall warnings. | |
605 | ||
d2523010 JL |
606 | * gencode.c (write_header): Add "insn" and "extension" arguments |
607 | to the OP_* declarations. | |
608 | (write_template): Similarly for function templates. | |
609 | * interp.c (insn, extension): Remove global variables. Instead | |
610 | pass them as arguments to the OP_* functions. | |
611 | * mn10300_sim.h: Remove decls for "insn" and "extension". | |
612 | * simops.c (OP_*): Accept "insn" and "extension" as arguments | |
613 | instead of using globals. | |
614 | ||
4d8ced6c JL |
615 | Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com) |
616 | ||
e5a7a537 JL |
617 | * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)" |
618 | ||
4d8ced6c JL |
619 | * simops.c: Fix thinkos in last change to "inc dn". |
620 | ||
61ecca95 JL |
621 | Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com) |
622 | ||
623 | * simops.c: "add imm,sp" does not effect the condition codes. | |
624 | "inc dn" does effect the condition codes. | |
625 | ||
e4e13022 JL |
626 | Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com) |
627 | ||
628 | * simops.c: Treat both operands as signed values for | |
629 | "div" instruction. | |
630 | ||
631 | * simops.c: Fix simulation of division instructions. | |
632 | Fix typos/thinkos in several "cmp" and "sub" instructions. | |
633 | ||
fcfaf40d JL |
634 | Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com) |
635 | ||
e4e13022 JL |
636 | * simops.c: Fix carry bit handling in "sub" and "cmp" |
637 | instructions. | |
638 | ||
fcfaf40d JL |
639 | * simops.c: Fix "mov imm8,an" and "mov imm16,dn". |
640 | ||
6db7fc49 JL |
641 | Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com) |
642 | ||
b7b89deb JL |
643 | * simops.c: Fix overflow computation for many instructions. |
644 | ||
e5a7a537 | 645 | * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)". |
af388638 | 646 | |
c8f0171f JL |
647 | * simops.c: Fix "mov am, dn". |
648 | ||
6db7fc49 JL |
649 | * simops.c: Fix more bugs in "add imm,an" and |
650 | "add imm,dn". | |
651 | ||
f5f13c1d JL |
652 | Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com) |
653 | ||
6e7a01c1 JL |
654 | * simops.c: Fix bugs in "movm" and "add imm,an". |
655 | ||
3bb3fe44 JL |
656 | * simops.c: Don't lose the upper 24 bits of the return |
657 | pointer in "call" and "calls" instructions. Rough cut | |
658 | at emulated system calls. | |
659 | ||
de0dce7c JL |
660 | * simops.c: Implement the remaining 5, 6 and 7 byte instructions. |
661 | ||
ecb4b5a3 JL |
662 | * simops.c: Implement remaining 4 byte instructions. |
663 | ||
664 | * simops.c: Implement remaining 3 byte instructions. | |
2e35551c | 665 | |
f5f13c1d JL |
666 | * simops.c: Implement remaining 2 byte instructions. Call |
667 | abort for instructions we're not implementing now. | |
668 | ||
73e65298 JL |
669 | Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com) |
670 | ||
707641f6 JL |
671 | * simops.c: Implement lots of random instructions. |
672 | ||
1f3bea21 JL |
673 | * simops.c: Implement "movm" and "bCC" insns. |
674 | ||
92284aaa JL |
675 | * mn10300_sim.h (_state): Add another register (MDR). |
676 | (REG_MDR): Define. | |
677 | * simops.c: Implement "cmp", "calls", "rets", "jmp" and | |
678 | a few additional random insns. | |
679 | ||
73e65298 JL |
680 | * mn10300_sim.h (PSW_*): Define for CC status tracking. |
681 | (REG_D0, REG_A0, REG_SP): Define. | |
682 | * simops.c: Implement "add", "addc" and a few other random | |
683 | instructions. | |
b5f831ac JL |
684 | |
685 | * gencode.c, interp.c: Snapshot current simulator code. | |
686 | ||
05ccbdfd JL |
687 | Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com) |
688 | ||
689 | * Makefile.in, config.in, configure, configure.in: New files. | |
690 | * gencode.c, interp.c, mn10300_sim.h, simops.c: New files. | |
691 |