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Commit | Line | Data |
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6100784a AC |
1 | Wed Mar 25 15:08:49 1998 Andrew Cagney <cagney@b1.cygnus.com> |
2 | ||
3 | * interp.c (sim_open): Create second 1mb memory region at | |
4 | 0x40000000. | |
5 | (sim_open): Create a device tree. | |
6 | (sim-hw.h): Include. | |
7 | (do_interrupt): Delete, needs to use dv-mn103cpu.c | |
8 | ||
9 | * dv-mn103int.c, dv-mn103cpu.c: New files. | |
10 | ||
8388c9a5 AC |
11 | Wed Mar 25 08:47:38 1998 Andrew Cagney <cagney@b1.cygnus.com> |
12 | ||
13 | * mn10300_sim.h (EXTRACT_PSW_LM, INSERT_PSW_LM, PSW_IE, PSW_LM): | |
14 | Define. | |
15 | (SP): Define. | |
16 | ||
d89fa2d8 AC |
17 | Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com> |
18 | ||
19 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
20 | ||
e855e576 AC |
21 | Wed Mar 25 10:24:48 1998 Andrew Cagney <cagney@b1.cygnus.com> |
22 | ||
23 | * interp.c (sim-options.h): Include. | |
24 | (sim_kind, myname): Declare when not using common framework. | |
25 | ||
26 | * mn10300_sim.h (do_syscall, generic*): Provide prototypes for | |
27 | functions found in op_utils.c | |
28 | ||
29 | * mn10300.igen (add): Discard unused variables. | |
30 | ||
31 | * configure, config.in: Re-generate with autoconf 2.12.1. | |
32 | ||
55045e7b JJ |
33 | Tue Mar 24 15:27:00 1998 Joyce Janczyn <janczyn@cygnus.com> |
34 | ||
35 | Add support for --enable-sim-common option. | |
36 | * Makefile.in (WITHOUT_COMMON_OBJS): Files included if | |
37 | ! --enable-sim-common | |
38 | (WITH_COMMON_OBJS): Files included if --enable-sim-common. | |
39 | (MN10300_OBJS,MN10300_INTERP_DEP): New variables. | |
40 | (SIM_OBJS): Rewrite. | |
41 | ({WITHOUT,WITH}_COMMON_RUN_OBJS,SIM_RUN_OBJS): New variables. | |
42 | (SIM_EXTRA_CFLAGS): New variable. | |
43 | (clean-extra): Clean up igen files. | |
44 | (../igen/igen,clean-igen,tmp-igen): New rules. | |
45 | * configure.in: Add support for common framework via | |
46 | --enable-sim-common. | |
47 | * configure: Regenerate. | |
48 | * interp.c: #include sim-main if WITH_COMMON, not mn10300_sim.h. | |
49 | (hash,dispatch,sim_size): Don't compile if ! WITH_COMMON. | |
50 | (init_system,sim_write,compare_simops): Likewise. | |
51 | (sim_set_profile,sim_set_profile_size): Likewise. | |
52 | (sim_stop,sim_resume,sim_trace,sim_info): Likewise. | |
53 | (sim_set_callbacks,sim_stop_reason,sim_read,sim_load): Likewise. | |
54 | (enum interrupt_type): New enum. | |
55 | (interrupt_names): New global. | |
56 | (do_interrupt): New function. | |
57 | (sim_open): Define differently if WITH_COMMON. | |
58 | (sim_close,sim_create_inferior,sim_do_command): Likewise. | |
59 | * mn10300_sim.h ({load,store}_{byte,half,word}): Define versions | |
60 | for WITH_COMMON. | |
61 | * mn10300.igen: New file. | |
62 | * mn10300.dc: New file. | |
63 | * op_utils.c: New file. | |
64 | * sim-main.h: New file. | |
65 | ||
66 | Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
67 | ||
68 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
69 | ||
70 | Fri Feb 27 18:36:04 1998 Jeffrey A Law (law@cygnus.com) | |
71 | ||
72 | * simops.c (inc): Fix typo. | |
73 | ||
097e6924 JL |
74 | Wed Feb 25 01:59:29 1998 Jeffrey A Law (law@cygnus.com) |
75 | ||
76 | * simops.c (signed multiply instructions): Cast input operands to | |
77 | signed32 before casting them to signed64 so that the sign bit | |
78 | is propagated properly. | |
79 | ||
a9faef12 MA |
80 | Mon Feb 23 20:23:19 1998 Mark Alexander <marka@cygnus.com> |
81 | ||
82 | * Makefile.in: Last change was bad. Define NL_TARGET | |
83 | so that targ-vals.h will be used instead of syscall.h. | |
84 | * simops.c: Use targ-vals.h instead of syscall.h. | |
85 | (OP_F020): Disable unsupported system calls. | |
86 | ||
e04b0d76 MA |
87 | Mon Feb 23 09:44:38 1998 Mark Alexander <marka@cygnus.com> |
88 | ||
89 | * Makefile.in: Get header files from libgloss/mn10300/sys. | |
90 | ||
7eab31b7 JL |
91 | Sun Feb 22 16:02:24 1998 Jeffrey A Law (law@cygnus.com) |
92 | ||
93 | * simops.c: Include sim-types.h. | |
94 | ||
95 | Wed Feb 18 13:07:08 1998 Jeffrey A Law (law@cygnus.com) | |
96 | ||
97 | * simops.c (multiply instructions): Cast input operands to a | |
98 | signed64/unsigned64 type as appropriate. | |
99 | ||
fbb8b6b9 AC |
100 | Tue Feb 17 12:47:16 1998 Andrew Cagney <cagney@b1.cygnus.com> |
101 | ||
102 | * interp.c (sim_store_register, sim_fetch_register): Pass in | |
103 | length parameter. Return -1. | |
104 | ||
105 | Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
106 | ||
107 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
108 | ||
412c4e94 AC |
109 | Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> |
110 | ||
111 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
112 | ||
462cfbc4 DE |
113 | Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> |
114 | ||
115 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
116 | ||
117 | Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
118 | ||
119 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
120 | * config.in: Ditto. | |
121 | ||
122 | Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> | |
123 | ||
124 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
125 | ||
126 | Tue Nov 11 10:38:52 1997 Jeffrey A Law (law@cygnus.com) | |
127 | ||
128 | * simops.c (call:16 call:32): Stack adjustment is determined solely | |
129 | by the imm8 field. | |
130 | ||
9e03a68f AC |
131 | Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com> |
132 | ||
b5da31ac | 133 | * interp.c (sim_load): Pass lma_p and sim_write args to |
9e03a68f AC |
134 | sim_load_file. |
135 | ||
f4ab2b2f JL |
136 | Tue Oct 21 10:12:03 1997 Jeffrey A Law (law@cygnus.com) |
137 | ||
138 | * simops.c: Correctly handle register restores for "ret" and "retf" | |
139 | instructions. | |
140 | ||
141 | Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
142 | ||
143 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
144 | ||
145 | Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
146 | ||
147 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
148 | ||
92f91d1f AC |
149 | Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> |
150 | ||
151 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
152 | ||
794e9ac9 AC |
153 | Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> |
154 | ||
155 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
156 | ||
b45caf05 AC |
157 | Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> |
158 | ||
159 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
160 | ||
161 | Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
162 | ||
163 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
164 | ||
6fea4763 DE |
165 | Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> |
166 | ||
167 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
168 | ||
88117054 AC |
169 | Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
170 | ||
171 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
172 | * config.in: Ditto. | |
173 | ||
7230ff0f AC |
174 | Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com> |
175 | ||
176 | * interp.c (sim_kill): Delete. | |
fafce69a AC |
177 | (sim_create_inferior): Add ABFD argument. |
178 | (sim_load): Move setting of PC from here. | |
179 | (sim_create_inferior): To here. | |
7230ff0f | 180 | |
247fccde AC |
181 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
182 | ||
183 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
184 | * config.in: Ditto. | |
185 | ||
186 | Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
187 | ||
188 | * interp.c (sim_open): Add ABFD argument. | |
189 | ||
190 | Tue Jun 24 13:46:20 1997 Jeffrey A Law (law@cygnus.com) | |
191 | ||
192 | * interp.c (sim_resume): Clear State.exited. | |
193 | (sim_stop_reason): If State.exited is nonzero, then indicate that | |
194 | the simulator exited instead of stopped. | |
195 | * mn10300_sim.h (struct _state): Add exited field. | |
196 | * simops.c (syscall): Set State.exited for SYS_exit. | |
197 | ||
c370b3cd JL |
198 | Wed Jun 11 22:07:56 1997 Jeffrey A Law (law@cygnus.com) |
199 | ||
200 | * simops.c: Fix thinko in last change. | |
201 | ||
0a8fa63c JL |
202 | Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com) |
203 | ||
dbdb5bd8 JL |
204 | * simops.c: "call" stores the callee saved registers into the |
205 | stack! Update the stack pointer properly when done with | |
206 | register saves. | |
207 | ||
0a8fa63c JL |
208 | * simops.c: Fix return address computation for "call" instructions. |
209 | ||
210 | Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com) | |
211 | ||
212 | * interp.c (sim_open): Fix typo. | |
213 | ||
09e142d5 JL |
214 | Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com) |
215 | ||
216 | * interp.c (sim_resume): Add missing case in big switch | |
217 | statement (for extb instruction). | |
218 | ||
003c91be JL |
219 | Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com) |
220 | ||
221 | * interp.c: Replace all references to load_mem and store_mem | |
222 | with references to load_byte, load_half, load_3_byte, load_word | |
223 | and store_byte, store_half, store_3_byte, store_word. | |
224 | (INLINE): Delete definition. | |
225 | (load_mem_big): Likewise. | |
226 | (max_mem): Make it global. | |
227 | (dispatch): Make this function inline. | |
228 | (load_mem, store_mem): Delete functions. | |
229 | * mn10300_sim.h (INLINE): Define. | |
230 | (RLW): Delete unused definition. | |
231 | (load_mem, store_mem): Delete declarations. | |
232 | (load_mem_big): New definition. | |
233 | (load_byte, load_half, load_3_byte, load_word): New functions. | |
234 | (store_byte, store_half, store_3_byte, store_word): New functions. | |
235 | * simops.c: Replace all references to load_mem and store_mem | |
236 | with references to load_byte, load_half, load_3_byte, load_word | |
237 | and store_byte, store_half, store_3_byte, store_word. | |
238 | ||
239 | Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
240 | ||
241 | * interp.c (sim_open): Add callback to arguments. | |
242 | (sim_set_callbacks): Delete SIM_DESC argument. | |
243 | ||
4df7aeb3 JL |
244 | Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com) |
245 | ||
246 | * interp.c (dispatch): Make this an inline function. | |
247 | ||
248 | * simops.c (syscall): Use callback->write regardless of | |
249 | what file descriptor we're writing too. | |
250 | ||
b07a1e78 JL |
251 | Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com) |
252 | ||
253 | * interp.c (load_mem_big): Remove function. It's now a macro | |
254 | defined elsewhere. | |
255 | (compare_simops): New function. | |
256 | (sim_open): Sort the Simops table before inserting entries | |
257 | into the hash table. | |
258 | * mn10300_sim.h: Remove unused #defines. | |
259 | (load_mem_big): Define. | |
260 | ||
234a9a49 JL |
261 | Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com) |
262 | ||
263 | * interp.c (load_mem): If we get a load from an out of range | |
264 | address, abort. | |
265 | (store_mem): Likewise for stores. | |
266 | (max_mem): New variable. | |
267 | ||
baa83bcc JL |
268 | Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com) |
269 | ||
8def9220 JL |
270 | * mn10300_sim.h: Fix ordering of bits in the PSW. |
271 | ||
baa83bcc JL |
272 | * interp.c: Improve hashing routine to avoid long list |
273 | traversals for common instructions. Add HASH_STAT support. | |
274 | Rewrite opcode dispatch code using a big switch instead of | |
275 | cascaded if/else statements. Avoid useless calls to load_mem. | |
276 | ||
26e9f63c JL |
277 | Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com) |
278 | ||
279 | * mn10300_sim.h (struct _state): Add space for mdrq register. | |
280 | (REG_MDRQ): Define. | |
281 | * simops.c: Don't abort for trap. Add support for the extended | |
282 | instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24", | |
283 | and "bsch". | |
284 | ||
285 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> | |
286 | ||
287 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
288 | ||
8517f62b AC |
289 | Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com> |
290 | ||
291 | * interp.c (sim_stop): Add stub function. | |
292 | ||
6cc6987e DE |
293 | Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com> |
294 | ||
295 | * Makefile.in (SIM_OBJS): Add sim-load.o. | |
296 | * interp.c (sim_kind, myname): New static locals. | |
297 | (sim_open): Set sim_kind, myname. Ignore -E arg. | |
298 | (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to | |
299 | load file into simulator. Set start address from bfd. | |
300 | (sim_create_inferior): Return SIM_RC. Delete arg start_address. | |
301 | ||
87e43259 AC |
302 | Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com> |
303 | ||
304 | * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime | |
305 | only include if implemented by host. | |
306 | (OP_F020): Typecast arg passed to time function; | |
307 | ||
308 | Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com) | |
309 | ||
310 | * simops.c (syscall): Handle new mn10300 calling conventions. | |
311 | ||
08db4a65 AC |
312 | Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
313 | ||
314 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
315 | * config.in: Ditto. | |
316 | ||
ea553f56 ILT |
317 | Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com> |
318 | ||
319 | * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match | |
320 | corresponding change in opcodes directory. | |
321 | ||
fbda74b1 DE |
322 | Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> |
323 | ||
8a7c3105 DE |
324 | * interp.c (sim_open): New arg `kind'. |
325 | ||
fbda74b1 DE |
326 | * configure: Regenerated to track ../common/aclocal.m4 changes. |
327 | ||
a35e91c3 AC |
328 | Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
329 | ||
330 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
331 | ||
332 | Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com) | |
333 | ||
334 | * simops.c: Fix register extraction for a two "movbu" variants. | |
335 | Somewhat simplify "sub" instructions. | |
336 | Correctly sign extend operands for "mul". Put the correct | |
337 | half of the result in MDR for "mul" and "mulu". | |
338 | Implement remaining instructions. | |
339 | Tweak opcode for "syscall". | |
340 | ||
341 | Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com) | |
342 | ||
343 | * simops.c: Do syscall emulation in "syscall" instruction. Add | |
344 | dummy "trap" instruction. | |
345 | ||
c695046a AC |
346 | Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
347 | ||
348 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
349 | ||
a77aa7ec AC |
350 | Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
351 | ||
352 | * configure: Re-generate. | |
353 | ||
601fb8ae MM |
354 | Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com> |
355 | ||
356 | * configure: Regenerate to track ../common/aclocal.m4 changes. | |
357 | ||
53b9417e DE |
358 | Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com> |
359 | ||
360 | * interp.c (sim_open): New SIM_DESC result. Argument is now | |
361 | in argv form. | |
362 | (other sim_*): New SIM_DESC argument. | |
363 | ||
09eef8af JL |
364 | Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com) |
365 | ||
0ade484f JL |
366 | * simops.c: Fix carry bit computation for "add" instructions. |
367 | ||
09eef8af JL |
368 | * simops.c: Fix typos in bset insns. Fix arguments to store_mem |
369 | for bset imm8,(d8,an) and bclr imm8,(d8,an). | |
370 | ||
371 | Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com) | |
372 | ||
373 | * simops.c: Fix register references when computing Z and N bits | |
374 | for lsr imm8,dn. | |
375 | ||
376 | Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com> | |
377 | ||
378 | * Makefile.in (@COMMON_MAKEFILE_FRAG): Use | |
379 | COMMON_{PRE,POST}_CONFIG_FRAG instead. | |
380 | * configure.in: sinclude ../common/aclocal.m4. | |
381 | * configure: Regenerated. | |
382 | ||
018f9eb4 JL |
383 | Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com) |
384 | ||
385 | * interp.c (init_system): Allocate 2^19 bytes of space for the | |
386 | simulator. | |
387 | ||
295dbbe4 SG |
388 | Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com) |
389 | ||
390 | * configure configure.in Makefile.in: Update to new configure | |
391 | scheme which is more compatible with WinGDB builds. | |
392 | * configure.in: Improve comment on how to run autoconf. | |
393 | * configure: Re-run autoconf to get new ../common/aclocal.m4. | |
394 | * Makefile.in: Use autoconf substitution to install common | |
395 | makefile fragment. | |
396 | ||
f95251f0 JL |
397 | Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com) |
398 | ||
399 | * simops.c: Undo last change to "rol" and "ror", original code | |
400 | was correct! | |
401 | ||
b4b290a0 JL |
402 | Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com) |
403 | ||
404 | * simops.c: Fix "rol" and "ror". | |
405 | ||
406 | Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com) | |
407 | ||
408 | * simops.c: Fix typo in last change. | |
409 | ||
2da0bc1b JL |
410 | Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com) |
411 | ||
412 | * simops.c: Use REG macros in few places not using them yet. | |
413 | ||
bbd17062 JL |
414 | Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com) |
415 | ||
416 | * mn10300_sim.h (struct _state): Fix number of registers! | |
417 | ||
b774c0e4 JL |
418 | Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com) |
419 | ||
420 | * mn10300_sim.h (struct _state): Put all registers into a single | |
421 | array to make gdb implementation easier. | |
422 | (REG_*): Add definitions for all registers in the state array. | |
423 | (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros. | |
424 | * simops.c: Related changes. | |
425 | ||
d657034d JL |
426 | Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com) |
427 | ||
428 | * interp.c (sim_resume): Handle 0xff as a single byte insn. | |
429 | ||
430 | * simops.c: Fix overflow computation for "add" and "inc" | |
431 | instructions. | |
432 | ||
16d2e2b6 JL |
433 | Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com) |
434 | ||
093e9a32 JL |
435 | * simops.c: Handle "break" instruction. |
436 | ||
16d2e2b6 JL |
437 | * simops.c: Fix restoring the PC for "ret" and "retf" instructions. |
438 | ||
439 | Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com) | |
440 | ||
441 | * gencode.c (write_opcodes): Also write out the format of the | |
442 | opcode. | |
443 | * mn10300_sim.h (simops): Add "format" field. | |
444 | * interp.c (sim_resume): Deal with endianness issues here. | |
445 | ||
95d18eb7 JL |
446 | Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com) |
447 | ||
448 | * simops.c (REG0_4): Define. | |
449 | Use REG0_4 for indexed loads/stores. | |
450 | ||
2e8f4133 JL |
451 | Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com) |
452 | ||
453 | * simops.c (REG0_16): Fix typo. | |
454 | ||
d2523010 JL |
455 | Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com) |
456 | ||
b2f7a7e5 JL |
457 | * simops.c: Call abort for any instruction that's not currently |
458 | simulated. | |
459 | ||
9f4a551e JL |
460 | * simops.c: Define accessor macros to extract register |
461 | values from instructions. Use them consistently. | |
462 | ||
7c52bf32 JL |
463 | * interp.c: Delete unused global variable "OP". |
464 | (sim_resume): Remove unused variable "opcode". | |
465 | * simops.c: Fix some uninitialized variable problems, add | |
466 | parens to fix various -Wall warnings. | |
467 | ||
d2523010 JL |
468 | * gencode.c (write_header): Add "insn" and "extension" arguments |
469 | to the OP_* declarations. | |
470 | (write_template): Similarly for function templates. | |
471 | * interp.c (insn, extension): Remove global variables. Instead | |
472 | pass them as arguments to the OP_* functions. | |
473 | * mn10300_sim.h: Remove decls for "insn" and "extension". | |
474 | * simops.c (OP_*): Accept "insn" and "extension" as arguments | |
475 | instead of using globals. | |
476 | ||
4d8ced6c JL |
477 | Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com) |
478 | ||
e5a7a537 JL |
479 | * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)" |
480 | ||
4d8ced6c JL |
481 | * simops.c: Fix thinkos in last change to "inc dn". |
482 | ||
61ecca95 JL |
483 | Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com) |
484 | ||
485 | * simops.c: "add imm,sp" does not effect the condition codes. | |
486 | "inc dn" does effect the condition codes. | |
487 | ||
e4e13022 JL |
488 | Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com) |
489 | ||
490 | * simops.c: Treat both operands as signed values for | |
491 | "div" instruction. | |
492 | ||
493 | * simops.c: Fix simulation of division instructions. | |
494 | Fix typos/thinkos in several "cmp" and "sub" instructions. | |
495 | ||
fcfaf40d JL |
496 | Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com) |
497 | ||
e4e13022 JL |
498 | * simops.c: Fix carry bit handling in "sub" and "cmp" |
499 | instructions. | |
500 | ||
fcfaf40d JL |
501 | * simops.c: Fix "mov imm8,an" and "mov imm16,dn". |
502 | ||
6db7fc49 JL |
503 | Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com) |
504 | ||
b7b89deb JL |
505 | * simops.c: Fix overflow computation for many instructions. |
506 | ||
e5a7a537 | 507 | * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)". |
af388638 | 508 | |
c8f0171f JL |
509 | * simops.c: Fix "mov am, dn". |
510 | ||
6db7fc49 JL |
511 | * simops.c: Fix more bugs in "add imm,an" and |
512 | "add imm,dn". | |
513 | ||
f5f13c1d JL |
514 | Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com) |
515 | ||
6e7a01c1 JL |
516 | * simops.c: Fix bugs in "movm" and "add imm,an". |
517 | ||
3bb3fe44 JL |
518 | * simops.c: Don't lose the upper 24 bits of the return |
519 | pointer in "call" and "calls" instructions. Rough cut | |
520 | at emulated system calls. | |
521 | ||
de0dce7c JL |
522 | * simops.c: Implement the remaining 5, 6 and 7 byte instructions. |
523 | ||
ecb4b5a3 JL |
524 | * simops.c: Implement remaining 4 byte instructions. |
525 | ||
526 | * simops.c: Implement remaining 3 byte instructions. | |
2e35551c | 527 | |
f5f13c1d JL |
528 | * simops.c: Implement remaining 2 byte instructions. Call |
529 | abort for instructions we're not implementing now. | |
530 | ||
73e65298 JL |
531 | Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com) |
532 | ||
707641f6 JL |
533 | * simops.c: Implement lots of random instructions. |
534 | ||
1f3bea21 JL |
535 | * simops.c: Implement "movm" and "bCC" insns. |
536 | ||
92284aaa JL |
537 | * mn10300_sim.h (_state): Add another register (MDR). |
538 | (REG_MDR): Define. | |
539 | * simops.c: Implement "cmp", "calls", "rets", "jmp" and | |
540 | a few additional random insns. | |
541 | ||
73e65298 JL |
542 | * mn10300_sim.h (PSW_*): Define for CC status tracking. |
543 | (REG_D0, REG_A0, REG_SP): Define. | |
544 | * simops.c: Implement "add", "addc" and a few other random | |
545 | instructions. | |
b5f831ac JL |
546 | |
547 | * gencode.c, interp.c: Snapshot current simulator code. | |
548 | ||
05ccbdfd JL |
549 | Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com) |
550 | ||
551 | * Makefile.in, config.in, configure, configure.in: New files. | |
552 | * gencode.c, interp.c, mn10300_sim.h, simops.c: New files. | |
553 |