]>
Commit | Line | Data |
---|---|---|
0a785507 | 1 | start-sanitize-am33 |
6ae1456e JL |
2 | Thu Jul 23 10:05:28 1998 Jeffrey A Law (law@cygnus.com) |
3 | ||
4b6651c9 JL |
4 | * am33.igen: Add some missing instructions. |
5 | ||
6ae1456e JL |
6 | * am33.igen: Autoincrement loads/store fixes. |
7 | ||
0a785507 JL |
8 | Tue Jul 21 09:48:14 1998 Jeffrey A Law (law@cygnus.com) |
9 | ||
6ae1456e JL |
10 | * am33.igen: Add mov_lCC DSP instructions. |
11 | ||
0a785507 JL |
12 | * am33.igen: Add most am33 DSP instructions. |
13 | ||
14 | end-sanitize-am33 | |
1f0ba346 JL |
15 | Thu Jul 9 10:06:55 1998 Jeffrey A Law (law@cygnus.com) |
16 | ||
4e86afb8 JL |
17 | * mn10300.igen: Fix Z bit for addc and subc instructions. |
18 | Minor fixes in multiply/divide patterns. | |
19 | ||
20 | start-sanitize-am33 | |
0a785507 JL |
21 | * am33.igen: Add missing mul[u] imm32,Rn. Fix condition code |
22 | handling for many instructions. Fix sign extension for some | |
23 | 24bit immediates. | |
24 | ||
080ee2ba JL |
25 | * am33.igen: Fix Z bit for remaining addc/subc instructions. |
26 | Do not sign extend immediate for mov imm,XRn. | |
27 | More random mul, mac & div fixes. | |
28 | Remove some unused variables. | |
29 | Sign extend 24bit displacement in memory addresses. | |
30 | ||
4e86afb8 JL |
31 | * am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn. Various |
32 | fixes to 2 register multiply, divide and mac instructions. Set | |
33 | Z,N correctly for sat16. Sign extend 24 bit immediate for add, | |
34 | and sub instructions. | |
35 | ||
1f0ba346 | 36 | * am33.igen: Add remaining non-DSP instructions. |
4e86afb8 | 37 | end-sanitize-am33 |
1f0ba346 | 38 | |
4e86afb8 | 39 | start-sanitize-am33 |
377e53bb JL |
40 | Wed Jul 8 16:29:12 1998 Jeffrey A Law (law@cygnus.com) |
41 | ||
9c55817e JL |
42 | * am33.igen (translate_rreg): New function. Use it as appropriate. |
43 | ||
377e53bb JL |
44 | * am33.igen: More am33 instructions. Fix "div". |
45 | ||
3e75ff7e JL |
46 | Mon Jul 6 15:39:22 1998 Jeffrey A Law (law@cygnus.com) |
47 | ||
d2b02ab2 JL |
48 | * mn10300.igen: Add am33 support. |
49 | ||
135431cd JL |
50 | * Makefile.in: Use multi-sim to support both a mn10300 and am33 |
51 | simulator. | |
52 | ||
3e75ff7e JL |
53 | * am33.igen: Add many more am33 instructions. |
54 | ||
55 | end-sanitize-am33 | |
de2adf70 JL |
56 | Wed Jul 1 17:07:09 1998 Jeffrey A Law (law@cygnus.com) |
57 | ||
58 | * mn10300_sim.h (FETCH24): Define. | |
0f7d7385 | 59 | |
de2adf70 JL |
60 | start-sanitize-am33 |
61 | * mn10300_sim.h: Add defines for some registers found on the AM33. | |
0f7d7385 | 62 | * am33.igen: New file with some am33 support. |
de2adf70 JL |
63 | end-sanitize-am33 |
64 | ||
a6cbaa65 JL |
65 | Tue Jun 30 11:23:20 1998 Jeffrey A Law (law@cygnus.com) |
66 | ||
67 | * mn10300_sim.h: Include bfd.h | |
68 | (struct state): Add more room for processor specific registers. | |
69 | start-sanitize-am33 | |
70 | (REG_E0): Define. | |
71 | end-sanitize-am33 | |
72 | ||
f0ce242f | 73 | start-sanitize-am30 |
5eb78d70 JJ |
74 | Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com> |
75 | ||
76 | * dv-mn103tim.c: Include sim-assert.h | |
77 | * dv-mn103ser.c (do_polling_event): Check for incoming data on | |
78 | serial line and schedule next polling event. | |
79 | (read_status_reg): schedule events to check for incoming data on | |
80 | serial line and issue interrupt if necessary. | |
81 | ||
82 | Fri Jun 19 16:47:27 1998 Joyce Janczyn <janczyn@cygnus.com> | |
83 | ||
84 | * interp.c (sim_open): hook up serial 1 and 2 ports properly (typo). | |
85 | ||
0df90cd8 JJ |
86 | Fri Jun 19 11:59:26 1998 Joyce Janczyn <janczyn@cygnus.com> |
87 | ||
88 | * interp.c (board): Rename am32 to stdeval1 as this is the name | |
89 | consistently used to refer to the mn1030002 board. | |
90 | ||
f0ce242f JJ |
91 | Thu June 18 14:37:14 1998 Joyce Janczyn <janczyn@cygnus.com> |
92 | * interp.c (sim_open): Fix typo in address of EXTMD register | |
93 | (0x34000280, not 0x3400280). | |
94 | ||
95 | end-sanitize-am30 | |
96 | Wed Jun 17 18:00:18 1998 Jeffrey A Law (law@cygnus.com) | |
97 | ||
98 | * simops.c (syscall): Handle change in opcode # for syscall. | |
99 | * mn10300.igen (syscall): Likewise. | |
100 | ||
8c2de2aa | 101 | start-sanitize-am30 |
f14defcc JJ |
102 | Tue June 16 09:36:21 1998 Joyce Janczyn <janczyn@cygnus.com> |
103 | * dv-mn103int.c (mn103int_finish): Regular interrupts (not NMI or | |
104 | reset) are not enabled on reset. | |
105 | ||
2a62f119 | 106 | Sun June 14 17:04:00 1998 Joyce Janczyn <janczyn@cygnus.com> |
f0ce242f JJ |
107 | * dv-mn103iop.c (write_*_reg): Check for attempt to write r/o |
108 | register bits. | |
109 | * dv-mn103ser.c: Fill in methods for reading and writing to serial | |
110 | device registers. | |
2a62f119 JJ |
111 | * interp.c (sim_open): Make the serial device a polling device. |
112 | ||
55a7ce4e JJ |
113 | Fri June 12 16:24:00 1998 Joyce Janczyn <janczyn@cygnus.com> |
114 | * dv-mn103iop.c: New file for handling am32 io ports. | |
115 | * configure.in: Add mn103iop to hw_device list. | |
116 | * configure: Re-generate. | |
117 | * interp.c (sim_open): Create io port device. | |
118 | ||
8c2de2aa JJ |
119 | Wed June 10 14:34:00 1998 Joyce Janczyn <janczyn@cygnus.com> |
120 | * dv-mn103int.c (external_group): Use enumerated types to access | |
121 | correct group addresses. | |
122 | * dv-mn103tim.c (do_counter_event): Underflow of cascaded timer | |
123 | triggers an interrupt on the higher-numbered timer's port. | |
124 | ||
125 | end-sanitize-am30 | |
d3f76d42 JJ |
126 | Mon June 8 13:30:00 1998 Joyce Janczyn <janczyn@cygnus.com> |
127 | * interp.c: (mn10300_option_handler): New function parses arguments | |
128 | using sim-options. | |
39e953a7 | 129 | start-sanitize-am30 |
d3f76d42 JJ |
130 | * (board): Add --board option for specifying am32. |
131 | * (sim_open): Create new timer and serial devices and control | |
132 | configuration of other am32 devices via board option. | |
133 | * dv-mn103tim.c, dv-mn103ser.c: New files for timers and serial devices. | |
134 | * dv-mn103cpu.c: Fix typos in opening comments. | |
135 | * dv-mn103int.c: Adjust interrupt controller settings for am32 instead of am30. | |
136 | * configure.in: Add mn103tim and mn103ser to hw_device list. | |
137 | * configure: Re-generate. | |
138 | end-sanitize-am30 | |
139 | ||
140 | start-sanitize-am30 | |
141 | Mon May 25 20:50:35 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
142 | ||
143 | * dv-mn103int.c, dv-mn103cpu.c: Rename *_callback to *_method. | |
144 | ||
145 | * dv-mn103cpu.c, dv-mn103int.c: Include hw-main.h and | |
146 | sim-main.h. Declare a struct hw_descriptor instead of struct | |
147 | hw_device_descriptor. | |
148 | ||
39e953a7 AC |
149 | Mon May 25 17:33:33 1998 Andrew Cagney <cagney@b1.cygnus.com> |
150 | ||
151 | * dv-mn103cpu.c (struct mn103cpu): Change type of pending_handler | |
152 | to struct hw_event. | |
153 | ||
f872d0d6 AC |
154 | Fri May 22 12:17:41 1998 Andrew Cagney <cagney@b1.cygnus.com> |
155 | ||
156 | * configure.in (SIM_AC_OPTION_HARDWARE): Add argument "yes". | |
157 | ||
26feb3a8 AC |
158 | Wed May 6 13:29:06 1998 Andrew Cagney <cagney@b1.cygnus.com> |
159 | ||
160 | * interp.c (sim_open): Create a polling PAL device. | |
161 | ||
162 | end-sanitize-am30 | |
163 | Fri May 1 16:39:15 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
164 | ||
165 | * dv-mn103int.c (mn103int_port_event): | |
166 | (mn103int_port_event): | |
167 | (mn103int_io_read_buffer): | |
168 | (mn103int_io_write_buffer): | |
169 | ||
170 | * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Drop CPU/CIA args. | |
171 | (mn103cpu_port_event): Ditto. | |
172 | (mn103cpu_io_read_buffer): Ditto. | |
173 | (mn103cpu_io_write_buffer): Ditto. | |
174 | ||
9d45df1b GN |
175 | Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com> |
176 | ||
177 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
178 | ||
5da9ce07 TT |
179 | Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche> |
180 | ||
181 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
182 | * config.in: Ditto. | |
183 | ||
184 | Sun Apr 26 15:19:55 1998 Tom Tromey <tromey@cygnus.com> | |
185 | ||
186 | * acconfig.h: New file. | |
187 | * configure.in: Reverted change of Apr 24; use sinclude again. | |
188 | ||
b1df34b9 TT |
189 | Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche> |
190 | ||
191 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
192 | * config.in: Ditto. | |
193 | ||
194 | Fri Apr 24 11:19:07 1998 Tom Tromey <tromey@cygnus.com> | |
195 | ||
196 | * configure.in: Don't call sinclude. | |
197 | ||
1e23866b AC |
198 | Tue Apr 14 10:03:02 1998 Andrew Cagney <cagney@b1.cygnus.com> |
199 | ||
b1df34b9 TT |
200 | * mn10300_sim.h: Declare all functions in op_utils.c using |
201 | INLINE_SIM_MAIN. | |
202 | * op_utils.c: Ditto. | |
203 | * sim-main.c: New file. Include op_utils.c. | |
204 | ||
1e23866b AC |
205 | * mn10300.igen (mov, cmp): Use new igen operators `!' and `=' to |
206 | differentiate between MOV/CMP immediate/register instructions. | |
207 | ||
208 | * configure.in (SIM_AC_OPTION_INLINE): Add and enable. | |
209 | * configure: Regenerate. | |
210 | ||
278bda40 AC |
211 | Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com> |
212 | ||
213 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
214 | ||
215 | start-sanitize-am30 | |
216 | Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
217 | ||
218 | * interp.c (hw): Delete variable, moved to SIM_DESC. | |
219 | (sim_open): Delete calls to hw_tree_create, hw_tree_finish. | |
220 | Handled by sim-module. | |
221 | (sim_open): Do not anotate tree with trace properties, handled by | |
222 | sim-hw.c | |
223 | (sim_open): Call sim_hw_parse instead of hw_tree_parse. | |
224 | ||
225 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
226 | ||
227 | end-sanitize-am30 | |
6d133cc9 AC |
228 | start-sanitize-am30 |
229 | Thu Mar 26 20:46:18 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk> | |
230 | ||
231 | * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Save the entire PC | |
232 | on the stack when delivering interrupts (not just the lower | |
233 | half)... | |
234 | * mn10300.igen (mov (Di,Am),Dn): Fix decode. Registers were | |
235 | specified in the wrong order. | |
236 | ||
237 | end-sanitize-am30 | |
238 | start-sanitize-am30 | |
1b756ba6 AC |
239 | Fri Mar 27 00:56:40 1998 Andrew Cagney <cagney@b1.cygnus.com> |
240 | ||
241 | * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Stop loss of | |
242 | succeeding interrupts, clear pending_handler when the handler | |
243 | isn't re-scheduled. | |
244 | ||
6d133cc9 | 245 | end-sanitize-am30 |
abf6ba25 SG |
246 | Thu Mar 26 10:11:01 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk> |
247 | ||
248 | * Makefile.in (tmp-igen): Prefix all usage of move-if-change | |
249 | script with $(SHELL) to make NT native builds happy. | |
250 | * configure: Regenerate because of change to ../common/aclocal.m4. | |
251 | ||
51ccd82f AC |
252 | Thu Mar 26 11:22:31 1998 Andrew Cagney <cagney@b1.cygnus.com> |
253 | ||
254 | * configure.in: Make --enable-sim-common the default. | |
255 | * configure: Re-generate. | |
256 | ||
257 | * sim-main.h (CIA_GET, CIA_SET): Save/restore current instruction | |
258 | address into Sate.regs[REG_PC] instead of common struct. | |
259 | ||
d1607ed3 JJ |
260 | Wed Mar 25 17:42:00 1998 Joyce Janczyn <janczyn@cygnus.com> |
261 | ||
262 | * mn10300.igen (cmp imm8,An): Do not sign extend imm8 value. | |
263 | ||
52ef605e JJ |
264 | Wed Mar 25 12:08:00 1998 Joyce Janczyn <janczyn@cygnus.com> |
265 | ||
266 | * simops.c (OP_F0FD): Initialise variable 'sp'. | |
267 | ||
6d133cc9 | 268 | start-sanitize-am30 |
c357e16a AC |
269 | Thu Mar 26 00:21:32 1998 Andrew Cagney <cagney@b1.cygnus.com> |
270 | ||
271 | * dv-mn103int.c (decode_group): A group register every 4 bytes not | |
272 | 8. | |
273 | (write_icr): Rewrite equation updating request field. | |
274 | (read_iagr): Fix check that interrupt is still pending. | |
275 | ||
6d133cc9 AC |
276 | end-sanitize-am30 |
277 | start-sanitize-am30 | |
8077fed5 AC |
278 | Wed Mar 25 16:14:50 1998 Andrew Cagney <cagney@b1.cygnus.com> |
279 | ||
280 | * interp.c (sim_open): Tidy up device creation. | |
281 | ||
282 | * dv-mn103int.c (mn103int_port_event): Drive NMI with non-zero | |
283 | value. | |
284 | (mn103int_io_read_buffer): Convert absolute address to register | |
285 | block offsets. | |
286 | (read_icr, write_icr): Convert block offset into group offset. | |
287 | ||
6d133cc9 | 288 | end-sanitize-am30 |
6100784a AC |
289 | Wed Mar 25 15:08:49 1998 Andrew Cagney <cagney@b1.cygnus.com> |
290 | ||
291 | * interp.c (sim_open): Create second 1mb memory region at | |
292 | 0x40000000. | |
293 | (sim_open): Create a device tree. | |
294 | (sim-hw.h): Include. | |
6d133cc9 | 295 | start-sanitize-am30 |
6100784a AC |
296 | (do_interrupt): Delete, needs to use dv-mn103cpu.c |
297 | ||
298 | * dv-mn103int.c, dv-mn103cpu.c: New files. | |
6d133cc9 | 299 | end-sanitize-am30 |
6100784a | 300 | |
8388c9a5 AC |
301 | Wed Mar 25 08:47:38 1998 Andrew Cagney <cagney@b1.cygnus.com> |
302 | ||
303 | * mn10300_sim.h (EXTRACT_PSW_LM, INSERT_PSW_LM, PSW_IE, PSW_LM): | |
304 | Define. | |
305 | (SP): Define. | |
306 | ||
d89fa2d8 AC |
307 | Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com> |
308 | ||
309 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
310 | ||
e855e576 AC |
311 | Wed Mar 25 10:24:48 1998 Andrew Cagney <cagney@b1.cygnus.com> |
312 | ||
313 | * interp.c (sim-options.h): Include. | |
314 | (sim_kind, myname): Declare when not using common framework. | |
315 | ||
316 | * mn10300_sim.h (do_syscall, generic*): Provide prototypes for | |
317 | functions found in op_utils.c | |
318 | ||
319 | * mn10300.igen (add): Discard unused variables. | |
320 | ||
321 | * configure, config.in: Re-generate with autoconf 2.12.1. | |
322 | ||
55045e7b JJ |
323 | Tue Mar 24 15:27:00 1998 Joyce Janczyn <janczyn@cygnus.com> |
324 | ||
325 | Add support for --enable-sim-common option. | |
326 | * Makefile.in (WITHOUT_COMMON_OBJS): Files included if | |
327 | ! --enable-sim-common | |
328 | (WITH_COMMON_OBJS): Files included if --enable-sim-common. | |
329 | (MN10300_OBJS,MN10300_INTERP_DEP): New variables. | |
330 | (SIM_OBJS): Rewrite. | |
331 | ({WITHOUT,WITH}_COMMON_RUN_OBJS,SIM_RUN_OBJS): New variables. | |
332 | (SIM_EXTRA_CFLAGS): New variable. | |
333 | (clean-extra): Clean up igen files. | |
334 | (../igen/igen,clean-igen,tmp-igen): New rules. | |
335 | * configure.in: Add support for common framework via | |
336 | --enable-sim-common. | |
337 | * configure: Regenerate. | |
338 | * interp.c: #include sim-main if WITH_COMMON, not mn10300_sim.h. | |
339 | (hash,dispatch,sim_size): Don't compile if ! WITH_COMMON. | |
340 | (init_system,sim_write,compare_simops): Likewise. | |
341 | (sim_set_profile,sim_set_profile_size): Likewise. | |
342 | (sim_stop,sim_resume,sim_trace,sim_info): Likewise. | |
343 | (sim_set_callbacks,sim_stop_reason,sim_read,sim_load): Likewise. | |
344 | (enum interrupt_type): New enum. | |
345 | (interrupt_names): New global. | |
346 | (do_interrupt): New function. | |
347 | (sim_open): Define differently if WITH_COMMON. | |
348 | (sim_close,sim_create_inferior,sim_do_command): Likewise. | |
349 | * mn10300_sim.h ({load,store}_{byte,half,word}): Define versions | |
350 | for WITH_COMMON. | |
351 | * mn10300.igen: New file. | |
352 | * mn10300.dc: New file. | |
353 | * op_utils.c: New file. | |
354 | * sim-main.h: New file. | |
355 | ||
356 | Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
357 | ||
358 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
359 | ||
360 | Fri Feb 27 18:36:04 1998 Jeffrey A Law (law@cygnus.com) | |
361 | ||
362 | * simops.c (inc): Fix typo. | |
363 | ||
097e6924 JL |
364 | Wed Feb 25 01:59:29 1998 Jeffrey A Law (law@cygnus.com) |
365 | ||
366 | * simops.c (signed multiply instructions): Cast input operands to | |
367 | signed32 before casting them to signed64 so that the sign bit | |
368 | is propagated properly. | |
369 | ||
a9faef12 MA |
370 | Mon Feb 23 20:23:19 1998 Mark Alexander <marka@cygnus.com> |
371 | ||
372 | * Makefile.in: Last change was bad. Define NL_TARGET | |
373 | so that targ-vals.h will be used instead of syscall.h. | |
374 | * simops.c: Use targ-vals.h instead of syscall.h. | |
375 | (OP_F020): Disable unsupported system calls. | |
376 | ||
e04b0d76 MA |
377 | Mon Feb 23 09:44:38 1998 Mark Alexander <marka@cygnus.com> |
378 | ||
379 | * Makefile.in: Get header files from libgloss/mn10300/sys. | |
380 | ||
7eab31b7 JL |
381 | Sun Feb 22 16:02:24 1998 Jeffrey A Law (law@cygnus.com) |
382 | ||
383 | * simops.c: Include sim-types.h. | |
384 | ||
385 | Wed Feb 18 13:07:08 1998 Jeffrey A Law (law@cygnus.com) | |
386 | ||
387 | * simops.c (multiply instructions): Cast input operands to a | |
388 | signed64/unsigned64 type as appropriate. | |
389 | ||
fbb8b6b9 AC |
390 | Tue Feb 17 12:47:16 1998 Andrew Cagney <cagney@b1.cygnus.com> |
391 | ||
392 | * interp.c (sim_store_register, sim_fetch_register): Pass in | |
393 | length parameter. Return -1. | |
394 | ||
395 | Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
396 | ||
397 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
398 | ||
412c4e94 AC |
399 | Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> |
400 | ||
401 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
402 | ||
462cfbc4 DE |
403 | Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> |
404 | ||
405 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
406 | ||
407 | Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
408 | ||
409 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
410 | * config.in: Ditto. | |
411 | ||
412 | Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> | |
413 | ||
414 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
415 | ||
416 | Tue Nov 11 10:38:52 1997 Jeffrey A Law (law@cygnus.com) | |
417 | ||
418 | * simops.c (call:16 call:32): Stack adjustment is determined solely | |
419 | by the imm8 field. | |
420 | ||
9e03a68f AC |
421 | Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com> |
422 | ||
b5da31ac | 423 | * interp.c (sim_load): Pass lma_p and sim_write args to |
9e03a68f AC |
424 | sim_load_file. |
425 | ||
f4ab2b2f JL |
426 | Tue Oct 21 10:12:03 1997 Jeffrey A Law (law@cygnus.com) |
427 | ||
428 | * simops.c: Correctly handle register restores for "ret" and "retf" | |
429 | instructions. | |
430 | ||
431 | Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
432 | ||
433 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
434 | ||
435 | Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
436 | ||
437 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
438 | ||
92f91d1f AC |
439 | Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> |
440 | ||
441 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
442 | ||
794e9ac9 AC |
443 | Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> |
444 | ||
445 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
446 | ||
b45caf05 AC |
447 | Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> |
448 | ||
449 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
450 | ||
451 | Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
452 | ||
453 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
454 | ||
6fea4763 DE |
455 | Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> |
456 | ||
457 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
458 | ||
88117054 AC |
459 | Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
460 | ||
461 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
462 | * config.in: Ditto. | |
463 | ||
7230ff0f AC |
464 | Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com> |
465 | ||
466 | * interp.c (sim_kill): Delete. | |
fafce69a AC |
467 | (sim_create_inferior): Add ABFD argument. |
468 | (sim_load): Move setting of PC from here. | |
469 | (sim_create_inferior): To here. | |
7230ff0f | 470 | |
247fccde AC |
471 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
472 | ||
473 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
474 | * config.in: Ditto. | |
475 | ||
476 | Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
477 | ||
478 | * interp.c (sim_open): Add ABFD argument. | |
479 | ||
480 | Tue Jun 24 13:46:20 1997 Jeffrey A Law (law@cygnus.com) | |
481 | ||
482 | * interp.c (sim_resume): Clear State.exited. | |
483 | (sim_stop_reason): If State.exited is nonzero, then indicate that | |
484 | the simulator exited instead of stopped. | |
485 | * mn10300_sim.h (struct _state): Add exited field. | |
486 | * simops.c (syscall): Set State.exited for SYS_exit. | |
487 | ||
c370b3cd JL |
488 | Wed Jun 11 22:07:56 1997 Jeffrey A Law (law@cygnus.com) |
489 | ||
490 | * simops.c: Fix thinko in last change. | |
491 | ||
0a8fa63c JL |
492 | Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com) |
493 | ||
dbdb5bd8 JL |
494 | * simops.c: "call" stores the callee saved registers into the |
495 | stack! Update the stack pointer properly when done with | |
496 | register saves. | |
497 | ||
0a8fa63c JL |
498 | * simops.c: Fix return address computation for "call" instructions. |
499 | ||
500 | Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com) | |
501 | ||
502 | * interp.c (sim_open): Fix typo. | |
503 | ||
09e142d5 JL |
504 | Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com) |
505 | ||
506 | * interp.c (sim_resume): Add missing case in big switch | |
507 | statement (for extb instruction). | |
508 | ||
003c91be JL |
509 | Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com) |
510 | ||
511 | * interp.c: Replace all references to load_mem and store_mem | |
512 | with references to load_byte, load_half, load_3_byte, load_word | |
513 | and store_byte, store_half, store_3_byte, store_word. | |
514 | (INLINE): Delete definition. | |
515 | (load_mem_big): Likewise. | |
516 | (max_mem): Make it global. | |
517 | (dispatch): Make this function inline. | |
518 | (load_mem, store_mem): Delete functions. | |
519 | * mn10300_sim.h (INLINE): Define. | |
520 | (RLW): Delete unused definition. | |
521 | (load_mem, store_mem): Delete declarations. | |
522 | (load_mem_big): New definition. | |
523 | (load_byte, load_half, load_3_byte, load_word): New functions. | |
524 | (store_byte, store_half, store_3_byte, store_word): New functions. | |
525 | * simops.c: Replace all references to load_mem and store_mem | |
526 | with references to load_byte, load_half, load_3_byte, load_word | |
527 | and store_byte, store_half, store_3_byte, store_word. | |
528 | ||
529 | Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
530 | ||
531 | * interp.c (sim_open): Add callback to arguments. | |
532 | (sim_set_callbacks): Delete SIM_DESC argument. | |
533 | ||
4df7aeb3 JL |
534 | Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com) |
535 | ||
536 | * interp.c (dispatch): Make this an inline function. | |
537 | ||
538 | * simops.c (syscall): Use callback->write regardless of | |
539 | what file descriptor we're writing too. | |
540 | ||
b07a1e78 JL |
541 | Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com) |
542 | ||
543 | * interp.c (load_mem_big): Remove function. It's now a macro | |
544 | defined elsewhere. | |
545 | (compare_simops): New function. | |
546 | (sim_open): Sort the Simops table before inserting entries | |
547 | into the hash table. | |
548 | * mn10300_sim.h: Remove unused #defines. | |
549 | (load_mem_big): Define. | |
550 | ||
234a9a49 JL |
551 | Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com) |
552 | ||
553 | * interp.c (load_mem): If we get a load from an out of range | |
554 | address, abort. | |
555 | (store_mem): Likewise for stores. | |
556 | (max_mem): New variable. | |
557 | ||
baa83bcc JL |
558 | Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com) |
559 | ||
8def9220 JL |
560 | * mn10300_sim.h: Fix ordering of bits in the PSW. |
561 | ||
baa83bcc JL |
562 | * interp.c: Improve hashing routine to avoid long list |
563 | traversals for common instructions. Add HASH_STAT support. | |
564 | Rewrite opcode dispatch code using a big switch instead of | |
565 | cascaded if/else statements. Avoid useless calls to load_mem. | |
566 | ||
26e9f63c JL |
567 | Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com) |
568 | ||
569 | * mn10300_sim.h (struct _state): Add space for mdrq register. | |
570 | (REG_MDRQ): Define. | |
571 | * simops.c: Don't abort for trap. Add support for the extended | |
572 | instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24", | |
573 | and "bsch". | |
574 | ||
575 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> | |
576 | ||
577 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
578 | ||
8517f62b AC |
579 | Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com> |
580 | ||
581 | * interp.c (sim_stop): Add stub function. | |
582 | ||
6cc6987e DE |
583 | Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com> |
584 | ||
585 | * Makefile.in (SIM_OBJS): Add sim-load.o. | |
586 | * interp.c (sim_kind, myname): New static locals. | |
587 | (sim_open): Set sim_kind, myname. Ignore -E arg. | |
588 | (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to | |
589 | load file into simulator. Set start address from bfd. | |
590 | (sim_create_inferior): Return SIM_RC. Delete arg start_address. | |
591 | ||
87e43259 AC |
592 | Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com> |
593 | ||
594 | * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime | |
595 | only include if implemented by host. | |
596 | (OP_F020): Typecast arg passed to time function; | |
597 | ||
598 | Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com) | |
599 | ||
600 | * simops.c (syscall): Handle new mn10300 calling conventions. | |
601 | ||
08db4a65 AC |
602 | Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
603 | ||
604 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
605 | * config.in: Ditto. | |
606 | ||
ea553f56 ILT |
607 | Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com> |
608 | ||
609 | * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match | |
610 | corresponding change in opcodes directory. | |
611 | ||
fbda74b1 DE |
612 | Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> |
613 | ||
8a7c3105 DE |
614 | * interp.c (sim_open): New arg `kind'. |
615 | ||
fbda74b1 DE |
616 | * configure: Regenerated to track ../common/aclocal.m4 changes. |
617 | ||
a35e91c3 AC |
618 | Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
619 | ||
620 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
621 | ||
622 | Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com) | |
623 | ||
624 | * simops.c: Fix register extraction for a two "movbu" variants. | |
625 | Somewhat simplify "sub" instructions. | |
626 | Correctly sign extend operands for "mul". Put the correct | |
627 | half of the result in MDR for "mul" and "mulu". | |
628 | Implement remaining instructions. | |
629 | Tweak opcode for "syscall". | |
630 | ||
631 | Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com) | |
632 | ||
633 | * simops.c: Do syscall emulation in "syscall" instruction. Add | |
634 | dummy "trap" instruction. | |
635 | ||
c695046a AC |
636 | Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
637 | ||
638 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
639 | ||
a77aa7ec AC |
640 | Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
641 | ||
642 | * configure: Re-generate. | |
643 | ||
601fb8ae MM |
644 | Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com> |
645 | ||
646 | * configure: Regenerate to track ../common/aclocal.m4 changes. | |
647 | ||
53b9417e DE |
648 | Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com> |
649 | ||
650 | * interp.c (sim_open): New SIM_DESC result. Argument is now | |
651 | in argv form. | |
652 | (other sim_*): New SIM_DESC argument. | |
653 | ||
09eef8af JL |
654 | Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com) |
655 | ||
0ade484f JL |
656 | * simops.c: Fix carry bit computation for "add" instructions. |
657 | ||
09eef8af JL |
658 | * simops.c: Fix typos in bset insns. Fix arguments to store_mem |
659 | for bset imm8,(d8,an) and bclr imm8,(d8,an). | |
660 | ||
661 | Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com) | |
662 | ||
663 | * simops.c: Fix register references when computing Z and N bits | |
664 | for lsr imm8,dn. | |
665 | ||
666 | Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com> | |
667 | ||
668 | * Makefile.in (@COMMON_MAKEFILE_FRAG): Use | |
669 | COMMON_{PRE,POST}_CONFIG_FRAG instead. | |
670 | * configure.in: sinclude ../common/aclocal.m4. | |
671 | * configure: Regenerated. | |
672 | ||
018f9eb4 JL |
673 | Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com) |
674 | ||
675 | * interp.c (init_system): Allocate 2^19 bytes of space for the | |
676 | simulator. | |
677 | ||
295dbbe4 SG |
678 | Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com) |
679 | ||
680 | * configure configure.in Makefile.in: Update to new configure | |
681 | scheme which is more compatible with WinGDB builds. | |
682 | * configure.in: Improve comment on how to run autoconf. | |
683 | * configure: Re-run autoconf to get new ../common/aclocal.m4. | |
684 | * Makefile.in: Use autoconf substitution to install common | |
685 | makefile fragment. | |
686 | ||
f95251f0 JL |
687 | Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com) |
688 | ||
689 | * simops.c: Undo last change to "rol" and "ror", original code | |
690 | was correct! | |
691 | ||
b4b290a0 JL |
692 | Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com) |
693 | ||
694 | * simops.c: Fix "rol" and "ror". | |
695 | ||
696 | Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com) | |
697 | ||
698 | * simops.c: Fix typo in last change. | |
699 | ||
2da0bc1b JL |
700 | Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com) |
701 | ||
702 | * simops.c: Use REG macros in few places not using them yet. | |
703 | ||
bbd17062 JL |
704 | Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com) |
705 | ||
706 | * mn10300_sim.h (struct _state): Fix number of registers! | |
707 | ||
b774c0e4 JL |
708 | Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com) |
709 | ||
710 | * mn10300_sim.h (struct _state): Put all registers into a single | |
711 | array to make gdb implementation easier. | |
712 | (REG_*): Add definitions for all registers in the state array. | |
713 | (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros. | |
714 | * simops.c: Related changes. | |
715 | ||
d657034d JL |
716 | Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com) |
717 | ||
718 | * interp.c (sim_resume): Handle 0xff as a single byte insn. | |
719 | ||
720 | * simops.c: Fix overflow computation for "add" and "inc" | |
721 | instructions. | |
722 | ||
16d2e2b6 JL |
723 | Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com) |
724 | ||
093e9a32 JL |
725 | * simops.c: Handle "break" instruction. |
726 | ||
16d2e2b6 JL |
727 | * simops.c: Fix restoring the PC for "ret" and "retf" instructions. |
728 | ||
729 | Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com) | |
730 | ||
731 | * gencode.c (write_opcodes): Also write out the format of the | |
732 | opcode. | |
733 | * mn10300_sim.h (simops): Add "format" field. | |
734 | * interp.c (sim_resume): Deal with endianness issues here. | |
735 | ||
95d18eb7 JL |
736 | Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com) |
737 | ||
738 | * simops.c (REG0_4): Define. | |
739 | Use REG0_4 for indexed loads/stores. | |
740 | ||
2e8f4133 JL |
741 | Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com) |
742 | ||
743 | * simops.c (REG0_16): Fix typo. | |
744 | ||
d2523010 JL |
745 | Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com) |
746 | ||
b2f7a7e5 JL |
747 | * simops.c: Call abort for any instruction that's not currently |
748 | simulated. | |
749 | ||
9f4a551e JL |
750 | * simops.c: Define accessor macros to extract register |
751 | values from instructions. Use them consistently. | |
752 | ||
7c52bf32 JL |
753 | * interp.c: Delete unused global variable "OP". |
754 | (sim_resume): Remove unused variable "opcode". | |
755 | * simops.c: Fix some uninitialized variable problems, add | |
756 | parens to fix various -Wall warnings. | |
757 | ||
d2523010 JL |
758 | * gencode.c (write_header): Add "insn" and "extension" arguments |
759 | to the OP_* declarations. | |
760 | (write_template): Similarly for function templates. | |
761 | * interp.c (insn, extension): Remove global variables. Instead | |
762 | pass them as arguments to the OP_* functions. | |
763 | * mn10300_sim.h: Remove decls for "insn" and "extension". | |
764 | * simops.c (OP_*): Accept "insn" and "extension" as arguments | |
765 | instead of using globals. | |
766 | ||
4d8ced6c JL |
767 | Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com) |
768 | ||
e5a7a537 JL |
769 | * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)" |
770 | ||
4d8ced6c JL |
771 | * simops.c: Fix thinkos in last change to "inc dn". |
772 | ||
61ecca95 JL |
773 | Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com) |
774 | ||
775 | * simops.c: "add imm,sp" does not effect the condition codes. | |
776 | "inc dn" does effect the condition codes. | |
777 | ||
e4e13022 JL |
778 | Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com) |
779 | ||
780 | * simops.c: Treat both operands as signed values for | |
781 | "div" instruction. | |
782 | ||
783 | * simops.c: Fix simulation of division instructions. | |
784 | Fix typos/thinkos in several "cmp" and "sub" instructions. | |
785 | ||
fcfaf40d JL |
786 | Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com) |
787 | ||
e4e13022 JL |
788 | * simops.c: Fix carry bit handling in "sub" and "cmp" |
789 | instructions. | |
790 | ||
fcfaf40d JL |
791 | * simops.c: Fix "mov imm8,an" and "mov imm16,dn". |
792 | ||
6db7fc49 JL |
793 | Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com) |
794 | ||
b7b89deb JL |
795 | * simops.c: Fix overflow computation for many instructions. |
796 | ||
e5a7a537 | 797 | * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)". |
af388638 | 798 | |
c8f0171f JL |
799 | * simops.c: Fix "mov am, dn". |
800 | ||
6db7fc49 JL |
801 | * simops.c: Fix more bugs in "add imm,an" and |
802 | "add imm,dn". | |
803 | ||
f5f13c1d JL |
804 | Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com) |
805 | ||
6e7a01c1 JL |
806 | * simops.c: Fix bugs in "movm" and "add imm,an". |
807 | ||
3bb3fe44 JL |
808 | * simops.c: Don't lose the upper 24 bits of the return |
809 | pointer in "call" and "calls" instructions. Rough cut | |
810 | at emulated system calls. | |
811 | ||
de0dce7c JL |
812 | * simops.c: Implement the remaining 5, 6 and 7 byte instructions. |
813 | ||
ecb4b5a3 JL |
814 | * simops.c: Implement remaining 4 byte instructions. |
815 | ||
816 | * simops.c: Implement remaining 3 byte instructions. | |
2e35551c | 817 | |
f5f13c1d JL |
818 | * simops.c: Implement remaining 2 byte instructions. Call |
819 | abort for instructions we're not implementing now. | |
820 | ||
73e65298 JL |
821 | Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com) |
822 | ||
707641f6 JL |
823 | * simops.c: Implement lots of random instructions. |
824 | ||
1f3bea21 JL |
825 | * simops.c: Implement "movm" and "bCC" insns. |
826 | ||
92284aaa JL |
827 | * mn10300_sim.h (_state): Add another register (MDR). |
828 | (REG_MDR): Define. | |
829 | * simops.c: Implement "cmp", "calls", "rets", "jmp" and | |
830 | a few additional random insns. | |
831 | ||
73e65298 JL |
832 | * mn10300_sim.h (PSW_*): Define for CC status tracking. |
833 | (REG_D0, REG_A0, REG_SP): Define. | |
834 | * simops.c: Implement "add", "addc" and a few other random | |
835 | instructions. | |
b5f831ac JL |
836 | |
837 | * gencode.c, interp.c: Snapshot current simulator code. | |
838 | ||
05ccbdfd JL |
839 | Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com) |
840 | ||
841 | * Makefile.in, config.in, configure, configure.in: New files. | |
842 | * gencode.c, interp.c, mn10300_sim.h, simops.c: New files. | |
843 |