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Commit | Line | Data |
---|---|---|
24a39d88 AO |
1 | 2000-05-18 Alexandre Oliva <aoliva@cygnus.com> |
2 | ||
3 | * mn10300_sim.h (genericAdd, genericSub, genericCmp, genericOr, | |
4 | genericXor, genericBtst): Use `unsigned32'. | |
5 | * op_utils.c: Likewise. | |
6 | * mn10300.igen, am33.igen: Use `unsigned32', `signed32', | |
7 | `unsigned64' or `signed64' where type width is relevant. | |
8 | ||
bfa8561f AO |
9 | 2000-04-25 Alexandre Oliva <aoliva@cygnus.com> |
10 | ||
11 | * am33.igen (inc4 Rn): Use genericAdd so as to modify flags. | |
12 | ||
d8e7020f AO |
13 | 2000-04-09 Alexandre Oliva <aoliva@cygnus.com> |
14 | ||
15 | * am33.igen: Make SP-relative offsets unsigned. Add `*am33' for | |
16 | some instructions that were missing it. | |
17 | ||
a9e3a739 FCE |
18 | 2000-03-03 Alexandre Oliva <oliva@lsd.ic.unicamp.br> |
19 | ||
20 | * Makefile.in (IGEN_INSN): Added am33.igen. | |
21 | ||
d4f3574e SS |
22 | Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> |
23 | ||
24 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
25 | ||
adf40b2e JM |
26 | Tue Jul 13 13:26:20 1999 Andrew Cagney <cagney@b1.cygnus.com> |
27 | ||
28 | * interp.c: Clarify error message reporting an unknown board. | |
29 | ||
cd0fc7c3 SS |
30 | 1999-05-08 Felix Lee <flee@cygnus.com> |
31 | ||
32 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
33 | ||
7a292a7a SS |
34 | 1999-04-16 Frank Ch. Eigler <fche@cygnus.com> |
35 | ||
36 | * interp.c (program_interrupt): Detect undesired recursion using | |
37 | static flag. Set NMIRC register's SYSEF flag during | |
38 | --board=stdeval1 mode. | |
39 | * dv-mn103-int.c (write_icr): Add backdoor address to allow CPU to | |
40 | set SYSEF flag. | |
41 | ||
42 | 1999-04-02 Keith Seitz <keiths@cygnus.com> | |
43 | ||
44 | * Makefile.in (SIM_EXTRA_CFLAGS): Define a POLL_QUIT_INTERVAL | |
45 | for use in the simulator so that the poll_quit callback is | |
46 | not called too often. | |
47 | ||
48 | Tue Mar 9 21:26:41 1999 Andrew Cagney <cagney@b1.cygnus.com> | |
49 | ||
50 | * dv-mn103int.c (mn103int_ioctl): Return something. | |
51 | * dv-mn103tim.c (write_tm6md): GCC suggested parentheses around && | |
52 | within ||. | |
53 | ||
54 | Tue Feb 16 23:57:17 1999 Jeffrey A Law (law@cygnus.com) | |
55 | ||
56 | * mn10300.igen (retf): Fix return address computation and store | |
57 | the new pc value into nia. | |
58 | ||
c906108c SS |
59 | 1998-12-29 Frank Ch. Eigler <fche@cygnus.com> |
60 | ||
61 | * Makefile.in (WITH_COMMON_OBJS): Build also dv-sockser.o. | |
62 | * interp.c (sim_open): Add stub mn103002 cache control memory regions. | |
63 | Set OPERATING_ENVIRONMENT on "stdeval1" board. | |
64 | (mn10300_core_signal): New function to intercept memory errors. | |
65 | (program_interrupt): New function to dispatch to exception vector | |
66 | (mn10300_exception_*): New functions to snapshot pre/post exception | |
67 | state. | |
68 | * sim-main.h (SIM_CORE_SIGNAL): Define hook - call mn10300_core_signal. | |
69 | (SIM_ENGINE_HALT_HOOK): Do nothing. | |
70 | (SIM_CPU_EXCEPTION*): Define hooks to call mn10300_cpu_exception*(). | |
71 | (_sim_cpu): Add exc_* fields to store register value snapshots. | |
72 | * dv-mn103ser.c (*): Support dv-sockser backend for UART I/O. | |
73 | Various endianness and warning fixes. | |
74 | * mn10300.igen (illegal): Call program_interrupt on error. | |
75 | (break): Call program_interrupt on breakpoint | |
76 | ||
77 | Several changes from <janczyn@cygnus.com> and <cagney@cygnus.com> | |
78 | merged in: | |
79 | * dv-mn103int.c (mn103int_ioctl): New function for NMI | |
80 | generation. (mn103int_finish): Install it as ioctl handler. | |
81 | * dv-mn103tim.c: Support timer 6 specially. Endianness fixes. | |
82 | ||
c2d11a7d JM |
83 | Wed Oct 14 12:11:05 1998 Jeffrey A Law (law@cygnus.com) |
84 | ||
85 | * am33.igen: Allow autoincrement stores using the same register | |
86 | for source and destination operands. | |
87 | ||
88 | Mon Aug 31 10:19:55 1998 Jeffrey A Law (law@cygnus.com) | |
89 | ||
90 | * am33.igen: Reverse HI/LO outputs of 4 operand "mul" and "mulu". | |
91 | ||
c906108c SS |
92 | Fri Aug 28 14:40:49 1998 Joyce Janczyn <janczyn@cygnus.com> |
93 | ||
94 | * interp.c (sim_open): Check for invalid --board option, fix | |
95 | indentation, allocate memory for mem control and DMA regs. | |
96 | ||
97 | Wed Aug 26 09:29:38 1998 Joyce Janczyn <janczyn@cygnus.com> | |
98 | ||
99 | * mn10300.igen (div,divu): Fix divide instructions so divide by 0 | |
100 | behaves like the hardware. | |
101 | ||
102 | Mon Aug 24 11:50:09 1998 Joyce Janczyn <janczyn@cygnus.com> | |
103 | ||
104 | * sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA. | |
105 | ||
c2d11a7d JM |
106 | Wed Aug 12 12:36:07 1998 Jeffrey A Law (law@cygnus.com) |
107 | ||
108 | * am33.igen: Handle case where first DSP operation modifies a | |
109 | register used in the second DSP operation correctly. | |
110 | ||
111 | Tue Jul 28 10:10:25 1998 Jeffrey A Law (law@cygnus.com) | |
112 | ||
113 | * am33.igen: Detect cases where two operands must not match for | |
114 | DSP instructions too. | |
115 | ||
116 | Mon Jul 27 12:04:17 1998 Jeffrey A Law (law@cygnus.com) | |
117 | ||
118 | * am33.igen: Detect cases where two operands must not match in | |
119 | non-DSP instructions. | |
120 | ||
c906108c SS |
121 | Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com> |
122 | ||
123 | * op_utils.c (do_syscall): Rewrite to use common/syscall.c. | |
124 | (syscall_read_mem, syscall_write_mem): New functions for syscall | |
125 | callbacks. | |
126 | * mn10300_sim.h: Add prototypes for syscall_read_mem and | |
127 | syscall_write_mem. | |
128 | * mn10300.igen: Change C++ style comments to C style comments. | |
129 | Check for divide by zero in div and divu ops. | |
130 | ||
c2d11a7d JM |
131 | Fri Jul 24 12:49:28 1998 Jeffrey A Law (law@cygnus.com) |
132 | ||
133 | * am33.igen (translate_xreg): New function. Use it as needed. | |
134 | ||
135 | Thu Jul 23 10:05:28 1998 Jeffrey A Law (law@cygnus.com) | |
136 | ||
137 | * am33.igen: Add some missing instructions. | |
138 | ||
139 | * am33.igen: Autoincrement loads/store fixes. | |
140 | ||
141 | Tue Jul 21 09:48:14 1998 Jeffrey A Law (law@cygnus.com) | |
142 | ||
143 | * am33.igen: Add mov_lCC DSP instructions. | |
144 | ||
145 | * am33.igen: Add most am33 DSP instructions. | |
146 | ||
c906108c SS |
147 | Thu Jul 9 10:06:55 1998 Jeffrey A Law (law@cygnus.com) |
148 | ||
149 | * mn10300.igen: Fix Z bit for addc and subc instructions. | |
150 | Minor fixes in multiply/divide patterns. | |
151 | ||
c2d11a7d JM |
152 | * am33.igen: Add missing mul[u] imm32,Rn. Fix condition code |
153 | handling for many instructions. Fix sign extension for some | |
154 | 24bit immediates. | |
155 | ||
156 | * am33.igen: Fix Z bit for remaining addc/subc instructions. | |
157 | Do not sign extend immediate for mov imm,XRn. | |
158 | More random mul, mac & div fixes. | |
159 | Remove some unused variables. | |
160 | Sign extend 24bit displacement in memory addresses. | |
161 | ||
162 | * am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn. Various | |
163 | fixes to 2 register multiply, divide and mac instructions. Set | |
164 | Z,N correctly for sat16. Sign extend 24 bit immediate for add, | |
165 | and sub instructions. | |
166 | ||
167 | * am33.igen: Add remaining non-DSP instructions. | |
168 | ||
169 | Wed Jul 8 16:29:12 1998 Jeffrey A Law (law@cygnus.com) | |
170 | ||
171 | * am33.igen (translate_rreg): New function. Use it as appropriate. | |
172 | ||
173 | * am33.igen: More am33 instructions. Fix "div". | |
174 | ||
175 | Mon Jul 6 15:39:22 1998 Jeffrey A Law (law@cygnus.com) | |
176 | ||
177 | * mn10300.igen: Add am33 support. | |
178 | ||
179 | * Makefile.in: Use multi-sim to support both a mn10300 and am33 | |
180 | simulator. | |
181 | ||
182 | * am33.igen: Add many more am33 instructions. | |
c906108c SS |
183 | |
184 | Wed Jul 1 17:07:09 1998 Jeffrey A Law (law@cygnus.com) | |
185 | ||
186 | * mn10300_sim.h (FETCH24): Define. | |
187 | ||
c2d11a7d JM |
188 | * mn10300_sim.h: Add defines for some registers found on the AM33. |
189 | * am33.igen: New file with some am33 support. | |
c906108c SS |
190 | |
191 | Tue Jun 30 11:23:20 1998 Jeffrey A Law (law@cygnus.com) | |
192 | ||
193 | * mn10300_sim.h: Include bfd.h | |
194 | (struct state): Add more room for processor specific registers. | |
c2d11a7d | 195 | (REG_E0): Define. |
c906108c SS |
196 | |
197 | Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com> | |
198 | ||
199 | * dv-mn103tim.c: Include sim-assert.h | |
200 | * dv-mn103ser.c (do_polling_event): Check for incoming data on | |
201 | serial line and schedule next polling event. | |
202 | (read_status_reg): schedule events to check for incoming data on | |
203 | serial line and issue interrupt if necessary. | |
204 | ||
205 | Fri Jun 19 16:47:27 1998 Joyce Janczyn <janczyn@cygnus.com> | |
206 | ||
207 | * interp.c (sim_open): hook up serial 1 and 2 ports properly (typo). | |
208 | ||
209 | Fri Jun 19 11:59:26 1998 Joyce Janczyn <janczyn@cygnus.com> | |
210 | ||
211 | * interp.c (board): Rename am32 to stdeval1 as this is the name | |
212 | consistently used to refer to the mn1030002 board. | |
213 | ||
214 | Thu June 18 14:37:14 1998 Joyce Janczyn <janczyn@cygnus.com> | |
215 | * interp.c (sim_open): Fix typo in address of EXTMD register | |
216 | (0x34000280, not 0x3400280). | |
217 | ||
218 | Wed Jun 17 18:00:18 1998 Jeffrey A Law (law@cygnus.com) | |
219 | ||
220 | * simops.c (syscall): Handle change in opcode # for syscall. | |
221 | * mn10300.igen (syscall): Likewise. | |
222 | ||
223 | Tue June 16 09:36:21 1998 Joyce Janczyn <janczyn@cygnus.com> | |
224 | * dv-mn103int.c (mn103int_finish): Regular interrupts (not NMI or | |
225 | reset) are not enabled on reset. | |
226 | ||
227 | Sun June 14 17:04:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
228 | * dv-mn103iop.c (write_*_reg): Check for attempt to write r/o | |
229 | register bits. | |
230 | * dv-mn103ser.c: Fill in methods for reading and writing to serial | |
231 | device registers. | |
232 | * interp.c (sim_open): Make the serial device a polling device. | |
233 | ||
234 | Fri June 12 16:24:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
235 | * dv-mn103iop.c: New file for handling am32 io ports. | |
236 | * configure.in: Add mn103iop to hw_device list. | |
237 | * configure: Re-generate. | |
238 | * interp.c (sim_open): Create io port device. | |
239 | ||
240 | Wed June 10 14:34:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
241 | * dv-mn103int.c (external_group): Use enumerated types to access | |
242 | correct group addresses. | |
243 | * dv-mn103tim.c (do_counter_event): Underflow of cascaded timer | |
244 | triggers an interrupt on the higher-numbered timer's port. | |
245 | ||
246 | Mon June 8 13:30:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
247 | * interp.c: (mn10300_option_handler): New function parses arguments | |
248 | using sim-options. | |
249 | * (board): Add --board option for specifying am32. | |
250 | * (sim_open): Create new timer and serial devices and control | |
251 | configuration of other am32 devices via board option. | |
252 | * dv-mn103tim.c, dv-mn103ser.c: New files for timers and serial devices. | |
253 | * dv-mn103cpu.c: Fix typos in opening comments. | |
254 | * dv-mn103int.c: Adjust interrupt controller settings for am32 instead of am30. | |
255 | * configure.in: Add mn103tim and mn103ser to hw_device list. | |
256 | * configure: Re-generate. | |
257 | ||
258 | Mon May 25 20:50:35 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
259 | ||
260 | * dv-mn103int.c, dv-mn103cpu.c: Rename *_callback to *_method. | |
261 | ||
262 | * dv-mn103cpu.c, dv-mn103int.c: Include hw-main.h and | |
263 | sim-main.h. Declare a struct hw_descriptor instead of struct | |
264 | hw_device_descriptor. | |
265 | ||
266 | Mon May 25 17:33:33 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
267 | ||
268 | * dv-mn103cpu.c (struct mn103cpu): Change type of pending_handler | |
269 | to struct hw_event. | |
270 | ||
271 | Fri May 22 12:17:41 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
272 | ||
273 | * configure.in (SIM_AC_OPTION_HARDWARE): Add argument "yes". | |
274 | ||
275 | Wed May 6 13:29:06 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
276 | ||
277 | * interp.c (sim_open): Create a polling PAL device. | |
278 | ||
279 | Fri May 1 16:39:15 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
280 | ||
281 | * dv-mn103int.c (mn103int_port_event): | |
282 | (mn103int_port_event): | |
283 | (mn103int_io_read_buffer): | |
284 | (mn103int_io_write_buffer): | |
285 | ||
286 | * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Drop CPU/CIA args. | |
287 | (mn103cpu_port_event): Ditto. | |
288 | (mn103cpu_io_read_buffer): Ditto. | |
289 | (mn103cpu_io_write_buffer): Ditto. | |
290 | ||
291 | Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com> | |
292 | ||
293 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
294 | ||
295 | Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche> | |
296 | ||
297 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
298 | * config.in: Ditto. | |
299 | ||
300 | Sun Apr 26 15:19:55 1998 Tom Tromey <tromey@cygnus.com> | |
301 | ||
302 | * acconfig.h: New file. | |
303 | * configure.in: Reverted change of Apr 24; use sinclude again. | |
304 | ||
305 | Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche> | |
306 | ||
307 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
308 | * config.in: Ditto. | |
309 | ||
310 | Fri Apr 24 11:19:07 1998 Tom Tromey <tromey@cygnus.com> | |
311 | ||
312 | * configure.in: Don't call sinclude. | |
313 | ||
314 | Tue Apr 14 10:03:02 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
315 | ||
316 | * mn10300_sim.h: Declare all functions in op_utils.c using | |
317 | INLINE_SIM_MAIN. | |
318 | * op_utils.c: Ditto. | |
319 | * sim-main.c: New file. Include op_utils.c. | |
320 | ||
321 | * mn10300.igen (mov, cmp): Use new igen operators `!' and `=' to | |
322 | differentiate between MOV/CMP immediate/register instructions. | |
323 | ||
324 | * configure.in (SIM_AC_OPTION_INLINE): Add and enable. | |
325 | * configure: Regenerate. | |
326 | ||
327 | Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
328 | ||
329 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
330 | ||
331 | Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
332 | ||
333 | * interp.c (hw): Delete variable, moved to SIM_DESC. | |
334 | (sim_open): Delete calls to hw_tree_create, hw_tree_finish. | |
335 | Handled by sim-module. | |
336 | (sim_open): Do not anotate tree with trace properties, handled by | |
337 | sim-hw.c | |
338 | (sim_open): Call sim_hw_parse instead of hw_tree_parse. | |
339 | ||
340 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
341 | ||
342 | Thu Mar 26 20:46:18 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk> | |
343 | ||
344 | * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Save the entire PC | |
345 | on the stack when delivering interrupts (not just the lower | |
346 | half)... | |
347 | * mn10300.igen (mov (Di,Am),Dn): Fix decode. Registers were | |
348 | specified in the wrong order. | |
349 | ||
350 | Fri Mar 27 00:56:40 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
351 | ||
352 | * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Stop loss of | |
353 | succeeding interrupts, clear pending_handler when the handler | |
354 | isn't re-scheduled. | |
355 | ||
356 | Thu Mar 26 10:11:01 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk> | |
357 | ||
358 | * Makefile.in (tmp-igen): Prefix all usage of move-if-change | |
359 | script with $(SHELL) to make NT native builds happy. | |
360 | * configure: Regenerate because of change to ../common/aclocal.m4. | |
361 | ||
362 | Thu Mar 26 11:22:31 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
363 | ||
364 | * configure.in: Make --enable-sim-common the default. | |
365 | * configure: Re-generate. | |
366 | ||
367 | * sim-main.h (CIA_GET, CIA_SET): Save/restore current instruction | |
368 | address into Sate.regs[REG_PC] instead of common struct. | |
369 | ||
370 | Wed Mar 25 17:42:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
371 | ||
372 | * mn10300.igen (cmp imm8,An): Do not sign extend imm8 value. | |
373 | ||
374 | Wed Mar 25 12:08:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
375 | ||
376 | * simops.c (OP_F0FD): Initialise variable 'sp'. | |
377 | ||
378 | Thu Mar 26 00:21:32 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
379 | ||
380 | * dv-mn103int.c (decode_group): A group register every 4 bytes not | |
381 | 8. | |
382 | (write_icr): Rewrite equation updating request field. | |
383 | (read_iagr): Fix check that interrupt is still pending. | |
384 | ||
385 | Wed Mar 25 16:14:50 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
386 | ||
387 | * interp.c (sim_open): Tidy up device creation. | |
388 | ||
389 | * dv-mn103int.c (mn103int_port_event): Drive NMI with non-zero | |
390 | value. | |
391 | (mn103int_io_read_buffer): Convert absolute address to register | |
392 | block offsets. | |
393 | (read_icr, write_icr): Convert block offset into group offset. | |
394 | ||
395 | Wed Mar 25 15:08:49 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
396 | ||
397 | * interp.c (sim_open): Create second 1mb memory region at | |
398 | 0x40000000. | |
399 | (sim_open): Create a device tree. | |
400 | (sim-hw.h): Include. | |
401 | (do_interrupt): Delete, needs to use dv-mn103cpu.c | |
402 | ||
403 | * dv-mn103int.c, dv-mn103cpu.c: New files. | |
404 | ||
405 | Wed Mar 25 08:47:38 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
406 | ||
407 | * mn10300_sim.h (EXTRACT_PSW_LM, INSERT_PSW_LM, PSW_IE, PSW_LM): | |
408 | Define. | |
409 | (SP): Define. | |
410 | ||
411 | Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
412 | ||
413 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
414 | ||
415 | Wed Mar 25 10:24:48 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
416 | ||
417 | * interp.c (sim-options.h): Include. | |
418 | (sim_kind, myname): Declare when not using common framework. | |
419 | ||
420 | * mn10300_sim.h (do_syscall, generic*): Provide prototypes for | |
421 | functions found in op_utils.c | |
422 | ||
423 | * mn10300.igen (add): Discard unused variables. | |
424 | ||
425 | * configure, config.in: Re-generate with autoconf 2.12.1. | |
426 | ||
427 | Tue Mar 24 15:27:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
428 | ||
429 | Add support for --enable-sim-common option. | |
430 | * Makefile.in (WITHOUT_COMMON_OBJS): Files included if | |
431 | ! --enable-sim-common | |
432 | (WITH_COMMON_OBJS): Files included if --enable-sim-common. | |
433 | (MN10300_OBJS,MN10300_INTERP_DEP): New variables. | |
434 | (SIM_OBJS): Rewrite. | |
435 | ({WITHOUT,WITH}_COMMON_RUN_OBJS,SIM_RUN_OBJS): New variables. | |
436 | (SIM_EXTRA_CFLAGS): New variable. | |
437 | (clean-extra): Clean up igen files. | |
438 | (../igen/igen,clean-igen,tmp-igen): New rules. | |
439 | * configure.in: Add support for common framework via | |
440 | --enable-sim-common. | |
441 | * configure: Regenerate. | |
442 | * interp.c: #include sim-main if WITH_COMMON, not mn10300_sim.h. | |
443 | (hash,dispatch,sim_size): Don't compile if ! WITH_COMMON. | |
444 | (init_system,sim_write,compare_simops): Likewise. | |
445 | (sim_set_profile,sim_set_profile_size): Likewise. | |
446 | (sim_stop,sim_resume,sim_trace,sim_info): Likewise. | |
447 | (sim_set_callbacks,sim_stop_reason,sim_read,sim_load): Likewise. | |
448 | (enum interrupt_type): New enum. | |
449 | (interrupt_names): New global. | |
450 | (do_interrupt): New function. | |
451 | (sim_open): Define differently if WITH_COMMON. | |
452 | (sim_close,sim_create_inferior,sim_do_command): Likewise. | |
453 | * mn10300_sim.h ({load,store}_{byte,half,word}): Define versions | |
454 | for WITH_COMMON. | |
455 | * mn10300.igen: New file. | |
456 | * mn10300.dc: New file. | |
457 | * op_utils.c: New file. | |
458 | * sim-main.h: New file. | |
459 | ||
460 | Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
461 | ||
462 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
463 | ||
464 | Fri Feb 27 18:36:04 1998 Jeffrey A Law (law@cygnus.com) | |
465 | ||
466 | * simops.c (inc): Fix typo. | |
467 | ||
468 | Wed Feb 25 01:59:29 1998 Jeffrey A Law (law@cygnus.com) | |
469 | ||
470 | * simops.c (signed multiply instructions): Cast input operands to | |
471 | signed32 before casting them to signed64 so that the sign bit | |
472 | is propagated properly. | |
473 | ||
474 | Mon Feb 23 20:23:19 1998 Mark Alexander <marka@cygnus.com> | |
475 | ||
476 | * Makefile.in: Last change was bad. Define NL_TARGET | |
477 | so that targ-vals.h will be used instead of syscall.h. | |
478 | * simops.c: Use targ-vals.h instead of syscall.h. | |
479 | (OP_F020): Disable unsupported system calls. | |
480 | ||
481 | Mon Feb 23 09:44:38 1998 Mark Alexander <marka@cygnus.com> | |
482 | ||
483 | * Makefile.in: Get header files from libgloss/mn10300/sys. | |
484 | ||
485 | Sun Feb 22 16:02:24 1998 Jeffrey A Law (law@cygnus.com) | |
486 | ||
487 | * simops.c: Include sim-types.h. | |
488 | ||
489 | Wed Feb 18 13:07:08 1998 Jeffrey A Law (law@cygnus.com) | |
490 | ||
491 | * simops.c (multiply instructions): Cast input operands to a | |
492 | signed64/unsigned64 type as appropriate. | |
493 | ||
494 | Tue Feb 17 12:47:16 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
495 | ||
496 | * interp.c (sim_store_register, sim_fetch_register): Pass in | |
497 | length parameter. Return -1. | |
498 | ||
499 | Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
500 | ||
501 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
502 | ||
503 | Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
504 | ||
505 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
506 | ||
507 | Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> | |
508 | ||
509 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
510 | ||
511 | Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
512 | ||
513 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
514 | * config.in: Ditto. | |
515 | ||
516 | Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> | |
517 | ||
518 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
519 | ||
520 | Tue Nov 11 10:38:52 1997 Jeffrey A Law (law@cygnus.com) | |
521 | ||
522 | * simops.c (call:16 call:32): Stack adjustment is determined solely | |
523 | by the imm8 field. | |
524 | ||
525 | Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
526 | ||
527 | * interp.c (sim_load): Pass lma_p and sim_write args to | |
528 | sim_load_file. | |
529 | ||
530 | Tue Oct 21 10:12:03 1997 Jeffrey A Law (law@cygnus.com) | |
531 | ||
532 | * simops.c: Correctly handle register restores for "ret" and "retf" | |
533 | instructions. | |
534 | ||
535 | Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
536 | ||
537 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
538 | ||
539 | Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
540 | ||
541 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
542 | ||
543 | Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
544 | ||
545 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
546 | ||
547 | Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
548 | ||
549 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
550 | ||
551 | Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
552 | ||
553 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
554 | ||
555 | Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
556 | ||
557 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
558 | ||
559 | Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> | |
560 | ||
561 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
562 | ||
563 | Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
564 | ||
565 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
566 | * config.in: Ditto. | |
567 | ||
568 | Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
569 | ||
570 | * interp.c (sim_kill): Delete. | |
571 | (sim_create_inferior): Add ABFD argument. | |
572 | (sim_load): Move setting of PC from here. | |
573 | (sim_create_inferior): To here. | |
574 | ||
575 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
576 | ||
577 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
578 | * config.in: Ditto. | |
579 | ||
580 | Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
581 | ||
582 | * interp.c (sim_open): Add ABFD argument. | |
583 | ||
584 | Tue Jun 24 13:46:20 1997 Jeffrey A Law (law@cygnus.com) | |
585 | ||
586 | * interp.c (sim_resume): Clear State.exited. | |
587 | (sim_stop_reason): If State.exited is nonzero, then indicate that | |
588 | the simulator exited instead of stopped. | |
589 | * mn10300_sim.h (struct _state): Add exited field. | |
590 | * simops.c (syscall): Set State.exited for SYS_exit. | |
591 | ||
592 | Wed Jun 11 22:07:56 1997 Jeffrey A Law (law@cygnus.com) | |
593 | ||
594 | * simops.c: Fix thinko in last change. | |
595 | ||
596 | Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com) | |
597 | ||
598 | * simops.c: "call" stores the callee saved registers into the | |
599 | stack! Update the stack pointer properly when done with | |
600 | register saves. | |
601 | ||
602 | * simops.c: Fix return address computation for "call" instructions. | |
603 | ||
604 | Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com) | |
605 | ||
606 | * interp.c (sim_open): Fix typo. | |
607 | ||
608 | Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com) | |
609 | ||
610 | * interp.c (sim_resume): Add missing case in big switch | |
611 | statement (for extb instruction). | |
612 | ||
613 | Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com) | |
614 | ||
615 | * interp.c: Replace all references to load_mem and store_mem | |
616 | with references to load_byte, load_half, load_3_byte, load_word | |
617 | and store_byte, store_half, store_3_byte, store_word. | |
618 | (INLINE): Delete definition. | |
619 | (load_mem_big): Likewise. | |
620 | (max_mem): Make it global. | |
621 | (dispatch): Make this function inline. | |
622 | (load_mem, store_mem): Delete functions. | |
623 | * mn10300_sim.h (INLINE): Define. | |
624 | (RLW): Delete unused definition. | |
625 | (load_mem, store_mem): Delete declarations. | |
626 | (load_mem_big): New definition. | |
627 | (load_byte, load_half, load_3_byte, load_word): New functions. | |
628 | (store_byte, store_half, store_3_byte, store_word): New functions. | |
629 | * simops.c: Replace all references to load_mem and store_mem | |
630 | with references to load_byte, load_half, load_3_byte, load_word | |
631 | and store_byte, store_half, store_3_byte, store_word. | |
632 | ||
633 | Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
634 | ||
635 | * interp.c (sim_open): Add callback to arguments. | |
636 | (sim_set_callbacks): Delete SIM_DESC argument. | |
637 | ||
638 | Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com) | |
639 | ||
640 | * interp.c (dispatch): Make this an inline function. | |
641 | ||
642 | * simops.c (syscall): Use callback->write regardless of | |
643 | what file descriptor we're writing too. | |
644 | ||
645 | Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com) | |
646 | ||
647 | * interp.c (load_mem_big): Remove function. It's now a macro | |
648 | defined elsewhere. | |
649 | (compare_simops): New function. | |
650 | (sim_open): Sort the Simops table before inserting entries | |
651 | into the hash table. | |
652 | * mn10300_sim.h: Remove unused #defines. | |
653 | (load_mem_big): Define. | |
654 | ||
655 | Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com) | |
656 | ||
657 | * interp.c (load_mem): If we get a load from an out of range | |
658 | address, abort. | |
659 | (store_mem): Likewise for stores. | |
660 | (max_mem): New variable. | |
661 | ||
662 | Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com) | |
663 | ||
664 | * mn10300_sim.h: Fix ordering of bits in the PSW. | |
665 | ||
666 | * interp.c: Improve hashing routine to avoid long list | |
667 | traversals for common instructions. Add HASH_STAT support. | |
668 | Rewrite opcode dispatch code using a big switch instead of | |
669 | cascaded if/else statements. Avoid useless calls to load_mem. | |
670 | ||
671 | Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com) | |
672 | ||
673 | * mn10300_sim.h (struct _state): Add space for mdrq register. | |
674 | (REG_MDRQ): Define. | |
675 | * simops.c: Don't abort for trap. Add support for the extended | |
676 | instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24", | |
677 | and "bsch". | |
678 | ||
679 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> | |
680 | ||
681 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
682 | ||
683 | Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
684 | ||
685 | * interp.c (sim_stop): Add stub function. | |
686 | ||
687 | Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com> | |
688 | ||
689 | * Makefile.in (SIM_OBJS): Add sim-load.o. | |
690 | * interp.c (sim_kind, myname): New static locals. | |
691 | (sim_open): Set sim_kind, myname. Ignore -E arg. | |
692 | (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to | |
693 | load file into simulator. Set start address from bfd. | |
694 | (sim_create_inferior): Return SIM_RC. Delete arg start_address. | |
695 | ||
696 | Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
697 | ||
698 | * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime | |
699 | only include if implemented by host. | |
700 | (OP_F020): Typecast arg passed to time function; | |
701 | ||
702 | Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com) | |
703 | ||
704 | * simops.c (syscall): Handle new mn10300 calling conventions. | |
705 | ||
706 | Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
707 | ||
708 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
709 | * config.in: Ditto. | |
710 | ||
711 | Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com> | |
712 | ||
713 | * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match | |
714 | corresponding change in opcodes directory. | |
715 | ||
716 | Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> | |
717 | ||
718 | * interp.c (sim_open): New arg `kind'. | |
719 | ||
720 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
721 | ||
722 | Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
723 | ||
724 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
725 | ||
726 | Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com) | |
727 | ||
728 | * simops.c: Fix register extraction for a two "movbu" variants. | |
729 | Somewhat simplify "sub" instructions. | |
730 | Correctly sign extend operands for "mul". Put the correct | |
731 | half of the result in MDR for "mul" and "mulu". | |
732 | Implement remaining instructions. | |
733 | Tweak opcode for "syscall". | |
734 | ||
735 | Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com) | |
736 | ||
737 | * simops.c: Do syscall emulation in "syscall" instruction. Add | |
738 | dummy "trap" instruction. | |
739 | ||
740 | Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
741 | ||
742 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
743 | ||
744 | Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
745 | ||
746 | * configure: Re-generate. | |
747 | ||
748 | Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com> | |
749 | ||
750 | * configure: Regenerate to track ../common/aclocal.m4 changes. | |
751 | ||
752 | Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com> | |
753 | ||
754 | * interp.c (sim_open): New SIM_DESC result. Argument is now | |
755 | in argv form. | |
756 | (other sim_*): New SIM_DESC argument. | |
757 | ||
758 | Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com) | |
759 | ||
760 | * simops.c: Fix carry bit computation for "add" instructions. | |
761 | ||
762 | * simops.c: Fix typos in bset insns. Fix arguments to store_mem | |
763 | for bset imm8,(d8,an) and bclr imm8,(d8,an). | |
764 | ||
765 | Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com) | |
766 | ||
767 | * simops.c: Fix register references when computing Z and N bits | |
768 | for lsr imm8,dn. | |
769 | ||
770 | Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com> | |
771 | ||
772 | * Makefile.in (@COMMON_MAKEFILE_FRAG): Use | |
773 | COMMON_{PRE,POST}_CONFIG_FRAG instead. | |
774 | * configure.in: sinclude ../common/aclocal.m4. | |
775 | * configure: Regenerated. | |
776 | ||
777 | Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com) | |
778 | ||
779 | * interp.c (init_system): Allocate 2^19 bytes of space for the | |
780 | simulator. | |
781 | ||
782 | Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com) | |
783 | ||
784 | * configure configure.in Makefile.in: Update to new configure | |
785 | scheme which is more compatible with WinGDB builds. | |
786 | * configure.in: Improve comment on how to run autoconf. | |
787 | * configure: Re-run autoconf to get new ../common/aclocal.m4. | |
788 | * Makefile.in: Use autoconf substitution to install common | |
789 | makefile fragment. | |
790 | ||
791 | Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com) | |
792 | ||
793 | * simops.c: Undo last change to "rol" and "ror", original code | |
794 | was correct! | |
795 | ||
796 | Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com) | |
797 | ||
798 | * simops.c: Fix "rol" and "ror". | |
799 | ||
800 | Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com) | |
801 | ||
802 | * simops.c: Fix typo in last change. | |
803 | ||
804 | Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com) | |
805 | ||
806 | * simops.c: Use REG macros in few places not using them yet. | |
807 | ||
808 | Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com) | |
809 | ||
810 | * mn10300_sim.h (struct _state): Fix number of registers! | |
811 | ||
812 | Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com) | |
813 | ||
814 | * mn10300_sim.h (struct _state): Put all registers into a single | |
815 | array to make gdb implementation easier. | |
816 | (REG_*): Add definitions for all registers in the state array. | |
817 | (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros. | |
818 | * simops.c: Related changes. | |
819 | ||
820 | Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com) | |
821 | ||
822 | * interp.c (sim_resume): Handle 0xff as a single byte insn. | |
823 | ||
824 | * simops.c: Fix overflow computation for "add" and "inc" | |
825 | instructions. | |
826 | ||
827 | Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com) | |
828 | ||
829 | * simops.c: Handle "break" instruction. | |
830 | ||
831 | * simops.c: Fix restoring the PC for "ret" and "retf" instructions. | |
832 | ||
833 | Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com) | |
834 | ||
835 | * gencode.c (write_opcodes): Also write out the format of the | |
836 | opcode. | |
837 | * mn10300_sim.h (simops): Add "format" field. | |
838 | * interp.c (sim_resume): Deal with endianness issues here. | |
839 | ||
840 | Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com) | |
841 | ||
842 | * simops.c (REG0_4): Define. | |
843 | Use REG0_4 for indexed loads/stores. | |
844 | ||
845 | Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com) | |
846 | ||
847 | * simops.c (REG0_16): Fix typo. | |
848 | ||
849 | Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com) | |
850 | ||
851 | * simops.c: Call abort for any instruction that's not currently | |
852 | simulated. | |
853 | ||
854 | * simops.c: Define accessor macros to extract register | |
855 | values from instructions. Use them consistently. | |
856 | ||
857 | * interp.c: Delete unused global variable "OP". | |
858 | (sim_resume): Remove unused variable "opcode". | |
859 | * simops.c: Fix some uninitialized variable problems, add | |
860 | parens to fix various -Wall warnings. | |
861 | ||
862 | * gencode.c (write_header): Add "insn" and "extension" arguments | |
863 | to the OP_* declarations. | |
864 | (write_template): Similarly for function templates. | |
865 | * interp.c (insn, extension): Remove global variables. Instead | |
866 | pass them as arguments to the OP_* functions. | |
867 | * mn10300_sim.h: Remove decls for "insn" and "extension". | |
868 | * simops.c (OP_*): Accept "insn" and "extension" as arguments | |
869 | instead of using globals. | |
870 | ||
871 | Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com) | |
872 | ||
873 | * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)" | |
874 | ||
875 | * simops.c: Fix thinkos in last change to "inc dn". | |
876 | ||
877 | Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com) | |
878 | ||
879 | * simops.c: "add imm,sp" does not effect the condition codes. | |
880 | "inc dn" does effect the condition codes. | |
881 | ||
882 | Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com) | |
883 | ||
884 | * simops.c: Treat both operands as signed values for | |
885 | "div" instruction. | |
886 | ||
887 | * simops.c: Fix simulation of division instructions. | |
888 | Fix typos/thinkos in several "cmp" and "sub" instructions. | |
889 | ||
890 | Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com) | |
891 | ||
892 | * simops.c: Fix carry bit handling in "sub" and "cmp" | |
893 | instructions. | |
894 | ||
895 | * simops.c: Fix "mov imm8,an" and "mov imm16,dn". | |
896 | ||
897 | Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com) | |
898 | ||
899 | * simops.c: Fix overflow computation for many instructions. | |
900 | ||
901 | * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)". | |
902 | ||
903 | * simops.c: Fix "mov am, dn". | |
904 | ||
905 | * simops.c: Fix more bugs in "add imm,an" and | |
906 | "add imm,dn". | |
907 | ||
908 | Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com) | |
909 | ||
910 | * simops.c: Fix bugs in "movm" and "add imm,an". | |
911 | ||
912 | * simops.c: Don't lose the upper 24 bits of the return | |
913 | pointer in "call" and "calls" instructions. Rough cut | |
914 | at emulated system calls. | |
915 | ||
916 | * simops.c: Implement the remaining 5, 6 and 7 byte instructions. | |
917 | ||
918 | * simops.c: Implement remaining 4 byte instructions. | |
919 | ||
920 | * simops.c: Implement remaining 3 byte instructions. | |
921 | ||
922 | * simops.c: Implement remaining 2 byte instructions. Call | |
923 | abort for instructions we're not implementing now. | |
924 | ||
925 | Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com) | |
926 | ||
927 | * simops.c: Implement lots of random instructions. | |
928 | ||
929 | * simops.c: Implement "movm" and "bCC" insns. | |
930 | ||
931 | * mn10300_sim.h (_state): Add another register (MDR). | |
932 | (REG_MDR): Define. | |
933 | * simops.c: Implement "cmp", "calls", "rets", "jmp" and | |
934 | a few additional random insns. | |
935 | ||
936 | * mn10300_sim.h (PSW_*): Define for CC status tracking. | |
937 | (REG_D0, REG_A0, REG_SP): Define. | |
938 | * simops.c: Implement "add", "addc" and a few other random | |
939 | instructions. | |
940 | ||
941 | * gencode.c, interp.c: Snapshot current simulator code. | |
942 | ||
943 | Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com) | |
944 | ||
945 | * Makefile.in, config.in, configure, configure.in: New files. | |
946 | * gencode.c, interp.c, mn10300_sim.h, simops.c: New files. | |
947 |