[thirdparty/binutils-gdb.git] / sim / mn10300 / dv-mn103ser.c

/*  This file is part of the program GDB, the GNU debugger.
    
    Copyright (C) 1998-2024 Free Software Foundation, Inc.
    Contributed by Cygnus Solutions.
    
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 3 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.
    
    */

/* This must come before any other includes.  */
#include "defs.h"

#include "sim-main.h"
#include "hw-main.h"
#include "dv-sockser.h"


/* DEVICE

   
   mn103ser - mn103002 serial devices 0, 1 and 2.

   
   DESCRIPTION
   
   Implements the mn103002 serial interfaces as described in the
   mn103002 user guide. 


   PROPERTIES   

   reg = <serial-addr> <serial-size>


   BUGS

   */


/* The serial devices' registers' address block */

struct mn103ser_block {
  unsigned_word base;
  unsigned_word bound;
};


enum serial_register_types {
    SC0CTR,
    SC1CTR,
    SC2CTR,
    SC0ICR,
    SC1ICR,
    SC2ICR,
    SC0TXB,
    SC1TXB,
    SC2TXB,
    SC0RXB,
    SC1RXB,
    SC2RXB,
    SC0STR,
    SC1STR,
    SC2STR,
    SC2TIM,
};


#define NR_SERIAL_DEVS  3
#define SIO_STAT_RRDY 0x0010

typedef struct _mn10300_serial {
  uint16_t status, control;
  uint8_t  txb, rxb, intmode;
  struct hw_event *event;
} mn10300_serial;


struct mn103ser {
  struct mn103ser_block block;
  mn10300_serial device[NR_SERIAL_DEVS];
  uint8_t      serial2_timer_reg;
  do_hw_poll_read_method *reader;
};

/* output port ID's */

/* for mn103002 */
enum {
  SERIAL0_RECEIVE,
  SERIAL1_RECEIVE,
  SERIAL2_RECEIVE,
  SERIAL0_SEND,
  SERIAL1_SEND,
  SERIAL2_SEND,
};


static const struct hw_port_descriptor mn103ser_ports[] = {

  { "serial-0-receive",  SERIAL0_RECEIVE, 0, output_port, },
  { "serial-1-receive",  SERIAL1_RECEIVE, 0, output_port, },
  { "serial-2-receive",  SERIAL2_RECEIVE, 0, output_port, },
  { "serial-0-transmit", SERIAL0_SEND, 0, output_port, },
  { "serial-1-transmit", SERIAL1_SEND, 0, output_port, },
  { "serial-2-transmit", SERIAL2_SEND, 0, output_port, },

  { NULL, },
};


/* Finish off the partially created hw device.  Attach our local
   callbacks.  Wire up our port names etc */

static hw_io_read_buffer_method mn103ser_io_read_buffer;
static hw_io_write_buffer_method mn103ser_io_write_buffer;

static void
attach_mn103ser_regs (struct hw *me,
		      struct mn103ser *serial)
{
  unsigned_word attach_address;
  int attach_space;
  unsigned attach_size;
  reg_property_spec reg;

  if (hw_find_property (me, "reg") == NULL)
    hw_abort (me, "Missing \"reg\" property");

  if (!hw_find_reg_array_property (me, "reg", 0, &reg))
    hw_abort (me, "\"reg\" property must contain three addr/size entries");
  hw_unit_address_to_attach_address (hw_parent (me),
				     &reg.address,
				     &attach_space,
				     &attach_address,
				     me);
  serial->block.base = attach_address;
  hw_unit_size_to_attach_size (hw_parent (me),
			       &reg.size,
			       &attach_size, me);
  serial->block.bound = attach_address + (attach_size - 1);
  hw_attach_address (hw_parent (me),
		     0,
		     attach_space, attach_address, attach_size,
		     me);
}

static void
mn103ser_finish (struct hw *me)
{
  struct mn103ser *serial;
  int i;

  serial = HW_ZALLOC (me, struct mn103ser);
  set_hw_data (me, serial);
  set_hw_io_read_buffer (me, mn103ser_io_read_buffer);
  set_hw_io_write_buffer (me, mn103ser_io_write_buffer);
  set_hw_ports (me, mn103ser_ports);

  /* Attach ourself to our parent bus */
  attach_mn103ser_regs (me, serial);

  /* If so configured, enable polled input */
  if (hw_find_property (me, "poll?") != NULL
      && hw_find_boolean_property (me, "poll?"))
    {
      serial->reader = sim_io_poll_read;
    }
  else
    {
      serial->reader = sim_io_read;
    }

  /* Initialize the serial device registers. */
  for ( i=0; i<NR_SERIAL_DEVS; ++i )
    {
      serial->device[i].txb = 0;
      serial->device[i].rxb = 0;
      serial->device[i].status = 0;
      serial->device[i].control = 0;
      serial->device[i].intmode = 0;
      serial->device[i].event = NULL;
    }
}


/* read and write */

static int
decode_addr (struct hw *me,
	     struct mn103ser *serial,
	     unsigned_word address)
{
  unsigned_word offset;
  offset = address - serial->block.base;
  switch (offset)
    {
    case 0x00: return SC0CTR;
    case 0x04: return SC0ICR;
    case 0x08: return SC0TXB;
    case 0x09: return SC0RXB;
    case 0x0C: return SC0STR;
    case 0x10: return SC1CTR;
    case 0x14: return SC1ICR;
    case 0x18: return SC1TXB;
    case 0x19: return SC1RXB;
    case 0x1C: return SC1STR;
    case 0x20: return SC2CTR;
    case 0x24: return SC2ICR;
    case 0x28: return SC2TXB;
    case 0x29: return SC2RXB;
    case 0x2C: return SC2STR;
    case 0x2D: return SC2TIM;
    default: 
      {
	hw_abort (me, "bad address");
	return -1;
      }
    }
}

static void
do_polling_event (struct hw *me,
		  void *data)
{
  SIM_DESC sd = hw_system (me);
  struct mn103ser *serial = hw_data(me);
  long serial_reg = (uintptr_t) data;
  char c;
  int count, status;

  status = dv_sockser_status (sd);
  if (!(status & DV_SOCKSER_DISCONNECTED))
    {
      int rd;
      rd = dv_sockser_read (sd);
      if(rd != -1)
	{
	  c = (char) rd;
	  count = 1;
	}
      else
	{
	  count = HW_IO_NOT_READY;
	}
    }
  else
    {
      count = do_hw_poll_read (me, serial->reader,
			       0/*STDIN*/, &c, sizeof(c));
    }


  switch (count)
    {
    case HW_IO_NOT_READY:
    case HW_IO_EOF:
      serial->device[serial_reg].rxb = 0;
      serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
      break;
    default:
      serial->device[serial_reg].rxb = c;
      serial->device[serial_reg].status |= SIO_STAT_RRDY;
      hw_port_event (me, serial_reg+SERIAL0_RECEIVE, 1);
    }

  /* Schedule next polling event */
  serial->device[serial_reg].event
    = hw_event_queue_schedule (me, 1000,
			       do_polling_event, (void *)(uintptr_t)serial_reg);

}

static void
read_control_reg (struct hw *me,
		  struct mn103ser *serial,
		  unsigned_word serial_reg,
		  void *dest,
		  unsigned  nr_bytes)
{
  /* really allow 1 byte read, too */
  if ( nr_bytes == 2 )
    {
      *(uint16_t *)dest = H2LE_2 (serial->device[serial_reg].control);
    }
  else
    {
      hw_abort (me, "bad read size of %d bytes from SC%dCTR.", nr_bytes, 
		serial_reg);
    }
}


static void
read_intmode_reg (struct hw *me,
		  struct mn103ser *serial,
		  unsigned_word serial_reg,
		  void *dest,
		  unsigned  nr_bytes)
{
  if ( nr_bytes == 1 )
    {
      *(uint8_t *)dest = serial->device[serial_reg].intmode;
    }
  else
    {
      hw_abort (me, "bad read size of %d bytes from SC%dICR.", nr_bytes, 
		serial_reg);
    }
}


static void
read_txb (struct hw *me,
	  struct mn103ser *serial,
	  unsigned_word serial_reg,
	  void *dest,
	  unsigned  nr_bytes)
{
  if ( nr_bytes == 1 )
    {
      *(uint8_t *)dest = serial->device[serial_reg].txb;
    }
  else
    {
      hw_abort (me, "bad read size of %d bytes from SC%dTXB.", nr_bytes, 
		serial_reg);
    }
}


static void
read_rxb (struct hw *me,
	  struct mn103ser *serial,
	  unsigned_word serial_reg,
	  void *dest,
	  unsigned  nr_bytes)
{
  if ( nr_bytes == 1 )
    {
      *(uint8_t *)dest = serial->device[serial_reg].rxb;
      /* Reception buffer is now empty. */
      serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
    }
  else
    {
      hw_abort (me, "bad read size of %d bytes from SC%dRXB.", nr_bytes, 
		serial_reg);
    }
}


static void
read_status_reg (struct hw *me,
		 struct mn103ser *serial,
		 unsigned_word serial_reg,
		 void *dest,
		 unsigned  nr_bytes)
{
  char c;
  int count;

  if ( (serial->device[serial_reg].status & SIO_STAT_RRDY) == 0 )
    {
      SIM_DESC sd = hw_system (me);
      int status;

      /* FIFO is empty */
      /* Kill current poll event */
      if ( NULL != serial->device[serial_reg].event )
	{
	  hw_event_queue_deschedule (me, serial->device[serial_reg].event);
	  serial->device[serial_reg].event = NULL;
	}

      status = dv_sockser_status (sd);
      if (!(status & DV_SOCKSER_DISCONNECTED))
	{
	  int rd;
	  rd = dv_sockser_read (sd);
	  if(rd != -1)
	    {
	      c = (char) rd;
	      count = 1;
	    }
	  else
	    {
	      count = HW_IO_NOT_READY;
	    }
	}
      else
	{
	  count = do_hw_poll_read (me, serial->reader,
				   0/*STDIN*/, &c, sizeof(c));
	}

      switch (count)
	{
	case HW_IO_NOT_READY:
	case HW_IO_EOF:
	  serial->device[serial_reg].rxb = 0;
	  serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
	  break;
	default:
	  serial->device[serial_reg].rxb = c;
	  serial->device[serial_reg].status |= SIO_STAT_RRDY;
	  hw_port_event (me, serial_reg+SERIAL0_RECEIVE, 1);
	}

      /* schedule polling event */
      serial->device[serial_reg].event
	= hw_event_queue_schedule (me, 1000,
				   do_polling_event,
				   (void *)(uintptr_t)serial_reg);
    }

  if ( nr_bytes == 1 )
    {
      *(uint8_t *)dest = (uint8_t)serial->device[serial_reg].status;
    }
  else if ( nr_bytes == 2 && serial_reg != SC2STR )
    {
      *(uint16_t *)dest = H2LE_2 (serial->device[serial_reg].status);
    }
  else
    {
      hw_abort (me, "bad read size of %d bytes from SC%dSTR.", nr_bytes, 
		serial_reg);
    }
}


static void
read_serial2_timer_reg (struct hw *me,
			struct mn103ser *serial,
			void *dest,
			unsigned  nr_bytes)
{
  if ( nr_bytes == 1 )
    {
      * (uint8_t *) dest = (uint8_t) serial->serial2_timer_reg;
    }
  else
    {
      hw_abort (me, "bad read size of %d bytes to SC2TIM.", nr_bytes);
    }
}


static unsigned
mn103ser_io_read_buffer (struct hw *me,
			 void *dest,
			 int space,
			 unsigned_word base,
			 unsigned nr_bytes)
{
  struct mn103ser *serial = hw_data (me);
  enum serial_register_types serial_reg;
  HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));

  serial_reg = decode_addr (me, serial, base);
  switch (serial_reg)
    {
    /* control registers */
    case SC0CTR:
    case SC1CTR:
    case SC2CTR:
      read_control_reg(me, serial, serial_reg-SC0CTR, dest, nr_bytes);
      HW_TRACE ((me, "read - ctrl reg%d has 0x%x\n", serial_reg-SC0CTR,
		 *(uint8_t *)dest));
      break;

    /* interrupt mode registers */
    case SC0ICR:
    case SC1ICR:
    case SC2ICR:
      read_intmode_reg(me, serial, serial_reg-SC0ICR, dest, nr_bytes);
      HW_TRACE ((me, "read - intmode reg%d has 0x%x\n", serial_reg-SC0ICR,
		 *(uint8_t *)dest));
      break;

    /* transmission buffers */
    case SC0TXB:
    case SC1TXB:
    case SC2TXB:
      read_txb(me, serial, serial_reg-SC0TXB, dest, nr_bytes);
      HW_TRACE ((me, "read - txb%d has %c\n", serial_reg-SC0TXB,
		 *(char *)dest));
      break;

    /* reception buffers */
    case SC0RXB: 
    case SC1RXB:
    case SC2RXB:
      read_rxb(me, serial, serial_reg-SC0RXB, dest, nr_bytes);
      HW_TRACE ((me, "read - rxb%d has %c\n", serial_reg-SC0RXB,
		 *(char *)dest));
     break;

    /* status registers */
    case SC0STR: 
    case SC1STR: 
    case SC2STR: 
      read_status_reg(me, serial, serial_reg-SC0STR, dest, nr_bytes);
      HW_TRACE ((me, "read - status reg%d has 0x%x\n", serial_reg-SC0STR,
		 *(uint8_t *)dest));
      break;

    case SC2TIM:
      read_serial2_timer_reg(me, serial, dest, nr_bytes);
      HW_TRACE ((me, "read - serial2 timer reg %d\n", *(uint8_t *)dest));
      break;

    default:
      hw_abort(me, "invalid address");
    }

  return nr_bytes;
}     


static void
write_control_reg (struct hw *me,
		   struct mn103ser *serial,
		   unsigned_word serial_reg,
		   const void *source,
		   unsigned  nr_bytes)
{
  uint16_t val = LE2H_2 (*(uint16_t *)source);

  /* really allow 1 byte write, too */
  if ( nr_bytes == 2 )
    {
      if ( serial_reg == 2 && (val & 0x0C04) != 0 )
	{
	  hw_abort(me, "Cannot write to read-only bits of SC2CTR.");
	}
      else
	{
	  serial->device[serial_reg].control = val;
	}
    }
  else
    {
      hw_abort (me, "bad read size of %d bytes from SC%dSTR.", nr_bytes, 
		serial_reg);
    }
}


static void
write_intmode_reg (struct hw *me,
		   struct mn103ser *serial,
		   unsigned_word serial_reg,
		   const void *source,
		   unsigned  nr_bytes)
{
uint8_t val = *(uint8_t *)source;

  if ( nr_bytes == 1 )
    {
      /* Check for attempt to write to read-only bits of register. */
      if ( ( serial_reg == 2 && (val & 0xCA) != 0 )
	   || ( serial_reg != 2 && (val & 0x4A) != 0 ) )
	{
	  hw_abort(me, "Cannot write to read-only bits of SC%dICR.",
		   serial_reg);
	}
      else
	{
	  serial->device[serial_reg].intmode = val;
	}
    }
  else
    {
      hw_abort (me, "bad write size of %d bytes to SC%dICR.", nr_bytes, 
		serial_reg);
    }
}


static void
write_txb (struct hw *me,
	   struct mn103ser *serial,
	   unsigned_word serial_reg,
	   const void *source,
	   unsigned  nr_bytes)
{
  if ( nr_bytes == 1 )
    {
      SIM_DESC sd = hw_system (me);
      int status;

      serial->device[serial_reg].txb = *(uint8_t *)source;

      status = dv_sockser_status (sd);
      if (!(status & DV_SOCKSER_DISCONNECTED))
	{
	  dv_sockser_write(sd, * (char*) source);
	}
      else
	{
	  sim_io_write_stdout(sd, (char *)source, 1);
	  sim_io_flush_stdout(sd);
	}

      hw_port_event (me, serial_reg+SERIAL0_SEND, 1);
    }
  else
    {
      hw_abort (me, "bad write size of %d bytes to SC%dTXB.", nr_bytes, 
		serial_reg);
    }
}


static void
write_serial2_timer_reg (struct hw *me,
			 struct mn103ser *serial,
			 const void *source,
			 unsigned  nr_bytes)
{
  if ( nr_bytes == 1 )
    {
      serial->serial2_timer_reg = *(uint8_t *)source;
    }
  else
    {
      hw_abort (me, "bad write size of %d bytes to SC2TIM.", nr_bytes); 
    }
}


static unsigned
mn103ser_io_write_buffer (struct hw *me,
			  const void *source,
			  int space,
			  unsigned_word base,
			  unsigned nr_bytes)
{
  struct mn103ser *serial = hw_data (me);
  enum serial_register_types serial_reg;
  HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));

  serial_reg = decode_addr (me, serial, base);
  switch (serial_reg)
    {
    /* control registers */
    case SC0CTR:
    case SC1CTR:
    case SC2CTR:
      HW_TRACE ((me, "write - ctrl reg%d has 0x%x, nrbytes=%d.\n",
		 serial_reg-SC0CTR, *(uint8_t *)source, nr_bytes));
      write_control_reg(me, serial, serial_reg-SC0CTR, source, nr_bytes);
      break;

    /* interrupt mode registers */
    case SC0ICR:
    case SC1ICR:
    case SC2ICR:
      HW_TRACE ((me, "write - intmode reg%d has 0x%x, nrbytes=%d.\n",
		 serial_reg-SC0ICR, *(uint8_t *)source, nr_bytes));
      write_intmode_reg(me, serial, serial_reg-SC0ICR, source, nr_bytes);
      break;

    /* transmission buffers */
    case SC0TXB:
    case SC1TXB:
    case SC2TXB:
      HW_TRACE ((me, "write - txb%d has %c, nrbytes=%d.\n",
		 serial_reg-SC0TXB, *(char *)source, nr_bytes));
      write_txb(me, serial, serial_reg-SC0TXB, source, nr_bytes);
      break;

    /* reception buffers */
    case SC0RXB: 
    case SC1RXB:
    case SC2RXB:
      hw_abort(me, "Cannot write to reception buffer.");
     break;

    /* status registers */
    case SC0STR: 
    case SC1STR: 
    case SC2STR: 
      hw_abort(me, "Cannot write to status register.");
      break;

    case SC2TIM:
      HW_TRACE ((me, "read - serial2 timer reg %d (nrbytes=%d)\n",
		 *(uint8_t *)source, nr_bytes));
      write_serial2_timer_reg(me, serial, source, nr_bytes);
      break;

    default:
      hw_abort(me, "invalid address");
    }

  return nr_bytes;
}     


const struct hw_descriptor dv_mn103ser_descriptor[] = {
  { "mn103ser", mn103ser_finish, },
  { NULL },
};
Commit	Line	Data
c906108c SS	1	/* This file is part of the program GDB, the GNU debugger.
c906108c SS	2
1d506c26	3	Copyright (C) 1998-2024 Free Software Foundation, Inc.
c906108c SS	4	Contributed by Cygnus Solutions.
	5
	6	This program is free software; you can redistribute it and/or modify
	7	it under the terms of the GNU General Public License as published by
4744ac1b	8	the Free Software Foundation; either version 3 of the License, or
c906108c	9	(at your option) any later version.
4744ac1b	10
c906108c SS	11	This program is distributed in the hope that it will be useful,
	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
4744ac1b	15
c906108c	16	You should have received a copy of the GNU General Public License
4744ac1b	17	along with this program. If not, see <http://www.gnu.org/licenses/>.
c906108c SS	18
	19	*/
	20
6df01ab8 MF	21	/* This must come before any other includes. */
	22	#include "defs.h"
	23
c906108c SS	24	#include "sim-main.h"
	25	#include "hw-main.h"
	26	#include "dv-sockser.h"
	27
	28
	29	/* DEVICE
	30
	31
	32	mn103ser - mn103002 serial devices 0, 1 and 2.
	33
	34
	35	DESCRIPTION
	36
	37	Implements the mn103002 serial interfaces as described in the
	38	mn103002 user guide.
	39
	40
	41	PROPERTIES
	42
	43	reg = <serial-addr> <serial-size>
	44
	45
	46	BUGS
	47
	48	*/
	49
	50
	51	/* The serial devices' registers' address block */
	52
	53	struct mn103ser_block {
	54	unsigned_word base;
	55	unsigned_word bound;
	56	};
	57
	58
	59
	60	enum serial_register_types {
	61	SC0CTR,
	62	SC1CTR,
	63	SC2CTR,
	64	SC0ICR,
	65	SC1ICR,
	66	SC2ICR,
	67	SC0TXB,
	68	SC1TXB,
	69	SC2TXB,
	70	SC0RXB,
	71	SC1RXB,
	72	SC2RXB,
	73	SC0STR,
	74	SC1STR,
	75	SC2STR,
	76	SC2TIM,
	77	};
	78
	79
c906108c SS	80	#define NR_SERIAL_DEVS 3
	81	#define SIO_STAT_RRDY 0x0010
	82
	83	typedef struct _mn10300_serial {
74ccc978 MF	84	uint16_t status, control;
74ccc978 MF	85	uint8_t txb, rxb, intmode;
c906108c SS	86	struct hw_event *event;
	87	} mn10300_serial;
	88
	89
	90
	91	struct mn103ser {
	92	struct mn103ser_block block;
	93	mn10300_serial device[NR_SERIAL_DEVS];
74ccc978	94	uint8_t serial2_timer_reg;
c906108c SS	95	do_hw_poll_read_method *reader;
	96	};
	97
	98	/* output port ID's */
	99
	100	/* for mn103002 */
	101	enum {
	102	SERIAL0_RECEIVE,
	103	SERIAL1_RECEIVE,
	104	SERIAL2_RECEIVE,
	105	SERIAL0_SEND,
	106	SERIAL1_SEND,
	107	SERIAL2_SEND,
	108	};
	109
	110
	111	static const struct hw_port_descriptor mn103ser_ports[] = {
	112
	113	{ "serial-0-receive", SERIAL0_RECEIVE, 0, output_port, },
	114	{ "serial-1-receive", SERIAL1_RECEIVE, 0, output_port, },
	115	{ "serial-2-receive", SERIAL2_RECEIVE, 0, output_port, },
	116	{ "serial-0-transmit", SERIAL0_SEND, 0, output_port, },
	117	{ "serial-1-transmit", SERIAL1_SEND, 0, output_port, },
	118	{ "serial-2-transmit", SERIAL2_SEND, 0, output_port, },
	119
	120	{ NULL, },
	121	};
	122
	123
	124
	125	/* Finish off the partially created hw device. Attach our local
	126	callbacks. Wire up our port names etc */
	127
	128	static hw_io_read_buffer_method mn103ser_io_read_buffer;
	129	static hw_io_write_buffer_method mn103ser_io_write_buffer;
	130
	131	static void
	132	attach_mn103ser_regs (struct hw *me,
	133	struct mn103ser *serial)
	134	{
	135	unsigned_word attach_address;
	136	int attach_space;
	137	unsigned attach_size;
	138	reg_property_spec reg;
	139
	140	if (hw_find_property (me, "reg") == NULL)
	141	hw_abort (me, "Missing \"reg\" property");
	142
	143	if (!hw_find_reg_array_property (me, "reg", 0, &reg))
	144	hw_abort (me, "\"reg\" property must contain three addr/size entries");
	145	hw_unit_address_to_attach_address (hw_parent (me),
	146	&reg.address,
	147	&attach_space,
	148	&attach_address,
	149	me);
	150	serial->block.base = attach_address;
	151	hw_unit_size_to_attach_size (hw_parent (me),
	152	&reg.size,
	153	&attach_size, me);
	154	serial->block.bound = attach_address + (attach_size - 1);
	155	hw_attach_address (hw_parent (me),
	156	0,
	157	attach_space, attach_address, attach_size,
	158	me);
159	}
160
161	static void
162	mn103ser_finish (struct hw *me)
163	{
164	struct mn103ser *serial;
165	int i;
166
167	serial = HW_ZALLOC (me, struct mn103ser);
168	set_hw_data (me, serial);
169	set_hw_io_read_buffer (me, mn103ser_io_read_buffer);
170	set_hw_io_write_buffer (me, mn103ser_io_write_buffer);
171	set_hw_ports (me, mn103ser_ports);
172
173	/* Attach ourself to our parent bus */
174	attach_mn103ser_regs (me, serial);
175
176	/* If so configured, enable polled input */
177	if (hw_find_property (me, "poll?") != NULL
178	&& hw_find_boolean_property (me, "poll?"))
179	{
180	serial->reader = sim_io_poll_read;
181	}
182	else
183	{
184	serial->reader = sim_io_read;
185	}
186
187	/* Initialize the serial device registers. */
188	for ( i=0; i<NR_SERIAL_DEVS; ++i )
189	{
190	serial->device[i].txb = 0;
191	serial->device[i].rxb = 0;
192	serial->device[i].status = 0;
193	serial->device[i].control = 0;
194	serial->device[i].intmode = 0;
195	serial->device[i].event = NULL;
196	}
197	}
198
199
200	/* read and write */
201
202	static int
203	decode_addr (struct hw *me,
204	struct mn103ser *serial,
205	unsigned_word address)
206	{
207	unsigned_word offset;
208	offset = address - serial->block.base;
209	switch (offset)
210	{
211	case 0x00: return SC0CTR;
212	case 0x04: return SC0ICR;
213	case 0x08: return SC0TXB;
214	case 0x09: return SC0RXB;
215	case 0x0C: return SC0STR;
216	case 0x10: return SC1CTR;
217	case 0x14: return SC1ICR;
218	case 0x18: return SC1TXB;
219	case 0x19: return SC1RXB;
220	case 0x1C: return SC1STR;
221	case 0x20: return SC2CTR;
222	case 0x24: return SC2ICR;
223	case 0x28: return SC2TXB;
224	case 0x29: return SC2RXB;
225	case 0x2C: return SC2STR;
226	case 0x2D: return SC2TIM;
227	default:
228	{
229	hw_abort (me, "bad address");
230	return -1;
231	}
232	}
233	}
234
235	static void
236	do_polling_event (struct hw *me,
237	void *data)
238	{
952ad68f	239	SIM_DESC sd = hw_system (me);
c906108c	240	struct mn103ser *serial = hw_data(me);
ad251174	241	long serial_reg = (uintptr_t) data;
c906108c	242	char c;
952ad68f	243	int count, status;
c906108c	244
952ad68f MF	245	status = dv_sockser_status (sd);
952ad68f MF	246	if (!(status & DV_SOCKSER_DISCONNECTED))
c906108c SS	247	{
c906108c SS	248	int rd;
952ad68f	249	rd = dv_sockser_read (sd);
c906108c SS	250	if(rd != -1)
	251	{
	252	c = (char) rd;
	253	count = 1;
	254	}
	255	else
	256	{
	257	count = HW_IO_NOT_READY;
	258	}
	259	}
	260	else
	261	{
	262	count = do_hw_poll_read (me, serial->reader,
	263	0/STDIN/, &c, sizeof(c));
	264	}
	265
	266
	267	switch (count)
	268	{
	269	case HW_IO_NOT_READY:
	270	case HW_IO_EOF:
	271	serial->device[serial_reg].rxb = 0;
	272	serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
	273	break;
	274	default:
	275	serial->device[serial_reg].rxb = c;
	276	serial->device[serial_reg].status \|= SIO_STAT_RRDY;
	277	hw_port_event (me, serial_reg+SERIAL0_RECEIVE, 1);
	278	}
	279
	280	/* Schedule next polling event */
	281	serial->device[serial_reg].event
	282	= hw_event_queue_schedule (me, 1000,
ad251174	283	do_polling_event, (void *)(uintptr_t)serial_reg);
c906108c SS	284
	285	}
	286
	287	static void
	288	read_control_reg (struct hw *me,
	289	struct mn103ser *serial,
	290	unsigned_word serial_reg,
	291	void *dest,
	292	unsigned nr_bytes)
	293	{
	294	/* really allow 1 byte read, too */
	295	if ( nr_bytes == 2 )
	296	{
74ccc978	297	(uint16_t )dest = H2LE_2 (serial->device[serial_reg].control);
c906108c SS	298	}
	299	else
	300	{
	301	hw_abort (me, "bad read size of %d bytes from SC%dCTR.", nr_bytes,
	302	serial_reg);
	303	}
	304	}
	305
	306
	307	static void
	308	read_intmode_reg (struct hw *me,
	309	struct mn103ser *serial,
	310	unsigned_word serial_reg,
	311	void *dest,
	312	unsigned nr_bytes)
	313	{
	314	if ( nr_bytes == 1 )
	315	{
74ccc978	316	(uint8_t )dest = serial->device[serial_reg].intmode;
c906108c SS	317	}
	318	else
	319	{
	320	hw_abort (me, "bad read size of %d bytes from SC%dICR.", nr_bytes,
	321	serial_reg);
	322	}
	323	}
	324
	325
	326	static void
	327	read_txb (struct hw *me,
	328	struct mn103ser *serial,
	329	unsigned_word serial_reg,
	330	void *dest,
	331	unsigned nr_bytes)
	332	{
	333	if ( nr_bytes == 1 )
	334	{
74ccc978	335	(uint8_t )dest = serial->device[serial_reg].txb;
c906108c SS	336	}
	337	else
	338	{
	339	hw_abort (me, "bad read size of %d bytes from SC%dTXB.", nr_bytes,
	340	serial_reg);
	341	}
	342	}
	343
	344
	345	static void
	346	read_rxb (struct hw *me,
	347	struct mn103ser *serial,
	348	unsigned_word serial_reg,
	349	void *dest,
	350	unsigned nr_bytes)
	351	{
	352	if ( nr_bytes == 1 )
	353	{
74ccc978	354	(uint8_t )dest = serial->device[serial_reg].rxb;
c906108c SS	355	/* Reception buffer is now empty. */
	356	serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
	357	}
	358	else
	359	{
	360	hw_abort (me, "bad read size of %d bytes from SC%dRXB.", nr_bytes,
	361	serial_reg);
	362	}
	363	}
	364
	365
	366	static void
	367	read_status_reg (struct hw *me,
	368	struct mn103ser *serial,
	369	unsigned_word serial_reg,
	370	void *dest,
	371	unsigned nr_bytes)
	372	{
	373	char c;
	374	int count;
	375
	376	if ( (serial->device[serial_reg].status & SIO_STAT_RRDY) == 0 )
	377	{
952ad68f MF	378	SIM_DESC sd = hw_system (me);
	379	int status;
	380
c906108c SS	381	/* FIFO is empty */
	382	/* Kill current poll event */
	383	if ( NULL != serial->device[serial_reg].event )
	384	{
	385	hw_event_queue_deschedule (me, serial->device[serial_reg].event);
	386	serial->device[serial_reg].event = NULL;
	387	}
	388
952ad68f MF	389	status = dv_sockser_status (sd);
952ad68f MF	390	if (!(status & DV_SOCKSER_DISCONNECTED))
c906108c SS	391	{
c906108c SS	392	int rd;
952ad68f	393	rd = dv_sockser_read (sd);
c906108c SS	394	if(rd != -1)
	395	{
	396	c = (char) rd;
	397	count = 1;
	398	}
	399	else
	400	{
	401	count = HW_IO_NOT_READY;
	402	}
	403	}
	404	else
	405	{
	406	count = do_hw_poll_read (me, serial->reader,
	407	0/STDIN/, &c, sizeof(c));
	408	}
	409
	410	switch (count)
	411	{
	412	case HW_IO_NOT_READY:
	413	case HW_IO_EOF:
	414	serial->device[serial_reg].rxb = 0;
	415	serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
	416	break;
	417	default:
	418	serial->device[serial_reg].rxb = c;
	419	serial->device[serial_reg].status \|= SIO_STAT_RRDY;
	420	hw_port_event (me, serial_reg+SERIAL0_RECEIVE, 1);
	421	}
	422
	423	/* schedule polling event */
	424	serial->device[serial_reg].event
	425	= hw_event_queue_schedule (me, 1000,
	426	do_polling_event,
ad251174	427	(void *)(uintptr_t)serial_reg);
c906108c SS	428	}
	429
	430	if ( nr_bytes == 1 )
	431	{
74ccc978	432	(uint8_t )dest = (uint8_t)serial->device[serial_reg].status;
c906108c SS	433	}
	434	else if ( nr_bytes == 2 && serial_reg != SC2STR )
	435	{
74ccc978	436	(uint16_t )dest = H2LE_2 (serial->device[serial_reg].status);
c906108c SS	437	}
	438	else
	439	{
	440	hw_abort (me, "bad read size of %d bytes from SC%dSTR.", nr_bytes,
	441	serial_reg);
	442	}
	443	}
	444
	445
	446	static void
	447	read_serial2_timer_reg (struct hw *me,
	448	struct mn103ser *serial,
	449	void *dest,
	450	unsigned nr_bytes)
	451	{
	452	if ( nr_bytes == 1 )
	453	{
74ccc978	454	* (uint8_t *) dest = (uint8_t) serial->serial2_timer_reg;
c906108c SS	455	}
	456	else
	457	{
	458	hw_abort (me, "bad read size of %d bytes to SC2TIM.", nr_bytes);
	459	}
	460	}
	461
	462
	463	static unsigned
	464	mn103ser_io_read_buffer (struct hw *me,
	465	void *dest,
	466	int space,
	467	unsigned_word base,
	468	unsigned nr_bytes)
	469	{
	470	struct mn103ser *serial = hw_data (me);
	471	enum serial_register_types serial_reg;
	472	HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
	473
	474	serial_reg = decode_addr (me, serial, base);
	475	switch (serial_reg)
	476	{
	477	/* control registers */
	478	case SC0CTR:
	479	case SC1CTR:
	480	case SC2CTR:
	481	read_control_reg(me, serial, serial_reg-SC0CTR, dest, nr_bytes);
	482	HW_TRACE ((me, "read - ctrl reg%d has 0x%x\n", serial_reg-SC0CTR,
74ccc978	483	(uint8_t )dest));
c906108c SS	484	break;
	485
	486	/* interrupt mode registers */
	487	case SC0ICR:
	488	case SC1ICR:
	489	case SC2ICR:
	490	read_intmode_reg(me, serial, serial_reg-SC0ICR, dest, nr_bytes);
	491	HW_TRACE ((me, "read - intmode reg%d has 0x%x\n", serial_reg-SC0ICR,
74ccc978	492	(uint8_t )dest));
c906108c SS	493	break;
	494
	495	/* transmission buffers */
	496	case SC0TXB:
	497	case SC1TXB:
	498	case SC2TXB:
	499	read_txb(me, serial, serial_reg-SC0TXB, dest, nr_bytes);
	500	HW_TRACE ((me, "read - txb%d has %c\n", serial_reg-SC0TXB,
	501	(char )dest));
	502	break;
	503
	504	/* reception buffers */
	505	case SC0RXB:
	506	case SC1RXB:
	507	case SC2RXB:
	508	read_rxb(me, serial, serial_reg-SC0RXB, dest, nr_bytes);
	509	HW_TRACE ((me, "read - rxb%d has %c\n", serial_reg-SC0RXB,
	510	(char )dest));
	511	break;
	512
	513	/* status registers */
	514	case SC0STR:
	515	case SC1STR:
	516	case SC2STR:
	517	read_status_reg(me, serial, serial_reg-SC0STR, dest, nr_bytes);
	518	HW_TRACE ((me, "read - status reg%d has 0x%x\n", serial_reg-SC0STR,
74ccc978	519	(uint8_t )dest));
c906108c SS	520	break;
	521
	522	case SC2TIM:
	523	read_serial2_timer_reg(me, serial, dest, nr_bytes);
74ccc978	524	HW_TRACE ((me, "read - serial2 timer reg %d\n", (uint8_t )dest));
c906108c SS	525	break;
	526
	527	default:
	528	hw_abort(me, "invalid address");
	529	}
	530
	531	return nr_bytes;
	532	}
	533
	534
	535	static void
	536	write_control_reg (struct hw *me,
	537	struct mn103ser *serial,
	538	unsigned_word serial_reg,
	539	const void *source,
	540	unsigned nr_bytes)
	541	{
74ccc978	542	uint16_t val = LE2H_2 ((uint16_t )source);
c906108c SS	543
	544	/* really allow 1 byte write, too */
	545	if ( nr_bytes == 2 )
	546	{
	547	if ( serial_reg == 2 && (val & 0x0C04) != 0 )
	548	{
	549	hw_abort(me, "Cannot write to read-only bits of SC2CTR.");
	550	}
	551	else
	552	{
	553	serial->device[serial_reg].control = val;
	554	}
	555	}
	556	else
	557	{
	558	hw_abort (me, "bad read size of %d bytes from SC%dSTR.", nr_bytes,
	559	serial_reg);
	560	}
	561	}
	562
	563
	564	static void
	565	write_intmode_reg (struct hw *me,
	566	struct mn103ser *serial,
	567	unsigned_word serial_reg,
	568	const void *source,
	569	unsigned nr_bytes)
	570	{
74ccc978	571	uint8_t val = (uint8_t )source;
c906108c SS	572
	573	if ( nr_bytes == 1 )
	574	{
	575	/* Check for attempt to write to read-only bits of register. */
	576	if ( ( serial_reg == 2 && (val & 0xCA) != 0 )
	577	\|\| ( serial_reg != 2 && (val & 0x4A) != 0 ) )
	578	{
	579	hw_abort(me, "Cannot write to read-only bits of SC%dICR.",
	580	serial_reg);
	581	}
	582	else
	583	{
	584	serial->device[serial_reg].intmode = val;
	585	}
	586	}
	587	else
	588	{
	589	hw_abort (me, "bad write size of %d bytes to SC%dICR.", nr_bytes,
	590	serial_reg);
	591	}
	592	}
	593
	594
	595	static void
	596	write_txb (struct hw *me,
	597	struct mn103ser *serial,
	598	unsigned_word serial_reg,
	599	const void *source,
	600	unsigned nr_bytes)
	601	{
	602	if ( nr_bytes == 1 )
	603	{
952ad68f MF	604	SIM_DESC sd = hw_system (me);
	605	int status;
	606
74ccc978	607	serial->device[serial_reg].txb = (uint8_t )source;
c906108c	608
952ad68f MF	609	status = dv_sockser_status (sd);
952ad68f MF	610	if (!(status & DV_SOCKSER_DISCONNECTED))
c906108c	611	{
952ad68f	612	dv_sockser_write(sd, * (char*) source);
c906108c SS	613	}
	614	else
	615	{
952ad68f MF	616	sim_io_write_stdout(sd, (char *)source, 1);
952ad68f MF	617	sim_io_flush_stdout(sd);
c906108c SS	618	}
	619
	620	hw_port_event (me, serial_reg+SERIAL0_SEND, 1);
	621	}
	622	else
	623	{
	624	hw_abort (me, "bad write size of %d bytes to SC%dTXB.", nr_bytes,
	625	serial_reg);
	626	}
	627	}
	628
	629
	630	static void
	631	write_serial2_timer_reg (struct hw *me,
	632	struct mn103ser *serial,
	633	const void *source,
	634	unsigned nr_bytes)
	635	{
	636	if ( nr_bytes == 1 )
	637	{
74ccc978	638	serial->serial2_timer_reg = (uint8_t )source;
c906108c SS	639	}
	640	else
	641	{
	642	hw_abort (me, "bad write size of %d bytes to SC2TIM.", nr_bytes);
	643	}
	644	}
	645
	646
	647	static unsigned
	648	mn103ser_io_write_buffer (struct hw *me,
	649	const void *source,
	650	int space,
	651	unsigned_word base,
	652	unsigned nr_bytes)
	653	{
	654	struct mn103ser *serial = hw_data (me);
	655	enum serial_register_types serial_reg;
	656	HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
	657
	658	serial_reg = decode_addr (me, serial, base);
	659	switch (serial_reg)
	660	{
	661	/* control registers */
	662	case SC0CTR:
	663	case SC1CTR:
	664	case SC2CTR:
	665	HW_TRACE ((me, "write - ctrl reg%d has 0x%x, nrbytes=%d.\n",
74ccc978	666	serial_reg-SC0CTR, (uint8_t )source, nr_bytes));
c906108c SS	667	write_control_reg(me, serial, serial_reg-SC0CTR, source, nr_bytes);
	668	break;
	669
	670	/* interrupt mode registers */
	671	case SC0ICR:
	672	case SC1ICR:
	673	case SC2ICR:
	674	HW_TRACE ((me, "write - intmode reg%d has 0x%x, nrbytes=%d.\n",
74ccc978	675	serial_reg-SC0ICR, (uint8_t )source, nr_bytes));
c906108c SS	676	write_intmode_reg(me, serial, serial_reg-SC0ICR, source, nr_bytes);
	677	break;
	678
	679	/* transmission buffers */
	680	case SC0TXB:
	681	case SC1TXB:
	682	case SC2TXB:
	683	HW_TRACE ((me, "write - txb%d has %c, nrbytes=%d.\n",
	684	serial_reg-SC0TXB, (char )source, nr_bytes));
	685	write_txb(me, serial, serial_reg-SC0TXB, source, nr_bytes);
	686	break;
	687
	688	/* reception buffers */
	689	case SC0RXB:
	690	case SC1RXB:
	691	case SC2RXB:
	692	hw_abort(me, "Cannot write to reception buffer.");
	693	break;
	694
	695	/* status registers */
	696	case SC0STR:
	697	case SC1STR:
	698	case SC2STR:
	699	hw_abort(me, "Cannot write to status register.");
	700	break;
	701
	702	case SC2TIM:
	703	HW_TRACE ((me, "read - serial2 timer reg %d (nrbytes=%d)\n",
74ccc978	704	(uint8_t )source, nr_bytes));
c906108c SS	705	write_serial2_timer_reg(me, serial, source, nr_bytes);
	706	break;
	707
	708	default:
	709	hw_abort(me, "invalid address");
	710	}
	711
	712	return nr_bytes;
	713	}
	714
	715
	716	const struct hw_descriptor dv_mn103ser_descriptor[] = {
	717	{ "mn103ser", mn103ser_finish, },
	718	{ NULL },
	719	};