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[thirdparty/binutils-gdb.git] / sim / mn10300 / simops.c
CommitLineData
05ccbdfd
JL		 1#include "config.h"
2
3#include <signal.h>
4#ifdef HAVE_UNISTD_H
5#include <unistd.h>
6#endif
7#include "mn10300_sim.h"
8#include "simops.h"
9#include "sys/syscall.h"
10#include "bfd.h"
11#include <errno.h>
12#include <sys/stat.h>
13#include <sys/times.h>
14#include <sys/time.h>
15
9f4a551e
JL		 16#define REG0(X) ((X) & 0x3)
17#define REG1(X) (((X) & 0xc) >> 2)
95d18eb7 18#define REG0_4(X) (((X) & 0x30) >> 4)
9f4a551e
JL		 19#define REG0_8(X) (((X) & 0x300) >> 8)
20#define REG1_8(X) (((X) & 0xc00) >> 10)
2e8f4133 21#define REG0_16(X) (((X) & 0x30000) >> 16)
9f4a551e 22#define REG1_16(X) (((X) & 0xc0000) >> 18)
05ccbdfd 23\f
707641f6 24/* mov imm8, dn */
d2523010
JL		 25void OP_8000 (insn, extension)
26 unsigned long insn, extension;
05ccbdfd 27{
9f4a551e 28 State.regs[REG_D0 + REG0_8 (insn)] = SEXT8 (insn & 0xff);
05ccbdfd
JL		 29}
30
707641f6 31/* mov dm, dn */
d2523010
JL		 32void OP_80 (insn, extension)
33 unsigned long insn, extension;
05ccbdfd 34{
9f4a551e 35 State.regs[REG_D0 + REG0 (insn)] = State.regs[REG_D0 + REG1 (insn)];
05ccbdfd
JL		 36}
37
707641f6 38/* mov dm, an */
d2523010
JL		 39void OP_F1E0 (insn, extension)
40 unsigned long insn, extension;
05ccbdfd 41{
9f4a551e 42 State.regs[REG_A0 + REG0 (insn)] = State.regs[REG_D0 + REG1 (insn)];
05ccbdfd
JL		 43}
44
707641f6 45/* mov am, dn */
d2523010
JL		 46void OP_F1D0 (insn, extension)
47 unsigned long insn, extension;
05ccbdfd 48{
9f4a551e 49 State.regs[REG_D0 + REG0 (insn)] = State.regs[REG_A0 + REG1 (insn)];
05ccbdfd
JL		 50}
51
707641f6 52/* mov imm8, an */
d2523010
JL		 53void OP_9000 (insn, extension)
54 unsigned long insn, extension;
05ccbdfd 55{
9f4a551e 56 State.regs[REG_A0 + REG0_8 (insn)] = insn & 0xff;
05ccbdfd
JL		 57}
58
707641f6 59/* mov am, an */
d2523010
JL		 60void OP_90 (insn, extension)
61 unsigned long insn, extension;
05ccbdfd 62{
9f4a551e 63 State.regs[REG_A0 + REG0 (insn)] = State.regs[REG_A0 + REG1 (insn)];
05ccbdfd
JL		 64}
65
1f3bea21 66/* mov sp, an */
d2523010
JL		 67void OP_3C (insn, extension)
68 unsigned long insn, extension;
05ccbdfd 69{
9f4a551e 70 State.regs[REG_A0 + REG0 (insn)] = State.regs[REG_SP];
05ccbdfd
JL		 71}
72
1f3bea21 73/* mov am, sp */
d2523010
JL		 74void OP_F2F0 (insn, extension)
75 unsigned long insn, extension;
05ccbdfd 76{
9f4a551e 77 State.regs[REG_SP] = State.regs[REG_A0 + REG1 (insn)];
05ccbdfd
JL		 78}
79
707641f6 80/* mov psw, dn */
d2523010
JL		 81void OP_F2E4 (insn, extension)
82 unsigned long insn, extension;
05ccbdfd 83{
9f4a551e 84 State.regs[REG_D0 + REG0 (insn)] = PSW;
05ccbdfd
JL		 85}
86
707641f6 87/* mov dm, psw */
d2523010
JL		 88void OP_F2F3 (insn, extension)
89 unsigned long insn, extension;
05ccbdfd 90{
9f4a551e 91 PSW = State.regs[REG_D0 + REG1 (insn)];
05ccbdfd
JL		 92}
93
707641f6 94/* mov mdr, dn */
d2523010
JL		 95void OP_F2E0 (insn, extension)
96 unsigned long insn, extension;
05ccbdfd 97{
9f4a551e 98 State.regs[REG_D0 + REG0 (insn)] = State.regs[REG_MDR];
05ccbdfd
JL		 99}
100
707641f6 101/* mov dm, mdr */
d2523010
JL		 102void OP_F2F2 (insn, extension)
103 unsigned long insn, extension;
05ccbdfd 104{
9f4a551e 105 State.regs[REG_MDR] = State.regs[REG_D0 + REG1 (insn)];
05ccbdfd
JL		 106}
107
2e35551c 108/* mov (am), dn */
d2523010
JL		 109void OP_70 (insn, extension)
110 unsigned long insn, extension;
05ccbdfd 111{
9f4a551e 112 State.regs[REG_D0 + REG1 (insn)]
003c91be 113 = load_word (State.regs[REG_A0 + REG0 (insn)]);
05ccbdfd
JL		 114}
115
2e35551c 116/* mov (d8,am), dn */
d2523010
JL		 117void OP_F80000 (insn, extension)
118 unsigned long insn, extension;
05ccbdfd 119{
9f4a551e 120 State.regs[REG_D0 + REG1_8 (insn)]
003c91be 121 = load_word ((State.regs[REG_A0 + REG0_8 (insn)] + SEXT8 (insn & 0xff)));
05ccbdfd
JL		 122}
123
ecb4b5a3 124/* mov (d16,am), dn */
d2523010
JL		 125void OP_FA000000 (insn, extension)
126 unsigned long insn, extension;
05ccbdfd 127{
9f4a551e 128 State.regs[REG_D0 + REG1_16 (insn)]
003c91be
JL		 129 = load_word ((State.regs[REG_A0 + REG0_16 (insn)]
130 + SEXT16 (insn & 0xffff)));
05ccbdfd
JL		 131}
132
de0dce7c 133/* mov (d32,am), dn */
d2523010
JL		 134void OP_FC000000 (insn, extension)
135 unsigned long insn, extension;
05ccbdfd 136{
9f4a551e 137 State.regs[REG_D0 + REG1_16 (insn)]
003c91be
JL		 138 = load_word ((State.regs[REG_A0 + REG0_16 (insn)]
139 + ((insn & 0xffff) << 16) + extension));
05ccbdfd
JL		 140}
141
707641f6 142/* mov (d8,sp), dn */
d2523010
JL		 143void OP_5800 (insn, extension)
144 unsigned long insn, extension;
05ccbdfd 145{
9f4a551e 146 State.regs[REG_D0 + REG0_8 (insn)]
003c91be 147 = load_word (State.regs[REG_SP] + (insn & 0xff));
05ccbdfd
JL		 148}
149
ecb4b5a3 150/* mov (d16,sp), dn */
d2523010
JL		 151void OP_FAB40000 (insn, extension)
152 unsigned long insn, extension;
05ccbdfd 153{
9f4a551e 154 State.regs[REG_D0 + REG0_16 (insn)]
003c91be 155 = load_word (State.regs[REG_SP] + (insn & 0xffff));
05ccbdfd
JL		 156}
157
de0dce7c 158/* mov (d32,sp), dn */
d2523010
JL		 159void OP_FCB40000 (insn, extension)
160 unsigned long insn, extension;
05ccbdfd 161{
9f4a551e 162 State.regs[REG_D0 + REG0_16 (insn)]
003c91be 163 = load_word (State.regs[REG_SP] + (((insn & 0xffff) << 16) + extension));
05ccbdfd
JL		 164}
165
f5f13c1d 166/* mov (di,am), dn */
d2523010
JL		 167void OP_F300 (insn, extension)
168 unsigned long insn, extension;
05ccbdfd 169{
95d18eb7 170 State.regs[REG_D0 + REG0_4 (insn)]
003c91be
JL		 171 = load_word ((State.regs[REG_A0 + REG0 (insn)]
172 + State.regs[REG_D0 + REG1 (insn)]));
05ccbdfd
JL		 173}
174
707641f6 175/* mov (abs16), dn */
d2523010
JL		 176void OP_300000 (insn, extension)
177 unsigned long insn, extension;
05ccbdfd 178{
003c91be 179 State.regs[REG_D0 + REG0_16 (insn)] = load_word ((insn & 0xffff));
05ccbdfd
JL		 180}
181
de0dce7c 182/* mov (abs32), dn */
d2523010
JL		 183void OP_FCA40000 (insn, extension)
184 unsigned long insn, extension;
05ccbdfd 185{
9f4a551e 186 State.regs[REG_D0 + REG0_16 (insn)]
003c91be 187 = load_word ((((insn & 0xffff) << 16) + extension));
05ccbdfd
JL		 188}
189
707641f6 190/* mov (am), an */
d2523010
JL		 191void OP_F000 (insn, extension)
192 unsigned long insn, extension;
05ccbdfd 193{
9f4a551e 194 State.regs[REG_A0 + REG1 (insn)]
003c91be 195 = load_word (State.regs[REG_A0 + REG0 (insn)]);
05ccbdfd
JL		 196}
197
2e35551c 198/* mov (d8,am), an */
d2523010
JL		 199void OP_F82000 (insn, extension)
200 unsigned long insn, extension;
05ccbdfd 201{
9f4a551e 202 State.regs[REG_A0 + REG1_8 (insn)]
003c91be
JL		 203 = load_word ((State.regs[REG_A0 + REG0_8 (insn)]
204 + SEXT8 (insn & 0xff)));
05ccbdfd
JL		 205}
206
ecb4b5a3 207/* mov (d16,am), an */
d2523010
JL		 208void OP_FA200000 (insn, extension)
209 unsigned long insn, extension;
05ccbdfd 210{
9f4a551e 211 State.regs[REG_A0 + REG1_16 (insn)]
003c91be
JL		 212 = load_word ((State.regs[REG_A0 + REG0_16 (insn)]
213 + SEXT16 (insn & 0xffff)));
05ccbdfd
JL		 214}
215
de0dce7c 216/* mov (d32,am), an */
d2523010
JL		 217void OP_FC200000 (insn, extension)
218 unsigned long insn, extension;
05ccbdfd 219{
9f4a551e 220 State.regs[REG_A0 + REG1_16 (insn)]
003c91be
JL		 221 = load_word ((State.regs[REG_A0 + REG0_16 (insn)]
222 + ((insn & 0xffff) << 16) + extension));
05ccbdfd
JL		 223}
224
707641f6 225/* mov (d8,sp), an */
d2523010
JL		 226void OP_5C00 (insn, extension)
227 unsigned long insn, extension;
05ccbdfd 228{
9f4a551e 229 State.regs[REG_A0 + REG0_8 (insn)]
003c91be 230 = load_word (State.regs[REG_SP] + (insn & 0xff));
05ccbdfd
JL		 231}
232
ecb4b5a3 233/* mov (d16,sp), an */
d2523010
JL		 234void OP_FAB00000 (insn, extension)
235 unsigned long insn, extension;
05ccbdfd 236{
9f4a551e 237 State.regs[REG_A0 + REG0_16 (insn)]
003c91be 238 = load_word (State.regs[REG_SP] + (insn & 0xffff));
05ccbdfd
JL		 239}
240
de0dce7c 241/* mov (d32,sp), an */
d2523010
JL		 242void OP_FCB00000 (insn, extension)
243 unsigned long insn, extension;
05ccbdfd 244{
9f4a551e 245 State.regs[REG_A0 + REG0_16 (insn)]
003c91be 246 = load_word (State.regs[REG_SP] + (((insn & 0xffff) << 16) + extension));
05ccbdfd
JL		 247}
248
de0dce7c 249/* mov (di,am), an */
d2523010
JL		 250void OP_F380 (insn, extension)
251 unsigned long insn, extension;
05ccbdfd 252{
95d18eb7 253 State.regs[REG_A0 + REG0_4 (insn)]
003c91be
JL		 254 = load_word ((State.regs[REG_A0 + REG0 (insn)]
255 + State.regs[REG_D0 + REG1 (insn)]));
05ccbdfd
JL		 256}
257
ecb4b5a3 258/* mov (abs16), an */
d2523010
JL		 259void OP_FAA00000 (insn, extension)
260 unsigned long insn, extension;
05ccbdfd 261{
003c91be 262 State.regs[REG_A0 + REG0_16 (insn)] = load_word ((insn & 0xffff));
05ccbdfd
JL		 263}
264
de0dce7c 265/* mov (abs32), an */
d2523010
JL		 266void OP_FCA00000 (insn, extension)
267 unsigned long insn, extension;
05ccbdfd 268{
9f4a551e 269 State.regs[REG_A0 + REG0_16 (insn)]
003c91be 270 = load_word ((((insn & 0xffff) << 16) + extension));
05ccbdfd
JL		 271}
272
2e35551c 273/* mov (d8,am), sp */
d2523010
JL		 274void OP_F8F000 (insn, extension)
275 unsigned long insn, extension;
05ccbdfd 276{
2e35551c 277 State.regs[REG_SP]
003c91be
JL		 278 = load_word ((State.regs[REG_A0 + REG0_8 (insn)]
279 + SEXT8 (insn & 0xff)));
05ccbdfd
JL		 280}
281
707641f6 282/* mov dm, (an) */
d2523010
JL		 283void OP_60 (insn, extension)
284 unsigned long insn, extension;
05ccbdfd 285{
003c91be
JL		 286 store_word (State.regs[REG_A0 + REG0 (insn)],
287 State.regs[REG_D0 + REG1 (insn)]);
05ccbdfd
JL		 288}
289
2e35551c 290/* mov dm, (d8,an) */
d2523010
JL		 291void OP_F81000 (insn, extension)
292 unsigned long insn, extension;
05ccbdfd 293{
003c91be
JL		 294 store_word ((State.regs[REG_A0 + REG0_8 (insn)] + SEXT8 (insn & 0xff)),
295 State.regs[REG_D0 + REG1_8 (insn)]);
05ccbdfd
JL		 296}
297
ecb4b5a3 298/* mov dm (d16,an) */
d2523010
JL		 299void OP_FA100000 (insn, extension)
300 unsigned long insn, extension;
05ccbdfd 301{
003c91be
JL		 302 store_word ((State.regs[REG_A0 + REG0_16 (insn)] + SEXT16 (insn & 0xffff)),
303 State.regs[REG_D0 + REG1_16 (insn)]);
05ccbdfd
JL		 304}
305
de0dce7c 306/* mov dm (d32,an) */
d2523010
JL		 307void OP_FC100000 (insn, extension)
308 unsigned long insn, extension;
05ccbdfd 309{
003c91be
JL		 310 store_word ((State.regs[REG_A0 + REG0_16 (insn)]
311 + ((insn & 0xffff) << 16) + extension),
312 State.regs[REG_D0 + REG1_16 (insn)]);
05ccbdfd
JL		 313}
314
707641f6 315/* mov dm, (d8,sp) */
d2523010
JL		 316void OP_4200 (insn, extension)
317 unsigned long insn, extension;
05ccbdfd 318{
003c91be
JL		 319 store_word (State.regs[REG_SP] + (insn & 0xff),
320 State.regs[REG_D0 + REG1_8 (insn)]);
05ccbdfd
JL		 321}
322
ecb4b5a3 323/* mov dm, (d16,sp) */
d2523010
JL		 324void OP_FA910000 (insn, extension)
325 unsigned long insn, extension;
05ccbdfd 326{
003c91be
JL		 327 store_word (State.regs[REG_SP] + (insn & 0xffff),
328 State.regs[REG_D0 + REG1_16 (insn)]);
05ccbdfd
JL		 329}
330
de0dce7c 331/* mov dm, (d32,sp) */
d2523010
JL		 332void OP_FC910000 (insn, extension)
333 unsigned long insn, extension;
05ccbdfd 334{
003c91be
JL		 335 store_word (State.regs[REG_SP] + (((insn & 0xffff) << 16) + extension),
336 State.regs[REG_D0 + REG1_16 (insn)]);
05ccbdfd
JL		 337}
338
f5f13c1d 339/* mov dm, (di,an) */
d2523010
JL		 340void OP_F340 (insn, extension)
341 unsigned long insn, extension;
05ccbdfd 342{
003c91be
JL		 343 store_word ((State.regs[REG_A0 + REG0 (insn)]
344 + State.regs[REG_D0 + REG1 (insn)]),
345 State.regs[REG_D0 + REG0_4 (insn)]);
05ccbdfd
JL		 346}
347
707641f6 348/* mov dm, (abs16) */
d2523010
JL		 349void OP_10000 (insn, extension)
350 unsigned long insn, extension;
05ccbdfd 351{
003c91be 352 store_word ((insn & 0xffff), State.regs[REG_D0 + REG1_16 (insn)]);
05ccbdfd
JL		 353}
354
de0dce7c 355/* mov dm, (abs32) */
d2523010
JL		 356void OP_FC810000 (insn, extension)
357 unsigned long insn, extension;
05ccbdfd 358{
003c91be
JL		 359 store_word ((((insn & 0xffff) << 16) + extension),
360 State.regs[REG_D0 + REG1_16 (insn)]);
05ccbdfd
JL		 361}
362
707641f6 363/* mov am, (an) */
d2523010
JL		 364void OP_F010 (insn, extension)
365 unsigned long insn, extension;
05ccbdfd 366{
003c91be
JL		 367 store_word (State.regs[REG_A0 + REG0 (insn)],
368 State.regs[REG_A0 + REG1 (insn)]);
05ccbdfd
JL		 369}
370
2e35551c 371/* mov am, (d8,an) */
d2523010
JL		 372void OP_F83000 (insn, extension)
373 unsigned long insn, extension;
05ccbdfd 374{
003c91be
JL		 375 store_word ((State.regs[REG_A0 + REG0_8 (insn)] + SEXT8 (insn & 0xff)),
376 State.regs[REG_A0 + REG1_8 (insn)]);
05ccbdfd
JL		 377}
378
de0dce7c 379/* mov am, (d16,an) */
d2523010
JL		 380void OP_FA300000 (insn, extension)
381 unsigned long insn, extension;
05ccbdfd 382{
003c91be
JL		 383 store_word ((State.regs[REG_A0 + REG0_16 (insn)] + SEXT16 (insn & 0xffff)),
384 State.regs[REG_A0 + REG1_16 (insn)]);
05ccbdfd
JL		 385}
386
de0dce7c 387/* mov am, (d32,an) */
d2523010
JL		 388void OP_FC300000 (insn, extension)
389 unsigned long insn, extension;
05ccbdfd 390{
003c91be
JL		 391 store_word ((State.regs[REG_A0 + REG0_16 (insn)]
392 + ((insn & 0xffff) << 16) + extension),
393 State.regs[REG_A0 + REG1_16 (insn)]);
05ccbdfd
JL		 394}
395
707641f6 396/* mov am, (d8,sp) */
d2523010
JL		 397void OP_4300 (insn, extension)
398 unsigned long insn, extension;
05ccbdfd 399{
003c91be
JL		 400 store_word (State.regs[REG_SP] + (insn & 0xff),
401 State.regs[REG_A0 + REG1_8 (insn)]);
05ccbdfd
JL		 402}
403
ecb4b5a3 404/* mov am, (d16,sp) */
d2523010
JL		 405void OP_FA900000 (insn, extension)
406 unsigned long insn, extension;
05ccbdfd 407{
003c91be
JL		 408 store_word (State.regs[REG_SP] + (insn & 0xffff),
409 State.regs[REG_A0 + REG1_16 (insn)]);
05ccbdfd
JL		 410}
411
de0dce7c 412/* mov am, (d32,sp) */
d2523010
JL		 413void OP_FC900000 (insn, extension)
414 unsigned long insn, extension;
05ccbdfd 415{
003c91be
JL		 416 store_word (State.regs[REG_SP] + (((insn & 0xffff) << 16) + extension),
417 State.regs[REG_A0 + REG1_16 (insn)]);
05ccbdfd
JL		 418}
419
f5f13c1d 420/* mov am, (di,an) */
d2523010
JL		 421void OP_F3C0 (insn, extension)
422 unsigned long insn, extension;
05ccbdfd 423{
003c91be
JL		 424 store_word ((State.regs[REG_A0 + REG0 (insn)]
425 + State.regs[REG_D0 + REG1 (insn)]),
426 State.regs[REG_A0 + REG0_4 (insn)]);
05ccbdfd
JL		 427}
428
ecb4b5a3 429/* mov am, (abs16) */
d2523010
JL		 430void OP_FA800000 (insn, extension)
431 unsigned long insn, extension;
05ccbdfd 432{
003c91be 433 store_word ((insn & 0xffff), State.regs[REG_A0 + REG1_16 (insn)]);
05ccbdfd
JL		 434}
435
de0dce7c 436/* mov am, (abs32) */
d2523010
JL		 437void OP_FC800000 (insn, extension)
438 unsigned long insn, extension;
05ccbdfd 439{
003c91be 440 store_word ((((insn & 0xffff) << 16) + extension), State.regs[REG_A0 + REG1_16 (insn)]);
05ccbdfd
JL		 441}
442
2e35551c 443/* mov sp, (d8,an) */
d2523010
JL		 444void OP_F8F400 (insn, extension)
445 unsigned long insn, extension;
05ccbdfd 446{
003c91be
JL		 447 store_word (State.regs[REG_A0 + REG0_8 (insn)] + SEXT8 (insn & 0xff),
448 State.regs[REG_SP]);
05ccbdfd
JL		 449}
450
707641f6 451/* mov imm16, dn */
d2523010
JL		 452void OP_2C0000 (insn, extension)
453 unsigned long insn, extension;
05ccbdfd 454{
707641f6
JL		 455 unsigned long value;
456
457 value = SEXT16 (insn & 0xffff);
9f4a551e 458 State.regs[REG_D0 + REG0_16 (insn)] = value;
05ccbdfd
JL		 459}
460
de0dce7c 461/* mov imm32,dn */
d2523010
JL		 462void OP_FCCC0000 (insn, extension)
463 unsigned long insn, extension;
05ccbdfd 464{
de0dce7c
JL		 465 unsigned long value;
466
7c52bf32 467 value = ((insn & 0xffff) << 16) + extension;
9f4a551e 468 State.regs[REG_D0 + REG0_16 (insn)] = value;
05ccbdfd
JL		 469}
470
707641f6 471/* mov imm16, an */
d2523010
JL		 472void OP_240000 (insn, extension)
473 unsigned long insn, extension;
05ccbdfd 474{
707641f6
JL		 475 unsigned long value;
476
477 value = insn & 0xffff;
9f4a551e 478 State.regs[REG_A0 + REG0_16 (insn)] = value;
05ccbdfd
JL		 479}
480
de0dce7c 481/* mov imm32, an */
d2523010
JL		 482void OP_FCDC0000 (insn, extension)
483 unsigned long insn, extension;
05ccbdfd 484{
73e65298
JL		 485 unsigned long value;
486
7c52bf32 487 value = ((insn & 0xffff) << 16) + extension;
9f4a551e 488 State.regs[REG_A0 + REG0_16 (insn)] = value;
05ccbdfd
JL		 489}
490
707641f6 491/* movbu (am), dn */
d2523010
JL		 492void OP_F040 (insn, extension)
493 unsigned long insn, extension;
05ccbdfd 494{
9f4a551e 495 State.regs[REG_D0 + REG1 (insn)]
003c91be 496 = load_byte (State.regs[REG_A0 + REG0 (insn)]);
05ccbdfd
JL		 497}
498
2e35551c 499/* movbu (d8,am), dn */
d2523010
JL		 500void OP_F84000 (insn, extension)
501 unsigned long insn, extension;
05ccbdfd 502{
9f4a551e 503 State.regs[REG_D0 + REG1_8 (insn)]
003c91be
JL		 504 = load_byte ((State.regs[REG_A0 + REG0_8 (insn)]
505 + SEXT8 (insn & 0xff)));
05ccbdfd
JL		 506}
507
ecb4b5a3 508/* movbu (d16,am), dn */
d2523010
JL		 509void OP_FA400000 (insn, extension)
510 unsigned long insn, extension;
05ccbdfd 511{
9f4a551e 512 State.regs[REG_D0 + REG1_16 (insn)]
003c91be
JL		 513 = load_byte ((State.regs[REG_A0 + REG0_16 (insn)]
514 + SEXT16 (insn & 0xffff)));
05ccbdfd
JL		 515}
516
de0dce7c 517/* movbu (d32,am), dn */
d2523010
JL		 518void OP_FC400000 (insn, extension)
519 unsigned long insn, extension;
05ccbdfd 520{
9f4a551e 521 State.regs[REG_D0 + REG1_16 (insn)]
003c91be
JL		 522 = load_byte ((State.regs[REG_A0 + REG0_16 (insn)]
523 + ((insn & 0xffff) << 16) + extension));
05ccbdfd
JL		 524}
525
2e35551c 526/* movbu (d8,sp), dn */
d2523010
JL		 527void OP_F8B800 (insn, extension)
528 unsigned long insn, extension;
05ccbdfd 529{
9f4a551e 530 State.regs[REG_D0 + REG0_8 (insn)]
003c91be 531 = load_byte ((State.regs[REG_SP] + (insn & 0xff)));
05ccbdfd
JL		 532}
533
ecb4b5a3 534/* movbu (d16,sp), dn */
d2523010
JL		 535void OP_FAB80000 (insn, extension)
536 unsigned long insn, extension;
05ccbdfd 537{
9f4a551e 538 State.regs[REG_D0 + REG0_16 (insn)]
003c91be 539 = load_byte ((State.regs[REG_SP] + (insn & 0xffff)));
05ccbdfd
JL		 540}
541
de0dce7c 542/* movbu (d32,sp), dn */
d2523010
JL		 543void OP_FCB80000 (insn, extension)
544 unsigned long insn, extension;
05ccbdfd 545{
9f4a551e 546 State.regs[REG_D0 + REG0_16 (insn)]
003c91be 547 = load_byte (State.regs[REG_SP] + (((insn & 0xffff) << 16) + extension));
05ccbdfd
JL		 548}
549
f5f13c1d 550/* movbu (di,am), dn */
d2523010
JL		 551void OP_F400 (insn, extension)
552 unsigned long insn, extension;
05ccbdfd 553{
95d18eb7 554 State.regs[REG_D0 + REG0_4 (insn)]
003c91be
JL		 555 = load_byte ((State.regs[REG_A0 + REG0 (insn)]
556 + State.regs[REG_D0 + REG1 (insn)]));
05ccbdfd
JL		 557}
558
707641f6 559/* movbu (abs16), dn */
d2523010
JL		 560void OP_340000 (insn, extension)
561 unsigned long insn, extension;
05ccbdfd 562{
003c91be 563 State.regs[REG_D0 + REG0_16 (insn)] = load_byte ((insn & 0xffff));
05ccbdfd
JL		 564}
565
de0dce7c 566/* movbu (abs32), dn */
d2523010
JL		 567void OP_FCA80000 (insn, extension)
568 unsigned long insn, extension;
05ccbdfd 569{
9f4a551e 570 State.regs[REG_D0 + REG0_16 (insn)]
003c91be 571 = load_byte ((((insn & 0xffff) << 16) + extension));
05ccbdfd
JL		 572}
573
707641f6 574/* movbu dm, (an) */
d2523010
JL		 575void OP_F050 (insn, extension)
576 unsigned long insn, extension;
05ccbdfd 577{
003c91be
JL		 578 store_byte (State.regs[REG_A0 + REG0 (insn)],
579 State.regs[REG_D0 + REG1 (insn)]);
05ccbdfd
JL		 580}
581
2e35551c 582/* movbu dm, (d8,an) */
d2523010
JL		 583void OP_F85000 (insn, extension)
584 unsigned long insn, extension;
05ccbdfd 585{
003c91be
JL		 586 store_byte ((State.regs[REG_A0 + REG0_8 (insn)] + SEXT8 (insn & 0xff)),
587 State.regs[REG_D0 + REG1_8 (insn)]);
05ccbdfd
JL		 588}
589
ecb4b5a3 590/* movbu dm, (d16,an) */
d2523010
JL		 591void OP_FA500000 (insn, extension)
592 unsigned long insn, extension;
05ccbdfd 593{
003c91be
JL		 594 store_byte ((State.regs[REG_A0 + REG0_16 (insn)] + SEXT16 (insn & 0xffff)),
595 State.regs[REG_D0 + REG1_16 (insn)]);
05ccbdfd
JL		 596}
597
de0dce7c 598/* movbu dm, (d32,an) */
d2523010
JL		 599void OP_FC500000 (insn, extension)
600 unsigned long insn, extension;
05ccbdfd 601{
003c91be
JL		 602 store_byte ((State.regs[REG_A0 + REG0_16 (insn)]
603 + ((insn & 0xffff) << 16) + extension),
604 State.regs[REG_D0 + REG1_16 (insn)]);
05ccbdfd
JL		 605}
606
2e35551c 607/* movbu dm, (d8,sp) */
d2523010
JL		 608void OP_F89200 (insn, extension)
609 unsigned long insn, extension;
05ccbdfd 610{
003c91be
JL		 611 store_byte (State.regs[REG_SP] + (insn & 0xff),
612 State.regs[REG_D0 + REG1_8 (insn)]);
05ccbdfd
JL		 613}
614
ecb4b5a3 615/* movbu dm, (d16,sp) */
d2523010
JL		 616void OP_FA920000 (insn, extension)
617 unsigned long insn, extension;
05ccbdfd 618{
003c91be
JL		 619 store_byte (State.regs[REG_SP] + (insn & 0xffff),
620 State.regs[REG_D0 + REG1_16 (insn)]);
05ccbdfd
JL		 621}
622
de0dce7c 623/* movbu dm (d32,sp) */
d2523010
JL		 624void OP_FC920000 (insn, extension)
625 unsigned long insn, extension;
05ccbdfd 626{
003c91be
JL		 627 store_byte (State.regs[REG_SP] + (((insn & 0xffff) << 16) + extension),
628 State.regs[REG_D0 + REG1_16 (insn)]);
05ccbdfd
JL		 629}
630
f5f13c1d 631/* movbu dm, (di,an) */
d2523010
JL		 632void OP_F440 (insn, extension)
633 unsigned long insn, extension;
05ccbdfd 634{
003c91be
JL		 635 store_byte ((State.regs[REG_A0 + REG0 (insn)]
636 + State.regs[REG_D0 + REG1 (insn)]),
637 State.regs[REG_D0 + REG0_4 (insn)]);
05ccbdfd
JL		 638}
639
707641f6 640/* movbu dm, (abs16) */
d2523010
JL		 641void OP_20000 (insn, extension)
642 unsigned long insn, extension;
05ccbdfd 643{
003c91be 644 store_byte ((insn & 0xffff), State.regs[REG_D0 + REG1_16 (insn)]);
05ccbdfd
JL		 645}
646
de0dce7c 647/* movbu dm, (abs32) */
d2523010
JL		 648void OP_FC820000 (insn, extension)
649 unsigned long insn, extension;
05ccbdfd 650{
003c91be 651 store_byte ((((insn & 0xffff) << 16) + extension), State.regs[REG_D0 + REG1_16 (insn)]);
05ccbdfd
JL		 652}
653
707641f6 654/* movhu (am), dn */
d2523010
JL		 655void OP_F060 (insn, extension)
656 unsigned long insn, extension;
05ccbdfd 657{
9f4a551e 658 State.regs[REG_D0 + REG1 (insn)]
003c91be 659 = load_half (State.regs[REG_A0 + REG0 (insn)]);
05ccbdfd
JL		 660}
661
2e35551c 662/* movhu (d8,am), dn */
d2523010
JL		 663void OP_F86000 (insn, extension)
664 unsigned long insn, extension;
05ccbdfd 665{
9f4a551e 666 State.regs[REG_D0 + REG1_8 (insn)]
003c91be
JL		 667 = load_half ((State.regs[REG_A0 + REG0_8 (insn)]
668 + SEXT8 (insn & 0xff)));
05ccbdfd
JL		 669}
670
ecb4b5a3 671/* movhu (d16,am), dn */
d2523010
JL		 672void OP_FA600000 (insn, extension)
673 unsigned long insn, extension;
05ccbdfd 674{
9f4a551e 675 State.regs[REG_D0 + REG1_16 (insn)]
003c91be
JL		 676 = load_half ((State.regs[REG_A0 + REG0_16 (insn)]
677 + SEXT16 (insn & 0xffff)));
05ccbdfd
JL		 678}
679
de0dce7c 680/* movhu (d32,am), dn */
d2523010
JL		 681void OP_FC600000 (insn, extension)
682 unsigned long insn, extension;
05ccbdfd 683{
9f4a551e 684 State.regs[REG_D0 + REG1_16 (insn)]
003c91be
JL		 685 = load_half ((State.regs[REG_A0 + REG0_16 (insn)]
686 + ((insn & 0xffff) << 16) + extension));
05ccbdfd
JL		 687}
688
2e35551c 689/* movhu (d8,sp) dn */
d2523010
JL		 690void OP_F8BC00 (insn, extension)
691 unsigned long insn, extension;
05ccbdfd 692{
9f4a551e 693 State.regs[REG_D0 + REG0_8 (insn)]
003c91be 694 = load_half ((State.regs[REG_SP] + (insn & 0xff)));
05ccbdfd
JL		 695}
696
ecb4b5a3 697/* movhu (d16,sp), dn */
d2523010
JL		 698void OP_FABC0000 (insn, extension)
699 unsigned long insn, extension;
05ccbdfd 700{
9f4a551e 701 State.regs[REG_D0 + REG0_16 (insn)]
003c91be 702 = load_half ((State.regs[REG_SP] + (insn & 0xffff)));
05ccbdfd
JL		 703}
704
de0dce7c 705/* movhu (d32,sp), dn */
d2523010
JL		 706void OP_FCBC0000 (insn, extension)
707 unsigned long insn, extension;
05ccbdfd 708{
9f4a551e 709 State.regs[REG_D0 + REG0_16 (insn)]
003c91be 710 = load_half (State.regs[REG_SP] + (((insn & 0xffff) << 16) + extension));
05ccbdfd
JL		 711}
712
f5f13c1d 713/* movhu (di,am), dn */
d2523010
JL		 714void OP_F480 (insn, extension)
715 unsigned long insn, extension;
05ccbdfd 716{
95d18eb7 717 State.regs[REG_D0 + REG0_4 (insn)]
003c91be
JL		 718 = load_half ((State.regs[REG_A0 + REG0 (insn)]
719 + State.regs[REG_D0 + REG1 (insn)]));
05ccbdfd
JL		 720}
721
707641f6 722/* movhu (abs16), dn */
d2523010
JL		 723void OP_380000 (insn, extension)
724 unsigned long insn, extension;
05ccbdfd 725{
003c91be 726 State.regs[REG_D0 + REG0_16 (insn)] = load_half ((insn & 0xffff));
05ccbdfd
JL		 727}
728
de0dce7c 729/* movhu (abs32), dn */
d2523010
JL		 730void OP_FCAC0000 (insn, extension)
731 unsigned long insn, extension;
05ccbdfd 732{
9f4a551e 733 State.regs[REG_D0 + REG0_16 (insn)]
003c91be 734 = load_half ((((insn & 0xffff) << 16) + extension));
05ccbdfd
JL		 735}
736
707641f6 737/* movhu dm, (an) */
d2523010
JL		 738void OP_F070 (insn, extension)
739 unsigned long insn, extension;
05ccbdfd 740{
003c91be
JL		 741 store_half (State.regs[REG_A0 + REG0 (insn)],
742 State.regs[REG_D0 + REG1 (insn)]);
05ccbdfd
JL		 743}
744
2e35551c 745/* movhu dm, (d8,an) */
d2523010
JL		 746void OP_F87000 (insn, extension)
747 unsigned long insn, extension;
05ccbdfd 748{
003c91be
JL		 749 store_half ((State.regs[REG_A0 + REG0_8 (insn)] + SEXT8 (insn & 0xff)),
750 State.regs[REG_D0 + REG1_8 (insn)]);
05ccbdfd
JL		 751}
752
ecb4b5a3 753/* movhu dm, (d16,an) */
d2523010
JL		 754void OP_FA700000 (insn, extension)
755 unsigned long insn, extension;
05ccbdfd 756{
003c91be
JL		 757 store_half ((State.regs[REG_A0 + REG0_16 (insn)] + SEXT16 (insn & 0xffff)),
758 State.regs[REG_D0 + REG1_16 (insn)]);
05ccbdfd
JL		 759}
760
de0dce7c 761/* movhu dm, (d32,an) */
d2523010
JL		 762void OP_FC700000 (insn, extension)
763 unsigned long insn, extension;
05ccbdfd 764{
003c91be
JL		 765 store_half ((State.regs[REG_A0 + REG0_16 (insn)]
766 + ((insn & 0xffff) << 16) + extension),
767 State.regs[REG_D0 + REG1_16 (insn)]);
05ccbdfd
JL		 768}
769
2e35551c 770/* movhu dm,(d8,sp) */
d2523010
JL		 771void OP_F89300 (insn, extension)
772 unsigned long insn, extension;
05ccbdfd 773{
003c91be
JL		 774 store_half (State.regs[REG_SP] + (insn & 0xff),
775 State.regs[REG_D0 + REG1_8 (insn)]);
05ccbdfd
JL		 776}
777
ecb4b5a3 778/* movhu dm,(d16,sp) */
d2523010
JL		 779void OP_FA930000 (insn, extension)
780 unsigned long insn, extension;
05ccbdfd 781{
003c91be
JL		 782 store_half (State.regs[REG_SP] + (insn & 0xffff),
783 State.regs[REG_D0 + REG1_16 (insn)]);
05ccbdfd
JL		 784}
785
de0dce7c 786/* movhu dm,(d32,sp) */
d2523010
JL		 787void OP_FC930000 (insn, extension)
788 unsigned long insn, extension;
05ccbdfd 789{
003c91be
JL		 790 store_half (State.regs[REG_SP] + (((insn & 0xffff) << 16) + extension),
791 State.regs[REG_D0 + REG1_16 (insn)]);
05ccbdfd
JL		 792}
793
f5f13c1d 794/* movhu dm, (di,an) */
d2523010
JL		 795void OP_F4C0 (insn, extension)
796 unsigned long insn, extension;
05ccbdfd 797{
003c91be
JL		 798 store_half ((State.regs[REG_A0 + REG0 (insn)]
799 + State.regs[REG_D0 + REG1 (insn)]),
800 State.regs[REG_D0 + REG0_4 (insn)]);
05ccbdfd
JL		 801}
802
707641f6 803/* movhu dm, (abs16) */
d2523010
JL		 804void OP_30000 (insn, extension)
805 unsigned long insn, extension;
05ccbdfd 806{
003c91be 807 store_half ((insn & 0xffff), State.regs[REG_D0 + REG1_16 (insn)]);
05ccbdfd
JL		 808}
809
de0dce7c 810/* movhu dm, (abs32) */
d2523010
JL		 811void OP_FC830000 (insn, extension)
812 unsigned long insn, extension;
05ccbdfd 813{
003c91be 814 store_half ((((insn & 0xffff) << 16) + extension), State.regs[REG_D0 + REG1_16 (insn)]);
05ccbdfd
JL		 815}
816
707641f6 817/* ext dn */
d2523010
JL		 818void OP_F2D0 (insn, extension)
819 unsigned long insn, extension;
05ccbdfd 820{
9f4a551e 821 if (State.regs[REG_D0 + REG0 (insn)] & 0x80000000)
707641f6
JL		 822 State.regs[REG_MDR] = -1;
823 else
824 State.regs[REG_MDR] = 0;
05ccbdfd
JL		 825}
826
707641f6 827/* extb dn */
d2523010
JL		 828void OP_10 (insn, extension)
829 unsigned long insn, extension;
05ccbdfd 830{
9f4a551e 831 State.regs[REG_D0 + REG0 (insn)] = SEXT8 (State.regs[REG_D0 + REG0 (insn)]);
05ccbdfd
JL		 832}
833
707641f6 834/* extbu dn */
d2523010
JL		 835void OP_14 (insn, extension)
836 unsigned long insn, extension;
05ccbdfd 837{
9f4a551e 838 State.regs[REG_D0 + REG0 (insn)] &= 0xff;
05ccbdfd
JL		 839}
840
707641f6 841/* exth dn */
d2523010
JL		 842void OP_18 (insn, extension)
843 unsigned long insn, extension;
05ccbdfd 844{
9f4a551e
JL		 845 State.regs[REG_D0 + REG0 (insn)]
846 = SEXT16 (State.regs[REG_D0 + REG0 (insn)]);
05ccbdfd
JL		 847}
848
707641f6 849/* exthu dn */
d2523010
JL		 850void OP_1C (insn, extension)
851 unsigned long insn, extension;
05ccbdfd 852{
9f4a551e 853 State.regs[REG_D0 + REG0 (insn)] &= 0xffff;
05ccbdfd
JL		 854}
855
1f3bea21 856/* movm (sp), reg_list */
d2523010
JL		 857void OP_CE00 (insn, extension)
858 unsigned long insn, extension;
05ccbdfd 859{
1f3bea21
JL		 860 unsigned long sp = State.regs[REG_SP];
861 unsigned long mask;
862
863 mask = insn & 0xff;
864
865 if (mask & 0x8)
866 {
867 sp += 4;
003c91be 868 State.regs[REG_LAR] = load_word (sp);
1f3bea21 869 sp += 4;
003c91be 870 State.regs[REG_LIR] = load_word (sp);
1f3bea21 871 sp += 4;
003c91be 872 State.regs[REG_MDR] = load_word (sp);
1f3bea21 873 sp += 4;
003c91be 874 State.regs[REG_A0 + 1] = load_word (sp);
1f3bea21 875 sp += 4;
003c91be 876 State.regs[REG_A0] = load_word (sp);
1f3bea21 877 sp += 4;
003c91be 878 State.regs[REG_D0 + 1] = load_word (sp);
1f3bea21 879 sp += 4;
003c91be 880 State.regs[REG_D0] = load_word (sp);
1f3bea21
JL		 881 sp += 4;
882 }
883
884 if (mask & 0x10)
885 {
003c91be 886 State.regs[REG_A0 + 3] = load_word (sp);
1f3bea21
JL		 887 sp += 4;
888 }
889
890 if (mask & 0x20)
891 {
003c91be 892 State.regs[REG_A0 + 2] = load_word (sp);
1f3bea21
JL		 893 sp += 4;
894 }
895
896 if (mask & 0x40)
897 {
003c91be 898 State.regs[REG_D0 + 3] = load_word (sp);
1f3bea21
JL		 899 sp += 4;
900 }
901
902 if (mask & 0x80)
903 {
003c91be 904 State.regs[REG_D0 + 2] = load_word (sp);
1f3bea21
JL		 905 sp += 4;
906 }
907
908 /* And make sure to update the stack pointer. */
909 State.regs[REG_SP] = sp;
910}
911
912/* movm reg_list, (sp) */
d2523010
JL		 913void OP_CF00 (insn, extension)
914 unsigned long insn, extension;
05ccbdfd 915{
1f3bea21
JL		 916 unsigned long sp = State.regs[REG_SP];
917 unsigned long mask;
918
919 mask = insn & 0xff;
920
921 if (mask & 0x80)
922 {
923 sp -= 4;
003c91be 924 store_word (sp, State.regs[REG_D0 + 2]);
1f3bea21
JL		 925 }
926
927 if (mask & 0x40)
928 {
929 sp -= 4;
003c91be 930 store_word (sp, State.regs[REG_D0 + 3]);
1f3bea21
JL		 931 }
932
933 if (mask & 0x20)
934 {
935 sp -= 4;
003c91be 936 store_word (sp, State.regs[REG_A0 + 2]);
1f3bea21
JL		 937 }
938
939 if (mask & 0x10)
940 {
941 sp -= 4;
003c91be 942 store_word (sp, State.regs[REG_A0 + 3]);
1f3bea21
JL		 943 }
944
945 if (mask & 0x8)
946 {
947 sp -= 4;
003c91be 948 store_word (sp, State.regs[REG_D0]);
1f3bea21 949 sp -= 4;
003c91be 950 store_word (sp, State.regs[REG_D0 + 1]);
1f3bea21 951 sp -= 4;
003c91be 952 store_word (sp, State.regs[REG_A0]);
1f3bea21 953 sp -= 4;
003c91be 954 store_word (sp, State.regs[REG_A0 + 1]);
1f3bea21 955 sp -= 4;
003c91be 956 store_word (sp, State.regs[REG_MDR]);
1f3bea21 957 sp -= 4;
003c91be 958 store_word (sp, State.regs[REG_LIR]);
1f3bea21 959 sp -= 4;
003c91be 960 store_word (sp, State.regs[REG_LAR]);
1f3bea21
JL		 961 sp -= 4;
962 }
963
964 /* And make sure to update the stack pointer. */
965 State.regs[REG_SP] = sp;
05ccbdfd
JL		 966}
967
73e65298 968/* clr dn */
d2523010
JL		 969void OP_0 (insn, extension)
970 unsigned long insn, extension;
05ccbdfd 971{
9f4a551e 972 State.regs[REG_D0 + REG1 (insn)] = 0;
73e65298
JL		 973
974 PSW |= PSW_Z;
975 PSW &= ~(PSW_V | PSW_C | PSW_N);
05ccbdfd
JL		 976}
977
de0dce7c 978/* add dm,dn */
d2523010
JL		 979void OP_E0 (insn, extension)
980 unsigned long insn, extension;
05ccbdfd 981{
73e65298
JL		 982 int z, c, n, v;
983 unsigned long reg1, reg2, value;
984
9f4a551e
JL		 985 reg1 = State.regs[REG_D0 + REG1 (insn)];
986 reg2 = State.regs[REG_D0 + REG0 (insn)];
73e65298 987 value = reg1 + reg2;
9f4a551e 988 State.regs[REG_D0 + REG0 (insn)] = value;
73e65298
JL		 989
990 z = (value == 0);
991 n = (value & 0x80000000);
0ade484f 992 c = (value < reg1) || (value < reg2);
d657034d 993 v = ((reg2 & 0x80000000) == (reg1 & 0x80000000)
b7b89deb 994 && (reg2 & 0x80000000) != (value & 0x80000000));
73e65298
JL		 995
996 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
997 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
998 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 999}
1000
73e65298 1001/* add dm, an */
d2523010
JL		 1002void OP_F160 (insn, extension)
1003 unsigned long insn, extension;
05ccbdfd 1004{
73e65298
JL		 1005 int z, c, n, v;
1006 unsigned long reg1, reg2, value;
1007
9f4a551e
JL		 1008 reg1 = State.regs[REG_D0 + REG1 (insn)];
1009 reg2 = State.regs[REG_A0 + REG0 (insn)];
73e65298 1010 value = reg1 + reg2;
9f4a551e 1011 State.regs[REG_A0 + REG0 (insn)] = value;
73e65298
JL		 1012
1013 z = (value == 0);
1014 n = (value & 0x80000000);
0ade484f 1015 c = (value < reg1) || (value < reg2);
d657034d 1016 v = ((reg2 & 0x80000000) == (reg1 & 0x80000000)
b7b89deb 1017 && (reg2 & 0x80000000) != (value & 0x80000000));
73e65298
JL		 1018
1019 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1020 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1021 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1022}
1023
de0dce7c 1024/* add am, dn */
d2523010
JL		 1025void OP_F150 (insn, extension)
1026 unsigned long insn, extension;
05ccbdfd 1027{
73e65298
JL		 1028 int z, c, n, v;
1029 unsigned long reg1, reg2, value;
1030
9f4a551e
JL		 1031 reg1 = State.regs[REG_A0 + REG1 (insn)];
1032 reg2 = State.regs[REG_D0 + REG0 (insn)];
73e65298 1033 value = reg1 + reg2;
9f4a551e 1034 State.regs[REG_D0 + REG0 (insn)] = value;
73e65298
JL		 1035
1036 z = (value == 0);
1037 n = (value & 0x80000000);
0ade484f 1038 c = (value < reg1) || (value < reg2);
d657034d 1039 v = ((reg2 & 0x80000000) == (reg1 & 0x80000000)
b7b89deb 1040 && (reg2 & 0x80000000) != (value & 0x80000000));
73e65298
JL		 1041
1042 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1043 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1044 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1045}
1046
73e65298 1047/* add am,an */
d2523010
JL		 1048void OP_F170 (insn, extension)
1049 unsigned long insn, extension;
05ccbdfd 1050{
73e65298
JL		 1051 int z, c, n, v;
1052 unsigned long reg1, reg2, value;
1053
9f4a551e
JL		 1054 reg1 = State.regs[REG_A0 + REG1 (insn)];
1055 reg2 = State.regs[REG_A0 + REG0 (insn)];
73e65298 1056 value = reg1 + reg2;
9f4a551e 1057 State.regs[REG_A0 + REG0 (insn)] = value;
73e65298
JL		 1058
1059 z = (value == 0);
1060 n = (value & 0x80000000);
0ade484f 1061 c = (value < reg1) || (value < reg2);
d657034d 1062 v = ((reg2 & 0x80000000) == (reg1 & 0x80000000)
b7b89deb 1063 && (reg2 & 0x80000000) != (value & 0x80000000));
73e65298
JL		 1064
1065 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1066 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1067 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1068}
1069
73e65298 1070/* add imm8, dn */
d2523010
JL		 1071void OP_2800 (insn, extension)
1072 unsigned long insn, extension;
05ccbdfd 1073{
73e65298
JL		 1074 int z, c, n, v;
1075 unsigned long reg1, imm, value;
1076
9f4a551e 1077 reg1 = State.regs[REG_D0 + REG0_8 (insn)];
73e65298
JL		 1078 imm = SEXT8 (insn & 0xff);
1079 value = reg1 + imm;
9f4a551e 1080 State.regs[REG_D0 + REG0_8 (insn)] = value;
73e65298
JL		 1081
1082 z = (value == 0);
1083 n = (value & 0x80000000);
0ade484f 1084 c = (value < reg1) || (value < imm);
d657034d 1085 v = ((reg1 & 0x80000000) == (imm & 0x80000000)
b7b89deb 1086 && (reg1 & 0x80000000) != (value & 0x80000000));
73e65298
JL		 1087
1088 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1089 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1090 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1091}
1092
73e65298 1093/* add imm16, dn */
d2523010
JL		 1094void OP_FAC00000 (insn, extension)
1095 unsigned long insn, extension;
05ccbdfd 1096{
73e65298
JL		 1097 int z, c, n, v;
1098 unsigned long reg1, imm, value;
1099
9f4a551e 1100 reg1 = State.regs[REG_D0 + REG0_16 (insn)];
73e65298
JL		 1101 imm = SEXT16 (insn & 0xffff);
1102 value = reg1 + imm;
9f4a551e 1103 State.regs[REG_D0 + REG0_16 (insn)] = value;
73e65298
JL		 1104
1105 z = (value == 0);
1106 n = (value & 0x80000000);
0ade484f 1107 c = (value < reg1) || (value < imm);
d657034d 1108 v = ((reg1 & 0x80000000) == (imm & 0x80000000)
b7b89deb 1109 && (reg1 & 0x80000000) != (value & 0x80000000));
73e65298
JL		 1110
1111 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1112 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1113 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1114}
1115
73e65298 1116/* add imm32,dn */
d2523010
JL		 1117void OP_FCC00000 (insn, extension)
1118 unsigned long insn, extension;
05ccbdfd 1119{
73e65298
JL		 1120 int z, c, n, v;
1121 unsigned long reg1, imm, value;
1122
9f4a551e 1123 reg1 = State.regs[REG_D0 + REG0_16 (insn)];
7c52bf32 1124 imm = ((insn & 0xffff) << 16) + extension;
73e65298 1125 value = reg1 + imm;
9f4a551e 1126 State.regs[REG_D0 + REG0_16 (insn)] = value;
73e65298
JL		 1127
1128 z = (value == 0);
1129 n = (value & 0x80000000);
0ade484f 1130 c = (value < reg1) || (value < imm);
d657034d 1131 v = ((reg1 & 0x80000000) == (imm & 0x80000000)
b7b89deb 1132 && (reg1 & 0x80000000) != (value & 0x80000000));
73e65298
JL		 1133
1134 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1135 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1136 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1137}
1138
73e65298 1139/* add imm8, an */
d2523010
JL		 1140void OP_2000 (insn, extension)
1141 unsigned long insn, extension;
05ccbdfd 1142{
73e65298
JL		 1143 int z, c, n, v;
1144 unsigned long reg1, imm, value;
1145
9f4a551e 1146 reg1 = State.regs[REG_A0 + REG0_8 (insn)];
6e7a01c1 1147 imm = SEXT8 (insn & 0xff);
73e65298 1148 value = reg1 + imm;
9f4a551e 1149 State.regs[REG_A0 + REG0_8 (insn)] = value;
73e65298
JL		 1150
1151 z = (value == 0);
1152 n = (value & 0x80000000);
0ade484f 1153 c = (value < reg1) || (value < imm);
d657034d 1154 v = ((reg1 & 0x80000000) == (imm & 0x80000000)
b7b89deb 1155 && (reg1 & 0x80000000) != (value & 0x80000000));
73e65298
JL		 1156
1157 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1158 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1159 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1160}
1161
73e65298 1162/* add imm16, an */
d2523010
JL		 1163void OP_FAD00000 (insn, extension)
1164 unsigned long insn, extension;
05ccbdfd 1165{
73e65298
JL		 1166 int z, c, n, v;
1167 unsigned long reg1, imm, value;
1168
9f4a551e 1169 reg1 = State.regs[REG_A0 + REG0_16 (insn)];
6e7a01c1 1170 imm = SEXT16 (insn & 0xffff);
73e65298 1171 value = reg1 + imm;
9f4a551e 1172 State.regs[REG_A0 + REG0_16 (insn)] = value;
73e65298
JL		 1173
1174 z = (value == 0);
1175 n = (value & 0x80000000);
0ade484f 1176 c = (value < reg1) || (value < imm);
d657034d 1177 v = ((reg1 & 0x80000000) == (imm & 0x80000000)
b7b89deb 1178 && (reg1 & 0x80000000) != (value & 0x80000000));
73e65298
JL		 1179
1180 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1181 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1182 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1183}
1184
73e65298 1185/* add imm32, an */
d2523010
JL		 1186void OP_FCD00000 (insn, extension)
1187 unsigned long insn, extension;
05ccbdfd 1188{
73e65298
JL		 1189 int z, c, n, v;
1190 unsigned long reg1, imm, value;
1191
9f4a551e 1192 reg1 = State.regs[REG_A0 + REG0_16 (insn)];
7c52bf32 1193 imm = ((insn & 0xffff) << 16) + extension;
73e65298 1194 value = reg1 + imm;
9f4a551e 1195 State.regs[REG_A0 + REG0_16 (insn)] = value;
73e65298
JL		 1196
1197 z = (value == 0);
1198 n = (value & 0x80000000);
0ade484f 1199 c = (value < reg1) || (value < imm);
d657034d 1200 v = ((reg1 & 0x80000000) == (imm & 0x80000000)
b7b89deb 1201 && (reg1 & 0x80000000) != (value & 0x80000000));
73e65298
JL		 1202
1203 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1204 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1205 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1206}
1207
de0dce7c 1208/* add imm8, sp */
d2523010
JL		 1209void OP_F8FE00 (insn, extension)
1210 unsigned long insn, extension;
05ccbdfd 1211{
73e65298
JL		 1212 unsigned long reg1, imm, value;
1213
1214 reg1 = State.regs[REG_SP];
1215 imm = SEXT8 (insn & 0xff);
1216 value = reg1 + imm;
1217 State.regs[REG_SP] = value;
05ccbdfd
JL		 1218}
1219
73e65298 1220/* add imm16,sp */
d2523010
JL		 1221void OP_FAFE0000 (insn, extension)
1222 unsigned long insn, extension;
05ccbdfd 1223{
73e65298
JL		 1224 unsigned long reg1, imm, value;
1225
1226 reg1 = State.regs[REG_SP];
1227 imm = SEXT16 (insn & 0xffff);
1228 value = reg1 + imm;
1229 State.regs[REG_SP] = value;
05ccbdfd
JL		 1230}
1231
de0dce7c 1232/* add imm32, sp */
d2523010
JL		 1233void OP_FCFE0000 (insn, extension)
1234 unsigned long insn, extension;
05ccbdfd 1235{
73e65298
JL		 1236 unsigned long reg1, imm, value;
1237
1238 reg1 = State.regs[REG_SP];
7c52bf32 1239 imm = ((insn & 0xffff) << 16) + extension;
73e65298
JL		 1240 value = reg1 + imm;
1241 State.regs[REG_SP] = value;
05ccbdfd
JL		 1242}
1243
de0dce7c 1244/* addc dm,dn */
d2523010
JL		 1245void OP_F140 (insn, extension)
1246 unsigned long insn, extension;
05ccbdfd 1247{
73e65298
JL		 1248 int z, c, n, v;
1249 unsigned long reg1, reg2, value;
1250
9f4a551e
JL		 1251 reg1 = State.regs[REG_D0 + REG1 (insn)];
1252 reg2 = State.regs[REG_D0 + REG0 (insn)];
73e65298 1253 value = reg1 + reg2 + ((PSW & PSW_C) != 0);
9f4a551e 1254 State.regs[REG_D0 + REG0 (insn)] = value;
73e65298
JL		 1255
1256 z = (value == 0);
1257 n = (value & 0x80000000);
0ade484f 1258 c = (value < reg1) || (value < reg2);
d657034d 1259 v = ((reg2 & 0x80000000) == (reg1 & 0x80000000)
b7b89deb 1260 && (reg2 & 0x80000000) != (value & 0x80000000));
73e65298
JL		 1261
1262 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1263 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1264 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1265}
1266
707641f6 1267/* sub dm, dn */
d2523010
JL		 1268void OP_F100 (insn, extension)
1269 unsigned long insn, extension;
05ccbdfd 1270{
707641f6
JL		 1271 int z, c, n, v;
1272 unsigned long reg1, reg2, value;
1273
9f4a551e
JL		 1274 reg1 = State.regs[REG_D0 + REG1 (insn)];
1275 reg2 = State.regs[REG_D0 + REG0 (insn)];
707641f6 1276 value = reg2 - reg1;
65b784d8 1277 State.regs[REG_D0 + REG0 (insn)] = value;
707641f6
JL		 1278
1279 z = (value == 0);
1280 n = (value & 0x80000000);
216e6557 1281 c = (reg1 > reg2);
b7b89deb
JL		 1282 v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
1283 && (reg2 & 0x80000000) != (value & 0x80000000));
707641f6
JL		 1284
1285 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1286 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1287 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1288}
1289
707641f6 1290/* sub dm, an */
d2523010
JL		 1291void OP_F120 (insn, extension)
1292 unsigned long insn, extension;
05ccbdfd 1293{
707641f6
JL		 1294 int z, c, n, v;
1295 unsigned long reg1, reg2, value;
1296
9f4a551e
JL		 1297 reg1 = State.regs[REG_D0 + REG1 (insn)];
1298 reg2 = State.regs[REG_A0 + REG0 (insn)];
707641f6 1299 value = reg2 - reg1;
65b784d8 1300 State.regs[REG_A0 + REG0 (insn)] = value;
707641f6
JL		 1301
1302 z = (value == 0);
1303 n = (value & 0x80000000);
216e6557 1304 c = (reg1 > reg2);
b7b89deb
JL		 1305 v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
1306 && (reg2 & 0x80000000) != (value & 0x80000000));
707641f6
JL		 1307
1308 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1309 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1310 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1311}
1312
707641f6 1313/* sub am, dn */
d2523010
JL		 1314void OP_F110 (insn, extension)
1315 unsigned long insn, extension;
05ccbdfd 1316{
707641f6
JL		 1317 int z, c, n, v;
1318 unsigned long reg1, reg2, value;
1319
9f4a551e
JL		 1320 reg1 = State.regs[REG_A0 + REG1 (insn)];
1321 reg2 = State.regs[REG_D0 + REG0 (insn)];
707641f6 1322 value = reg2 - reg1;
65b784d8 1323 State.regs[REG_D0 + REG0 (insn)] = value;
707641f6
JL		 1324
1325 z = (value == 0);
1326 n = (value & 0x80000000);
216e6557 1327 c = (reg1 > reg2);
b7b89deb
JL		 1328 v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
1329 && (reg2 & 0x80000000) != (value & 0x80000000));
707641f6
JL		 1330
1331 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1332 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1333 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1334}
1335
707641f6 1336/* sub am, an */
d2523010
JL		 1337void OP_F130 (insn, extension)
1338 unsigned long insn, extension;
05ccbdfd 1339{
707641f6
JL		 1340 int z, c, n, v;
1341 unsigned long reg1, reg2, value;
1342
9f4a551e
JL		 1343 reg1 = State.regs[REG_A0 + REG1 (insn)];
1344 reg2 = State.regs[REG_A0 + REG0 (insn)];
707641f6 1345 value = reg2 - reg1;
65b784d8 1346 State.regs[REG_A0 + REG0 (insn)] = value;
707641f6
JL		 1347
1348 z = (value == 0);
1349 n = (value & 0x80000000);
216e6557 1350 c = (reg1 > reg2);
b7b89deb
JL		 1351 v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
1352 && (reg2 & 0x80000000) != (value & 0x80000000));
707641f6
JL		 1353
1354 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1355 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1356 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1357}
1358
de0dce7c 1359/* sub imm32, dn */
d2523010
JL		 1360void OP_FCC40000 (insn, extension)
1361 unsigned long insn, extension;
05ccbdfd 1362{
707641f6
JL		 1363 int z, c, n, v;
1364 unsigned long reg1, imm, value;
1365
9f4a551e 1366 reg1 = State.regs[REG_D0 + REG0_16 (insn)];
7c52bf32 1367 imm = ((insn & 0xffff) << 16) + extension;
707641f6 1368 value = reg1 - imm;
65b784d8 1369 State.regs[REG_D0 + REG0_16 (insn)] = value;
707641f6
JL		 1370
1371 z = (value == 0);
1372 n = (value & 0x80000000);
1373 c = (reg1 < imm);
b7b89deb
JL		 1374 v = ((reg1 & 0x80000000) != (imm & 0x80000000)
1375 && (reg1 & 0x80000000) != (value & 0x80000000));
707641f6
JL		 1376
1377 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1378 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1379 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1380}
1381
de0dce7c 1382/* sub imm32, an */
d2523010
JL		 1383void OP_FCD40000 (insn, extension)
1384 unsigned long insn, extension;
05ccbdfd 1385{
707641f6
JL		 1386 int z, c, n, v;
1387 unsigned long reg1, imm, value;
1388
9f4a551e 1389 reg1 = State.regs[REG_A0 + REG0_16 (insn)];
7c52bf32 1390 imm = ((insn & 0xffff) << 16) + extension;
707641f6 1391 value = reg1 - imm;
65b784d8 1392 State.regs[REG_A0 + REG0_16 (insn)] = value;
707641f6
JL		 1393
1394 z = (value == 0);
1395 n = (value & 0x80000000);
1396 c = (reg1 < imm);
b7b89deb
JL		 1397 v = ((reg1 & 0x80000000) != (imm & 0x80000000)
1398 && (reg1 & 0x80000000) != (value & 0x80000000));
707641f6
JL		 1399
1400 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1401 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1402 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1403}
1404
de0dce7c 1405/* subc dm, dn */
d2523010
JL		 1406void OP_F180 (insn, extension)
1407 unsigned long insn, extension;
05ccbdfd 1408{
707641f6
JL		 1409 int z, c, n, v;
1410 unsigned long reg1, reg2, value;
1411
9f4a551e
JL		 1412 reg1 = State.regs[REG_D0 + REG1 (insn)];
1413 reg2 = State.regs[REG_D0 + REG0 (insn)];
707641f6 1414 value = reg2 - reg1 - ((PSW & PSW_C) != 0);
65b784d8 1415 State.regs[REG_D0 + REG0 (insn)] = value;
707641f6
JL		 1416
1417 z = (value == 0);
1418 n = (value & 0x80000000);
216e6557 1419 c = (reg1 > reg2);
b7b89deb
JL		 1420 v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
1421 && (reg2 & 0x80000000) != (value & 0x80000000));
707641f6
JL		 1422
1423 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1424 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1425 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1426}
1427
de0dce7c 1428/* mul dm, dn */
d2523010
JL		 1429void OP_F240 (insn, extension)
1430 unsigned long insn, extension;
05ccbdfd 1431{
707641f6
JL		 1432 unsigned long long temp;
1433 int n, z;
1434
65b784d8
JL		 1435 temp = ((signed long)State.regs[REG_D0 + REG0 (insn)]
1436 * (signed long)State.regs[REG_D0 + REG1 (insn)]);
9f4a551e 1437 State.regs[REG_D0 + REG0 (insn)] = temp & 0xffffffff;
65b784d8 1438 State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32;;
9f4a551e
JL		 1439 z = (State.regs[REG_D0 + REG0 (insn)] == 0);
1440 n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
707641f6
JL		 1441 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1442 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 1443}
1444
de0dce7c 1445/* mulu dm, dn */
d2523010
JL		 1446void OP_F250 (insn, extension)
1447 unsigned long insn, extension;
05ccbdfd 1448{
707641f6
JL		 1449 unsigned long long temp;
1450 int n, z;
1451
9f4a551e
JL		 1452 temp = (State.regs[REG_D0 + REG0 (insn)]
1453 * State.regs[REG_D0 + REG1 (insn)]);
1454 State.regs[REG_D0 + REG0 (insn)] = temp & 0xffffffff;
65b784d8 1455 State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32;
9f4a551e
JL		 1456 z = (State.regs[REG_D0 + REG0 (insn)] == 0);
1457 n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
707641f6
JL		 1458 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1459 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 1460}
1461
de0dce7c 1462/* div dm, dn */
d2523010
JL		 1463void OP_F260 (insn, extension)
1464 unsigned long insn, extension;
05ccbdfd 1465{
707641f6
JL		 1466 long long temp;
1467 int n, z;
1468
1469 temp = State.regs[REG_MDR];
1470 temp <<= 32;
9f4a551e
JL		 1471 temp |= State.regs[REG_D0 + REG0 (insn)];
1472 State.regs[REG_MDR] = temp % (long)State.regs[REG_D0 + REG1 (insn)];
1473 temp /= (long)State.regs[REG_D0 + REG1 (insn)];
1474 State.regs[REG_D0 + REG0 (insn)] = temp & 0xffffffff;
9f4a551e
JL		 1475 z = (State.regs[REG_D0 + REG0 (insn)] == 0);
1476 n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
707641f6
JL		 1477 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1478 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 1479}
1480
de0dce7c 1481/* divu dm, dn */
d2523010
JL		 1482void OP_F270 (insn, extension)
1483 unsigned long insn, extension;
05ccbdfd 1484{
707641f6
JL		 1485 unsigned long long temp;
1486 int n, z;
1487
1488 temp = State.regs[REG_MDR];
1489 temp <<= 32;
9f4a551e
JL		 1490 temp |= State.regs[REG_D0 + REG0 (insn)];
1491 State.regs[REG_MDR] = temp % State.regs[REG_D0 + REG1 (insn)];
1492 temp /= State.regs[REG_D0 + REG1 (insn)];
1493 State.regs[REG_D0 + REG0 (insn)] = temp & 0xffffffff;
9f4a551e
JL		 1494 z = (State.regs[REG_D0 + REG0 (insn)] == 0);
1495 n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
707641f6
JL		 1496 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1497 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 1498}
1499
73e65298 1500/* inc dn */
d2523010
JL		 1501void OP_40 (insn, extension)
1502 unsigned long insn, extension;
05ccbdfd 1503{
61ecca95 1504 int z,n,c,v;
4d8ced6c 1505 unsigned int value, imm, reg1;
61ecca95 1506
9f4a551e 1507 reg1 = State.regs[REG_D0 + REG1 (insn)];
4d8ced6c
JL		 1508 imm = 1;
1509 value = reg1 + imm;
9f4a551e 1510 State.regs[REG_D0 + REG1 (insn)] = value;
61ecca95
JL		 1511
1512 z = (value == 0);
1513 n = (value & 0x80000000);
4d8ced6c 1514 c = (reg1 < imm);
d657034d 1515 v = ((reg1 & 0x80000000) == (imm & 0x80000000)
4d8ced6c 1516 && (reg1 & 0x80000000) != (value & 0x80000000));
61ecca95
JL		 1517
1518 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1519 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1520 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1521}
1522
73e65298 1523/* inc an */
d2523010
JL		 1524void OP_41 (insn, extension)
1525 unsigned long insn, extension;
05ccbdfd 1526{
9f4a551e 1527 State.regs[REG_A0 + REG1 (insn)] += 1;
05ccbdfd
JL		 1528}
1529
92284aaa 1530/* inc4 an */
d2523010
JL		 1531void OP_50 (insn, extension)
1532 unsigned long insn, extension;
05ccbdfd 1533{
9f4a551e 1534 State.regs[REG_A0 + REG0 (insn)] += 4;
05ccbdfd
JL		 1535}
1536
92284aaa 1537/* cmp imm8, dn */
d2523010
JL		 1538void OP_A000 (insn, extension)
1539 unsigned long insn, extension;
05ccbdfd 1540{
92284aaa
JL		 1541 int z, c, n, v;
1542 unsigned long reg1, imm, value;
1543
9f4a551e 1544 reg1 = State.regs[REG_D0 + REG0_8 (insn)];
92284aaa
JL		 1545 imm = SEXT8 (insn & 0xff);
1546 value = reg1 - imm;
1547
1548 z = (value == 0);
1549 n = (value & 0x80000000);
1550 c = (reg1 < imm);
b7b89deb
JL		 1551 v = ((reg1 & 0x80000000) != (imm & 0x80000000)
1552 && (reg1 & 0x80000000) != (value & 0x80000000));
92284aaa
JL		 1553
1554 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1555 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1556 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1557}
1558
92284aaa 1559/* cmp dm, dn */
d2523010
JL		 1560void OP_A0 (insn, extension)
1561 unsigned long insn, extension;
05ccbdfd 1562{
92284aaa
JL		 1563 int z, c, n, v;
1564 unsigned long reg1, reg2, value;
1565
9f4a551e
JL		 1566 reg1 = State.regs[REG_D0 + REG1 (insn)];
1567 reg2 = State.regs[REG_D0 + REG0 (insn)];
707641f6 1568 value = reg2 - reg1;
92284aaa
JL		 1569
1570 z = (value == 0);
1571 n = (value & 0x80000000);
216e6557 1572 c = (reg1 > reg2);
b7b89deb
JL		 1573 v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
1574 && (reg2 & 0x80000000) != (value & 0x80000000));
92284aaa
JL		 1575
1576 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1577 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1578 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1579}
1580
92284aaa 1581/* cmp dm, an */
d2523010
JL		 1582void OP_F1A0 (insn, extension)
1583 unsigned long insn, extension;
05ccbdfd 1584{
92284aaa
JL		 1585 int z, c, n, v;
1586 unsigned long reg1, reg2, value;
1587
9f4a551e
JL		 1588 reg1 = State.regs[REG_D0 + REG1 (insn)];
1589 reg2 = State.regs[REG_A0 + REG0 (insn)];
707641f6 1590 value = reg2 - reg1;
92284aaa
JL		 1591
1592 z = (value == 0);
1593 n = (value & 0x80000000);
216e6557 1594 c = (reg1 > reg2);
b7b89deb
JL		 1595 v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
1596 && (reg2 & 0x80000000) != (value & 0x80000000));
92284aaa
JL		 1597
1598 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1599 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1600 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1601}
1602
92284aaa 1603/* cmp am, dn */
d2523010
JL		 1604void OP_F190 (insn, extension)
1605 unsigned long insn, extension;
05ccbdfd 1606{
92284aaa
JL		 1607 int z, c, n, v;
1608 unsigned long reg1, reg2, value;
1609
9f4a551e
JL		 1610 reg1 = State.regs[REG_A0 + REG1 (insn)];
1611 reg2 = State.regs[REG_D0 + REG0 (insn)];
707641f6 1612 value = reg2 - reg1;
92284aaa
JL		 1613
1614 z = (value == 0);
1615 n = (value & 0x80000000);
216e6557 1616 c = (reg1 > reg2);
b7b89deb
JL		 1617 v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
1618 && (reg2 & 0x80000000) != (value & 0x80000000));
92284aaa
JL		 1619
1620 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1621 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1622 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1623}
1624
92284aaa 1625/* cmp imm8, an */
d2523010
JL		 1626void OP_B000 (insn, extension)
1627 unsigned long insn, extension;
05ccbdfd 1628{
92284aaa
JL		 1629 int z, c, n, v;
1630 unsigned long reg1, imm, value;
1631
9f4a551e 1632 reg1 = State.regs[REG_A0 + REG0_8 (insn)];
92284aaa
JL		 1633 imm = insn & 0xff;
1634 value = reg1 - imm;
1635
1636 z = (value == 0);
1637 n = (value & 0x80000000);
1638 c = (reg1 < imm);
b7b89deb
JL		 1639 v = ((reg1 & 0x80000000) != (imm & 0x80000000)
1640 && (reg1 & 0x80000000) != (value & 0x80000000));
92284aaa
JL		 1641
1642 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1643 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1644 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1645}
1646
707641f6 1647/* cmp am, an */
d2523010
JL		 1648void OP_B0 (insn, extension)
1649 unsigned long insn, extension;
05ccbdfd 1650{
73e65298
JL		 1651 int z, c, n, v;
1652 unsigned long reg1, reg2, value;
1653
9f4a551e
JL		 1654 reg1 = State.regs[REG_A0 + REG1 (insn)];
1655 reg2 = State.regs[REG_A0 + REG0 (insn)];
707641f6 1656 value = reg2 - reg1;
73e65298
JL		 1657
1658 z = (value == 0);
1659 n = (value & 0x80000000);
216e6557 1660 c = (reg1 > reg2);
b7b89deb
JL		 1661 v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
1662 && (reg2 & 0x80000000) != (value & 0x80000000));
73e65298
JL		 1663
1664 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1665 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1666 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1667}
1668
707641f6 1669/* cmp imm16, dn */
d2523010
JL		 1670void OP_FAC80000 (insn, extension)
1671 unsigned long insn, extension;
05ccbdfd 1672{
92284aaa
JL		 1673 int z, c, n, v;
1674 unsigned long reg1, imm, value;
1675
9f4a551e 1676 reg1 = State.regs[REG_D0 + REG0_16 (insn)];
92284aaa
JL		 1677 imm = SEXT16 (insn & 0xffff);
1678 value = reg1 - imm;
1679
1680 z = (value == 0);
1681 n = (value & 0x80000000);
1682 c = (reg1 < imm);
b7b89deb
JL		 1683 v = ((reg1 & 0x80000000) != (imm & 0x80000000)
1684 && (reg1 & 0x80000000) != (value & 0x80000000));
92284aaa
JL		 1685
1686 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1687 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1688 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1689}
1690
707641f6 1691/* cmp imm32, dn */
d2523010
JL		 1692void OP_FCC80000 (insn, extension)
1693 unsigned long insn, extension;
05ccbdfd 1694{
92284aaa
JL		 1695 int z, c, n, v;
1696 unsigned long reg1, imm, value;
1697
9f4a551e 1698 reg1 = State.regs[REG_D0 + REG0_16 (insn)];
7c52bf32 1699 imm = ((insn & 0xffff) << 16) + extension;
92284aaa
JL		 1700 value = reg1 - imm;
1701
1702 z = (value == 0);
1703 n = (value & 0x80000000);
1704 c = (reg1 < imm);
b7b89deb
JL		 1705 v = ((reg1 & 0x80000000) != (imm & 0x80000000)
1706 && (reg1 & 0x80000000) != (value & 0x80000000));
92284aaa
JL		 1707
1708 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1709 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1710 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1711}
1712
707641f6 1713/* cmp imm16, an */
d2523010
JL		 1714void OP_FAD80000 (insn, extension)
1715 unsigned long insn, extension;
05ccbdfd 1716{
92284aaa
JL		 1717 int z, c, n, v;
1718 unsigned long reg1, imm, value;
1719
9f4a551e 1720 reg1 = State.regs[REG_A0 + REG0_16 (insn)];
92284aaa
JL		 1721 imm = insn & 0xffff;
1722 value = reg1 - imm;
1723
1724 z = (value == 0);
1725 n = (value & 0x80000000);
1726 c = (reg1 < imm);
b7b89deb
JL		 1727 v = ((reg1 & 0x80000000) != (imm & 0x80000000)
1728 && (reg1 & 0x80000000) != (value & 0x80000000));
92284aaa
JL		 1729
1730 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1731 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1732 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1733}
1734
707641f6 1735/* cmp imm32, an */
d2523010
JL		 1736void OP_FCD80000 (insn, extension)
1737 unsigned long insn, extension;
05ccbdfd 1738{
92284aaa
JL		 1739 int z, c, n, v;
1740 unsigned long reg1, imm, value;
1741
9f4a551e 1742 reg1 = State.regs[REG_A0 + REG0_16 (insn)];
7c52bf32 1743 imm = ((insn & 0xffff) << 16) + extension;
92284aaa
JL		 1744 value = reg1 - imm;
1745
1746 z = (value == 0);
1747 n = (value & 0x80000000);
1748 c = (reg1 < imm);
b7b89deb
JL		 1749 v = ((reg1 & 0x80000000) != (imm & 0x80000000)
1750 && (reg1 & 0x80000000) != (value & 0x80000000));
92284aaa
JL		 1751
1752 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1753 PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
1754 | (c ? PSW_C : 0) | (v ? PSW_V : 0));
05ccbdfd
JL		 1755}
1756
707641f6 1757/* and dm, dn */
d2523010
JL		 1758void OP_F200 (insn, extension)
1759 unsigned long insn, extension;
05ccbdfd 1760{
707641f6
JL		 1761 int n, z;
1762
9f4a551e
JL		 1763 State.regs[REG_D0 + REG0 (insn)] &= State.regs[REG_D0 + REG1 (insn)];
1764 z = (State.regs[REG_D0 + REG0 (insn)] == 0);
1765 n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
707641f6
JL		 1766 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1767 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 1768}
1769
2e35551c 1770/* and imm8, dn */
d2523010
JL		 1771void OP_F8E000 (insn, extension)
1772 unsigned long insn, extension;
05ccbdfd 1773{
2e35551c
JL		 1774 int n, z;
1775
9f4a551e
JL		 1776 State.regs[REG_D0 + REG0_8 (insn)] &= (insn & 0xff);
1777 z = (State.regs[REG_D0 + REG0_8 (insn)] == 0);
1778 n = (State.regs[REG_D0 + REG0_8 (insn)] & 0x80000000) != 0;
2e35551c
JL		 1779 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1780 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 1781}
1782
ecb4b5a3 1783/* and imm16, dn */
d2523010
JL		 1784void OP_FAE00000 (insn, extension)
1785 unsigned long insn, extension;
05ccbdfd 1786{
ecb4b5a3
JL		 1787 int n, z;
1788
9f4a551e
JL		 1789 State.regs[REG_D0 + REG0_16 (insn)] &= (insn & 0xffff);
1790 z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
1791 n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
ecb4b5a3
JL		 1792 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1793 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 1794}
1795
de0dce7c 1796/* and imm32, dn */
d2523010
JL		 1797void OP_FCE00000 (insn, extension)
1798 unsigned long insn, extension;
05ccbdfd 1799{
de0dce7c
JL		 1800 int n, z;
1801
9f4a551e 1802 State.regs[REG_D0 + REG0_16 (insn)]
7c52bf32 1803 &= ((insn & 0xffff) << 16) + extension;
9f4a551e
JL		 1804 z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
1805 n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
de0dce7c
JL		 1806 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1807 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 1808}
1809
ecb4b5a3 1810/* and imm16, psw */
d2523010
JL		 1811void OP_FAFC0000 (insn, extension)
1812 unsigned long insn, extension;
05ccbdfd 1813{
ecb4b5a3 1814 PSW &= (insn & 0xffff);
05ccbdfd
JL		 1815}
1816
707641f6 1817/* or dm, dn*/
d2523010
JL		 1818void OP_F210 (insn, extension)
1819 unsigned long insn, extension;
05ccbdfd 1820{
707641f6
JL		 1821 int n, z;
1822
9f4a551e
JL		 1823 State.regs[REG_D0 + REG0 (insn)] |= State.regs[REG_D0 + REG1 (insn)];
1824 z = (State.regs[REG_D0 + REG0 (insn)] == 0);
1825 n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
707641f6
JL		 1826 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1827 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 1828}
1829
2e35551c 1830/* or imm8, dn */
d2523010
JL		 1831void OP_F8E400 (insn, extension)
1832 unsigned long insn, extension;
05ccbdfd 1833{
2e35551c
JL		 1834 int n, z;
1835
9f4a551e
JL		 1836 State.regs[REG_D0 + REG0_8 (insn)] |= insn & 0xff;
1837 z = (State.regs[REG_D0 + REG0_8 (insn)] == 0);
1838 n = (State.regs[REG_D0 + REG0_8 (insn)] & 0x80000000) != 0;
2e35551c
JL		 1839 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1840 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 1841}
1842
ecb4b5a3 1843/* or imm16, dn*/
d2523010
JL		 1844void OP_FAE40000 (insn, extension)
1845 unsigned long insn, extension;
05ccbdfd 1846{
ecb4b5a3
JL		 1847 int n, z;
1848
9f4a551e
JL		 1849 State.regs[REG_D0 + REG0_16 (insn)] |= insn & 0xffff;
1850 z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
1851 n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
ecb4b5a3
JL		 1852 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1853 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 1854}
1855
de0dce7c 1856/* or imm32, dn */
d2523010
JL		 1857void OP_FCE40000 (insn, extension)
1858 unsigned long insn, extension;
05ccbdfd 1859{
de0dce7c
JL		 1860 int n, z;
1861
9f4a551e 1862 State.regs[REG_D0 + REG0_16 (insn)]
7c52bf32 1863 |= ((insn & 0xffff) << 16) + extension;
9f4a551e
JL		 1864 z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
1865 n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
de0dce7c
JL		 1866 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1867 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 1868}
1869
ecb4b5a3 1870/* or imm16,psw */
d2523010
JL		 1871void OP_FAFD0000 (insn, extension)
1872 unsigned long insn, extension;
05ccbdfd 1873{
ecb4b5a3 1874 PSW |= (insn & 0xffff);
05ccbdfd
JL		 1875}
1876
65b784d8 1877/* xor dm, dn */
d2523010
JL		 1878void OP_F220 (insn, extension)
1879 unsigned long insn, extension;
05ccbdfd 1880{
707641f6
JL		 1881 int n, z;
1882
9f4a551e
JL		 1883 State.regs[REG_D0 + REG0 (insn)] ^= State.regs[REG_D0 + REG1 (insn)];
1884 z = (State.regs[REG_D0 + REG0 (insn)] == 0);
1885 n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
707641f6
JL		 1886 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1887 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 1888}
1889
ecb4b5a3 1890/* xor imm16, dn */
d2523010
JL		 1891void OP_FAE80000 (insn, extension)
1892 unsigned long insn, extension;
05ccbdfd 1893{
ecb4b5a3
JL		 1894 int n, z;
1895
9f4a551e
JL		 1896 State.regs[REG_D0 + REG0_16 (insn)] ^= insn & 0xffff;
1897 z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
1898 n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
ecb4b5a3
JL		 1899 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1900 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 1901}
1902
de0dce7c 1903/* xor imm32, dn */
d2523010
JL		 1904void OP_FCE80000 (insn, extension)
1905 unsigned long insn, extension;
05ccbdfd 1906{
de0dce7c
JL		 1907 int n, z;
1908
9f4a551e 1909 State.regs[REG_D0 + REG0_16 (insn)]
7c52bf32 1910 ^= ((insn & 0xffff) << 16) + extension;
9f4a551e
JL		 1911 z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
1912 n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
de0dce7c
JL		 1913 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1914 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 1915}
1916
de0dce7c 1917/* not dn */
d2523010
JL		 1918void OP_F230 (insn, extension)
1919 unsigned long insn, extension;
05ccbdfd 1920{
707641f6
JL		 1921 int n, z;
1922
9f4a551e
JL		 1923 State.regs[REG_D0 + REG0 (insn)] = ~State.regs[REG_D0 + REG0 (insn)];
1924 z = (State.regs[REG_D0 + REG0 (insn)] == 0);
1925 n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
707641f6
JL		 1926 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1927 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 1928}
1929
2e35551c 1930/* btst imm8, dn */
d2523010
JL		 1931void OP_F8EC00 (insn, extension)
1932 unsigned long insn, extension;
05ccbdfd 1933{
2e35551c
JL		 1934 unsigned long temp;
1935 int z, n;
1936
9f4a551e 1937 temp = State.regs[REG_D0 + REG0_8 (insn)];
2e35551c
JL		 1938 temp &= (insn & 0xff);
1939 n = (temp & 0x80000000) != 0;
1940 z = (temp == 0);
1941 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1942 PSW |= (z ? PSW_Z : 0) | (n ? PSW_N : 0);
05ccbdfd
JL		 1943}
1944
ecb4b5a3 1945/* btst imm16, dn */
d2523010
JL		 1946void OP_FAEC0000 (insn, extension)
1947 unsigned long insn, extension;
05ccbdfd 1948{
ecb4b5a3
JL		 1949 unsigned long temp;
1950 int z, n;
1951
9f4a551e 1952 temp = State.regs[REG_D0 + REG0_16 (insn)];
ecb4b5a3
JL		 1953 temp &= (insn & 0xffff);
1954 n = (temp & 0x80000000) != 0;
1955 z = (temp == 0);
1956 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1957 PSW |= (z ? PSW_Z : 0) | (n ? PSW_N : 0);
05ccbdfd
JL		 1958}
1959
de0dce7c 1960/* btst imm32, dn */
d2523010
JL		 1961void OP_FCEC0000 (insn, extension)
1962 unsigned long insn, extension;
05ccbdfd 1963{
de0dce7c
JL		 1964 unsigned long temp;
1965 int z, n;
1966
9f4a551e 1967 temp = State.regs[REG_D0 + REG0_16 (insn)];
7c52bf32 1968 temp &= ((insn & 0xffff) << 16) + extension;
de0dce7c
JL		 1969 n = (temp & 0x80000000) != 0;
1970 z = (temp == 0);
1971 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1972 PSW |= (z ? PSW_Z : 0) | (n ? PSW_N : 0);
05ccbdfd
JL		 1973}
1974
de0dce7c 1975/* btst imm8,(abs32) */
d2523010
JL		 1976void OP_FE020000 (insn, extension)
1977 unsigned long insn, extension;
05ccbdfd 1978{
de0dce7c
JL		 1979 unsigned long temp;
1980 int n, z;
1981
003c91be 1982 temp = load_byte (((insn & 0xffff) << 16) | (extension >> 8));
de0dce7c
JL		 1983 temp &= (extension & 0xff);
1984 n = (temp & 0x80000000) != 0;
1985 z = (temp == 0);
1986 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
1987 PSW |= (z ? PSW_Z : 0) | (n ? PSW_N : 0);
05ccbdfd
JL		 1988}
1989
ecb4b5a3 1990/* btst imm8,(d8,an) */
d2523010
JL		 1991void OP_FAF80000 (insn, extension)
1992 unsigned long insn, extension;
05ccbdfd 1993{
ecb4b5a3
JL		 1994 unsigned long temp;
1995 int n, z;
1996
003c91be
JL		 1997 temp = load_byte ((State.regs[REG_A0 + REG0_16 (insn)]
1998 + SEXT8 ((insn & 0xff00) >> 8)));
ecb4b5a3
JL		 1999 temp &= (insn & 0xff);
2000 n = (temp & 0x80000000) != 0;
2001 z = (temp == 0);
2002 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
2003 PSW |= (z ? PSW_Z : 0) | (n ? PSW_N : 0);
05ccbdfd
JL		 2004}
2005
707641f6 2006/* bset dm, (an) */
d2523010
JL		 2007void OP_F080 (insn, extension)
2008 unsigned long insn, extension;
05ccbdfd 2009{
707641f6
JL		 2010 unsigned long temp;
2011 int z;
2012
003c91be 2013 temp = load_byte (State.regs[REG_A0 + REG0 (insn)]);
9f4a551e
JL		 2014 z = (temp & State.regs[REG_D0 + REG1 (insn)]) == 0;
2015 temp |= State.regs[REG_D0 + REG1 (insn)];
003c91be 2016 store_byte (State.regs[REG_A0 + REG0 (insn)], temp);
707641f6
JL		 2017 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
2018 PSW |= (z ? PSW_Z : 0);
05ccbdfd
JL		 2019}
2020
de0dce7c 2021/* bset imm8, (abs32) */
d2523010
JL		 2022void OP_FE000000 (insn, extension)
2023 unsigned long insn, extension;
05ccbdfd 2024{
de0dce7c
JL		 2025 unsigned long temp;
2026 int z;
2027
003c91be 2028 temp = load_byte (((insn & 0xffff) << 16 | (extension >> 8)));
de0dce7c
JL		 2029 z = (temp & (extension & 0xff)) == 0;
2030 temp |= (extension & 0xff);
003c91be 2031 store_byte ((((insn & 0xffff) << 16) | (extension >> 8)), temp);
de0dce7c
JL		 2032 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
2033 PSW |= (z ? PSW_Z : 0);
05ccbdfd
JL		 2034}
2035
ecb4b5a3 2036/* bset imm8,(d8,an) */
d2523010
JL		 2037void OP_FAF00000 (insn, extension)
2038 unsigned long insn, extension;
05ccbdfd 2039{
ecb4b5a3
JL		 2040 unsigned long temp;
2041 int z;
2042
003c91be
JL		 2043 temp = load_byte ((State.regs[REG_A0 + REG0_16 (insn)]
2044 + SEXT8 ((insn & 0xff00) >> 8)));
ecb4b5a3
JL		 2045 z = (temp & (insn & 0xff)) == 0;
2046 temp |= (insn & 0xff);
003c91be
JL		 2047 store_byte ((State.regs[REG_A0 + REG0_16 (insn)]
2048 + SEXT8 ((insn & 0xff00) >> 8)), temp);
ecb4b5a3
JL		 2049 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
2050 PSW |= (z ? PSW_Z : 0);
05ccbdfd
JL		 2051}
2052
707641f6 2053/* bclr dm, (an) */
d2523010
JL		 2054void OP_F090 (insn, extension)
2055 unsigned long insn, extension;
05ccbdfd 2056{
707641f6
JL		 2057 unsigned long temp;
2058 int z;
2059
003c91be 2060 temp = load_byte (State.regs[REG_A0 + REG0 (insn)]);
9f4a551e 2061 z = (temp & State.regs[REG_D0 + REG1 (insn)]) == 0;
09eef8af 2062 temp = temp & ~State.regs[REG_D0 + REG1 (insn)];
003c91be 2063 store_byte (State.regs[REG_A0 + REG0 (insn)], temp);
707641f6
JL		 2064 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
2065 PSW |= (z ? PSW_Z : 0);
05ccbdfd
JL		 2066}
2067
de0dce7c 2068/* bclr imm8, (abs32) */
d2523010
JL		 2069void OP_FE010000 (insn, extension)
2070 unsigned long insn, extension;
05ccbdfd 2071{
de0dce7c
JL		 2072 unsigned long temp;
2073 int z;
2074
003c91be 2075 temp = load_byte (((insn & 0xffff) << 16) | (extension >> 8));
de0dce7c 2076 z = (temp & (extension & 0xff)) == 0;
09eef8af 2077 temp = temp & ~(extension & 0xff);
003c91be 2078 store_byte (((insn & 0xffff) << 16) | (extension >> 8), temp);
de0dce7c
JL		 2079 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
2080 PSW |= (z ? PSW_Z : 0);
05ccbdfd
JL		 2081}
2082
ecb4b5a3 2083/* bclr imm8,(d8,an) */
d2523010
JL		 2084void OP_FAF40000 (insn, extension)
2085 unsigned long insn, extension;
05ccbdfd 2086{
ecb4b5a3
JL		 2087 unsigned long temp;
2088 int z;
2089
003c91be
JL		 2090 temp = load_byte ((State.regs[REG_A0 + REG0_16 (insn)]
2091 + SEXT8 ((insn & 0xff00) >> 8)));
ecb4b5a3 2092 z = (temp & (insn & 0xff)) == 0;
09eef8af 2093 temp = temp & ~(insn & 0xff);
003c91be
JL		 2094 store_byte ((State.regs[REG_A0 + REG0_16 (insn)]
2095 + SEXT8 ((insn & 0xff00) >> 8)), temp);
ecb4b5a3
JL		 2096 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
2097 PSW |= (z ? PSW_Z : 0);
05ccbdfd
JL		 2098}
2099
2e35551c 2100/* asr dm, dn */
d2523010
JL		 2101void OP_F2B0 (insn, extension)
2102 unsigned long insn, extension;
05ccbdfd 2103{
707641f6
JL		 2104 long temp;
2105 int z, n, c;
2106
9f4a551e 2107 temp = State.regs[REG_D0 + REG0 (insn)];
707641f6 2108 c = temp & 1;
9f4a551e
JL		 2109 temp >>= State.regs[REG_D0 + REG1 (insn)];
2110 State.regs[REG_D0 + REG0 (insn)] = temp;
2111 z = (State.regs[REG_D0 + REG0 (insn)] == 0);
2112 n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
707641f6
JL		 2113 PSW &= ~(PSW_Z | PSW_N | PSW_C);
2114 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
05ccbdfd
JL		 2115}
2116
2e35551c 2117/* asr imm8, dn */
d2523010
JL		 2118void OP_F8C800 (insn, extension)
2119 unsigned long insn, extension;
05ccbdfd 2120{
2e35551c
JL		 2121 long temp;
2122 int z, n, c;
2123
9f4a551e 2124 temp = State.regs[REG_D0 + REG0_8 (insn)];
2e35551c
JL		 2125 c = temp & 1;
2126 temp >>= (insn & 0xff);
9f4a551e
JL		 2127 State.regs[REG_D0 + REG0_8 (insn)] = temp;
2128 z = (State.regs[REG_D0 + REG0_8 (insn)] == 0);
2129 n = (State.regs[REG_D0 + REG0_8 (insn)] & 0x80000000) != 0;
2e35551c
JL		 2130 PSW &= ~(PSW_Z | PSW_N | PSW_C);
2131 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
05ccbdfd
JL		 2132}
2133
2e35551c 2134/* lsr dm, dn */
d2523010
JL		 2135void OP_F2A0 (insn, extension)
2136 unsigned long insn, extension;
05ccbdfd 2137{
707641f6
JL		 2138 int z, n, c;
2139
9f4a551e
JL		 2140 c = State.regs[REG_D0 + REG0 (insn)] & 1;
2141 State.regs[REG_D0 + REG0 (insn)]
2142 >>= State.regs[REG_D0 + REG1 (insn)];
2143 z = (State.regs[REG_D0 + REG0 (insn)] == 0);
2144 n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
707641f6
JL		 2145 PSW &= ~(PSW_Z | PSW_N | PSW_C);
2146 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
05ccbdfd
JL		 2147}
2148
43eb4bed 2149/* lsr imm8, dn */
d2523010
JL		 2150void OP_F8C400 (insn, extension)
2151 unsigned long insn, extension;
05ccbdfd 2152{
2e35551c
JL		 2153 int z, n, c;
2154
9f4a551e
JL		 2155 c = State.regs[REG_D0 + REG0_8 (insn)] & 1;
2156 State.regs[REG_D0 + REG0_8 (insn)] >>= (insn & 0xff);
43eb4bed
JL		 2157 z = (State.regs[REG_D0 + REG0_8 (insn)] == 0);
2158 n = (State.regs[REG_D0 + REG0_8 (insn)] & 0x80000000) != 0;
2e35551c
JL		 2159 PSW &= ~(PSW_Z | PSW_N | PSW_C);
2160 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
05ccbdfd
JL		 2161}
2162
2e35551c 2163/* asl dm, dn */
d2523010
JL		 2164void OP_F290 (insn, extension)
2165 unsigned long insn, extension;
05ccbdfd 2166{
707641f6
JL		 2167 int n, z;
2168
9f4a551e
JL		 2169 State.regs[REG_D0 + REG0 (insn)]
2170 <<= State.regs[REG_D0 + REG1 (insn)];
2171 z = (State.regs[REG_D0 + REG0 (insn)] == 0);
2172 n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
707641f6
JL		 2173 PSW &= ~(PSW_Z | PSW_N);
2174 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 2175}
2176
2e35551c 2177/* asl imm8, dn */
d2523010
JL		 2178void OP_F8C000 (insn, extension)
2179 unsigned long insn, extension;
05ccbdfd 2180{
2e35551c
JL		 2181 int n, z;
2182
9f4a551e
JL		 2183 State.regs[REG_D0 + REG0_8 (insn)] <<= (insn & 0xff);
2184 z = (State.regs[REG_D0 + REG0_8 (insn)] == 0);
2185 n = (State.regs[REG_D0 + REG0_8 (insn)] & 0x80000000) != 0;
2e35551c
JL		 2186 PSW &= ~(PSW_Z | PSW_N);
2187 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 2188}
2189
707641f6 2190/* asl2 dn */
d2523010
JL		 2191void OP_54 (insn, extension)
2192 unsigned long insn, extension;
05ccbdfd 2193{
707641f6
JL		 2194 int n, z;
2195
9f4a551e
JL		 2196 State.regs[REG_D0 + REG0 (insn)] <<= 2;
2197 z = (State.regs[REG_D0 + REG0 (insn)] == 0);
2198 n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
707641f6
JL		 2199 PSW &= ~(PSW_Z | PSW_N);
2200 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 2201}
2202
707641f6 2203/* ror dn */
d2523010
JL		 2204void OP_F284 (insn, extension)
2205 unsigned long insn, extension;
05ccbdfd 2206{
707641f6
JL		 2207 unsigned long value;
2208 int c,n,z;
2209
9f4a551e 2210 value = State.regs[REG_D0 + REG0 (insn)];
7c52bf32 2211 c = (value & 0x1);
707641f6
JL		 2212
2213 value >>= 1;
f95251f0 2214 value |= ((PSW & PSW_C) != 0) ? 0x80000000 : 0;
9f4a551e 2215 State.regs[REG_D0 + REG0 (insn)] = value;
707641f6 2216 z = (value == 0);
b7b89deb 2217 n = (value & 0x80000000) != 0;
707641f6
JL		 2218 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
2219 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
05ccbdfd
JL		 2220}
2221
707641f6 2222/* rol dn */
d2523010
JL		 2223void OP_F280 (insn, extension)
2224 unsigned long insn, extension;
05ccbdfd 2225{
707641f6
JL		 2226 unsigned long value;
2227 int c,n,z;
2228
9f4a551e 2229 value = State.regs[REG_D0 + REG0 (insn)];
7c52bf32 2230 c = (value & 0x80000000) ? 1 : 0;
707641f6
JL		 2231
2232 value <<= 1;
f95251f0 2233 value |= ((PSW & PSW_C) != 0);
9f4a551e 2234 State.regs[REG_D0 + REG0 (insn)] = value;
707641f6 2235 z = (value == 0);
b7b89deb 2236 n = (value & 0x80000000) != 0;
707641f6
JL		 2237 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
2238 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
05ccbdfd
JL		 2239}
2240
f5f13c1d 2241/* beq label:8 */
d2523010
JL		 2242void OP_C800 (insn, extension)
2243 unsigned long insn, extension;
05ccbdfd 2244{
73e65298
JL		 2245 /* The dispatching code will add 2 after we return, so
2246 we subtract two here to make things right. */
2247 if (PSW & PSW_Z)
b774c0e4 2248 State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
05ccbdfd
JL		 2249}
2250
f5f13c1d 2251/* bne label:8 */
d2523010
JL		 2252void OP_C900 (insn, extension)
2253 unsigned long insn, extension;
05ccbdfd 2254{
73e65298
JL		 2255 /* The dispatching code will add 2 after we return, so
2256 we subtract two here to make things right. */
2257 if (!(PSW & PSW_Z))
b774c0e4 2258 State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
05ccbdfd
JL		 2259}
2260
f5f13c1d 2261/* bgt label:8 */
d2523010
JL		 2262void OP_C100 (insn, extension)
2263 unsigned long insn, extension;
05ccbdfd 2264{
f5f13c1d
JL		 2265 /* The dispatching code will add 2 after we return, so
2266 we subtract two here to make things right. */
2267 if (!((PSW & PSW_Z)
7c52bf32 2268 || (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0))))
b774c0e4 2269 State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
05ccbdfd
JL		 2270}
2271
f5f13c1d 2272/* bge label:8 */
d2523010
JL		 2273void OP_C200 (insn, extension)
2274 unsigned long insn, extension;
05ccbdfd 2275{
f5f13c1d
JL		 2276 /* The dispatching code will add 2 after we return, so
2277 we subtract two here to make things right. */
7c52bf32 2278 if (!(((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0)))
b774c0e4 2279 State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
05ccbdfd
JL		 2280}
2281
f5f13c1d 2282/* ble label:8 */
d2523010
JL		 2283void OP_C300 (insn, extension)
2284 unsigned long insn, extension;
05ccbdfd 2285{
f5f13c1d
JL		 2286 /* The dispatching code will add 2 after we return, so
2287 we subtract two here to make things right. */
2288 if ((PSW & PSW_Z)
7c52bf32 2289 || (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0)))
b774c0e4 2290 State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
05ccbdfd
JL		 2291}
2292
f5f13c1d 2293/* blt label:8 */
d2523010
JL		 2294void OP_C000 (insn, extension)
2295 unsigned long insn, extension;
05ccbdfd 2296{
f5f13c1d
JL		 2297 /* The dispatching code will add 2 after we return, so
2298 we subtract two here to make things right. */
7c52bf32 2299 if (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0))
b774c0e4 2300 State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
05ccbdfd
JL		 2301}
2302
f5f13c1d 2303/* bhi label:8 */
d2523010
JL		 2304void OP_C500 (insn, extension)
2305 unsigned long insn, extension;
05ccbdfd 2306{
f5f13c1d
JL		 2307 /* The dispatching code will add 2 after we return, so
2308 we subtract two here to make things right. */
2309 if (!(((PSW & PSW_C) != 0) || (PSW & PSW_Z) != 0))
b774c0e4 2310 State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
05ccbdfd
JL		 2311}
2312
f5f13c1d 2313/* bcc label:8 */
d2523010
JL		 2314void OP_C600 (insn, extension)
2315 unsigned long insn, extension;
05ccbdfd 2316{
f5f13c1d
JL		 2317 /* The dispatching code will add 2 after we return, so
2318 we subtract two here to make things right. */
2319 if (!(PSW & PSW_C))
b774c0e4 2320 State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
05ccbdfd
JL		 2321}
2322
f5f13c1d 2323/* bls label:8 */
d2523010
JL		 2324void OP_C700 (insn, extension)
2325 unsigned long insn, extension;
05ccbdfd 2326{
f5f13c1d
JL		 2327 /* The dispatching code will add 2 after we return, so
2328 we subtract two here to make things right. */
2329 if (((PSW & PSW_C) != 0) || (PSW & PSW_Z) != 0)
b774c0e4 2330 State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
05ccbdfd
JL		 2331}
2332
f5f13c1d 2333/* bcs label:8 */
d2523010
JL		 2334void OP_C400 (insn, extension)
2335 unsigned long insn, extension;
05ccbdfd 2336{
f5f13c1d
JL		 2337 /* The dispatching code will add 2 after we return, so
2338 we subtract two here to make things right. */
2339 if (PSW & PSW_C)
b774c0e4 2340 State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
05ccbdfd
JL		 2341}
2342
f5f13c1d 2343/* bvc label:8 */
d2523010
JL		 2344void OP_F8E800 (insn, extension)
2345 unsigned long insn, extension;
05ccbdfd 2346{
f5f13c1d
JL		 2347 /* The dispatching code will add 3 after we return, so
2348 we subtract two here to make things right. */
2349 if (!(PSW & PSW_V))
b774c0e4 2350 State.regs[REG_PC] += SEXT8 (insn & 0xff) - 3;
05ccbdfd
JL		 2351}
2352
f5f13c1d 2353/* bvs label:8 */
d2523010
JL		 2354void OP_F8E900 (insn, extension)
2355 unsigned long insn, extension;
05ccbdfd 2356{
f5f13c1d
JL		 2357 /* The dispatching code will add 3 after we return, so
2358 we subtract two here to make things right. */
2359 if (PSW & PSW_V)
b774c0e4 2360 State.regs[REG_PC] += SEXT8 (insn & 0xff) - 3;
05ccbdfd
JL		 2361}
2362
f5f13c1d 2363/* bnc label:8 */
d2523010
JL		 2364void OP_F8EA00 (insn, extension)
2365 unsigned long insn, extension;
05ccbdfd 2366{
f5f13c1d
JL		 2367 /* The dispatching code will add 3 after we return, so
2368 we subtract two here to make things right. */
2369 if (!(PSW & PSW_N))
b774c0e4 2370 State.regs[REG_PC] += SEXT8 (insn & 0xff) - 3;
05ccbdfd
JL		 2371}
2372
f5f13c1d 2373/* bns label:8 */
d2523010
JL		 2374void OP_F8EB00 (insn, extension)
2375 unsigned long insn, extension;
05ccbdfd 2376{
f5f13c1d
JL		 2377 /* The dispatching code will add 3 after we return, so
2378 we subtract two here to make things right. */
2379 if (PSW & PSW_N)
b774c0e4 2380 State.regs[REG_PC] += SEXT8 (insn & 0xff) - 3;
05ccbdfd
JL		 2381}
2382
f5f13c1d 2383/* bra label:8 */
d2523010
JL		 2384void OP_CA00 (insn, extension)
2385 unsigned long insn, extension;
05ccbdfd 2386{
f5f13c1d
JL		 2387 /* The dispatching code will add 2 after we return, so
2388 we subtract two here to make things right. */
b774c0e4 2389 State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
05ccbdfd
JL		 2390}
2391
2392/* leq */
d2523010
JL		 2393void OP_D8 (insn, extension)
2394 unsigned long insn, extension;
05ccbdfd 2395{
65b784d8
JL		 2396 /* The dispatching code will add 1 after we return, so
2397 we subtract one here to make things right. */
2398 if (PSW & PSW_Z)
2399 State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
05ccbdfd
JL		 2400}
2401
2402/* lne */
d2523010
JL		 2403void OP_D9 (insn, extension)
2404 unsigned long insn, extension;
05ccbdfd 2405{
65b784d8
JL		 2406 /* The dispatching code will add 1 after we return, so
2407 we subtract one here to make things right. */
2408 if (!(PSW & PSW_Z))
2409 State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
05ccbdfd
JL		 2410}
2411
2412/* lgt */
d2523010
JL		 2413void OP_D1 (insn, extension)
2414 unsigned long insn, extension;
05ccbdfd 2415{
65b784d8
JL		 2416 /* The dispatching code will add 1 after we return, so
2417 we subtract one here to make things right. */
2418 if (!((PSW & PSW_Z)
2419 || (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0))))
2420 State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
05ccbdfd
JL		 2421}
2422
2423/* lge */
d2523010
JL		 2424void OP_D2 (insn, extension)
2425 unsigned long insn, extension;
05ccbdfd 2426{
65b784d8
JL		 2427 /* The dispatching code will add 1 after we return, so
2428 we subtract one here to make things right. */
2429 if (!(((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0)))
2430 State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
05ccbdfd
JL		 2431}
2432
2433/* lle */
d2523010
JL		 2434void OP_D3 (insn, extension)
2435 unsigned long insn, extension;
05ccbdfd 2436{
65b784d8
JL		 2437 /* The dispatching code will add 1 after we return, so
2438 we subtract one here to make things right. */
2439 if ((PSW & PSW_Z)
2440 || (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0)))
2441 State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
05ccbdfd
JL		 2442}
2443
2444/* llt */
d2523010
JL		 2445void OP_D0 (insn, extension)
2446 unsigned long insn, extension;
05ccbdfd 2447{
65b784d8
JL		 2448 /* The dispatching code will add 1 after we return, so
2449 we subtract one here to make things right. */
2450 if (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0))
2451 State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
05ccbdfd
JL		 2452}
2453
2454/* lhi */
d2523010
JL		 2455void OP_D5 (insn, extension)
2456 unsigned long insn, extension;
05ccbdfd 2457{
65b784d8
JL		 2458 /* The dispatching code will add 1 after we return, so
2459 we subtract one here to make things right. */
2460 if (!(((PSW & PSW_C) != 0) || (PSW & PSW_Z) != 0))
2461 State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
05ccbdfd
JL		 2462}
2463
2464/* lcc */
d2523010
JL		 2465void OP_D6 (insn, extension)
2466 unsigned long insn, extension;
05ccbdfd 2467{
65b784d8
JL		 2468 /* The dispatching code will add 1 after we return, so
2469 we subtract one here to make things right. */
2470 if (!(PSW & PSW_C))
2471 State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
05ccbdfd
JL		 2472}
2473
2474/* lls */
d2523010
JL		 2475void OP_D7 (insn, extension)
2476 unsigned long insn, extension;
05ccbdfd 2477{
65b784d8
JL		 2478 /* The dispatching code will add 1 after we return, so
2479 we subtract one here to make things right. */
2480 if (((PSW & PSW_C) != 0) || (PSW & PSW_Z) != 0)
2481 State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
05ccbdfd
JL		 2482}
2483
2484/* lcs */
d2523010
JL		 2485void OP_D4 (insn, extension)
2486 unsigned long insn, extension;
05ccbdfd 2487{
65b784d8
JL		 2488 /* The dispatching code will add 1 after we return, so
2489 we subtract one here to make things right. */
2490 if (PSW & PSW_C)
2491 State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
05ccbdfd
JL		 2492}
2493
2494/* lra */
d2523010
JL		 2495void OP_DA (insn, extension)
2496 unsigned long insn, extension;
05ccbdfd 2497{
65b784d8 2498 State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
05ccbdfd
JL		 2499}
2500
2501/* setlb */
d2523010
JL		 2502void OP_DB (insn, extension)
2503 unsigned long insn, extension;
05ccbdfd 2504{
65b784d8
JL		 2505 State.regs[REG_LIR] = load_mem_big (State.regs[REG_PC] + 1, 4);
2506 State.regs[REG_LAR] = State.regs[REG_PC] + 5;
05ccbdfd
JL		 2507}
2508
707641f6 2509/* jmp (an) */
d2523010
JL		 2510void OP_F0F4 (insn, extension)
2511 unsigned long insn, extension;
05ccbdfd 2512{
b774c0e4 2513 State.regs[REG_PC] = State.regs[REG_A0 + REG0 (insn)] - 2;
05ccbdfd
JL		 2514}
2515
707641f6 2516/* jmp label:16 */
d2523010
JL		 2517void OP_CC0000 (insn, extension)
2518 unsigned long insn, extension;
05ccbdfd 2519{
b774c0e4 2520 State.regs[REG_PC] += SEXT16 (insn & 0xffff) - 3;
05ccbdfd
JL		 2521}
2522
707641f6 2523/* jmp label:32 */
d2523010
JL		 2524void OP_DC000000 (insn, extension)
2525 unsigned long insn, extension;
05ccbdfd 2526{
b774c0e4 2527 State.regs[REG_PC] += (((insn & 0xffffff) << 8) + extension) - 5;
05ccbdfd
JL		 2528}
2529
707641f6 2530/* call label:16,reg_list,imm8 */
d2523010
JL		 2531void OP_CD000000 (insn, extension)
2532 unsigned long insn, extension;
05ccbdfd 2533{
707641f6
JL		 2534 unsigned int next_pc, sp, adjust;
2535 unsigned long mask;
2536
2537 sp = State.regs[REG_SP];
0a8fa63c 2538 next_pc = State.regs[REG_PC] + 5;
707641f6 2539 State.mem[sp] = next_pc & 0xff;
3bb3fe44
JL		 2540 State.mem[sp+1] = (next_pc & 0xff00) >> 8;
2541 State.mem[sp+2] = (next_pc & 0xff0000) >> 16;
2542 State.mem[sp+3] = (next_pc & 0xff000000) >> 24;
707641f6
JL		 2543
2544 mask = insn & 0xff;
2545
2546 adjust = 0;
2547 if (mask & 0x80)
2548 {
2549 adjust -= 4;
003c91be 2550 State.regs[REG_D0 + 2] = load_word (sp + adjust);
707641f6
JL		 2551 }
2552
2553 if (mask & 0x40)
2554 {
2555 adjust -= 4;
003c91be 2556 State.regs[REG_D0 + 3] = load_word (sp + adjust);
707641f6
JL		 2557 }
2558
2559 if (mask & 0x20)
2560 {
2561 adjust -= 4;
003c91be 2562 State.regs[REG_A0 + 2] = load_word (sp + adjust);
707641f6
JL		 2563 }
2564
2565 if (mask & 0x10)
2566 {
2567 adjust -= 4;
003c91be 2568 State.regs[REG_A0 + 3] = load_word (sp + adjust);
707641f6
JL		 2569 }
2570
2571 if (mask & 0x8)
2572 {
2573 adjust -= 4;
003c91be 2574 State.regs[REG_D0] = load_word (sp + adjust);
707641f6 2575 adjust -= 4;
003c91be 2576 State.regs[REG_D0 + 1] = load_word (sp + adjust);
707641f6 2577 adjust -= 4;
003c91be 2578 State.regs[REG_A0] = load_word (sp + adjust);
707641f6 2579 adjust -= 4;
003c91be 2580 State.regs[REG_A0 + 1] = load_word (sp + adjust);
707641f6 2581 adjust -= 4;
003c91be 2582 State.regs[REG_MDR] = load_word (sp + adjust);
707641f6 2583 adjust -= 4;
003c91be 2584 State.regs[REG_LIR] = load_word (sp + adjust);
707641f6 2585 adjust -= 4;
003c91be 2586 State.regs[REG_LAR] = load_word (sp + adjust);
707641f6
JL		 2587 adjust -= 4;
2588 }
2589
2590 /* And make sure to update the stack pointer. */
2591 State.regs[REG_SP] -= extension;
2592 State.regs[REG_MDR] = next_pc;
b774c0e4 2593 State.regs[REG_PC] += SEXT16 ((insn & 0xffff00) >> 8) - 5;
05ccbdfd
JL		 2594}
2595
707641f6 2596/* call label:32,reg_list,imm8*/
d2523010
JL		 2597void OP_DD000000 (insn, extension)
2598 unsigned long insn, extension;
05ccbdfd 2599{
707641f6
JL		 2600 unsigned int next_pc, sp, adjust;
2601 unsigned long mask;
2602
2603 sp = State.regs[REG_SP];
0a8fa63c 2604 next_pc = State.regs[REG_PC] + 7;
707641f6 2605 State.mem[sp] = next_pc & 0xff;
3bb3fe44
JL		 2606 State.mem[sp+1] = (next_pc & 0xff00) >> 8;
2607 State.mem[sp+2] = (next_pc & 0xff0000) >> 16;
2608 State.mem[sp+3] = (next_pc & 0xff000000) >> 24;
707641f6
JL		 2609
2610 mask = (extension & 0xff00) >> 8;
2611
2612 adjust = 0;
2613 if (mask & 0x80)
2614 {
2615 adjust -= 4;
003c91be 2616 State.regs[REG_D0 + 2] = load_word (sp + adjust);
707641f6
JL		 2617 }
2618
2619 if (mask & 0x40)
2620 {
2621 adjust -= 4;
003c91be 2622 State.regs[REG_D0 + 3] = load_word (sp + adjust);
707641f6
JL		 2623 }
2624
2625 if (mask & 0x20)
2626 {
2627 adjust -= 4;
003c91be 2628 State.regs[REG_A0 + 2] = load_word (sp + adjust);
707641f6
JL		 2629 }
2630
2631 if (mask & 0x10)
2632 {
2633 adjust -= 4;
003c91be 2634 State.regs[REG_A0 + 3] = load_word (sp + adjust);
707641f6
JL		 2635 }
2636
2637 if (mask & 0x8)
2638 {
2639 adjust -= 4;
003c91be 2640 State.regs[REG_D0] = load_word (sp + adjust);
707641f6 2641 adjust -= 4;
003c91be 2642 State.regs[REG_D0 + 1] = load_word (sp + adjust);
707641f6 2643 adjust -= 4;
003c91be 2644 State.regs[REG_A0] = load_word (sp + adjust);
707641f6 2645 adjust -= 4;
003c91be 2646 State.regs[REG_A0 + 1] = load_word (sp + adjust);
707641f6 2647 adjust -= 4;
003c91be 2648 State.regs[REG_MDR] = load_word (sp + adjust);
707641f6 2649 adjust -= 4;
003c91be 2650 State.regs[REG_LIR] = load_word (sp + adjust);
707641f6 2651 adjust -= 4;
003c91be 2652 State.regs[REG_LAR] = load_word (sp + adjust);
707641f6
JL		 2653 adjust -= 4;
2654 }
2655
2656 /* And make sure to update the stack pointer. */
2657 State.regs[REG_SP] -= (extension & 0xff);
2658 State.regs[REG_MDR] = next_pc;
b774c0e4 2659 State.regs[REG_PC] += (((insn & 0xffffff) << 8) | ((extension & 0xff0000) >> 16)) - 7;
05ccbdfd
JL		 2660}
2661
707641f6 2662/* calls (an) */
d2523010
JL		 2663void OP_F0F0 (insn, extension)
2664 unsigned long insn, extension;
05ccbdfd 2665{
92284aaa
JL		 2666 unsigned int next_pc, sp;
2667
2668 sp = State.regs[REG_SP];
b774c0e4 2669 next_pc = State.regs[REG_PC] + 2;
92284aaa 2670 State.mem[sp] = next_pc & 0xff;
3bb3fe44
JL		 2671 State.mem[sp+1] = (next_pc & 0xff00) >> 8;
2672 State.mem[sp+2] = (next_pc & 0xff0000) >> 16;
2673 State.mem[sp+3] = (next_pc & 0xff000000) >> 24;
92284aaa 2674 State.regs[REG_MDR] = next_pc;
b774c0e4 2675 State.regs[REG_PC] = State.regs[REG_A0 + REG0 (insn)] - 2;
05ccbdfd
JL		 2676}
2677
707641f6 2678/* calls label:16 */
d2523010
JL		 2679void OP_FAFF0000 (insn, extension)
2680 unsigned long insn, extension;
05ccbdfd 2681{
92284aaa
JL		 2682 unsigned int next_pc, sp;
2683
2684 sp = State.regs[REG_SP];
b774c0e4 2685 next_pc = State.regs[REG_PC] + 4;
92284aaa 2686 State.mem[sp] = next_pc & 0xff;
3bb3fe44
JL		 2687 State.mem[sp+1] = (next_pc & 0xff00) >> 8;
2688 State.mem[sp+2] = (next_pc & 0xff0000) >> 16;
2689 State.mem[sp+3] = (next_pc & 0xff000000) >> 24;
92284aaa 2690 State.regs[REG_MDR] = next_pc;
b774c0e4 2691 State.regs[REG_PC] += SEXT16 (insn & 0xffff) - 4;
05ccbdfd
JL		 2692}
2693
707641f6 2694/* calls label:32 */
d2523010
JL		 2695void OP_FCFF0000 (insn, extension)
2696 unsigned long insn, extension;
05ccbdfd 2697{
92284aaa
JL		 2698 unsigned int next_pc, sp;
2699
2700 sp = State.regs[REG_SP];
b774c0e4 2701 next_pc = State.regs[REG_PC] + 6;
92284aaa 2702 State.mem[sp] = next_pc & 0xff;
3bb3fe44
JL		 2703 State.mem[sp+1] = (next_pc & 0xff00) >> 8;
2704 State.mem[sp+2] = (next_pc & 0xff0000) >> 16;
2705 State.mem[sp+3] = (next_pc & 0xff000000) >> 24;
92284aaa 2706 State.regs[REG_MDR] = next_pc;
b774c0e4 2707 State.regs[REG_PC] += (((insn & 0xffff) << 16) + extension) - 6;
05ccbdfd
JL		 2708}
2709
de0dce7c 2710/* ret reg_list, imm8 */
d2523010
JL		 2711void OP_DF0000 (insn, extension)
2712 unsigned long insn, extension;
05ccbdfd 2713{
707641f6
JL		 2714 unsigned int sp;
2715 unsigned long mask;
2716
2717 State.regs[REG_SP] += insn & 0xff;
707641f6
JL		 2718 sp = State.regs[REG_SP];
2719
2720 mask = (insn & 0xff00) >> 8;
2721
2722 if (mask & 0x8)
2723 {
2724 sp += 4;
003c91be 2725 State.regs[REG_LAR] = load_word (sp);
707641f6 2726 sp += 4;
003c91be 2727 State.regs[REG_LIR] = load_word (sp);
707641f6 2728 sp += 4;
003c91be 2729 State.regs[REG_MDR] = load_word (sp);
707641f6 2730 sp += 4;
003c91be 2731 State.regs[REG_A0 + 1] = load_word (sp);
707641f6 2732 sp += 4;
003c91be 2733 State.regs[REG_A0] = load_word (sp);
707641f6 2734 sp += 4;
003c91be 2735 State.regs[REG_D0 + 1] = load_word (sp);
707641f6 2736 sp += 4;
003c91be 2737 State.regs[REG_D0] = load_word (sp);
707641f6
JL		 2738 sp += 4;
2739 }
2740
2741 if (mask & 0x10)
2742 {
003c91be 2743 State.regs[REG_A0 + 3] = load_word (sp);
707641f6
JL		 2744 sp += 4;
2745 }
2746
2747 if (mask & 0x20)
2748 {
003c91be 2749 State.regs[REG_A0 + 2] = load_word (sp);
707641f6
JL		 2750 sp += 4;
2751 }
2752
2753 if (mask & 0x40)
2754 {
003c91be 2755 State.regs[REG_D0 + 3] = load_word (sp);
707641f6
JL		 2756 sp += 4;
2757 }
2758
2759 if (mask & 0x80)
2760 {
003c91be 2761 State.regs[REG_D0 + 2] = load_word (sp);
707641f6
JL		 2762 sp += 4;
2763 }
16d2e2b6
JL		 2764
2765 /* And make sure to update the stack pointer. */
2766 State.regs[REG_SP] = sp;
2767
2768 /* Restore the PC value. */
b774c0e4 2769 State.regs[REG_PC] = (State.mem[sp] | (State.mem[sp+1] << 8)
16d2e2b6 2770 | (State.mem[sp+2] << 16) | (State.mem[sp+3] << 24));
b774c0e4 2771 State.regs[REG_PC] -= 3;
05ccbdfd
JL		 2772}
2773
707641f6 2774/* retf reg_list,imm8 */
d2523010
JL		 2775void OP_DE0000 (insn, extension)
2776 unsigned long insn, extension;
05ccbdfd 2777{
707641f6
JL		 2778 unsigned int sp;
2779 unsigned long mask;
2780
7c52bf32
JL		 2781 sp = State.regs[REG_SP] + (insn & 0xff);
2782 State.regs[REG_SP] = sp;
b774c0e4 2783 State.regs[REG_PC] = State.regs[REG_MDR] - 3;
707641f6
JL		 2784
2785 sp = State.regs[REG_SP];
2786
2787 mask = (insn & 0xff00) >> 8;
2788
2789 if (mask & 0x8)
2790 {
2791 sp += 4;
003c91be 2792 State.regs[REG_LAR] = load_word (sp);
707641f6 2793 sp += 4;
003c91be 2794 State.regs[REG_LIR] = load_word (sp);
707641f6 2795 sp += 4;
003c91be 2796 State.regs[REG_MDR] = load_word (sp);
707641f6 2797 sp += 4;
003c91be 2798 State.regs[REG_A0 + 1] = load_word (sp);
707641f6 2799 sp += 4;
003c91be 2800 State.regs[REG_A0] = load_word (sp);
707641f6 2801 sp += 4;
003c91be 2802 State.regs[REG_D0 + 1] = load_word (sp);
707641f6 2803 sp += 4;
003c91be 2804 State.regs[REG_D0] = load_word (sp);
707641f6
JL		 2805 sp += 4;
2806 }
2807
2808 if (mask & 0x10)
2809 {
003c91be 2810 State.regs[REG_A0 + 3] = load_word (sp);
707641f6
JL		 2811 sp += 4;
2812 }
2813
2814 if (mask & 0x20)
2815 {
003c91be 2816 State.regs[REG_A0 + 2] = load_word (sp);
707641f6
JL		 2817 sp += 4;
2818 }
2819
2820 if (mask & 0x40)
2821 {
003c91be 2822 State.regs[REG_D0 + 3] = load_word (sp);
707641f6
JL		 2823 sp += 4;
2824 }
2825
2826 if (mask & 0x80)
2827 {
003c91be 2828 State.regs[REG_D0 + 2] = load_word (sp);
707641f6
JL		 2829 sp += 4;
2830 }
16d2e2b6
JL		 2831
2832 /* And make sure to update the stack pointer. */
2833 State.regs[REG_SP] = sp;
05ccbdfd
JL		 2834}
2835
2836/* rets */
d2523010
JL		 2837void OP_F0FC (insn, extension)
2838 unsigned long insn, extension;
05ccbdfd 2839{
92284aaa
JL		 2840 unsigned int sp;
2841
2842 sp = State.regs[REG_SP];
b774c0e4 2843 State.regs[REG_PC] = (State.mem[sp] | (State.mem[sp+1] << 8)
92284aaa 2844 | (State.mem[sp+2] << 16) | (State.mem[sp+3] << 24));
b774c0e4 2845 State.regs[REG_PC] -= 2;
05ccbdfd
JL		 2846}
2847
2848/* rti */
d2523010
JL		 2849void OP_F0FD (insn, extension)
2850 unsigned long insn, extension;
05ccbdfd 2851{
65b784d8
JL		 2852 unsigned int sp, next_pc;
2853
2854 PSW = State.mem[sp] | (State.mem[sp + 1] << 8);
2855 State.regs[REG_PC] = (State.mem[sp+4] | (State.mem[sp+5] << 8)
2856 | (State.mem[sp+6] << 16) | (State.mem[sp+7] << 24));
2857 State.regs[REG_SP] += 8;
05ccbdfd
JL		 2858}
2859
2860/* trap */
d2523010
JL		 2861void OP_F0FE (insn, extension)
2862 unsigned long insn, extension;
0915c843 2863{
65b784d8
JL		 2864 unsigned int sp, next_pc;
2865
2866 sp = State.regs[REG_SP];
2867 next_pc = State.regs[REG_PC] + 2;
2868 State.mem[sp] = next_pc & 0xff;
2869 State.mem[sp+1] = (next_pc & 0xff00) >> 8;
2870 State.mem[sp+2] = (next_pc & 0xff0000) >> 16;
2871 State.mem[sp+3] = (next_pc & 0xff000000) >> 24;
2872 State.regs[REG_PC] = 0x40000010 - 2;
0915c843
JL		 2873}
2874
2875/* syscall */
65b784d8 2876void OP_F020 (insn, extension)
0915c843 2877 unsigned long insn, extension;
05ccbdfd 2878{
3bb3fe44
JL		 2879 /* We use this for simulated system calls; we may need to change
2880 it to a reserved instruction if we conflict with uses at
2881 Matsushita. */
2882 int save_errno = errno;
2883 errno = 0;
2884
2885/* Registers passed to trap 0 */
2886
2887/* Function number. */
81f13ed1 2888#define FUNC (State.regs[0])
3bb3fe44
JL		 2889
2890/* Parameters. */
81f13ed1 2891#define PARM1 (State.regs[1])
003c91be
JL		 2892#define PARM2 (load_word (State.regs[REG_SP] + 12))
2893#define PARM3 (load_word (State.regs[REG_SP] + 16))
3bb3fe44
JL		 2894
2895/* Registers set by trap 0 */
2896
2897#define RETVAL State.regs[0] /* return value */
2898#define RETERR State.regs[1] /* return error code */
2899
2900/* Turn a pointer in a register into a pointer into real memory. */
2901
2902#define MEMPTR(x) (State.mem + x)
2903
2904 switch (FUNC)
2905 {
2906#if !defined(__GO32__) && !defined(_WIN32)
2907 case SYS_fork:
2908 RETVAL = fork ();
2909 break;
2910 case SYS_execve:
2911 RETVAL = execve (MEMPTR (PARM1), (char **) MEMPTR (PARM2),
2912 (char **)MEMPTR (PARM3));
2913 break;
87e43259 2914#ifdef SYS_execv
3bb3fe44
JL		 2915 case SYS_execv:
2916 RETVAL = execve (MEMPTR (PARM1), (char **) MEMPTR (PARM2), NULL);
2917 break;
87e43259 2918#endif
3bb3fe44
JL		 2919#endif
2920
2921 case SYS_read:
2922 RETVAL = mn10300_callback->read (mn10300_callback, PARM1,
2923 MEMPTR (PARM2), PARM3);
2924 break;
2925 case SYS_write:
4df7aeb3
JL		 2926 RETVAL = (int)mn10300_callback->write (mn10300_callback, PARM1,
2927 MEMPTR (PARM2), PARM3);
3bb3fe44
JL		 2928 break;
2929 case SYS_lseek:
2930 RETVAL = mn10300_callback->lseek (mn10300_callback, PARM1, PARM2, PARM3);
2931 break;
2932 case SYS_close:
2933 RETVAL = mn10300_callback->close (mn10300_callback, PARM1);
2934 break;
2935 case SYS_open:
2936 RETVAL = mn10300_callback->open (mn10300_callback, MEMPTR (PARM1), PARM2);
2937 break;
2938 case SYS_exit:
2939 /* EXIT - caller can look in PARM1 to work out the
2940 reason */
003c91be 2941 if (PARM1 == 0xdead)
3bb3fe44
JL		 2942 State.exception = SIGABRT;
2943 else
2944 State.exception = SIGQUIT;
2945 break;
2946
2947 case SYS_stat: /* added at hmsi */
2948 /* stat system call */
2949 {
2950 struct stat host_stat;
2951 reg_t buf;
2952
2953 RETVAL = stat (MEMPTR (PARM1), &host_stat);
2954
2955 buf = PARM2;
2956
2957 /* Just wild-assed guesses. */
003c91be
JL		 2958 store_half (buf, host_stat.st_dev);
2959 store_half (buf + 2, host_stat.st_ino);
2960 store_word (buf + 4, host_stat.st_mode);
2961 store_half (buf + 8, host_stat.st_nlink);
2962 store_half (buf + 10, host_stat.st_uid);
2963 store_half (buf + 12, host_stat.st_gid);
2964 store_half (buf + 14, host_stat.st_rdev);
2965 store_word (buf + 16, host_stat.st_size);
2966 store_word (buf + 20, host_stat.st_atime);
2967 store_word (buf + 28, host_stat.st_mtime);
2968 store_word (buf + 36, host_stat.st_ctime);
3bb3fe44
JL		 2969 }
2970 break;
2971
2972 case SYS_chown:
2973 RETVAL = chown (MEMPTR (PARM1), PARM2, PARM3);
2974 break;
2975 case SYS_chmod:
2976 RETVAL = chmod (MEMPTR (PARM1), PARM2);
2977 break;
87e43259 2978#ifdef SYS_time
3bb3fe44 2979 case SYS_time:
87e43259 2980 RETVAL = time ((void*) MEMPTR (PARM1));
3bb3fe44 2981 break;
87e43259
AC		 2982#endif
2983#ifdef SYS_times
3bb3fe44
JL		 2984 case SYS_times:
2985 {
2986 struct tms tms;
2987 RETVAL = times (&tms);
003c91be
JL		 2988 store_word (PARM1, tms.tms_utime);
2989 store_word (PARM1 + 4, tms.tms_stime);
2990 store_word (PARM1 + 8, tms.tms_cutime);
2991 store_word (PARM1 + 12, tms.tms_cstime);
3bb3fe44
JL		 2992 break;
2993 }
87e43259 2994#endif
3bb3fe44
JL		 2995 case SYS_gettimeofday:
2996 {
2997 struct timeval t;
2998 struct timezone tz;
2999 RETVAL = gettimeofday (&t, &tz);
003c91be
JL		 3000 store_word (PARM1, t.tv_sec);
3001 store_word (PARM1 + 4, t.tv_usec);
3002 store_word (PARM2, tz.tz_minuteswest);
3003 store_word (PARM2 + 4, tz.tz_dsttime);
3bb3fe44
JL		 3004 break;
3005 }
87e43259 3006#ifdef SYS_utime
3bb3fe44
JL		 3007 case SYS_utime:
3008 /* Cast the second argument to void *, to avoid type mismatch
3009 if a prototype is present. */
3010 RETVAL = utime (MEMPTR (PARM1), (void *) MEMPTR (PARM2));
3011 break;
87e43259 3012#endif
3bb3fe44
JL		 3013 default:
3014 abort ();
3015 }
3016 RETERR = errno;
3017 errno = save_errno;
05ccbdfd
JL		 3018}
3019
3020/* rtm */
d2523010
JL		 3021void OP_F0FF (insn, extension)
3022 unsigned long insn, extension;
05ccbdfd 3023{
f5f13c1d 3024 abort ();
05ccbdfd
JL		 3025}
3026
3027/* nop */
d2523010
JL		 3028void OP_CB (insn, extension)
3029 unsigned long insn, extension;
05ccbdfd
JL		 3030{
3031}
3032
26e9f63c 3033/* putx dm,dm */
d2523010
JL		 3034void OP_F500 (insn, extension)
3035 unsigned long insn, extension;
05ccbdfd 3036{
26e9f63c 3037 State.regs[REG_MDRQ] = State.regs[REG_D0 + REG0 (insn)];
05ccbdfd
JL		 3038}
3039
26e9f63c 3040/* getx dm,dm */
d2523010
JL		 3041void OP_F6F0 (insn, extension)
3042 unsigned long insn, extension;
05ccbdfd 3043{
26e9f63c
JL		 3044 int z, n;
3045 z = (State.regs[REG_MDRQ] == 0);
3046 n = ((State.regs[REG_MDRQ] & 0x80000000) != 0);
3047 State.regs[REG_D0 + REG0 (insn)] = State.regs[REG_MDRQ];
3048
3049 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
3050 PSW |= (z ? PSW_Z : 0) | (n ? PSW_N : 0);
05ccbdfd
JL		 3051}
3052
26e9f63c 3053/* mulq dm,dn */
d2523010
JL		 3054void OP_F600 (insn, extension)
3055 unsigned long insn, extension;
05ccbdfd 3056{
26e9f63c
JL		 3057 unsigned long long temp;
3058 int n, z;
3059
3060 temp = ((signed long)State.regs[REG_D0 + REG0 (insn)]
3061 * (signed long)State.regs[REG_D0 + REG1 (insn)]);
3062 State.regs[REG_D0 + REG0 (insn)] = temp & 0xffffffff;
3063 State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
3064 z = (State.regs[REG_D0 + REG0 (insn)] == 0);
3065 n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
3066 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
3067 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 3068}
3069
26e9f63c 3070/* mulq imm8,dn */
d2523010
JL		 3071void OP_F90000 (insn, extension)
3072 unsigned long insn, extension;
05ccbdfd 3073{
26e9f63c
JL		 3074 unsigned long long temp;
3075 int n, z;
3076
3077 temp = ((signed long)State.regs[REG_D0 + REG0_8 (insn)]
3078 * (signed long)SEXT8 (insn & 0xff));
3079 State.regs[REG_D0 + REG0_8 (insn)] = temp & 0xffffffff;
3080 State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
3081 z = (State.regs[REG_D0 + REG0_8 (insn)] == 0);
3082 n = (State.regs[REG_D0 + REG0_8 (insn)] & 0x80000000) != 0;
3083 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
3084 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 3085}
3086
26e9f63c 3087/* mulq imm16,dn */
d2523010
JL		 3088void OP_FB000000 (insn, extension)
3089 unsigned long insn, extension;
05ccbdfd 3090{
26e9f63c
JL		 3091 unsigned long long temp;
3092 int n, z;
3093
3094 temp = ((signed long)State.regs[REG_D0 + REG0_16 (insn)]
3095 * (signed long)SEXT16 (insn & 0xffff));
3096 State.regs[REG_D0 + REG0_16 (insn)] = temp & 0xffffffff;
3097 State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
3098 z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
3099 n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
3100 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
3101 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 3102}
3103
26e9f63c 3104/* mulq imm32,dn */
d2523010
JL		 3105void OP_FD000000 (insn, extension)
3106 unsigned long insn, extension;
05ccbdfd 3107{
26e9f63c
JL		 3108 unsigned long long temp;
3109 int n, z;
3110
3111 temp = ((signed long)State.regs[REG_D0 + REG0_16 (insn)]
3112 * (signed long)(((insn & 0xffff) << 16) + extension));
3113 State.regs[REG_D0 + REG0_16 (insn)] = temp & 0xffffffff;
3114 State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
3115 z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
3116 n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
3117 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
3118 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 3119}
3120
26e9f63c 3121/* mulqu dm,dn */
d2523010
JL		 3122void OP_F610 (insn, extension)
3123 unsigned long insn, extension;
05ccbdfd 3124{
26e9f63c
JL		 3125 unsigned long long temp;
3126 int n, z;
3127
3128 temp = (State.regs[REG_D0 + REG0 (insn)] * State.regs[REG_D0 + REG1 (insn)]);
3129 State.regs[REG_D0 + REG0 (insn)] = temp & 0xffffffff;
3130 State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
3131 z = (State.regs[REG_D0 + REG0 (insn)] == 0);
3132 n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
3133 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
3134 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 3135}
3136
26e9f63c 3137/* mulqu imm8,dn */
d2523010
JL		 3138void OP_F91400 (insn, extension)
3139 unsigned long insn, extension;
05ccbdfd 3140{
26e9f63c
JL		 3141 unsigned long long temp;
3142 int n, z;
3143
3144 temp = (State.regs[REG_D0 + REG0_8 (insn)] * SEXT8 (insn & 0xff));
3145 State.regs[REG_D0 + REG0_8 (insn)] = temp & 0xffffffff;
3146 State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
3147 z = (State.regs[REG_D0 + REG0_8 (insn)] == 0);
3148 n = (State.regs[REG_D0 + REG0_8 (insn)] & 0x80000000) != 0;
3149 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
3150 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 3151}
3152
26e9f63c 3153/* mulqu imm16,dn */
d2523010
JL		 3154void OP_FB140000 (insn, extension)
3155 unsigned long insn, extension;
05ccbdfd 3156{
26e9f63c
JL		 3157 unsigned long long temp;
3158 int n, z;
3159
3160 temp = (State.regs[REG_D0 + REG0_16 (insn)] * SEXT16 (insn & 0xffff));
3161 State.regs[REG_D0 + REG0_16 (insn)] = temp & 0xffffffff;
3162 State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
3163 z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
3164 n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
3165 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
3166 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 3167}
3168
26e9f63c 3169/* mulqu imm32,dn */
d2523010
JL		 3170void OP_FD140000 (insn, extension)
3171 unsigned long insn, extension;
05ccbdfd 3172{
26e9f63c
JL		 3173 unsigned long long temp;
3174 int n, z;
3175
3176 temp = (State.regs[REG_D0 + REG0_16 (insn)]
3177 * (((insn & 0xffff) << 16) + extension));
3178 State.regs[REG_D0 + REG0_16 (insn)] = temp & 0xffffffff;
3179 State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
3180 z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
3181 n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
3182 PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
3183 PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
05ccbdfd
JL		 3184}
3185
26e9f63c 3186/* sat16 dm,dn */
d2523010
JL		 3187void OP_F640 (insn, extension)
3188 unsigned long insn, extension;
05ccbdfd 3189{
26e9f63c
JL		 3190 int temp;
3191
3192 temp = State.regs[REG_D0 + REG1 (insn)];
3193 temp = (temp > 0x7fff ? 0x7fff : temp);
3194 temp = (temp < -0x8000 ? -0x8000 : temp);
3195 State.regs[REG_D0 + REG0 (insn)] = temp;
05ccbdfd
JL		 3196}
3197
26e9f63c 3198/* sat24 dm,dn */
d2523010
JL		 3199void OP_F650 (insn, extension)
3200 unsigned long insn, extension;
05ccbdfd 3201{
26e9f63c
JL		 3202 int temp;
3203
3204 temp = State.regs[REG_D0 + REG1 (insn)];
3205 temp = (temp > 0x7fffff ? 0x7fffff : temp);
3206 temp = (temp < -0x800000 ? -0x800000 : temp);
3207 State.regs[REG_D0 + REG0 (insn)] = temp;
05ccbdfd
JL		 3208}
3209
26e9f63c 3210/* bsch dm,dn */
d2523010
JL		 3211void OP_F670 (insn, extension)
3212 unsigned long insn, extension;
05ccbdfd 3213{
26e9f63c
JL		 3214 int temp, c;
3215
3216 temp = State.regs[REG_D0 + REG1 (insn)];
3217 temp <<= (State.regs[REG_D0 + REG0 (insn)] & 0x1f);
3218 c = (temp != 0 ? 1 : 0);
3219 PSW &= ~(PSW_C);
3220 PSW |= (c ? PSW_C : 0);
05ccbdfd 3221}
093e9a32
JL		 3222
3223/* breakpoint */
3224void
3225OP_FF (insn, extension)
3226 unsigned long insn, extension;
3227{
3228 State.exception = SIGTRAP;
3229 PC -= 1;
3230}
3231
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