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Commit | Line | Data |
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fdd6fa61 AG |
1 | 2008-10-03 Anthony Green <green@moxielogic.com> |
2 | ||
3 | * interp.c (sim_resume): Add support for ldo.b, sto.b, ldo.s, sto.s. | |
4 | ||
5 | 2008-09-10 Anthony Green <green@moxielogic.com> | |
6 | ||
7 | * interp.c (NUM_SPRO_SREGS): New. | |
8 | (struct moxie_regset): Add sregs. | |
9 | (set_initial_gprs): Initialize sregs. | |
10 | (sim_resume): Add gsr and ssr support. | |
11 | ||
12 | 2008-09-04 Anthony Green <green@moxielogic.com> | |
13 | ||
14 | * interp.c (sim_resume): Add inc and dec instructions. | |
15 | ||
16 | 2008-09-04 Anthony Green <green@moxielogic.com> | |
17 | ||
18 | * interp.c (struct moxie_regset): Use an unsigned long long to keep | |
19 | track of instruction trace counts. | |
20 | * interp.c (sim_resume): Ditto. | |
21 | (sim_info): Ditto. | |
22 | ||
23 | 2008-08-22 Anthony Green <green@moxielogic.com> | |
24 | ||
25 | * interp.c (sim_resume): Remove debugging code. | |
26 | ||
27 | 2008-08-20 Anthony Green <green@moxielogic.com> | |
28 | ||
29 | * interp.c (TRACE): Add new tracing infrastructure. | |
30 | (sim_resume): Use it. | |
31 | (reg_names): Add new registers. | |
32 | (NUM_MOXIE_REGS): New registers. | |
33 | (PC_REGNO): New registers. | |
34 | (sim_resume): New instruction encodings. | |
35 | ||
36 | 2008-08-16 Anthony Green <green@moxielogic.com> | |
37 | ||
38 | * interp.c (sim_resume): Add SYS_read, and fix SYS_open and SYS_write. | |
39 | (convert_target_flags): New function. | |
40 | ||
41 | 2008-08-08 Anthony Green <green@moxielogic.com> | |
42 | ||
43 | * interp.c (sim_resume): Add SYS_open and SYS_write system call support. | |
44 | ||
45 | 2008-08-04 Anthony Green <green@moxielogic.com> | |
46 | ||
47 | * Makefile.in (SIM_EXTRA_LIBS): Add -lz. | |
48 | ||
49 | 2008-08-04 Anthony Green <green@moxielogic.com> | |
50 | ||
51 | * interp.c (sim_create_inferior): Set argc & argv in the target. | |
52 | ||
53 | 2008-04-12 Anthony Green <green@moxielogic.com> | |
54 | ||
55 | * interp.c (sim_resume): Add brk. | |
56 | ||
57 | 2008-04-10 Anthony Green <green@moxielogic.com> | |
58 | ||
59 | * interp.c (sim_resume): Add static chain pointer to call frame. | |
60 | ||
61 | 2008-03-24 Anthony Green <green@moxielogic.com> | |
62 | ||
63 | * interp.c (sim_resume): Add missing breaks. | |
64 | (sim_resume): Fix neg implementation. | |
65 | ||
66 | 2008-03-23 Anthony Green <green@moxielogic.com> | |
67 | ||
68 | * interp.c (sim_load): Don't require a .bss section. | |
69 | ||
70 | 2008-03-21 Anthony Green <green@moxielogic.com> | |
71 | ||
72 | * interp.c (sim_resume): Add swi, and, lshr, ashl, sub.l, neg, or, | |
73 | not, ashr, xor. | |
74 | ||
75 | 2008-03-20 Anthony Green <green@moxielogic.com> | |
76 | ||
77 | * interp.c (struct moxie_regset): Add condition code, cc. | |
78 | (CC_GT, CC_LT, CC_EQ, CC_GTU, CC_LTU): Define. | |
79 | (sim_resume): Add jmpa, jsr, cmp, beq, bne, blt, bgt, bltu, bgtu, | |
80 | bge, ble, bgeu, and bleu. | |
81 | (rbat, rsat, wbat, wsat): New functions. | |
82 | (sim_resume): Add ld.b, lda.b, ldi.b, ld.s, lda.s, ldi.s, st.b, | |
83 | sta.b, st.s, sta.s, jmp. | |
84 | ||
85 | 2008-03-19 Anthony Green <green@moxielogic.com> | |
86 | ||
87 | * interp.c (sim_resume): Add ld.l, st.l, lda.l, sta.l. | |
88 | jsra should set $fp == $sp. | |
89 | Fix jsra and ret semantics. | |
90 | ||
91 | 2008-03-18 Anthony Green <green@moxielogic.com> | |
92 | ||
93 | * interp.c (sim_resume): Add push, pop and add.l. | |
94 | ||
95 | 2008-03-16 Anthony Green <green@moxielogic.com> | |
96 | ||
97 | * interp.c (EXTRACT_WORD): Define. | |
98 | (rlat): Use EXTRACT_WORD. | |
99 | (sim_resume): Add jsra and ret. | |
100 | ||
101 | 2008-02-22 Anthony Green <green@moxielogic.com> | |
102 | ||
103 | * interp.c (reg_names): Define. | |
104 | (sim_resume): Use reg_names. | |
105 | ||
106 | 2008-02-21 Anthony Green <green@moxielogic.com> | |
107 | ||
108 | * config.in, configure, configure.ac, interp.c, Makefile.in, | |
109 | sysdep.h: Created. |