[thirdparty/binutils-gdb.git] / sim / testsuite / sim / mips / testutils.inc

# MIPS simulator testsuite utility functions.
# Copyright (C) 2004, 2007 Free Software Foundation, Inc.
# Contributed by Chris Demetriou of Broadcom Corporation.
#
# This file is part of the GNU simulators.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2, or (at your option)
# any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License along
# with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */


# $1, $4, $5, %6, are used as temps by the macros defined here.

	.macro writemsg msg
	.data
901:	.ascii	"\msg\n"
902:
	.previous
	la	$5, 901b
	li	$6, 902b - 901b
	.set push
	.set noreorder
	jal	_dowrite
	li	$4, 0
	.set pop
	.endm


	# The MIPS simulator uses "break 0x3ff" as the code to exit,
	# with the return value in $4 (a0).
	.macro exit rc
	li	$4, \rc
	break	0x3ff
	.endm


	.macro setup

	.global _start
	.global __start
	.ent _start
_start:
__start:
	.set push
	.set noreorder
	j	DIAG
	nop
	.set pop
	.end _start

	.global _fail
	.ent _fail
_fail:
	writemsg "fail"
	exit 1
	.end _fail

	.global _pass
	.ent _pass
_pass:
	writemsg "pass"
	exit 0
	.end _pass

	# The MIPS simulator can use multiple different monitor types,
	# so we hard-code the simulator "write" reserved instruction opcode,
	# rather than jumping to a vector that invokes it.  The operation
	# expects RA to point to the location at which to continue
	# after writing.
	.global _dowrite
	.ent _dowrite
_dowrite:
	# Write opcode (reserved instruction).  See sim_monitor and its
	# callers in sim/mips/interp.c.
	.word	0x00000005 | ((8 << 1) << 6)
	.end _dowrite

	.endm	# setup


	.macro pass
	.set push
	.set noreorder
	j	_pass
	nop	
	.set pop
	.endm


	.macro fail
	.set push
	.set noreorder
	j	_fail
	nop	
	.set pop
	.endm


	.macro load32 reg, val
	li	\reg, \val
	.endm


	.macro load64 reg, val
	dli	\reg, \val
	.endm


	.macro loadaddr reg, addr
	la	\reg, \addr
	.endm


	.macro checkreg reg, expreg
	.set push
	.set noat
	.set noreorder
	beq	\expreg, \reg, 901f
	nop
	fail
901:
	.set pop
	.endm


	.macro check32 reg, val
	.set push
	.set noat
	load32	$1, \val
	checkreg \reg, $1
	.set pop
	.endm


	.macro check64 reg, val
	.set push
	.set noat
	load64	$1, \val
	checkreg \reg, $1
	.set pop
	.endm
Commit	Line	Data
df0a8012	1	# MIPS simulator testsuite utility functions.
6aba47ca	2	# Copyright (C) 2004, 2007 Free Software Foundation, Inc.
df0a8012 CD	3	# Contributed by Chris Demetriou of Broadcom Corporation.
	4	#
	5	# This file is part of the GNU simulators.
	6	#
	7	# This program is free software; you can redistribute it and/or modify
	8	# it under the terms of the GNU General Public License as published by
	9	# the Free Software Foundation; either version 2, or (at your option)
	10	# any later version.
	11	#
	12	# This program is distributed in the hope that it will be useful,
	13	# but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	# GNU General Public License for more details.
	16	#
	17	# You should have received a copy of the GNU General Public License along
	18	# with this program; if not, write to the Free Software Foundation, Inc.,
	19	# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
	20
	21
	22	# $1, $4, $5, %6, are used as temps by the macros defined here.
	23
	24	.macro writemsg msg
	25	.data
	26	901: .ascii "\msg\n"
	27	902:
	28	.previous
	29	la $5, 901b
	30	li $6, 902b - 901b
	31	.set push
	32	.set noreorder
	33	jal _dowrite
	34	li $4, 0
	35	.set pop
	36	.endm
	37
	38
	39	# The MIPS simulator uses "break 0x3ff" as the code to exit,
	40	# with the return value in $4 (a0).
	41	.macro exit rc
	42	li $4, \rc
	43	break 0x3ff
	44	.endm
	45
	46
	47	.macro setup
	48
	49	.global _start
6b637da7	50	.global __start
df0a8012 CD	51	.ent _start
df0a8012 CD	52	_start:
6b637da7	53	__start:
df0a8012 CD	54	.set push
	55	.set noreorder
	56	j DIAG
	57	nop
	58	.set pop
	59	.end _start
	60
	61	.global _fail
	62	.ent _fail
	63	_fail:
	64	writemsg "fail"
	65	exit 1
	66	.end _fail
	67
	68	.global _pass
	69	.ent _pass
	70	_pass:
	71	writemsg "pass"
	72	exit 0
	73	.end _pass
	74
	75	# The MIPS simulator can use multiple different monitor types,
	76	# so we hard-code the simulator "write" reserved instruction opcode,
	77	# rather than jumping to a vector that invokes it. The operation
	78	# expects RA to point to the location at which to continue
	79	# after writing.
	80	.global _dowrite
	81	.ent _dowrite
	82	_dowrite:
	83	# Write opcode (reserved instruction). See sim_monitor and its
	84	# callers in sim/mips/interp.c.
	85	.word 0x00000005 \| ((8 << 1) << 6)
	86	.end _dowrite
	87
	88	.endm # setup
	89
	90
	91	.macro pass
	92	.set push
	93	.set noreorder
	94	j _pass
	95	nop
	96	.set pop
	97	.endm
	98
	99
	100	.macro fail
	101	.set push
	102	.set noreorder
	103	j _fail
	104	nop
	105	.set pop
	106	.endm
	107
	108
	109	.macro load32 reg, val
	110	li \reg, \val
	111	.endm
	112
	113
	114	.macro load64 reg, val
	115	dli \reg, \val
	116	.endm
	117
118
119	.macro loadaddr reg, addr
120	la \reg, \addr
121	.endm
122
123
124	.macro checkreg reg, expreg
125	.set push
126	.set noat
127	.set noreorder
128	beq \expreg, \reg, 901f
129	nop
130	fail
131	901:
132	.set pop
133	.endm
134
135
136	.macro check32 reg, val
137	.set push
138	.set noat
139	load32 $1, \val
140	checkreg \reg, $1
141	.set pop
142	.endm
143
144
145	.macro check64 reg, val
146	.set push
147	.set noat
148	load64 $1, \val
149	checkreg \reg, $1
150	.set pop
151	.endm