projects / thirdparty / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 0cb8d851 MF |
1 | 2016-01-03 Mike Frysinger <vapier@gentoo.org> |
| 2 | ||
| 3 | * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete. | |
| 4 | * configure: Regenerate. | |
| 5 | ||
| 1ac72f06 MF |
6 | 2016-01-02 Mike Frysinger <vapier@gentoo.org> |
| 7 | ||
| 8 | * configure.ac (SIM_AC_OPTION_ENDIAN): Change LITTLE_ENDIAN to | |
| 9 | LITTLE. | |
| 10 | * configure: Regenerate. | |
| 11 | ||
| e1211e55 MF |
12 | 2015-12-30 Mike Frysinger <vapier@gentoo.org> |
| 13 | ||
| 14 | * wrapper.c (v850_reg_store, v850_reg_fetch): Define. | |
| 15 | (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE. | |
| 16 | (sim_store_register): Rename to ... | |
| 17 | (v850_reg_store): ... this. | |
| 18 | (sim_fetch_register): Rename to ... | |
| 19 | (v850_reg_fetch): ... this. | |
| 20 | ||
| 5e744ef8 MF |
21 | 2015-12-27 Mike Frysinger <vapier@gentoo.org> |
| 22 | ||
| 23 | * Makefile.in (SIM_OBJS): Delete sim-hload.o. | |
| 24 | ||
| 1b393626 MF |
25 | 2015-12-26 Mike Frysinger <vapier@gentoo.org> |
| 26 | ||
| 27 | * config.in, configure: Regenerate. | |
| 28 | ||
| 84e8e361 MF |
29 | 2015-12-24 Mike Frysinger <vapier@gentoo.org> |
| 30 | ||
| 31 | * sim-main.h (WITH_WATCHPOINTS): Delete. | |
| 32 | ||
| 1d19cae7 DV |
33 | 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com> |
| 34 | ||
| 35 | * simops.c (v850_bins): Fix left shift of negative value. | |
| 36 | ||
| c389945b MF |
37 | 2015-11-17 Mike Frysinger <vapier@gentoo.org> |
| 38 | ||
| 39 | * sim-main.h (WITH_CORE): Delete. | |
| 40 | ||
| cdf850e9 MF |
41 | 2015-11-17 Mike Frysinger <vapier@gentoo.org> |
| 42 | ||
| 43 | * sim-main.h (WITH_MODULO_MEMORY): Delete. | |
| 44 | ||
| 797eee42 MF |
45 | 2015-11-15 Mike Frysinger <vapier@gentoo.org> |
| 46 | ||
| 47 | * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o. | |
| 48 | ||
| 6e4f085c MF |
49 | 2015-11-14 Mike Frysinger <vapier@gentoo.org> |
| 50 | ||
| 51 | * interp.c (sim_close): Delete. | |
| 52 | ||
| 8d0978fb MF |
53 | 2015-06-23 Mike Frysinger <vapier@gentoo.org> |
| 54 | ||
| 55 | * configure: Regenerate. | |
| 56 | ||
| a3487082 MF |
57 | 2015-06-12 Mike Frysinger <vapier@gentoo.org> |
| 58 | ||
| 59 | * configure: Regenerate. | |
| 60 | ||
| 306f4178 MF |
61 | 2015-06-12 Mike Frysinger <vapier@gentoo.org> |
| 62 | ||
| 63 | * configure: Regenerate. | |
| 64 | ||
| 5d19c366 MF |
65 | 2015-06-11 Mike Frysinger <vapier@gentoo.org> |
| 66 | ||
| 67 | * interp.c (INLINE): Delete define. | |
| 68 | ||
| 20bca71d MF |
69 | 2015-04-18 Mike Frysinger <vapier@gentoo.org> |
| 70 | ||
| 71 | * sim-main.h (SIM_CPU): Delete. | |
| 72 | ||
| 7e83aa92 MF |
73 | 2015-04-18 Mike Frysinger <vapier@gentoo.org> |
| 74 | ||
| 75 | * sim-main.h (sim_cia): Delete. | |
| 76 | ||
| 034685f9 MF |
77 | 2015-04-17 Mike Frysinger <vapier@gentoo.org> |
| 78 | ||
| 79 | * sim-main.h (CIA_GET, CIA_SET): Delete. | |
| 80 | ||
| 78e9aa70 MF |
81 | 2015-04-15 Mike Frysinger <vapier@gentoo.org> |
| 82 | ||
| 83 | * Makefile.in (SIM_OBJS): Delete sim-cpu.o. | |
| 84 | * sim-main.h (STATE_CPU): Delete. | |
| 85 | ||
| bf12d44e MF |
86 | 2015-04-13 Mike Frysinger <vapier@gentoo.org> |
| 87 | ||
| 88 | * configure: Regenerate. | |
| 89 | ||
| 14c9ad2e MF |
90 | 2015-04-13 Mike Frysinger <vapier@gentoo.org> |
| 91 | ||
| 92 | * Makefile.in (SIM_OBJS): Add sim-cpu.o. | |
| 93 | * interp.c (v850_pc_get, v850_pc_set): New functions. | |
| 94 | (sim_open): Declare new local var i. Call sim_cpu_alloc_all. | |
| 95 | Call CPU_PC_FETCH & CPU_PC_STORE for all cpus. | |
| 96 | (sim_pc_get): Delete. | |
| 97 | * sim-main.h (SIM_CPU): Define. | |
| 98 | (struct sim_state): Change cpu to an array of pointers. | |
| 99 | (STATE_CPU): Drop &. | |
| 100 | ||
| 122bbfb5 MF |
101 | 2015-04-06 Mike Frysinger <vapier@gentoo.org> |
| 102 | ||
| 103 | * Makefile.in (SIM_OBJS): Delete sim-engine.o and sim-hrw.o. | |
| 104 | ||
| aadc9410 MF |
105 | 2015-03-31 Mike Frysinger <vapier@gentoo.org> |
| 106 | ||
| 107 | * config.in, configure: Regenerate. | |
| 108 | ||
| 05f53ed6 MF |
109 | 2015-03-24 Mike Frysinger <vapier@gentoo.org> |
| 110 | ||
| 111 | * interp.c (sim_pc_get): New function. | |
| 112 | ||
| ae7d0cac MF |
113 | 2015-03-16 Mike Frysinger <vapier@gentoo.org> |
| 114 | ||
| 115 | * config.in, configure: Regenerate. | |
| 116 | ||
| 465fb143 MF |
117 | 2015-03-14 Mike Frysinger <vapier@gentoo.org> |
| 118 | ||
| 119 | * Makefile.in (SIM_RUN_OBJS): Delete. | |
| 120 | ||
| 5cddc23a MF |
121 | 2015-03-14 Mike Frysinger <vapier@gentoo.org> |
| 122 | ||
| 123 | * configure.ac (AC_CHECK_HEADERS): Delete unistd.h & stdlib.h & | |
| 124 | string.h & strings.h & time.h. | |
| 125 | * aclocal.m4, configure: Regenerate. | |
| 126 | ||
| a3976a7c NC |
127 | 2015-02-27 Nick Clifton <nickc@redhat.com> |
| 128 | ||
| 129 | * sim-main.h (reg64_t): New type. | |
| 130 | (v850_regs): Add selID_sregs field. | |
| 131 | (VR, SAT16, SAT32, ABS16, ABS32 ): New macros. | |
| 132 | * v850-dc: Add fields for v850e3v5 instructions. | |
| 133 | * v850.igen (cvtf.dl): Use correctly signed local value. | |
| 134 | (cvtf.dw, cvtf.sw, trncf.dul, trncf.dl, trncf.sul, trncf.sw): | |
| 135 | Likewise. | |
| 136 | * interp.c: Fix old style function declarations. | |
| 137 | * simops.c: Likewise. | |
| 138 | ||
| 9ad55e9b NC |
139 | 2015-02-24 Nick Clifton <nickc@redhat.com> |
| 140 | ||
| 141 | * v850.igen: Add more e3v5 support. | |
| 142 | (FMAF.S): New pattern. | |
| 143 | (FMSF.S): New pattern. | |
| 144 | (FNMAF.S): New pattern. | |
| 145 | (FNMSF.S): New pattern. | |
| 146 | (cnvq15q30): New pattern. | |
| 147 | (cnvq30q15): New pattern. | |
| 148 | (cnvq31q62): New pattern. | |
| 149 | (cnvq62q31): New pattern. | |
| 150 | (dup.h): New pattern. | |
| 151 | (dup.w): New pattern. | |
| 152 | (expq31): New pattern. | |
| 153 | (modadd): New pattern. | |
| 154 | (mov.dw): New pattern. | |
| 155 | (mov.h): New pattern. | |
| 156 | (mov.w): New pattern. | |
| 157 | (pki16i32): New pattern. | |
| 158 | (pki16ui8): New pattern. | |
| 159 | (pki32i16): New pattern. | |
| 160 | (pki64i32): New pattern. | |
| 161 | (pkq15q31): New pattern. | |
| 162 | (pkq30q31): New pattern. | |
| 163 | (pkq31q15): New pattern. | |
| 164 | (pkui8i16): New pattern. | |
| 165 | (vabs.h): New pattern. | |
| 166 | (vabs.w): New pattern. | |
| 167 | (vadd.dw): New placeholder pattern. | |
| 168 | (vadd.h): New placeholder pattern. | |
| 169 | (vadd.w): New placeholder pattern. | |
| 170 | (vadds.h): New placeholder pattern. | |
| 171 | (vadds.w): New placeholder pattern. | |
| 172 | (vaddsat.h): New placeholder pattern. | |
| 173 | (vaddsat.w): New placeholder pattern. | |
| 174 | (vand): New pattern. | |
| 175 | (vbiq.h): New placeholder pattern. | |
| 176 | (vbswap.dw): New placeholder pattern. | |
| 177 | (vbswap.h): New placeholder pattern. | |
| 178 | (vbswap.w): New placeholder pattern. | |
| 179 | (vcalc.h): New placeholder pattern. | |
| 180 | (vcalc.w): New placeholder pattern. | |
| 181 | (vcmov): New placeholder pattern. | |
| 182 | ||
| 2974be62 AM |
183 | 2014-08-19 Alan Modra <amodra@gmail.com> |
| 184 | ||
| 185 | * configure: Regenerate. | |
| 186 | ||
| faa743bb RM |
187 | 2014-08-15 Roland McGrath <mcgrathr@google.com> |
| 188 | ||
| 189 | * configure: Regenerate. | |
| 190 | * config.in: Regenerate. | |
| 191 | ||
| 1a8a700e MF |
192 | 2014-03-04 Mike Frysinger <vapier@gentoo.org> |
| 193 | ||
| 194 | * configure: Regenerate. | |
| 195 | ||
| bf3d9781 AM |
196 | 2013-09-23 Alan Modra <amodra@gmail.com> |
| 197 | ||
| 198 | * configure: Regenerate. | |
| 199 | ||
| 31e6ad7d MF |
200 | 2013-06-03 Mike Frysinger <vapier@gentoo.org> |
| 201 | ||
| 202 | * aclocal.m4, configure: Regenerate. | |
| 203 | ||
| fd7b2a54 NC |
204 | 2013-05-13 Nick Clifton <nickc@redhat.com> |
| 205 | ||
| 206 | * v850.igen (LDSR): Accept but ignore a selID parameter. | |
| 207 | ||
| d3685d60 TT |
208 | 2013-05-10 Freddie Chopin <freddie_chopin@op.pl> |
| 209 | ||
| 210 | * configure: Rebuild. | |
| 211 | ||
| 67d7515b NC |
212 | 2013-01-28 Nick Clifton <nickc@redhat.com> |
| 213 | ||
| 214 | * simops.c (v850_rotl): New function. | |
| 215 | (v850_bins): New function. | |
| 216 | * simops.h: Add prototypes fir v850_rotl and v850_bins. | |
| 217 | * v850-dc: Add entries for V850e3v5. | |
| 218 | * v850.igen: Add support for v850e3v5. | |
| 219 | (ld.dw, st.dw, rotl, bins): New patterns. | |
| 220 | ||
| 85367826 NC |
221 | 2013-01-10 Nick Clifton <nickc@redhat.com> |
| 222 | ||
| 223 | * interp.c (sim_open): Add support for bfd_arch_v850_rh850 | |
| 224 | architecture type. Add support for bfd_mach_v850e2 and | |
| 225 | bfd_mach_v850e2v3 machine numbers. | |
| 72f4393d L |
226 | * v850.igen (dbtrap): Add support for SIM_OPEN_DEBUG. |
| 227 | (cmpf.d): Correct order of operands. | |
| 228 | (cmpf.s): Likewise. | |
| 229 | (trncf.dul): New pattern. | |
| 230 | (trncf.duw): New pattern. | |
| 231 | (trncf.sul): New pattern. | |
| 232 | (trncf.suw): New pattern. | |
| 233 | * v850-dc: Correct bitfield selection for TRNCF.SW and CVTF.SW. | |
| 85367826 | 234 | |
| d99ff40f NC |
235 | 2012-09-13 Nick Clifton <nickc@redhat.com> |
| 236 | ||
| 237 | * v850.igen (W,WWWW): Correct computation of register number. | |
| 238 | (JR32): Remove unnecessary comma. | |
| 239 | (cmovf.s): Register 0 is an invalid source register. | |
| 240 | (maddf.s): Remove bogus intermediary rounding. | |
| 241 | (nmaddf.s): Likewise. | |
| 242 | (trncf.sl): Remove bogus initial rounding. | |
| 243 | (trncf.dw): Likewise. | |
| 244 | (trncf.sl): Likewise. | |
| 245 | (trncf.sw): Likewise. | |
| 246 | ||
| 5f3ef9d0 JB |
247 | 2012-06-15 Joel Brobecker <brobecker@adacore.com> |
| 248 | ||
| 249 | * config.in, configure: Regenerate. | |
| 250 | ||
| 2aaed979 KB |
251 | 2012-03-28 Rathish C <rathish.c@kpitcummins.com> |
| 252 | ||
| 253 | * sim-main.h (struct _v850_regs): Add new fields mpu0_sregs, | |
| 254 | mpu1_sregs, and fpu_sregs. | |
| 255 | (MPU0_SR, MPU1_SR, FPU_SR): New macros for accessing new fields | |
| 256 | in _v850_regs struct. | |
| 257 | (SP_REGNO): Define. | |
| 258 | (SP): Redefine using SP_REGNO. | |
| 259 | (PSW_REGNO, EIIC, FEIC, DBIC, DIR, EIWR, FEWR, DBWR, BSEL, PSW_NPV) | |
| 260 | (PSW_DMP, PSW_IMP, ECR_EICC, ECR_FECC, FPSR, FPSR_REGNO, FPEPC) | |
| 261 | (FPST, FPST_REGNO, FPCC, FPCFG, FPCFG_REGNO, FPSR_DEM, FPSR_SEM) | |
| 262 | (FPSR_RM, FPSR_RN, FPSR_FS, FPSR_PR, FPSR_XC, FPSR_XCE, FPSR_XCV) | |
| 263 | (FPSR_XCZ, FPSR_XCO, FPSR_XCU, FPSR_XCI, FPSR_XE, FPSR_XEV) | |
| 264 | (FPSR_XEZ, FPSR_XEO, FPSR_XEU, FPSR_XEI, FPSR_XP, FPSR_XPV) | |
| 265 | (FPSR_XPZ, FPSR_XPO, FPSR_XPU, FPSR_XPI, FPST_PR, FPST_XCE) | |
| 266 | (FPST_XCV, FPST_XCZ, FPST_XCO, FPST_XCU, FPST_XCI, FPST_XPV) | |
| 267 | (FPST_XPZ, FPST_XPO, FPST_XPU, FPST_XPI, FPCFG_RM, FPCFG_XEV) | |
| 268 | (FPCFG_XEZ, FPCFG_XEO, FPCFG_XEU, FPCFG_XEI, GET_FPCC, CLEAR_FPCC) | |
| 269 | (SET_FPCC, TEST_FPCC, FPSR_GET_ROUND, MPM, MPC, MPC_REGNO, TID) | |
| 270 | (PPA, PPM, PPC, DCC, DCV0, DCV1, SPAL, SPAU, IPA0L, IPA0U, IPA1L) | |
| 271 | (IPA1U, IPA2L, IPA2U, IPA3L, IPA3U, DPA0L, DPA0U, DPA1L, DPA1U) | |
| 272 | (DPA2L, DPA2U, DPA3L, DPA3U, PPC_PPE, SPAL_SPE, SPAL_SPS, VIP) | |
| 273 | (VMECR, VMTID, VMADR, VPECR, VPTID, VPADR, VDECR, VDTID, MPM_AUE) | |
| 274 | (MPM_MPE, VMECR_VMX, VMECR_VMR, VMECR_VMW, VMECR_VMS, VMECR_VMRMW) | |
| 275 | (VMECR_VMMS, IPA2ADDR, IPA_IPE, IPA_IPX, IPA_IPR, IPE0, IPE1, IPE2) | |
| 276 | (IPE3, IPX0, IPX1, IPX2, IPX3, IPR0, IPR1, IPR2, IPR3, DPA2ADDR) | |
| 277 | (DPA_DPE, DPA_DPR, DPA_DPW, DPE0, DPE1, DPE2, DPE3, DPR0, DPR1) | |
| 278 | (DPR2, DPR3, DPW0, DPW1, DPW2, DPW3, DCC_DCE0, DCC_DCE1, PPA2ADDR) | |
| 279 | (PPC_PPC, PPC_PPE, PPC_PPM): New macros. | |
| 280 | (FPU_COMPARE): New enum. | |
| 281 | (TRACE_FP_INPUT_FPU1, TRACE_FP_INPUT_FPU2, TRACE_FP_INPUT_FPU3) | |
| 282 | (TRACE_FP_INPUT_BOOL1_FPU2, TRACE_FP_INPUT_WORD2) | |
| 283 | (TRACE_FP_RESULT_WORD1, TRACE_FP_RESULT_WORD2): New macros. | |
| 284 | * simops.c (Add32): Update prototype. | |
| 285 | (update_fpsr): New function. | |
| 286 | (SignalException): New function. | |
| 287 | (SignalExceptionFPE): New function. | |
| 288 | (check_invalid_snan): New function. | |
| 289 | (v850_float_compare): New function. | |
| 290 | (v850_div): New function. | |
| 291 | (v850_divu): New function. | |
| 292 | (v850_sar): New function. | |
| 293 | (v850_shl): New function. | |
| 294 | (v850_shr): New function. | |
| 295 | (v850_satadd): New function. | |
| 296 | (v850_satsub): New function. | |
| 297 | (load_data_mem): New function. | |
| 298 | (store_data_mem): New function. | |
| 299 | (mpu_load_mem_test): New function. | |
| 300 | (mpu_store_mem_test): New function. | |
| 301 | * simops.h: Add function prototype for above mentioned functions. | |
| 302 | (check_cvt_fi, check_cvt_if, check_cvt_ff): Define. | |
| 303 | * v850-dc: Add entry for v850e2 and v850e2v3. | |
| 304 | * v850.igen: Add support for v850e2 and v850e2v3. | |
| 305 | ||
| 2232061b MF |
306 | 2012-03-24 Mike Frysinger <vapier@gentoo.org> |
| 307 | ||
| 308 | * aclocal.m4, config.in, configure: Regenerate. | |
| 309 | ||
| db2e4d67 MF |
310 | 2011-12-03 Mike Frysinger <vapier@gentoo.org> |
| 311 | ||
| 312 | * aclocal.m4: New file. | |
| 313 | * configure: Regenerate. | |
| 314 | ||
| 9c082ca8 MF |
315 | 2011-10-17 Mike Frysinger <vapier@gentoo.org> |
| 316 | ||
| 317 | * configure.ac: Change include to common/acinclude.m4. | |
| 318 | ||
| 6ffe910a MF |
319 | 2011-10-17 Mike Frysinger <vapier@gentoo.org> |
| 320 | ||
| 321 | * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER | |
| 322 | call. Replace common.m4 include with SIM_AC_COMMON. | |
| 323 | * configure: Regenerate. | |
| 324 | ||
| 2419798b MF |
325 | 2011-07-05 Mike Frysinger <vapier@gentoo.org> |
| 326 | ||
| 327 | * interp.c (sim_do_command): Delete. | |
| 328 | ||
| d0f0baa2 KB |
329 | 2011-03-21 Kevin Buettner <kevinb@redhat.com> |
| 330 | ||
| 331 | * simops (OP_10007E0): Update errno handling as most traps | |
| 332 | do not invoke the host's functionality directly. Invoke | |
| 333 | sim_io_stat() instead of stat() for implementing TARGET_SYS_stat. | |
| 334 | Implement TARGET_SYS_fstat, TARGET_SYS_rename, and TARGET_SYS_unlink. | |
| 335 | ||
| d79fe0d6 MF |
336 | 2011-02-14 Mike Frysinger <vapier@gentoo.org> |
| 337 | ||
| 338 | * simops.c (OP_10007E0): Change zfree to free. | |
| 339 | ||
| dae477fe AB |
340 | 2011-01-11 Andrew Burgess <aburgess@broadcom.com> |
| 341 | ||
| 342 | * interp.c (sim_store_register): Update return value to | |
| 343 | match new API. | |
| 344 | ||
| 4e9586f0 MF |
345 | 2010-03-30 Mike Frysinger <vapier@gentoo.org> |
| 346 | ||
| 347 | * interp.c (interrupt_names): Add const to pointer type. | |
| 348 | (do_interrupt): Add const to interrupt_name. | |
| 349 | ||
| 3725885a RW |
350 | 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
| 351 | ||
| 352 | * configure: Regenerate. | |
| 353 | ||
| d6416cdc RW |
354 | 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
| 355 | ||
| 81ecdfbb RW |
356 | * config.in: Regenerate. |
| 357 | * configure: Likewise. | |
| 358 | ||
| d6416cdc RW |
359 | * configure: Regenerate. |
| 360 | ||
| b5bd9624 HPN |
361 | 2008-07-11 Hans-Peter Nilsson <hp@axis.com> |
| 362 | ||
| 363 | * configure: Regenerate to track ../common/common.m4 changes. | |
| 364 | * config.in: Ditto. | |
| 365 | ||
| 6efef468 | 366 | 2008-06-06 Vladimir Prus <vladimir@codesourcery.com> |
| 72f4393d L |
367 | Daniel Jacobowitz <dan@codesourcery.com> |
| 368 | Joseph Myers <joseph@codesourcery.com> | |
| 6efef468 JM |
369 | |
| 370 | * configure: Regenerate. | |
| 371 | ||
| c5fbc25b DD |
372 | 2008-02-05 DJ Delorie <dj@redhat.com> |
| 373 | ||
| 98e460c3 DD |
374 | * simops.c (OP_1C007E0): Compensate for 64 bit hosts. |
| 375 | (OP_18007E0): Likewise. | |
| 376 | (OP_2C007E0): Likewise. | |
| 377 | (OP_28007E0): Likewise. | |
| 378 | * v850.igen (divh): Likewise. | |
| 72f4393d | 379 | |
| c5fbc25b DD |
380 | * simops.c (OP_C0): Correct saturation logic. |
| 381 | (OP_220): Likewise. | |
| 382 | (OP_A0): Likewise. | |
| 383 | (OP_660): Likewise. | |
| 384 | (OP_80): Likewise. | |
| 385 | ||
| 386 | * simops.c (OP_2A0): If the shift count is zero, clear the | |
| 387 | carry. | |
| 388 | (OP_A007E0): Likewise. | |
| 389 | (OP_2C0): Likewise. | |
| 390 | (OP_C007E0): Likewise. | |
| 391 | (OP_280): Likewise. | |
| 392 | (OP_8007E0): Likewise. | |
| 393 | ||
| 394 | * simops.c (OP_2C207E0): Correct PSW flags for special divu | |
| 395 | conditions. | |
| 396 | (OP_2C007E0): Likewise, for div. | |
| 397 | (OP_28207E0): Likewise, for divhu. | |
| 398 | (OP_28007E0): Likewise, for divh. Also, sign-extend the correct | |
| 399 | operand. | |
| 400 | * v850.igen (divh): Likewise, for 2-op divh. | |
| 72f4393d | 401 | |
| c5fbc25b DD |
402 | * v850.igen (bsh): Fix carry logic. |
| 403 | ||
| cb5c8c39 DJ |
404 | 2007-02-20 Daniel Jacobowitz <dan@codesourcery.com> |
| 405 | ||
| 406 | * Makefile.in (interp.o): Uncomment and update. | |
| 407 | ||
| edc5d9ec HPN |
408 | 2006-12-21 Hans-Peter Nilsson <hp@axis.com> |
| 409 | ||
| 410 | * acconfig.h: Remove. | |
| 411 | * config.in: Regenerate. | |
| 412 | ||
| e85e3205 RE |
413 | 2006-06-13 Richard Earnshaw <rearnsha@arm.com> |
| 414 | ||
| 415 | * configure: Regenerated. | |
| 416 | ||
| 2f0122dc DJ |
417 | 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com> |
| 418 | ||
| 419 | * configure: Regenerated. | |
| 420 | ||
| 20e95c23 DJ |
421 | 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com> |
| 422 | ||
| 423 | * configure: Regenerated. | |
| 424 | ||
| 2b193c4a MK |
425 | 2005-03-23 Mark Kettenis <kettenis@gnu.org> |
| 426 | ||
| 427 | * configure: Regenerate. | |
| 428 | ||
| 35695fd6 AC |
429 | 2005-01-14 Andrew Cagney <cagney@gnu.org> |
| 430 | ||
| 431 | * configure.ac: Sinclude aclocal.m4 before common.m4. Add | |
| 432 | explicit call to AC_CONFIG_HEADER. | |
| 433 | * configure: Regenerate. | |
| 434 | ||
| f0569246 AC |
435 | 2005-01-12 Andrew Cagney <cagney@gnu.org> |
| 436 | ||
| 437 | * configure.ac: Update to use ../common/common.m4. | |
| 438 | * configure: Re-generate. | |
| 439 | ||
| 38f48d72 AC |
440 | 2005-01-11 Andrew Cagney <cagney@localhost.localdomain> |
| 441 | ||
| 442 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 443 | ||
| b7026657 AC |
444 | 2005-01-07 Andrew Cagney <cagney@gnu.org> |
| 445 | ||
| 446 | * configure.ac: Rename configure.in, require autoconf 2.59. | |
| 447 | * configure: Re-generate. | |
| 448 | ||
| 379832de HPN |
449 | 2004-12-08 Hans-Peter Nilsson <hp@axis.com> |
| 450 | ||
| 451 | * configure: Regenerate for ../common/aclocal.m4 update. | |
| 452 | ||
| 4389ce38 MK |
453 | 2004-01-18 Mark Kettenis <kettenis@gnu.org> |
| 454 | ||
| 455 | * simops.c: Include <sys/types.h>. | |
| 456 | ||
| c5ea1d53 NC |
457 | 2003-09-05 Andrew Cagney <cagney@redhat.com> |
| 458 | Nick Clifton <nickc@redhat.com> | |
| 459 | ||
| 460 | * interp.c (sim_open): Accept bfd_mach_v850e1. | |
| 461 | * v850-dc: Add entry for v850e1. | |
| 462 | * v850.igen: Add support for v850e1. | |
| 463 | Add code for DBTRAP and DBRET instructions. | |
| 464 | (dbtrap): Create a separate v850e1 specific instruction. | |
| 465 | Only generate a trap if the target is not the v850e1. | |
| 466 | Otherwise treat it as a special kind of branch. | |
| 467 | (break): Mark as v850/v850e specific. | |
| 72f4393d | 468 | |
| ae451ac6 ILT |
469 | 2003-05-16 Ian Lance Taylor <ian@airs.com> |
| 470 | ||
| 471 | * Makefile.in (SHELL): Make sure this is defined. | |
| 472 | (tmp-igen): Use $(SHELL) whenever we invoke move-if-change. | |
| 473 | ||
| ebc115b7 NC |
474 | 2003-04-06 Nick Clifton <nickc@redhat.com> |
| 475 | ||
| 1eec9e33 NC |
476 | * simops.c (OP_40): Delete. Move code to... |
| 477 | * v850-igen.c (): ...Here. Sign extend the first operand. | |
| ebc115b7 NC |
478 | * simops.h (OP_40): Remove prototype. |
| 479 | ||
| 6b4a8935 AC |
480 | 2003-02-27 Andrew Cagney <cagney@redhat.com> |
| 481 | ||
| 482 | * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd. | |
| 483 | ||
| 0da2b665 AC |
484 | 2002-11-30 Andrew Cagney <cagney@redhat.com> |
| 485 | ||
| 486 | * simops.c: Use int, 1, 0 instead of boolean, true and false. | |
| 487 | * sim-main.h: Ditto. | |
| 488 | ||
| 30458d39 JW |
489 | 2002-09-27 Jim Wilson <wilson@redhat.com> |
| 490 | ||
| 491 | * simops.c (OP_E6077E0): And op1 with 7 after reading register, not | |
| 492 | before. | |
| 493 | (BIT_CHANGE_OP): Likewise. | |
| 494 | ||
| 2e8162ce JW |
495 | 2002-09-26 Jim Wilson <wilson@redhat.com> |
| 496 | ||
| 497 | * simops (OP_10007E0): Don't subtract 4 from PC. | |
| 498 | ||
| 5d6a173d NC |
499 | 2002-09-19 Nick Clifton <nickc@redhat.com> |
| 500 | ||
| 501 | * interp.c (sim_open): Remove reference to v850ea. | |
| 502 | (sim_create_inferior): Likewise. | |
| 503 | * v850-dc: Likewise. | |
| 504 | * v850.igen: Remove all references to v850ea, including v850ea | |
| 505 | specific instructions. | |
| 506 | ||
| e551c257 NC |
507 | 2002-08-29 Nick Clifton <nickc@redhat.com> |
| 508 | ||
| 509 | From 2001-08-23 Catherine Moore <clm@redhat.com> | |
| 510 | ||
| 511 | * Makefile.in: Add gen-zero-r0 option. | |
| 512 | * sim-main.h (GPR_SET, GPR_CLEAR): Define. | |
| 513 | * simops.c (OP_24007E0): Sign extend the imm9 | |
| 514 | operand of a mul instruction. | |
| 515 | ||
| d62274a3 AC |
516 | 2002-06-17 Andrew Cagney <cagney@redhat.com> |
| 517 | ||
| 518 | * simops.c (trace_result): Fix printf formatting. | |
| 519 | ||
| c8cca39f AC |
520 | 2002-06-16 Andrew Cagney <ac131313@redhat.com> |
| 521 | ||
| 522 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 523 | ||
| 7ef2d4e7 AC |
524 | 2001-12-02 Andrew Cagney <ac131313@redhat.com> |
| 525 | ||
| 526 | * Makefile.in (simops.h, table.c): Delete targets. | |
| 527 | (tmp-gencode, gencode.o, gencode): Delete targets. | |
| 528 | (simops.h): New file. | |
| 529 | ($(BUILT_SRC_FROM_IGEN)): Do not depend on simops.h. | |
| 530 | * gencode.c: Delete file. | |
| 72f4393d | 531 | |
| d4424ada C |
532 | 2001-04-15 J.T. Conklin <jtc@redback.com> |
| 533 | ||
| 534 | * Makefile.in (simops.o): Add simops.h to dependency list. | |
| 535 | ||
| 1e6cd159 AC |
536 | 2001-03-14 Andrew Cagney <ac131313@redhat.com> |
| 537 | ||
| 538 | * Makefile.in (gencode): Link with libintl. | |
| 539 | ||
| 42acc51e JL |
540 | 2001-01-31 Jonathan Larmour <jlarmour@redhat.com> |
| 541 | ||
| 542 | * Makefile.in (gencode): Link with libopcodes in build tree rather | |
| 543 | than building source files from there. | |
| 544 | ||
| 896ad910 NC |
545 | 2000-05-30 Nick Clifton <nickc@cygnus.com> |
| 546 | ||
| 547 | * v850.igen: Remove illegal instruction pattern, since it is the | |
| 548 | same as the breakpoint pattern. | |
| 549 | ||
| eb2d80b4 AC |
550 | Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com> |
| 551 | ||
| 552 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 553 | ||
| b9791fcd FCE |
554 | 2000-04-14 Gary Thomas <gthomas@redhat.com> |
| 555 | ||
| 556 | * v850.igen: Define 'br *' as illegal since this is the only | |
| 557 | way to provide a breakpoint on some v850 family processors. | |
| 558 | ||
| de616bc7 FCE |
559 | 2000-03-24 Frank Ch. Eigler <fche@redhat.com> |
| 560 | ||
| 561 | * v850.igen (ilgop): New insn pattern for four-byte breakpoints. | |
| 562 | ||
| d4f3574e SS |
563 | Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> |
| 564 | ||
| 565 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 566 | ||
| cd0fc7c3 SS |
567 | 1999-05-08 Felix Lee <flee@cygnus.com> |
| 568 | ||
| 569 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 72f4393d | 570 | |
| c906108c SS |
571 | Tue Dec 1 17:25:16 1998 Andrew Cagney <cagney@b1.cygnus.com> |
| 572 | ||
| 573 | * Makefile.in (NL_TARGET): Define as -DNL_TARGET_v850. | |
| 574 | ||
| 575 | Wed Nov 25 17:52:58 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 576 | ||
| 577 | * Makefile.in (simops.o): Depends on targ-vals.h | |
| 578 | * simops.c: Include targ-vals.h instead of | |
| 579 | libgloss/.../syscall.h. Replace SYS_* with TARGET_SYS_*. | |
| 580 | (divn, divun, OP_1C007E0, OP_18207E0, OP_1C207E0,OP_18007E0): | |
| 581 | Replace signed long int with signed32. | |
| 582 | ||
| 583 | Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com> | |
| 584 | ||
| 585 | * interp.c: #include "itable.h". | |
| 586 | (get_insn_name): New function. | |
| 587 | (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS. | |
| 588 | * sim-main.h (MAX_INSNS,INSN_NAME): Delete. | |
| 589 | ||
| 590 | Wed May 6 19:43:27 1998 Doug Evans <devans@canuck.cygnus.com> | |
| 591 | ||
| 592 | * sim-main.h (INSN_NAME): New arg `cpu'. | |
| 593 | ||
| 594 | Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com> | |
| 595 | ||
| 72f4393d | 596 | * configure: Regenerated to track ../common/aclocal.m4 changes. |
| c906108c SS |
597 | |
| 598 | Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche> | |
| 599 | ||
| 600 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 601 | * config.in: Ditto. | |
| 602 | ||
| 603 | Sun Apr 26 15:19:14 1998 Tom Tromey <tromey@cygnus.com> | |
| 604 | ||
| 605 | * acconfig.h: New file. | |
| 606 | * configure.in: Reverted change of Apr 24; use sinclude again. | |
| 607 | ||
| 608 | Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche> | |
| 609 | ||
| 610 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 611 | * config.in: Ditto. | |
| 612 | ||
| 613 | Fri Apr 24 11:18:08 1998 Tom Tromey <tromey@cygnus.com> | |
| 614 | ||
| 615 | * configure.in: Don't call sinclude. | |
| 616 | ||
| 617 | Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 618 | ||
| 619 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 620 | * sim-main.h (SIM_MAIN_H): Wrap header. | |
| 621 | ||
| 622 | Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 623 | ||
| 624 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 625 | ||
| 626 | Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 627 | ||
| 628 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 629 | ||
| 630 | Tue Mar 10 15:54:50 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 631 | ||
| 632 | * interp.c (sim_stop): Delete, second attempt. | |
| 633 | ||
| 634 | Thu Feb 26 19:09:47 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 635 | ||
| 636 | * interp.c (sim_info): Delete. | |
| 637 | ||
| 638 | Wed Feb 18 10:47:32 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 639 | ||
| 640 | * sim-main.h (TRACE_ALU_INPUT*): Delete. Moved to sim-trace.[hc]. | |
| 641 | ||
| 642 | * simops.c (trace_result): Call trace_generic instead of | |
| 643 | trace_one_insn. | |
| 644 | (trace_module): Change variable type to integer. | |
| 645 | (trace_input): Initialize trace_module with TRACE_ALU_IDX. | |
| 646 | ||
| 647 | * sim-main.h (trace_module): Change variable decl to integer type. | |
| 648 | (TRACE_BRANCH*, TRACE_LD, TRACE_ST): Update. | |
| 72f4393d | 649 | |
| c906108c SS |
650 | Tue Feb 17 12:51:18 1998 Andrew Cagney <cagney@b1.cygnus.com> |
| 651 | ||
| 652 | * interp.c (sim_store_register, sim_fetch_register): Pass in | |
| 653 | length parameter. Return -1. | |
| 654 | ||
| 655 | Tue Feb 3 16:24:42 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 656 | ||
| 657 | * sim-main.h (IMEM16, IMEM16_IMMED): Rename IMEM and | |
| 658 | IMEM_IMMED. To match recent igen change. | |
| 659 | ||
| 660 | Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 661 | ||
| 662 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 663 | ||
| 664 | Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 665 | ||
| 666 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 667 | ||
| 668 | Fri Jan 30 09:51:27 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 669 | ||
| 670 | * sim-main.h (CPU_CIA): Delete, replaced by. | |
| 671 | (CIA_SET, CIA_SET): Define. | |
| 672 | ||
| 673 | Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> | |
| 674 | ||
| 675 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 676 | ||
| 677 | Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 678 | ||
| 679 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 680 | * config.in: Ditto. | |
| 681 | ||
| 682 | Fri Dec 5 09:26:08 1997 Nick Clifton <nickc@cygnus.com> | |
| 683 | ||
| 684 | * v850.igen: Revert break value back to its old value. | |
| 685 | ||
| 686 | Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> | |
| 687 | ||
| 688 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 689 | ||
| 690 | Wed Dec 3 17:27:19 1997 Nick Clifton <nickc@cygnus.com> | |
| 691 | ||
| 692 | * v850.igen: Make break have a zero first field, since otherwise | |
| 693 | it clashes with the DIVH instruction. | |
| 694 | ||
| 695 | Sat Nov 22 21:32:07 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 696 | ||
| 697 | * simops.c (OP_10007E0): Rename SIGABRT -> SIM_SIGABRT. Give | |
| 698 | sim_stopped instead of sim_signalled. | |
| 699 | ||
| 700 | * v850.igen (BREAK), simops.c (OP_12007E0): Rename SIGTRAP to | |
| 701 | SIM_SIGTRAP. | |
| 702 | (illegal): Rename SIGILL to SIM_SIGILL. | |
| 72f4393d | 703 | |
| c906108c SS |
704 | * sim-main.h, simops.c, interp.c: Do not include signal.h. |
| 705 | ||
| 706 | * sim-main.h: Include sim-signal.h instead of signal.h. | |
| 707 | (SIGTRAP, SIGQUIT): Delete definition. | |
| 708 | (SIG_V850_EXIT): Delete definition. | |
| 709 | ||
| 710 | Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com> | |
| 711 | ||
| 712 | * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS). | |
| 713 | ||
| 714 | Fri Oct 31 10:33:40 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 715 | ||
| 716 | * interp.c (sim_open): Check state magic number. | |
| 717 | (sim-assert.h): Include. | |
| 718 | ||
| 719 | Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 720 | ||
| 721 | * v850.igen: Add model filter field to records. | |
| 722 | ||
| 723 | Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 724 | ||
| 725 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 726 | ||
| 727 | Fri Sep 26 11:56:02 1997 Felix Lee <flee@cygnus.com> | |
| 728 | ||
| 729 | * sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and | |
| 730 | SIM_ENGINE_RESTART_HOOK. | |
| 72f4393d | 731 | |
| c906108c SS |
732 | Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> |
| 733 | ||
| 734 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 735 | ||
| 736 | Wed Sep 24 17:28:26 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 737 | ||
| 738 | * sim-main.h (WITH_TARGET_WORD_MSB): Delete. | |
| 739 | ||
| 740 | * configure.in (SIM_AC_OPTION_BITSIZE): Specify 32 bit | |
| 741 | architecture with MSB == 31. | |
| 742 | ||
| 743 | Wed Sep 24 14:04:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 744 | ||
| 745 | * v850.igen: Make divh insn with RRRRR==0 breakpoint. | |
| 746 | ||
| 747 | Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 748 | ||
| 749 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 750 | ||
| 751 | Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 752 | ||
| 753 | * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN, | |
| 754 | SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common. | |
| 755 | (SIM_EXTRA_CFLAGS): Update. | |
| 72f4393d | 756 | |
| c906108c SS |
757 | Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> |
| 758 | ||
| 759 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 760 | * configure.in: Really specify NONSTRICT_ALIGNMENT as the default. | |
| 761 | ||
| 762 | Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 763 | ||
| 764 | * configure.in: Specify NONSTRICT_ALIGNMENT as the default. | |
| 765 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 766 | ||
| 767 | Fri Sep 19 10:37:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 768 | ||
| 769 | * v850.igen (disp16): Use EXTEND16 to sign extend disp. | |
| 770 | (disp22): Only shift left by 1, not 2. | |
| 771 | ("jmp"): Ensure PC is 2 byte aligned. | |
| 772 | ||
| 773 | * simops.c, v850.igen: Move "Bcond", "jr", "jarl" code to | |
| 774 | v850.igen. Fix tracing. | |
| 775 | ||
| 776 | * simops.c (OP_300, OP_400, OP_500): Move "sdl.b", "sld.h", | |
| 777 | "sld.w" insns to v850.igen. Fix tracing. | |
| 778 | (OP_70): Ditto for "sld.hu". | |
| 779 | ||
| 780 | * v850.igen: Clarify tracing of "sld.b", "sld.h" et.al. | |
| 781 | ||
| 782 | * simops.c (condition_met): Make global. | |
| 783 | ||
| 784 | * sim-main.h (TRACE_ALU_INPUT3, TRACE_BRANCH0, TRACE_LD, | |
| 785 | TRACE_ST): Define. | |
| 786 | (TRACE_LD_NAME): Define. | |
| 787 | ||
| 788 | * simops.c: Move "cmov", "cmov imm" to v850.igen, fix. | |
| 789 | ||
| 790 | Wed Sep 17 16:21:08 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 791 | ||
| 792 | * simops.c: Move "mov", "reti", to v850.igen, fix tracing. | |
| 72f4393d | 793 | |
| c906108c SS |
794 | * interp.c (hash): Delete. |
| 795 | ||
| 796 | * v850.igen (nop): Really do nothing. | |
| 797 | ||
| 798 | * interp.c (do_interrupt): Mask interrupts after PSW is saved, not | |
| 799 | before. | |
| 800 | * v850.igen (reti): Return to current PC not previous. | |
| 801 | ||
| 802 | Wed Sep 17 14:02:10 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 803 | ||
| 804 | * simops.c: Move "ctret", "bsw", "hsw" to v850.igen, fix tracing. | |
| 805 | (trace_module): Global, save component/module name across insn. | |
| 806 | ||
| 807 | * simops.c: Move "bsh" to v850.igen, fix. | |
| 72f4393d | 808 | |
| c906108c SS |
809 | * v850.igen (callt): Load correct number of bytes. Fix tracing. |
| 810 | (stsr, ldsr): Correct src, dest fields. Fix tracing. | |
| 811 | (ctret): Force alignment. Fix tracing. | |
| 72f4393d | 812 | |
| c906108c SS |
813 | Tue Sep 16 22:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com> |
| 814 | ||
| 815 | * simops.c (trace_output): Add result argument. | |
| 816 | (trace_result): New function. Simpler version of trace_output, | |
| 817 | assumes trace needed. | |
| 818 | (trace_output): Call trace_result. | |
| 819 | (trace_output): For IMM_REG_REG, trace correct register. | |
| 820 | (trace_input): Add case for 16bit immediates. | |
| 821 | (OP_600, OP_640, OP_680, OP_6C0, OP_6A0): Use. | |
| 822 | ||
| 823 | * sim-main.h (TRACE_ALU_INPUT, TRACE_ALU_RESULT): Define. | |
| 824 | (trace_values, trace_name, trace_pc, trace_num_values): Make | |
| 825 | global. | |
| 826 | (GR, SR): Define. | |
| 72f4393d | 827 | |
| c906108c SS |
828 | v850.insn (movea, stsr): Use. |
| 829 | (sxb, sxh, zxb, zxh): Ditto. | |
| 72f4393d | 830 | |
| c906108c SS |
831 | Tue Sep 16 21:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com> |
| 832 | ||
| 833 | * simops.c: Move "movea" from here. | |
| 834 | * v850.igen: To here. | |
| 835 | ||
| 836 | * v850.igen (simm16): Define, sign extend imm16. | |
| 837 | (uimm16): Define, no sign extension. | |
| 838 | (addi, andi, movea, movhi, mulhi, ori, satsubi, xori): Use. | |
| 72f4393d | 839 | |
| c906108c SS |
840 | * simops.c: Move "sxh", "switch", "sxb", "callt", "dispose", |
| 841 | "mov32" from here. | |
| 842 | * v850.igen: To here. | |
| 843 | (switch): Fix off by two error in NIA calc. | |
| 72f4393d | 844 | |
| c906108c SS |
845 | Tue Sep 16 15:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com> |
| 846 | ||
| 847 | * simops.c (trace_pc, trace_name, trace_values, trace_num_values): | |
| 848 | New static globals. | |
| 849 | (trace_input): Just save pc, name and values for trace_output. | |
| 850 | (trace_output): Write trace values to a buffer. Use | |
| 851 | trace_one_insn to print trace info and buffer. | |
| 852 | (SIZE_OPERANDS, SIZE_LOCATION): Delete. | |
| 72f4393d | 853 | |
| c906108c SS |
854 | Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com> |
| 855 | ||
| 856 | * sim-main.h (struct _sim_cpu): Add psw_mask so that reserved bits | |
| 857 | can be masked out. | |
| 858 | ||
| 859 | * simops.c (OP_2007E0, OP_4007E0): Move "ldsr", "stsr" | |
| 860 | instructions from here. | |
| 861 | * v850.igen (ldsr, stsr): To here. Mask out reserved bits when | |
| 862 | setting PSW. | |
| 72f4393d | 863 | |
| c906108c SS |
864 | * interp.c (sim_open): Set psw_mask if machine known. |
| 865 | ||
| 866 | Tue Sep 16 10:20:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 867 | ||
| 868 | * v850-dc: Add rule to diferentiate between breakpoint and divh. | |
| 869 | * v850.igen (break): New instruction, breakpoint simulator. | |
| 870 | * v850.igen (breakpoint): Enable. Change to a 32bit instruction. | |
| 871 | ||
| 872 | Mon Sep 15 18:44:05 1997 Jim Wilson <wilson@cygnus.com> | |
| 873 | ||
| 874 | * simops.c (Multiply64): Don't store into register zero. | |
| 875 | ||
| 876 | Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 877 | ||
| 878 | * Makefile.in (semantics.o): Add dependency. | |
| 879 | ||
| 880 | * sim-main.h (SAVE_1, SAVE_2): Perform backward compatible save, | |
| 881 | do not adjust CIA/NIA. | |
| 882 | ||
| 883 | Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 884 | ||
| 885 | * simops.c (OP_300, OP_400, OP_70): Make behavour depend on PSW[US]. | |
| 72f4393d | 886 | |
| c906108c SS |
887 | * simops.c: Move "divun", "sld.bu", "divhn", "divhun", "divn", |
| 888 | "divun", "pushml" code from here to v850.igen. | |
| 889 | (divun): Make global. | |
| 890 | (type3_regs): Make global | |
| 72f4393d | 891 | |
| c906108c SS |
892 | * v850.igen: Move simops.c code to here. |
| 893 | ||
| 894 | * interp.c (sim_create_inferior): For v850eq set US bit by | |
| 895 | default. | |
| 896 | ||
| 897 | * interp.c (sim_open): Don't set arch, now set by | |
| 898 | sim_analyze_program. | |
| 899 | ||
| 900 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 901 | ||
| 902 | Mon Sep 15 14:39:34 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 903 | ||
| 904 | * simops.c (op_types): Move from here. | |
| 905 | sim-main.h: To here. | |
| 906 | ||
| 907 | * sim-main.h (trace_input, trace_output), simops.c: Make global. | |
| 908 | ||
| 909 | * simops.c (OP_60): Move "jmp" code from here. | |
| 910 | * v850.igen (jmp): To here. | |
| 911 | ||
| 912 | * simops.c (OP_60): Move "sld.bu" code from here. | |
| 913 | * v850.igen (sld.bu): To here. | |
| 914 | ||
| 915 | Fri Sep 12 15:11:03 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 916 | ||
| 917 | * v850.igen (prepare, ...): Add to v850eq architecture. | |
| 918 | ||
| 919 | * interp.c (sim_open): Default to v850eq. | |
| 72f4393d | 920 | |
| c906108c SS |
921 | * interp.c (sim_open): Default to v850e. |
| 922 | * sim-main.h (signal.h): Include. | |
| 923 | ||
| 924 | * v850.igen (illegal): Report/halt illegal instructions. | |
| 925 | ||
| 926 | * Makefile.in (SIM_EXTRA_CFLAGS): Add SIM_RESERVED_BITS. | |
| 927 | ||
| 928 | * configure.in: Add reserved bits option. | |
| 929 | * configure: Regenerate. | |
| 930 | ||
| 931 | Thu Sep 11 08:40:03 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 932 | ||
| 933 | * interp.c (sim_open): Use sim_do_commandf instead of asprintf. | |
| 934 | ||
| 72f4393d | 935 | * sim-main.h (INSN_NAME): |
| c906108c SS |
936 | |
| 937 | * Makefile.in (INCLUDE): Add SIM_EXTRA_DEPS. | |
| 938 | (SIM_EXTRA_DEPS): Add itable.h | |
| 939 | (tmp-gencode): Does not depend on simops.h | |
| 940 | ||
| 941 | * sim-main.h (itable.h): Include. | |
| 942 | (MAX_INSNS, INSN_NAME): Define. | |
| 943 | ||
| 944 | * interp.c: Compute inttype from the interrupt_names index that | |
| 945 | was passed in. | |
| 946 | ||
| 947 | Wed Sep 10 10:25:40 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 948 | ||
| 949 | * simops.c (trace_input): Use trace_printf instead of | |
| 950 | sim_io_printf. | |
| 951 | (trace_output): Ditto. | |
| 952 | (trace_input): Only trace when TRACE_ALU_P. Delete code | |
| 953 | disasembling instruction. | |
| 954 | (trace_output): Only trace when TRACE_ALU_P. | |
| 955 | ||
| 956 | Tue Sep 9 01:29:50 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 957 | ||
| 958 | * simops.c (trace_input, trace_output): Use sim_io_printf. | |
| 959 | (OP_620): Pass correct argument to trace. | |
| 960 | (OP_E607E0): Ditto. | |
| 961 | (trace_input): Obtain prog_bfd, text_start et.al from simulator | |
| 962 | struct. | |
| 963 | ||
| 964 | Mon Sep 8 21:03:52 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 965 | ||
| 966 | * v850.igen: New file. | |
| 967 | * v850-dc: New file. | |
| 968 | ||
| 969 | Mon Sep 8 18:33:04 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 970 | ||
| 971 | ||
| 972 | * sim-main.h (SEXT16): Delete, use EXTEND16. | |
| 973 | (SEXT8): Delete, use EXTEND8. | |
| 974 | (SEXT32): Delete, used? | |
| 975 | (SEXT40, SEXT44, SEXT64): Use UNSIGNED64 for constants, not ...LL. | |
| 976 | (WITH_TARGET_WORD_MSB): Define as 31. v850 little bit endian. | |
| 72f4393d | 977 | |
| c906108c SS |
978 | * simops.c: Use EXTEND15 from sim-bits instead of SEXT16. |
| 979 | ||
| 980 | * sim-main.h (DEBUG_TRACE, DEBUG_VALUES, v850_debug): Delete, | |
| 981 | replace with TRACE_INSN_P and TRACE_ALU_P. | |
| 982 | ||
| 983 | * simops.c (trace_input, trace_output): Update. | |
| 984 | ||
| 985 | * interp.c (sim_engine_run): Delete. | |
| 986 | (lookup_hash): Delete. | |
| 987 | (sim_open): Do not fill hash table. | |
| 988 | (sim_trace): Delete. | |
| 989 | ||
| 990 | Fri Sep 5 17:04:48 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 991 | ||
| 992 | * simops.c (OP_FFFF): Use sim_engine_halt. | |
| 993 | (OP_12007E0): Ditto. | |
| 994 | (OP_10007E0): Ditto. | |
| 995 | ||
| 996 | * sim-main.h (struct sim_cpu): Delete member exception. Using | |
| 997 | sim-engine et.al. | |
| 998 | ||
| 999 | * interp.c (sim_info): Do not do anything in sim-info. | |
| 1000 | (sim_stop): Delete, replace with sim-stop. | |
| 1001 | (sim_stop_reason): Delete, replace with sim-reason. | |
| 1002 | ||
| 1003 | * sim-main.h (WITH_WATCHPOINTS): Define. | |
| 1004 | (WITH_MODULO_MEMORY): Define | |
| 72f4393d | 1005 | |
| c906108c SS |
1006 | * Makefile.in (SIM_OBJS): Add sim-resume, sim-watch, sim-stop, |
| 1007 | sim-reason. | |
| 1008 | ||
| 1009 | * interp.c (enum interrupt_cond_type): Delete. | |
| 1010 | (struct interrupt_generator): Delete. | |
| 1011 | (enum interrupt_type): Drop int_none. | |
| 1012 | (sim_open): Initialize WATCHPOINT module. | |
| 1013 | (sim_resume, sim_run): Rename sim_resume to sim_run. | |
| 1014 | (sim_engine_run): Replace interrupt code with call to sim-events. | |
| 1015 | (sim_set_interrupt): Delete. | |
| 1016 | (sim_parse_number): Delete. | |
| 1017 | ||
| 1018 | Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> | |
| 1019 | ||
| 1020 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 1021 | ||
| 1022 | Thu Sep 4 18:11:37 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1023 | ||
| 1024 | * simops.c (fetch_argv): New function, fetch a arg vector from | |
| 1025 | simulator memory. | |
| 1026 | ||
| 1027 | * configure.in: Check for fork, execve, execv. | |
| 1028 | * configure: Regenerate. | |
| 1029 | ||
| 1030 | * interp.c (sim_store_register, sim_fetch_register): Use H2T_4 and | |
| 1031 | T2H_4 for byte swapping. | |
| 1032 | ||
| 1033 | * sim-main.h, interp.c (get_word, get_half, get_byte, put_word, | |
| 1034 | put_half, put_byte): Delete. | |
| 1035 | ||
| 1036 | * Makefile.in (SIM_OBJS): Add sim-memopt.o module. | |
| 1037 | ||
| 1038 | * sim-main.h (load_mem, store_mem): Redefine as macros. | |
| 1039 | (IMEM, IMEM_IMMED): New macros - fetch instructions. | |
| 1040 | ||
| 1041 | * simops.c (OP_10007E0): For SYS_read, SYS_write, SYS_open | |
| 1042 | transfer data via a buffer. | |
| 1043 | (fetch_str): New function, fetch string from memory. | |
| 1044 | ||
| 1045 | * Makefile.in (SIM_OBJS): Add sim-hrw.o module. | |
| 1046 | ||
| 1047 | * interp.c (sim_open): Establish memory maps using sim-memopt.c | |
| 1048 | via sim_do_command. | |
| 1049 | (sim_do_command): Print error if memory-map command is used. Call | |
| 1050 | sim_args_command. | |
| 1051 | (map): Delete, replaced by sim-core. | |
| 1052 | (sim_memory_init): Delete, replaced by sim-core. | |
| 1053 | (sim_set_memory_map): Delete, replaced by sim-memopt. | |
| 1054 | (load_mem): Delete, replaced by sim-core. | |
| 1055 | (store_mem): Delete, replaced by sim-core. | |
| 1056 | (sim_write): Delete, replaced by sim-hrw. | |
| 1057 | (sim_read): Delete, replaced by sim-hrw. | |
| 1058 | ||
| 1059 | * sim-main.h (struct sim_state): Remove memory members, using | |
| 1060 | sim-core.c | |
| 1061 | ||
| 1062 | Wed Sep 3 10:18:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1063 | ||
| 1064 | * sim-main.h: Replace SIM_HAVE_FLATMEM with mem ptr. | |
| 1065 | * interp.c (map): Do not add to a void pointer. | |
| 72f4393d | 1066 | |
| c906108c SS |
1067 | * Makefile.in (INCLUDE): Add sim-main.h |
| 1068 | ||
| 1069 | * configure.in: Check for time.h | |
| 1070 | * configure: Re-generate. | |
| 1071 | ||
| 1072 | * interp.c (struct interrupt_generator): Make time unsigned long, | |
| 1073 | address SIM_ADDR. | |
| 1074 | (sim_resume): Make oldpc SIM_ADDR. | |
| 1075 | (struct hash_entry): Make mask/opcode unsigned. | |
| 1076 | ||
| 1077 | * v850_sim.h (struct simops ): Make opcode and mask unsigned. | |
| 1078 | ||
| 1079 | * simops.c (utime.h): Include if available. | |
| 1080 | (OP_10007E0): Check for UTIME function. | |
| 1081 | (divun): Put parentheses around shift argument. | |
| 1082 | (OP_640): Put parentheses around shift argument, was wrong. | |
| 1083 | (OP_107F0): Return something. | |
| 1084 | ||
| 1085 | * interp.c (sim_parse_number): Use strtoul not strtol. | |
| 1086 | (sim_resume): Use sim_elapsed_time_get to keep track of the time. | |
| 1087 | ||
| 1088 | * configure.in (SIM_AC_OPTION_WARNINGS): Add. | |
| 1089 | (SIM_AC_OPTION_ENDIAN): Set to hardwired big. | |
| 1090 | (SIM_AC_OPTION_HOST_ENDIAN): Add. | |
| 1091 | (AC_CHECK_FUNCS): Add utime. | |
| 1092 | (AC_CHECK_HEADERS): Add stdlib.h, string.h, strings.h, utime.h | |
| 1093 | configure: Regenerate. | |
| 72f4393d | 1094 | |
| c906108c SS |
1095 | |
| 1096 | * Makefile.in (SIM_RUN_OBJS): Use nrun.o. | |
| 1097 | (SIM_OBJS): Add sim-io.o, sim-hload.o, sim-utils.o, sim-options.o, | |
| 1098 | sim-config.o, sim-module.o, sim-events.o, sim-core.o, | |
| 1099 | sim-endian.o, sim-engine.o, sim-trace.o, sim-profile.o | |
| 1100 | (SIM_ENDIAN, SIM_WARNGINS): Define. | |
| 1101 | ||
| 1102 | * simops.c (OP_10007E0): Use sim_io_* for transfers. | |
| 1103 | ||
| 1104 | * interp.c (sim_resume): Pass sd around. | |
| 1105 | ||
| 1106 | * simops.c (sim-main.h): Include. | |
| 1107 | ||
| 1108 | * gencode.c (write_template): Generate #include sim-main.h. | |
| 1109 | (write_opcodes): Ditto. | |
| 72f4393d | 1110 | |
| c906108c SS |
1111 | * interp.c (prog_bfd, prog_bfd_was_opened_p): Delete. |
| 1112 | (v850_callback): Ditto. | |
| 1113 | (sim_kind, myname): Ditto. | |
| 1114 | (lookup_hash): Pass SD. Use sim_io_error. | |
| 1115 | (sim_set_memory_map): Pass in SD, use. | |
| 1116 | (init_system): Pass in SD, use. | |
| 1117 | (sim_open): Update. | |
| 1118 | (sim_set_profile): Delete. | |
| 1119 | (sim_set_profile_size): Delete. | |
| 1120 | (do_interrupt): Pass in SD, use. | |
| 1121 | (sim_info): Use sim_io_printf. | |
| 1122 | (sim_create_inferior): Reset registers. Set PC from prog_bfd | |
| 1123 | argument. | |
| 1124 | (sim_load): Delete, use common/sim-hload.c | |
| 1125 | (sim_size): Rename to sim_memory_init. | |
| 1126 | (sim_write): Remove call to init_system. | |
| 1127 | (init_system): Delete. | |
| 1128 | (sim_set_callbacks): Delete. | |
| 1129 | (sim_set_interrupt): Pass in SD, use. | |
| 1130 | (start_time): Delete. | |
| 72f4393d | 1131 | |
| c906108c SS |
1132 | * v850_sim.h: Remove everything except `struct simops' from here. |
| 1133 | * sim-main.h: Move most to here. | |
| 1134 | * gencode.c: Move #includes to here. | |
| 1135 | ||
| 1136 | * sim-main.h(struct _sim_cpu): Rename struct _state. | |
| 1137 | (#define PC, et.al.): Update | |
| 1138 | (v850_callback): Delete. Replaced with SIM_DESC arg. | |
| 1139 | (int8, uint8, int16, uint16, int32, uint32): Define types using | |
| 1140 | unsigned8 et.al from common/sim-types.h. | |
| 1141 | * sim-main.h (State): Define as STATE_CPU. | |
| 1142 | ||
| 1143 | Mon Sep 1 12:07:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1144 | ||
| 1145 | * configure.in: Check for time, chmod. | |
| 1146 | * configure: Regenerate. | |
| 1147 | * simops.c (SYS_time, SYS_chmod): Use HAVE_TIME, HAVE_CHMOD. | |
| 72f4393d | 1148 | |
| c906108c SS |
1149 | * simops.c (../../libgloss/v850/sys/syscall.h): Include instead of |
| 1150 | sys/syscall.h. | |
| 1151 | (OP_10007E0): Check the existance each SYS_* macro independantly. | |
| 1152 | ||
| 1153 | * v850_sim.h (SIGQUIT, SIGTRAP): Only define if missing. | |
| 1154 | ||
| 1155 | Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1156 | ||
| 1157 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 1158 | * config.in: Ditto. | |
| 1159 | ||
| 1160 | Tue Aug 26 10:42:38 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1161 | ||
| 1162 | * interp.c (sim_kill): Delete. | |
| 1163 | (sim_create_inferior): Add ABFD argument. | |
| 1164 | (sim_load): Move setting of PC from here. | |
| 1165 | (sim_create_inferior): To here. | |
| 1166 | ||
| 1167 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1168 | ||
| 1169 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 1170 | * config.in: Ditto. | |
| 1171 | ||
| 1172 | Mon Aug 25 11:31:23 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1173 | ||
| 1174 | * interp.c (sim_open): Add ABFD argument. | |
| 1175 | ||
| 1176 | Fri Aug 22 10:39:28 1997 Nick Clifton <nickc@cygnus.com> | |
| 1177 | ||
| 1178 | * simops.c (bsh): Only set CY flag if either of the bottom | |
| 1179 | bytes is zero. | |
| 72f4393d | 1180 | |
| c906108c SS |
1181 | * simops.c (prepare, dispose): Lower numbered |
| 1182 | registers go to higher numbered address. | |
| 1183 | ||
| 1184 | * simops.c (unsigned divide instructions): S bit set if result has | |
| 1185 | top bit set. | |
| 72f4393d | 1186 | |
| c906108c SS |
1187 | * simops.c (pushml, pushmh, popml, popmh): Lower numbered |
| 1188 | registers go to higher numbered address. | |
| 72f4393d | 1189 | |
| c906108c SS |
1190 | Wed Aug 20 13:56:35 1997 Nick Clifton <nickc@cygnus.com> |
| 1191 | ||
| 1192 | * simops.c (OP_107E0, OP_107F0, OP_307E0, OP_307F0): Use correct | |
| 1193 | interpretation of SR bit in list18 structure. | |
| 1194 | (divn, divun): New functions to perform N step divide functions. | |
| 1195 | ||
| 1196 | Mon Aug 18 10:59:02 1997 Nick Clifton <nickc@cygnus.com> | |
| 1197 | ||
| 1198 | * simops.c (OP_300, OP_400, OP_60, OP_70): Support variant opcodes | |
| 1199 | with US bit set in the PSW. | |
| 1200 | ||
| 1201 | Wed Aug 13 19:06:55 1997 Nick Clifton <nickc@cygnus.com> | |
| 1202 | ||
| 1203 | * interp.c (sim_resume): Opcode functions return amount to be | |
| 1204 | added to PC and all opcodes take a standard format in the OP[] | |
| 1205 | array. | |
| 72f4393d | 1206 | |
| c906108c SS |
1207 | (do_format_*): Functions removed. |
| 1208 | ||
| 1209 | * v850_sim.h (SP, EP): New register mnemonics. | |
| 72f4393d | 1210 | |
| c906108c SS |
1211 | * gencode.c (write_header): Functions prototypes return an |
| 1212 | integer. | |
| 1213 | ||
| 1214 | * simops.c: Opcode functions return amount to be added to PC. | |
| 72f4393d | 1215 | |
| c906108c | 1216 | * v850_sim.h (CTPC, CTPSW, CTBP): New register mnemonics. |
| 72f4393d | 1217 | |
| c906108c | 1218 | * simops.c: Add support for v850e instructions. |
| 72f4393d | 1219 | |
| c906108c | 1220 | * simops.c: Add support for v850eq instructions. |
| 72f4393d | 1221 | |
| c906108c SS |
1222 | Tue May 20 10:24:14 1997 Andrew Cagney <cagney@b1.cygnus.com> |
| 1223 | ||
| 1224 | * interp.c (sim_open): Add callback argument. | |
| 1225 | (sim_set_callbacks): Delete SIM_DESC argument. | |
| 1226 | ||
| 1227 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> | |
| 1228 | ||
| 1229 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 1230 | ||
| 1231 | Wed Apr 23 17:20:16 1997 Doug Evans <dje@canuck.cygnus.com> | |
| 1232 | ||
| 1233 | * interp.c (prog_bfd_was_opened_p): New static local. | |
| 1234 | (prog_bfd): New global variable. | |
| 1235 | (sim_open): Undo patch to add -E support. | |
| 1236 | (sim_close): Close prog_bfd if sim_load opened it. | |
| 1237 | (sim_load): Record bfd of loaded file in prog_bfd. | |
| 1238 | * simops.c (prog_bfd): Renamed from exec_bfd. | |
| 1239 | ||
| 1240 | Fri Apr 18 14:17:12 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1241 | ||
| 1242 | * interp.c (sim_stop): Stub function. | |
| 1243 | ||
| 1244 | Thu Apr 17 03:53:18 1997 Doug Evans <dje@canuck.cygnus.com> | |
| 1245 | ||
| 1246 | * Makefile.in (SIM_OBJS): Add sim-load.o. | |
| 1247 | * interp.c (sim_kind, myname): New static locals. | |
| 1248 | (sim_open): Set sim_kind, myname. Ignore -E arg. | |
| 1249 | (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to | |
| 1250 | load file into simulator. Set start address from bfd. | |
| 1251 | (sim_create_inferior): Return SIM_RC. Delete arg start_address. | |
| 1252 | ||
| 1253 | Wed Apr 16 19:53:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1254 | ||
| 1255 | * simops.c (OP_10007E0): Only provide system calls SYS_execv, | |
| 1256 | SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host. | |
| 1257 | ||
| 1258 | Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
| 1259 | ||
| 1260 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 1261 | * config.in: Ditto. | |
| 1262 | ||
| 1263 | Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> | |
| 1264 | ||
| 1265 | * interp.c (sim_open): New arg `kind'. | |
| 1266 | ||
| 1267 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 1268 | ||
| 1269 | Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
| 1270 | ||
| 1271 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 1272 | ||
| 1273 | Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
| 1274 | ||
| 1275 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 1276 | ||
| 1277 | Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
| 1278 | ||
| 1279 | * configure: Re-generate. | |
| 1280 | ||
| 1281 | Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com> | |
| 1282 | ||
| 1283 | * configure: Regenerate to track ../common/aclocal.m4 changes. | |
| 1284 | ||
| 1285 | Thu Mar 13 13:00:54 1997 Doug Evans <dje@canuck.cygnus.com> | |
| 1286 | ||
| 1287 | * interp.c (sim_open): New SIM_DESC result. Argument is now | |
| 1288 | in argv form. | |
| 1289 | (other sim_*): New SIM_DESC argument. | |
| 1290 | ||
| 1291 | Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com> | |
| 1292 | ||
| 1293 | * Makefile.in (@COMMON_MAKEFILE_FRAG): Use | |
| 1294 | COMMON_{PRE,POST}_CONFIG_FRAG instead. | |
| 1295 | * configure.in: sinclude ../common/aclocal.m4. | |
| 1296 | * configure: Regenerated. | |
| 1297 | ||
| 1298 | Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com) | |
| 1299 | ||
| 1300 | * configure configure.in Makefile.in: Update to new configure | |
| 1301 | scheme which is more compatible with WinGDB builds. | |
| 1302 | * configure.in: Improve comment on how to run autoconf. | |
| 1303 | * configure: Re-run autoconf to get new ../common/aclocal.m4. | |
| 1304 | * Makefile.in: Use autoconf substitution to install common | |
| 1305 | makefile fragment. | |
| 1306 | ||
| 1307 | Mon Jan 20 16:05:34 1997 Michael Meissner <meissner@tiktok.cygnus.com> | |
| 1308 | ||
| 1309 | * simops.c (OP_{E0,2E0,6E0}): The multiply operations sign extend, | |
| 1310 | not zero extend. | |
| 1311 | ||
| 1312 | Tue Jan 14 17:06:03 1997 Stu Grossman (grossman@critters.cygnus.com) | |
| 1313 | ||
| 1314 | * simops.c: Put ifdefs around things to make MSVC happy. Get rid | |
| 1315 | of unistd.h. Disable SYS_stat, SYS_chown, SYS_time, SYS_times, | |
| 1316 | SYS_gettimeofday and SYS_utime from MSVC. | |
| 1317 | ||
| 1318 | Tue Dec 31 18:11:13 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
| 1319 | ||
| 1320 | * simops.c (OP_10007E0): Know that kill encodes the signal number | |
| 1321 | via: 0xdead0000 | signal and turn it back into a signal. | |
| 1322 | ||
| 1323 | Fri Dec 27 14:44:06 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
| 1324 | ||
| 1325 | * v850_sim.h (SIG_V850_EXIT): Define as -1. | |
| 1326 | ||
| 1327 | * interp.c (sim_open): Cast calloc function. | |
| 1328 | (sim_stop_reason): If signal is SIG_V850_EXIT, inform gdb the | |
| 1329 | program exited with the appropriate exit code. | |
| 1330 | (sim_set_interrupt): Declare buildargv. | |
| 1331 | ||
| 1332 | * simops.c (OP_10007E0): Make exit signal normal exit. Make time | |
| 1333 | type correct and work on big endian systems. | |
| 1334 | ||
| 1335 | Wed Nov 20 02:18:44 1996 Doug Evans <dje@canuck.cygnus.com> | |
| 1336 | ||
| 1337 | * Makefile.in: Delete stuff moved to ../common/Make-common.in. | |
| 1338 | (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define. | |
| 1339 | * configure.in: Simplify using macros in ../common/aclocal.m4. | |
| 1340 | Call AC_CHECK_HEADERS(unistd.h). | |
| 1341 | * configure: Regenerated. | |
| 1342 | * config.in: New file. | |
| 1343 | * simops.c: #include "config.h". #include <unistd.h> if present. | |
| 1344 | ||
| 1345 | Sun Nov 3 23:02:54 1996 Stan Shebs <shebs@andros.cygnus.com> | |
| 1346 | ||
| 1347 | * v850_sim.h (State): New slots dummy_mem, pending_nmi. | |
| 1348 | (EIPC, etc): New macros for system registers. | |
| 1349 | * simops.c, interp.c: Use everywhere. | |
| 1350 | ||
| 1351 | * interp.c: Add support for interrupts issued by interrupt | |
| 1352 | generators, either PC- or time-based. Controlled by simulator | |
| 1353 | command "sim interrupt". | |
| 1354 | ||
| 1355 | * interp.c: Add support for variable-size allocation of memory, | |
| 1356 | via simulator command "sim memory-map". | |
| 1357 | (map): Issue SIGSEGV for references to invalid memory regions. | |
| 72f4393d | 1358 | |
| c906108c | 1359 | Thu Oct 31 14:44:10 1996 Gavin Koch <gavin@cygnus.com> |
| 72f4393d L |
1360 | |
| 1361 | * simops.c: Include <sys/time.h> for struct timeval and | |
| 1362 | struct timezone. | |
| 1363 | ||
| c906108c SS |
1364 | Wed Oct 30 08:49:10 1996 Jeffrey A Law (law@cygnus.com) |
| 1365 | ||
| 1366 | * simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday. | |
| 1367 | ||
| 1368 | * simops.c (OP_10007E0): Handle SYS_time. | |
| 1369 | ||
| 1370 | Tue Oct 29 14:22:55 1996 Jeffrey A Law (law@cygnus.com) | |
| 1371 | ||
| 1372 | * simops.c: Include <sys/stat.h>. | |
| 1373 | (OP_10007E0): Handle SYS_stat. | |
| 1374 | ||
| 1375 | Thu Oct 24 12:26:35 1996 Jeffrey A Law (law@cygnus.com) | |
| 1376 | ||
| 1377 | * simops.c (OP_10007E0): Don't declare errno. | |
| 1378 | ||
| 1379 | * simops.c (OP_500): Mask off low bit in displacement | |
| 1380 | for sld.w. | |
| 1381 | (OP_501): Similarly. | |
| 1382 | ||
| 1383 | * simops.c (OP_500): Fix displacement handling for sld.w. | |
| 1384 | (OP_501): Similarly for sst.w. | |
| 1385 | ||
| 1386 | * simops.c (trace_input): Remove all references to SEXT7. | |
| 1387 | (OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement | |
| 1388 | is zero extended for sst/sld instructions. | |
| 1389 | * v850_sim.h (SEX7): Delete. It's no longer needed (and it | |
| 1390 | was incorrect anyway). | |
| 1391 | ||
| 1392 | Thu Oct 24 10:33:33 1996 Stu Grossman (grossman@critters.cygnus.com) | |
| 1393 | ||
| 1394 | * Makefile.in: Get rid of srcroot. Set all INSTALL macros via | |
| 1395 | autoconf. | |
| 1396 | * gencode.c (write_opcodes): Pad operands field to account for | |
| 1397 | MSVC braindamage. | |
| 1398 | * simops.c: Include errno.h. Exclude SYS_chown, since MSVC | |
| 1399 | doesn't support it. (Why is this here in the first place?!?) | |
| 1400 | * v850_sim.h: Get rid of 64 bit defs. Also, get rid of #elif's. | |
| 1401 | Change number of operands in struct simops from 9 to 6. Define | |
| 1402 | SIGTRAP and SIGQUIT for MSVC. | |
| 1403 | ||
| 1404 | Tue Oct 15 16:19:51 1996 Stu Grossman (grossman@critters.cygnus.com) | |
| 1405 | ||
| 1406 | * interp.c (MEM_SIZE): It's now bytes, not a power of 2. | |
| 1407 | * (map): Add support for external mem in the 1->2 meg range. | |
| 1408 | Also, abort() when memory access is way out of bounds. (Better to | |
| 1409 | die than to give wrong result. (This will be fixed later.)) | |
| 1410 | * (sim_size): MEM_SIZE is now bytes, not shift factor. | |
| 1411 | ||
| 1412 | Tue Oct 1 15:53:24 1996 Gavin Koch <gavin@cygnus.com> | |
| 72f4393d L |
1413 | |
| 1414 | * simops.c (trace_input): Swapped order of operands for output | |
| 1415 | output of OP_IMM_REG. Changed the fetching of the operands for | |
| 1416 | OP_LOAD32, and OP_STORE32 to work like op-function. | |
| 1417 | ||
| c906108c SS |
1418 | Mon Sep 30 15:46:33 1996 Stu Grossman (grossman@critters.cygnus.com) |
| 1419 | ||
| 1420 | * interp.c: Move includes of remote-sim.h and callback.h to | |
| 1421 | v850-sim.h. | |
| 1422 | * (lookup_hash): Add PC to report of hash failure. | |
| 1423 | * (map load_mem store_mem): New memory subsystem. Models V851 | |
| 1424 | memory system. | |
| 1425 | * (sim_write sim_read): Use new memory subsystem. | |
| 1426 | * (sim_resume): Don't load and save PC into EIPC anymore. Needed | |
| 1427 | to make user-defined traps work right. | |
| 1428 | * simops.c (OP_*): Use new memory subsystem. | |
| 1429 | * (OP_14007E0 (reti)): Implement reti. | |
| 1430 | * (OP_14996E0 (trap)): Implement user-defined traps. Move I/O to | |
| 1431 | trap 31. Use new memory subsystem. | |
| 1432 | * v850_sim.h: Prototypes for load_mem, store_mem and map. Use | |
| 1433 | load_mem in RLW macro. | |
| 1434 | ||
| 1435 | Fri Sep 27 18:34:09 1996 Stu Grossman (grossman@critters.cygnus.com) | |
| 1436 | ||
| 1437 | * gencode.c (write_opcodes): Output hex values for opcode mask | |
| 1438 | and patterns. | |
| 1439 | * interp.c (sim_resume): Save and restore PC from the appropriate | |
| 1440 | register. | |
| 1441 | * (sim_fetch_register sim_store_register): Fix byte-order problem | |
| 1442 | with reading and writing registers. | |
| 1443 | * simops.c (OP_FFFF): Implement pseudo-breakpoint insn. | |
| 1444 | ||
| 1445 | Fri Sep 27 17:42:37 1996 Jeffrey A Law (law@cygnus.com) | |
| 1446 | ||
| 72f4393d | 1447 | * simops.c (trace_input): Fix thinko. |
| c906108c SS |
1448 | |
| 1449 | Wed Sep 18 09:54:12 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
| 1450 | ||
| 1451 | * simops.c (exec_bfd): Rename from sim_bfd. | |
| 1452 | (trace_input): Ditto. | |
| 1453 | ||
| 1454 | Thu Sep 12 12:03:05 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
| 1455 | ||
| 1456 | * simops.c (trace_input): Use find_nearest_line to print line | |
| 1457 | number, function name or file name of PC. | |
| 1458 | ||
| 1459 | Wed Sep 11 16:44:37 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
| 1460 | ||
| 1461 | * simops.c: Add tracing support. Use SEXTxx macros instead of | |
| 1462 | doing hardwired shifts. | |
| 1463 | ||
| 1464 | * configure.in (--enable-sim-cflags): Add switch to add additional | |
| 1465 | flags to simulator buld. If --enable-sim-cflags=trace, turn on | |
| 1466 | tracing. | |
| 1467 | * configure: Regenerate. | |
| 1468 | ||
| 1469 | * Makefile.in: Don't require a VPATH capable make if configuring | |
| 1470 | in the same directory. Don't use CFLAGS for configuration flags. | |
| 1471 | Add flags from --enable-sim-cflags. Support canadian cross | |
| 1472 | builds. Rebuild whole simulator if include files change. | |
| 1473 | ||
| 1474 | * interp.c (v850_debug): New global for debugging. | |
| 1475 | (lookup_hash,sim_size,sim_set_profile): Use | |
| 1476 | printf_filtered callback, instead of calling printf directly. | |
| 1477 | (sim_{open,trace}): Enable tracing if -t and compiled for tracing. | |
| 1478 | ||
| 1479 | * v850_sim.h: Use limits.h to set the various sized types. | |
| 1480 | (SEXT{5,7,16,22}): New macros. | |
| 1481 | ||
| 1482 | Mon Sep 9 20:50:46 1996 Jeffrey A Law (law@cygnus.com) | |
| 1483 | ||
| 1484 | * interp.c (hash): Make this an inline function | |
| 1485 | when compiling with GCC. Simplify. | |
| 1486 | * simpos.c: Explicitly include "sys/syscall.h". Remove | |
| 1487 | some #if 0'd code. Enable more emulated syscalls. | |
| 1488 | ||
| 1489 | Wed Sep 4 01:48:55 1996 Jeffrey A Law (law@cygnus.com) | |
| 1490 | ||
| 1491 | * interp.c: Fix sign bit handling for add and sub instructions. | |
| 1492 | ||
| 1493 | Tue Sep 3 10:20:30 1996 Jeffrey A Law (law@cygnus.com) | |
| 1494 | ||
| 1495 | * gencode.c: Fix various indention & style problems. | |
| 1496 | Remove test code. Remove #if 0 code. | |
| 1497 | * interp.c: Provide prototypes for all static functions. | |
| 1498 | Fix minor indention problems. | |
| 1499 | (sim_open, sim_resume): Remove unused variables. | |
| 1500 | (sim_read): Return type is "int". | |
| 1501 | * simops.c: Remove unused variables. | |
| 1502 | (divh): Make result of divide-by-zero zero. | |
| 1503 | (setf): Initialize result to keep compiler quiet. | |
| 1504 | (sar instructions): These just clear the overflow bit. | |
| 1505 | * v850_sim.h: Provide prototypes for put_byte, put_half | |
| 1506 | and put_word. | |
| 1507 | ||
| 1508 | * interp.c: OP should be an array of 32bit operands! | |
| 1509 | (v850_callback): Declare. | |
| 1510 | (do_format_5): Fix extraction of OP[0]. | |
| 1511 | (sim_size): Remove debugging printf. | |
| 1512 | (sim_set_callbacks): Do something useful. | |
| 1513 | (sim_stop_reason): Gross hacks to get c-torture running. | |
| 1514 | * simops.c: Simplify code for computing targets of bCC | |
| 1515 | insns. Invert 's' bit if 'ov' bit is set for some | |
| 1516 | instructions. Fix 'cy' bit handling for numerous | |
| 1517 | instructions. Make the simulator stop when a halt | |
| 1518 | instruction is encountered. Very crude support for | |
| 1519 | emulated syscalls (trap 0). | |
| 1520 | * v850_sim.h: Include "callback.h" and declare | |
| 1521 | v850_callback. Items in the operand array are 32bits. | |
| 1522 | ||
| 1523 | Sun Sep 1 22:35:35 1996 Jeffrey A Law (law@cygnus.com) | |
| 1524 | ||
| 1525 | * interp.c (sim_resume): Fix code to check for a format 3 | |
| 1526 | opcode. | |
| 1527 | * simops.c: bCC insns only argument is a constant, not a | |
| 1528 | register value (duh...) | |
| 1529 | ||
| 1530 | Fri Aug 30 10:33:49 1996 Jeffrey A Law (law@cygnus.com) | |
| 1531 | ||
| 1532 | * simops.c: Fix "not1" and "set1". | |
| 1533 | ||
| 1534 | * simops.c: Don't forget to initialize temp for | |
| 1535 | "ld.h" and "ld.w" | |
| 1536 | ||
| 1537 | * interp.c: Remove various debugging printfs. | |
| 1538 | ||
| 1539 | * simops.c: Fix satadd, satsub boundary case handling. | |
| 1540 | ||
| 1541 | * interp.c (hash): Fix. | |
| 1542 | * interp.c (do_format_8): Get operands correctly and | |
| 1543 | call the target function. | |
| 1544 | * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1". | |
| 1545 | ||
| 1546 | Thu Aug 29 13:53:29 1996 Jeffrey A Law (law@cygnus.com) | |
| 1547 | ||
| 1548 | * interp.c (do_format_4): Get operands correctly and | |
| 1549 | call the target function. | |
| 1550 | * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b", | |
| 1551 | "sst.h", and "sst.w". | |
| 1552 | ||
| 1553 | * v850_sim.h: The V850 doesn't have split I&D spaces. Change | |
| 1554 | accordingly. Remove many unused definitions. | |
| 1555 | * interp.c: The V850 doesn't have split I&D spaces. Change | |
| 1556 | accordingly. | |
| 1557 | (get_longlong, get_longword, get_word): Deleted. | |
| 1558 | (write_longlong, write_longword, write_word): Deleted. | |
| 1559 | (get_operands): Deleted. | |
| 1560 | (get_byte, get_half, get_word): New functions. | |
| 1561 | (put_byte, put_half, put_word): New functions. | |
| 1562 | * simops.c: Remove unused functions. Rough cut at | |
| 1563 | "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns. | |
| 1564 | ||
| 1565 | * v850_sim.h (struct _state): Remove "psw" field. Add | |
| 1566 | "sregs" field. | |
| 1567 | (PSW): Remove bogus definition. | |
| 1568 | * simops.c: Change condition code handling to use the psw | |
| 1569 | register within the sregs array. Handle "ldsr" and "stsr". | |
| 1570 | ||
| 1571 | * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr". | |
| 1572 | ||
| 1573 | * interp.c (do_format_5): Get operands correctly and | |
| 1574 | call the target function. | |
| 1575 | (sim_resume): Don't do a PC update for format 5 instructions. | |
| 1576 | * simops.c: Handle "jarl" and "jmp" instructions. | |
| 1577 | ||
| 1578 | * simops.c: Fix minor typos. Handle "cmp", "setf", "tst" | |
| 1579 | "di", and "ei" instructions correctly. | |
| 1580 | ||
| 1581 | * interp.c (do_format_3): Get operands correctly and call | |
| 1582 | the target function. | |
| 1583 | * simops.c: Handle bCC instructions. | |
| 1584 | ||
| 1585 | * simops.c: Add condition code handling to shift insns. | |
| 1586 | Fix minor typos in condition code handling for other insns. | |
| 1587 | ||
| 1588 | * Makefile.in: Fix typo. | |
| 1589 | * simops.c: Add condition code handling to "sub" "subr" and | |
| 1590 | "divh" instructions. | |
| 1591 | ||
| 1592 | * interp.c (hash): Update to be more accurate. | |
| 1593 | (lookup_hash): Call hash rather than computing the hash | |
| 1594 | code here. | |
| 1595 | (do_format_1_2): Handle format 1 and format 2 instructions. | |
| 1596 | Get operands correctly and call the target function. | |
| 1597 | (do_format_6): Get operands correctly and call the target | |
| 1598 | function. | |
| 1599 | (do_formats_9_10): Rough cut so shift ops will work. | |
| 1600 | (sim_resume): Tweak to deal with format 1 and format 2 | |
| 1601 | handling in a single funtion. Don't update the PC | |
| 1602 | for format 3 insns. Fix typos. | |
| 1603 | * simops.c: Slightly reorganize. Add condition code handling | |
| 1604 | to "add", "addi", "and", "andi", "or", "ori", "xor", "xori" | |
| 1605 | and "not" instructions. | |
| 1606 | * v850_sim.h (reg_t): Registers are 32bits. | |
| 1607 | (_state): The V850 has 32 general registers. Add a 32bit | |
| 1608 | psw and pc register too. Add accessor macros | |
| 1609 | ||
| 1610 | * Makefile.in, interp.c, v850_sim.h: Bring over endianness | |
| 1611 | changes from the d10v simulator. | |
| 1612 | ||
| 1613 | * simops.c: Add shift support. | |
| 1614 | ||
| 1615 | * simops.c: Add multiply & divide support. Abort for system | |
| 1616 | instructions. | |
| 1617 | ||
| 1618 | * simops.c: Add logicals, mov, movhi, movea, add, addi, sub | |
| 1619 | and subr. No condition codes yet. | |
| 1620 | ||
| 1621 | Wed Aug 28 13:53:22 1996 Jeffrey A Law (law@cygnus.com) | |
| 1622 | ||
| 72f4393d | 1623 | * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h, |
| c906108c SS |
1624 | gencode.c, interp.c, simops.c: Created. |
| 1625 |