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Commit | Line | Data |
---|---|---|
2cb7cef9 BS |
1 | From 82ef04fb4c82542b3eda81cca461f0594ce9cd0b Mon Sep 17 00:00:00 2001 |
2 | From: Tejun Heo <tj@kernel.org> | |
3 | Date: Thu, 31 Jul 2008 17:02:40 +0900 | |
4 | Subject: [PATCH] libata: make SCR access ops per-link | |
5 | References: bnc#441420 | |
6 | ||
7 | Logically, SCR access ops should take @link; however, there was no | |
8 | compelling reason to convert all SCR access ops when adding @link | |
9 | abstraction as there's one-to-one mapping between a port and a non-PMP | |
10 | link. However, that assumption won't hold anymore with the scheduled | |
11 | addition of slave link. | |
12 | ||
13 | Make SCR access ops per-link. | |
14 | ||
15 | Signed-off-by: Tejun Heo <tj@kernel.org> | |
16 | Signed-off-by: Jeff Garzik <jgarzik@redhat.com> | |
17 | Signed-off-by: Tejun Heo <teheo@suse.de> | |
18 | --- | |
19 | drivers/ata/ahci.c | 24 ++++++++++++------------ | |
20 | drivers/ata/ata_piix.c | 15 +++++++++++---- | |
21 | drivers/ata/libata-core.c | 13 ++++--------- | |
22 | drivers/ata/sata_fsl.c | 26 +++++++++++++------------- | |
23 | drivers/ata/sata_inic162x.c | 8 ++++---- | |
24 | drivers/ata/sata_mv.c | 28 ++++++++++++++-------------- | |
25 | drivers/ata/sata_nv.c | 16 ++++++++-------- | |
26 | drivers/ata/sata_promise.c | 16 +++++++++------- | |
27 | drivers/ata/sata_qstor.c | 12 ++++++------ | |
28 | drivers/ata/sata_sil.c | 16 ++++++++-------- | |
29 | drivers/ata/sata_sil24.c | 12 ++++++------ | |
30 | drivers/ata/sata_sis.c | 28 ++++++++++++++++------------ | |
31 | drivers/ata/sata_svw.c | 10 ++++++---- | |
32 | drivers/ata/sata_uli.c | 24 ++++++++++++------------ | |
33 | drivers/ata/sata_via.c | 24 ++++++++++++------------ | |
34 | drivers/ata/sata_vsc.c | 10 ++++++---- | |
35 | drivers/scsi/libsas/sas_ata.c | 8 ++++---- | |
36 | include/linux/libata.h | 4 ++-- | |
37 | 18 files changed, 153 insertions(+), 141 deletions(-) | |
38 | ||
39 | --- a/drivers/ata/ahci.c | |
40 | +++ b/drivers/ata/ahci.c | |
41 | @@ -267,8 +267,8 @@ struct ahci_port_priv { | |
42 | * per PM slot */ | |
43 | }; | |
44 | ||
45 | -static int ahci_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | |
46 | -static int ahci_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | |
47 | +static int ahci_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); | |
48 | +static int ahci_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); | |
49 | static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | |
50 | static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc); | |
51 | static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc); | |
52 | @@ -820,10 +820,10 @@ static unsigned ahci_scr_offset(struct a | |
53 | return 0; | |
54 | } | |
55 | ||
56 | -static int ahci_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | |
57 | +static int ahci_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val) | |
58 | { | |
59 | - void __iomem *port_mmio = ahci_port_base(ap); | |
60 | - int offset = ahci_scr_offset(ap, sc_reg); | |
61 | + void __iomem *port_mmio = ahci_port_base(link->ap); | |
62 | + int offset = ahci_scr_offset(link->ap, sc_reg); | |
63 | ||
64 | if (offset) { | |
65 | *val = readl(port_mmio + offset); | |
66 | @@ -832,10 +832,10 @@ static int ahci_scr_read(struct ata_port | |
67 | return -EINVAL; | |
68 | } | |
69 | ||
70 | -static int ahci_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | |
71 | +static int ahci_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) | |
72 | { | |
73 | - void __iomem *port_mmio = ahci_port_base(ap); | |
74 | - int offset = ahci_scr_offset(ap, sc_reg); | |
75 | + void __iomem *port_mmio = ahci_port_base(link->ap); | |
76 | + int offset = ahci_scr_offset(link->ap, sc_reg); | |
77 | ||
78 | if (offset) { | |
79 | writel(val, port_mmio + offset); | |
80 | @@ -973,7 +973,7 @@ static void ahci_disable_alpm(struct ata | |
81 | writel(PORT_IRQ_PHYRDY, port_mmio + PORT_IRQ_STAT); | |
82 | ||
83 | /* go ahead and clean out PhyRdy Change from Serror too */ | |
84 | - ahci_scr_write(ap, SCR_ERROR, ((1 << 16) | (1 << 18))); | |
85 | + ahci_scr_write(&ap->link, SCR_ERROR, ((1 << 16) | (1 << 18))); | |
86 | ||
87 | /* | |
88 | * Clear flag to indicate that we should ignore all PhyRdy | |
89 | @@ -1937,8 +1937,8 @@ static void ahci_error_intr(struct ata_p | |
90 | ata_ehi_push_desc(host_ehi, "irq_stat 0x%08x", irq_stat); | |
91 | ||
92 | /* AHCI needs SError cleared; otherwise, it might lock up */ | |
93 | - ahci_scr_read(ap, SCR_ERROR, &serror); | |
94 | - ahci_scr_write(ap, SCR_ERROR, serror); | |
95 | + ahci_scr_read(&ap->link, SCR_ERROR, &serror); | |
96 | + ahci_scr_write(&ap->link, SCR_ERROR, serror); | |
97 | host_ehi->serror |= serror; | |
98 | ||
99 | /* some controllers set IRQ_IF_ERR on device errors, ignore it */ | |
100 | @@ -2027,7 +2027,7 @@ static void ahci_port_intr(struct ata_po | |
101 | if ((hpriv->flags & AHCI_HFLAG_NO_HOTPLUG) && | |
102 | (status & PORT_IRQ_PHYRDY)) { | |
103 | status &= ~PORT_IRQ_PHYRDY; | |
104 | - ahci_scr_write(ap, SCR_ERROR, ((1 << 16) | (1 << 18))); | |
105 | + ahci_scr_write(&ap->link, SCR_ERROR, ((1 << 16) | (1 << 18))); | |
106 | } | |
107 | ||
108 | if (unlikely(status & PORT_IRQ_ERROR)) { | |
109 | --- a/drivers/ata/ata_piix.c | |
110 | +++ b/drivers/ata/ata_piix.c | |
111 | @@ -165,8 +165,10 @@ static void piix_set_dmamode(struct ata_ | |
112 | static void ich_set_dmamode(struct ata_port *ap, struct ata_device *adev); | |
113 | static int ich_pata_cable_detect(struct ata_port *ap); | |
114 | static u8 piix_vmw_bmdma_status(struct ata_port *ap); | |
115 | -static int piix_sidpr_scr_read(struct ata_port *ap, unsigned int reg, u32 *val); | |
116 | -static int piix_sidpr_scr_write(struct ata_port *ap, unsigned int reg, u32 val); | |
117 | +static int piix_sidpr_scr_read(struct ata_link *link, | |
118 | + unsigned int reg, u32 *val); | |
119 | +static int piix_sidpr_scr_write(struct ata_link *link, | |
120 | + unsigned int reg, u32 val); | |
121 | #ifdef CONFIG_PM | |
122 | static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg); | |
123 | static int piix_pci_device_resume(struct pci_dev *pdev); | |
124 | @@ -971,8 +973,10 @@ static u32 piix_merge_scr(u32 val0, u32 | |
125 | return val; | |
126 | } | |
127 | ||
128 | -static int piix_sidpr_scr_read(struct ata_port *ap, unsigned int reg, u32 *val) | |
129 | +static int piix_sidpr_scr_read(struct ata_link *link, | |
130 | + unsigned int reg, u32 *val) | |
131 | { | |
132 | + struct ata_port *ap = link->ap; | |
133 | const int * const sstatus_merge_tbl[] = { | |
134 | /* DET */ (const int []){ 1, 3, 0, 4, 3, -1 }, | |
135 | /* SPD */ (const int []){ 2, 1, 0, -1 }, | |
136 | @@ -1013,8 +1017,11 @@ static int piix_sidpr_scr_read(struct at | |
137 | return 0; | |
138 | } | |
139 | ||
140 | -static int piix_sidpr_scr_write(struct ata_port *ap, unsigned int reg, u32 val) | |
141 | +static int piix_sidpr_scr_write(struct ata_link *link, | |
142 | + unsigned int reg, u32 val) | |
143 | { | |
144 | + struct ata_port *ap = link->ap; | |
145 | + | |
146 | if (reg >= ARRAY_SIZE(piix_sidx_map)) | |
147 | return -EINVAL; | |
148 | ||
149 | --- a/drivers/ata/libata-core.c | |
150 | +++ b/drivers/ata/libata-core.c | |
151 | @@ -4944,10 +4944,8 @@ int sata_scr_valid(struct ata_link *link | |
152 | int sata_scr_read(struct ata_link *link, int reg, u32 *val) | |
153 | { | |
154 | if (ata_is_host_link(link)) { | |
155 | - struct ata_port *ap = link->ap; | |
156 | - | |
157 | if (sata_scr_valid(link)) | |
158 | - return ap->ops->scr_read(ap, reg, val); | |
159 | + return link->ap->ops->scr_read(link, reg, val); | |
160 | return -EOPNOTSUPP; | |
161 | } | |
162 | ||
163 | @@ -4973,10 +4971,8 @@ int sata_scr_read(struct ata_link *link, | |
164 | int sata_scr_write(struct ata_link *link, int reg, u32 val) | |
165 | { | |
166 | if (ata_is_host_link(link)) { | |
167 | - struct ata_port *ap = link->ap; | |
168 | - | |
169 | if (sata_scr_valid(link)) | |
170 | - return ap->ops->scr_write(ap, reg, val); | |
171 | + return link->ap->ops->scr_write(link, reg, val); | |
172 | return -EOPNOTSUPP; | |
173 | } | |
174 | ||
175 | @@ -5001,13 +4997,12 @@ int sata_scr_write(struct ata_link *link | |
176 | int sata_scr_write_flush(struct ata_link *link, int reg, u32 val) | |
177 | { | |
178 | if (ata_is_host_link(link)) { | |
179 | - struct ata_port *ap = link->ap; | |
180 | int rc; | |
181 | ||
182 | if (sata_scr_valid(link)) { | |
183 | - rc = ap->ops->scr_write(ap, reg, val); | |
184 | + rc = link->ap->ops->scr_write(link, reg, val); | |
185 | if (rc == 0) | |
186 | - rc = ap->ops->scr_read(ap, reg, &val); | |
187 | + rc = link->ap->ops->scr_read(link, reg, &val); | |
188 | return rc; | |
189 | } | |
190 | return -EOPNOTSUPP; | |
191 | --- a/drivers/ata/sata_fsl.c | |
192 | +++ b/drivers/ata/sata_fsl.c | |
193 | @@ -469,10 +469,10 @@ static bool sata_fsl_qc_fill_rtf(struct | |
194 | return true; | |
195 | } | |
196 | ||
197 | -static int sata_fsl_scr_write(struct ata_port *ap, unsigned int sc_reg_in, | |
198 | - u32 val) | |
199 | +static int sata_fsl_scr_write(struct ata_link *link, | |
200 | + unsigned int sc_reg_in, u32 val) | |
201 | { | |
202 | - struct sata_fsl_host_priv *host_priv = ap->host->private_data; | |
203 | + struct sata_fsl_host_priv *host_priv = link->ap->host->private_data; | |
204 | void __iomem *ssr_base = host_priv->ssr_base; | |
205 | unsigned int sc_reg; | |
206 | ||
207 | @@ -493,10 +493,10 @@ static int sata_fsl_scr_write(struct ata | |
208 | return 0; | |
209 | } | |
210 | ||
211 | -static int sata_fsl_scr_read(struct ata_port *ap, unsigned int sc_reg_in, | |
212 | - u32 *val) | |
213 | +static int sata_fsl_scr_read(struct ata_link *link, | |
214 | + unsigned int sc_reg_in, u32 *val) | |
215 | { | |
216 | - struct sata_fsl_host_priv *host_priv = ap->host->private_data; | |
217 | + struct sata_fsl_host_priv *host_priv = link->ap->host->private_data; | |
218 | void __iomem *ssr_base = host_priv->ssr_base; | |
219 | unsigned int sc_reg; | |
220 | ||
221 | @@ -645,12 +645,12 @@ static int sata_fsl_port_start(struct at | |
222 | * Workaround for 8315DS board 3gbps link-up issue, | |
223 | * currently limit SATA port to GEN1 speed | |
224 | */ | |
225 | - sata_fsl_scr_read(ap, SCR_CONTROL, &temp); | |
226 | + sata_fsl_scr_read(&ap->link, SCR_CONTROL, &temp); | |
227 | temp &= ~(0xF << 4); | |
228 | temp |= (0x1 << 4); | |
229 | - sata_fsl_scr_write(ap, SCR_CONTROL, temp); | |
230 | + sata_fsl_scr_write(&ap->link, SCR_CONTROL, temp); | |
231 | ||
232 | - sata_fsl_scr_read(ap, SCR_CONTROL, &temp); | |
233 | + sata_fsl_scr_read(&ap->link, SCR_CONTROL, &temp); | |
234 | dev_printk(KERN_WARNING, dev, "scr_control, speed limited to %x\n", | |
235 | temp); | |
236 | #endif | |
237 | @@ -868,7 +868,7 @@ issue_srst: | |
238 | ioread32(CQ + hcr_base), | |
239 | ioread32(CA + hcr_base), ioread32(CC + hcr_base)); | |
240 | ||
241 | - sata_fsl_scr_read(ap, SCR_ERROR, &Serror); | |
242 | + sata_fsl_scr_read(&ap->link, SCR_ERROR, &Serror); | |
243 | ||
244 | DPRINTK("HStatus = 0x%x\n", ioread32(hcr_base + HSTATUS)); | |
245 | DPRINTK("HControl = 0x%x\n", ioread32(hcr_base + HCONTROL)); | |
246 | @@ -972,9 +972,9 @@ static void sata_fsl_error_intr(struct a | |
247 | * Handle & Clear SError | |
248 | */ | |
249 | ||
250 | - sata_fsl_scr_read(ap, SCR_ERROR, &SError); | |
251 | + sata_fsl_scr_read(&ap->link, SCR_ERROR, &SError); | |
252 | if (unlikely(SError & 0xFFFF0000)) { | |
253 | - sata_fsl_scr_write(ap, SCR_ERROR, SError); | |
254 | + sata_fsl_scr_write(&ap->link, SCR_ERROR, SError); | |
255 | } | |
256 | ||
257 | DPRINTK("error_intr,hStat=0x%x,CE=0x%x,DE =0x%x,SErr=0x%x\n", | |
258 | @@ -1091,7 +1091,7 @@ static void sata_fsl_host_intr(struct at | |
259 | ||
260 | hstatus = ioread32(hcr_base + HSTATUS); | |
261 | ||
262 | - sata_fsl_scr_read(ap, SCR_ERROR, &SError); | |
263 | + sata_fsl_scr_read(&ap->link, SCR_ERROR, &SError); | |
264 | ||
265 | if (unlikely(SError & 0xFFFF0000)) { | |
266 | DPRINTK("serror @host_intr : 0x%x\n", SError); | |
267 | --- a/drivers/ata/sata_inic162x.c | |
268 | +++ b/drivers/ata/sata_inic162x.c | |
269 | @@ -269,9 +269,9 @@ static void inic_reset_port(void __iomem | |
270 | writeb(0xff, port_base + PORT_IRQ_STAT); | |
271 | } | |
272 | ||
273 | -static int inic_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val) | |
274 | +static int inic_scr_read(struct ata_link *link, unsigned sc_reg, u32 *val) | |
275 | { | |
276 | - void __iomem *scr_addr = inic_port_base(ap) + PORT_SCR; | |
277 | + void __iomem *scr_addr = inic_port_base(link->ap) + PORT_SCR; | |
278 | void __iomem *addr; | |
279 | ||
280 | if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) | |
281 | @@ -286,9 +286,9 @@ static int inic_scr_read(struct ata_port | |
282 | return 0; | |
283 | } | |
284 | ||
285 | -static int inic_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) | |
286 | +static int inic_scr_write(struct ata_link *link, unsigned sc_reg, u32 val) | |
287 | { | |
288 | - void __iomem *scr_addr = inic_port_base(ap) + PORT_SCR; | |
289 | + void __iomem *scr_addr = inic_port_base(link->ap) + PORT_SCR; | |
290 | ||
291 | if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) | |
292 | return -EINVAL; | |
293 | --- a/drivers/ata/sata_mv.c | |
294 | +++ b/drivers/ata/sata_mv.c | |
295 | @@ -493,10 +493,10 @@ struct mv_hw_ops { | |
296 | void (*reset_bus)(struct ata_host *host, void __iomem *mmio); | |
297 | }; | |
298 | ||
299 | -static int mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val); | |
300 | -static int mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val); | |
301 | -static int mv5_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val); | |
302 | -static int mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val); | |
303 | +static int mv_scr_read(struct ata_link *link, unsigned int sc_reg_in, u32 *val); | |
304 | +static int mv_scr_write(struct ata_link *link, unsigned int sc_reg_in, u32 val); | |
305 | +static int mv5_scr_read(struct ata_link *link, unsigned int sc_reg_in, u32 *val); | |
306 | +static int mv5_scr_write(struct ata_link *link, unsigned int sc_reg_in, u32 val); | |
307 | static int mv_port_start(struct ata_port *ap); | |
308 | static void mv_port_stop(struct ata_port *ap); | |
309 | static int mv_qc_defer(struct ata_queued_cmd *qc); | |
310 | @@ -1070,23 +1070,23 @@ static unsigned int mv_scr_offset(unsign | |
311 | return ofs; | |
312 | } | |
313 | ||
314 | -static int mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val) | |
315 | +static int mv_scr_read(struct ata_link *link, unsigned int sc_reg_in, u32 *val) | |
316 | { | |
317 | unsigned int ofs = mv_scr_offset(sc_reg_in); | |
318 | ||
319 | if (ofs != 0xffffffffU) { | |
320 | - *val = readl(mv_ap_base(ap) + ofs); | |
321 | + *val = readl(mv_ap_base(link->ap) + ofs); | |
322 | return 0; | |
323 | } else | |
324 | return -EINVAL; | |
325 | } | |
326 | ||
327 | -static int mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val) | |
328 | +static int mv_scr_write(struct ata_link *link, unsigned int sc_reg_in, u32 val) | |
329 | { | |
330 | unsigned int ofs = mv_scr_offset(sc_reg_in); | |
331 | ||
332 | if (ofs != 0xffffffffU) { | |
333 | - writelfl(val, mv_ap_base(ap) + ofs); | |
334 | + writelfl(val, mv_ap_base(link->ap) + ofs); | |
335 | return 0; | |
336 | } else | |
337 | return -EINVAL; | |
338 | @@ -2251,11 +2251,11 @@ static unsigned int mv5_scr_offset(unsig | |
339 | return ofs; | |
340 | } | |
341 | ||
342 | -static int mv5_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val) | |
343 | +static int mv5_scr_read(struct ata_link *link, unsigned int sc_reg_in, u32 *val) | |
344 | { | |
345 | - struct mv_host_priv *hpriv = ap->host->private_data; | |
346 | + struct mv_host_priv *hpriv = link->ap->host->private_data; | |
347 | void __iomem *mmio = hpriv->base; | |
348 | - void __iomem *addr = mv5_phy_base(mmio, ap->port_no); | |
349 | + void __iomem *addr = mv5_phy_base(mmio, link->ap->port_no); | |
350 | unsigned int ofs = mv5_scr_offset(sc_reg_in); | |
351 | ||
352 | if (ofs != 0xffffffffU) { | |
353 | @@ -2265,11 +2265,11 @@ static int mv5_scr_read(struct ata_port | |
354 | return -EINVAL; | |
355 | } | |
356 | ||
357 | -static int mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val) | |
358 | +static int mv5_scr_write(struct ata_link *link, unsigned int sc_reg_in, u32 val) | |
359 | { | |
360 | - struct mv_host_priv *hpriv = ap->host->private_data; | |
361 | + struct mv_host_priv *hpriv = link->ap->host->private_data; | |
362 | void __iomem *mmio = hpriv->base; | |
363 | - void __iomem *addr = mv5_phy_base(mmio, ap->port_no); | |
364 | + void __iomem *addr = mv5_phy_base(mmio, link->ap->port_no); | |
365 | unsigned int ofs = mv5_scr_offset(sc_reg_in); | |
366 | ||
367 | if (ofs != 0xffffffffU) { | |
368 | --- a/drivers/ata/sata_nv.c | |
369 | +++ b/drivers/ata/sata_nv.c | |
370 | @@ -302,8 +302,8 @@ static void nv_ck804_host_stop(struct at | |
371 | static irqreturn_t nv_generic_interrupt(int irq, void *dev_instance); | |
372 | static irqreturn_t nv_nf2_interrupt(int irq, void *dev_instance); | |
373 | static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance); | |
374 | -static int nv_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | |
375 | -static int nv_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | |
376 | +static int nv_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); | |
377 | +static int nv_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); | |
378 | ||
379 | static int nv_noclassify_hardreset(struct ata_link *link, unsigned int *class, | |
380 | unsigned long deadline); | |
381 | @@ -1540,21 +1540,21 @@ static irqreturn_t nv_ck804_interrupt(in | |
382 | return ret; | |
383 | } | |
384 | ||
385 | -static int nv_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | |
386 | +static int nv_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val) | |
387 | { | |
388 | if (sc_reg > SCR_CONTROL) | |
389 | return -EINVAL; | |
390 | ||
391 | - *val = ioread32(ap->ioaddr.scr_addr + (sc_reg * 4)); | |
392 | + *val = ioread32(link->ap->ioaddr.scr_addr + (sc_reg * 4)); | |
393 | return 0; | |
394 | } | |
395 | ||
396 | -static int nv_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | |
397 | +static int nv_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) | |
398 | { | |
399 | if (sc_reg > SCR_CONTROL) | |
400 | return -EINVAL; | |
401 | ||
402 | - iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4)); | |
403 | + iowrite32(val, link->ap->ioaddr.scr_addr + (sc_reg * 4)); | |
404 | return 0; | |
405 | } | |
406 | ||
407 | @@ -2243,9 +2243,9 @@ static void nv_swncq_host_interrupt(stru | |
408 | if (!pp->qc_active) | |
409 | return; | |
410 | ||
411 | - if (ap->ops->scr_read(ap, SCR_ERROR, &serror)) | |
412 | + if (ap->ops->scr_read(&ap->link, SCR_ERROR, &serror)) | |
413 | return; | |
414 | - ap->ops->scr_write(ap, SCR_ERROR, serror); | |
415 | + ap->ops->scr_write(&ap->link, SCR_ERROR, serror); | |
416 | ||
417 | if (ata_stat & ATA_ERR) { | |
418 | ata_ehi_clear_desc(ehi); | |
419 | --- a/drivers/ata/sata_promise.c | |
420 | +++ b/drivers/ata/sata_promise.c | |
421 | @@ -137,8 +137,8 @@ struct pdc_port_priv { | |
422 | dma_addr_t pkt_dma; | |
423 | }; | |
424 | ||
425 | -static int pdc_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | |
426 | -static int pdc_sata_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | |
427 | +static int pdc_sata_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); | |
428 | +static int pdc_sata_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); | |
429 | static int pdc_ata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | |
430 | static int pdc_common_port_start(struct ata_port *ap); | |
431 | static int pdc_sata_port_start(struct ata_port *ap); | |
432 | @@ -392,19 +392,21 @@ static int pdc_sata_cable_detect(struct | |
433 | return ATA_CBL_SATA; | |
434 | } | |
435 | ||
436 | -static int pdc_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | |
437 | +static int pdc_sata_scr_read(struct ata_link *link, | |
438 | + unsigned int sc_reg, u32 *val) | |
439 | { | |
440 | if (sc_reg > SCR_CONTROL) | |
441 | return -EINVAL; | |
442 | - *val = readl(ap->ioaddr.scr_addr + (sc_reg * 4)); | |
443 | + *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4)); | |
444 | return 0; | |
445 | } | |
446 | ||
447 | -static int pdc_sata_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | |
448 | +static int pdc_sata_scr_write(struct ata_link *link, | |
449 | + unsigned int sc_reg, u32 val) | |
450 | { | |
451 | if (sc_reg > SCR_CONTROL) | |
452 | return -EINVAL; | |
453 | - writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); | |
454 | + writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4)); | |
455 | return 0; | |
456 | } | |
457 | ||
458 | @@ -751,7 +753,7 @@ static void pdc_error_intr(struct ata_po | |
459 | if (sata_scr_valid(&ap->link)) { | |
460 | u32 serror; | |
461 | ||
462 | - pdc_sata_scr_read(ap, SCR_ERROR, &serror); | |
463 | + pdc_sata_scr_read(&ap->link, SCR_ERROR, &serror); | |
464 | ehi->serror |= serror; | |
465 | } | |
466 | ||
467 | --- a/drivers/ata/sata_qstor.c | |
468 | +++ b/drivers/ata/sata_qstor.c | |
469 | @@ -111,8 +111,8 @@ struct qs_port_priv { | |
470 | qs_state_t state; | |
471 | }; | |
472 | ||
473 | -static int qs_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | |
474 | -static int qs_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | |
475 | +static int qs_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); | |
476 | +static int qs_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); | |
477 | static int qs_ata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | |
478 | static int qs_port_start(struct ata_port *ap); | |
479 | static void qs_host_stop(struct ata_host *host); | |
480 | @@ -242,11 +242,11 @@ static int qs_prereset(struct ata_link * | |
481 | return ata_sff_prereset(link, deadline); | |
482 | } | |
483 | ||
484 | -static int qs_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | |
485 | +static int qs_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val) | |
486 | { | |
487 | if (sc_reg > SCR_CONTROL) | |
488 | return -EINVAL; | |
489 | - *val = readl(ap->ioaddr.scr_addr + (sc_reg * 8)); | |
490 | + *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 8)); | |
491 | return 0; | |
492 | } | |
493 | ||
494 | @@ -256,11 +256,11 @@ static void qs_error_handler(struct ata_ | |
495 | ata_std_error_handler(ap); | |
496 | } | |
497 | ||
498 | -static int qs_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | |
499 | +static int qs_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) | |
500 | { | |
501 | if (sc_reg > SCR_CONTROL) | |
502 | return -EINVAL; | |
503 | - writel(val, ap->ioaddr.scr_addr + (sc_reg * 8)); | |
504 | + writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 8)); | |
505 | return 0; | |
506 | } | |
507 | ||
508 | --- a/drivers/ata/sata_sil24.c | |
509 | +++ b/drivers/ata/sata_sil24.c | |
510 | @@ -340,8 +340,8 @@ struct sil24_port_priv { | |
511 | }; | |
512 | ||
513 | static void sil24_dev_config(struct ata_device *dev); | |
514 | -static int sil24_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val); | |
515 | -static int sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val); | |
516 | +static int sil24_scr_read(struct ata_link *link, unsigned sc_reg, u32 *val); | |
517 | +static int sil24_scr_write(struct ata_link *link, unsigned sc_reg, u32 val); | |
518 | static int sil24_qc_defer(struct ata_queued_cmd *qc); | |
519 | static void sil24_qc_prep(struct ata_queued_cmd *qc); | |
520 | static unsigned int sil24_qc_issue(struct ata_queued_cmd *qc); | |
521 | @@ -504,9 +504,9 @@ static int sil24_scr_map[] = { | |
522 | [SCR_ACTIVE] = 3, | |
523 | }; | |
524 | ||
525 | -static int sil24_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val) | |
526 | +static int sil24_scr_read(struct ata_link *link, unsigned sc_reg, u32 *val) | |
527 | { | |
528 | - void __iomem *scr_addr = sil24_port_base(ap) + PORT_SCONTROL; | |
529 | + void __iomem *scr_addr = sil24_port_base(link->ap) + PORT_SCONTROL; | |
530 | ||
531 | if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { | |
532 | void __iomem *addr; | |
533 | @@ -517,9 +517,9 @@ static int sil24_scr_read(struct ata_por | |
534 | return -EINVAL; | |
535 | } | |
536 | ||
537 | -static int sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) | |
538 | +static int sil24_scr_write(struct ata_link *link, unsigned sc_reg, u32 val) | |
539 | { | |
540 | - void __iomem *scr_addr = sil24_port_base(ap) + PORT_SCONTROL; | |
541 | + void __iomem *scr_addr = sil24_port_base(link->ap) + PORT_SCONTROL; | |
542 | ||
543 | if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { | |
544 | void __iomem *addr; | |
545 | --- a/drivers/ata/sata_sil.c | |
546 | +++ b/drivers/ata/sata_sil.c | |
547 | @@ -115,8 +115,8 @@ static int sil_init_one(struct pci_dev * | |
548 | static int sil_pci_device_resume(struct pci_dev *pdev); | |
549 | #endif | |
550 | static void sil_dev_config(struct ata_device *dev); | |
551 | -static int sil_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | |
552 | -static int sil_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | |
553 | +static int sil_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); | |
554 | +static int sil_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); | |
555 | static int sil_set_mode(struct ata_link *link, struct ata_device **r_failed); | |
556 | static void sil_freeze(struct ata_port *ap); | |
557 | static void sil_thaw(struct ata_port *ap); | |
558 | @@ -317,9 +317,9 @@ static inline void __iomem *sil_scr_addr | |
559 | return NULL; | |
560 | } | |
561 | ||
562 | -static int sil_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | |
563 | +static int sil_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val) | |
564 | { | |
565 | - void __iomem *mmio = sil_scr_addr(ap, sc_reg); | |
566 | + void __iomem *mmio = sil_scr_addr(link->ap, sc_reg); | |
567 | ||
568 | if (mmio) { | |
569 | *val = readl(mmio); | |
570 | @@ -328,9 +328,9 @@ static int sil_scr_read(struct ata_port | |
571 | return -EINVAL; | |
572 | } | |
573 | ||
574 | -static int sil_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | |
575 | +static int sil_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) | |
576 | { | |
577 | - void __iomem *mmio = sil_scr_addr(ap, sc_reg); | |
578 | + void __iomem *mmio = sil_scr_addr(link->ap, sc_reg); | |
579 | ||
580 | if (mmio) { | |
581 | writel(val, mmio); | |
582 | @@ -352,8 +352,8 @@ static void sil_host_intr(struct ata_por | |
583 | * controllers continue to assert IRQ as long as | |
584 | * SError bits are pending. Clear SError immediately. | |
585 | */ | |
586 | - sil_scr_read(ap, SCR_ERROR, &serror); | |
587 | - sil_scr_write(ap, SCR_ERROR, serror); | |
588 | + sil_scr_read(&ap->link, SCR_ERROR, &serror); | |
589 | + sil_scr_write(&ap->link, SCR_ERROR, serror); | |
590 | ||
591 | /* Sometimes spurious interrupts occur, double check | |
592 | * it's PHYRDY CHG. | |
593 | --- a/drivers/ata/sata_sis.c | |
594 | +++ b/drivers/ata/sata_sis.c | |
595 | @@ -64,8 +64,8 @@ enum { | |
596 | }; | |
597 | ||
598 | static int sis_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | |
599 | -static int sis_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | |
600 | -static int sis_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | |
601 | +static int sis_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); | |
602 | +static int sis_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); | |
603 | ||
604 | static const struct pci_device_id sis_pci_tbl[] = { | |
605 | { PCI_VDEVICE(SI, 0x0180), sis_180 }, /* SiS 964/180 */ | |
606 | @@ -134,10 +134,11 @@ static unsigned int get_scr_cfg_addr(str | |
607 | return addr; | |
608 | } | |
609 | ||
610 | -static u32 sis_scr_cfg_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | |
611 | +static u32 sis_scr_cfg_read(struct ata_link *link, | |
612 | + unsigned int sc_reg, u32 *val) | |
613 | { | |
614 | - struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
615 | - unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); | |
616 | + struct pci_dev *pdev = to_pci_dev(link->ap->host->dev); | |
617 | + unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg); | |
618 | u32 val2 = 0; | |
619 | u8 pmr; | |
620 | ||
621 | @@ -158,10 +159,11 @@ static u32 sis_scr_cfg_read(struct ata_p | |
622 | return 0; | |
623 | } | |
624 | ||
625 | -static int sis_scr_cfg_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | |
626 | +static int sis_scr_cfg_write(struct ata_link *link, | |
627 | + unsigned int sc_reg, u32 val) | |
628 | { | |
629 | - struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
630 | - unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); | |
631 | + struct pci_dev *pdev = to_pci_dev(link->ap->host->dev); | |
632 | + unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg); | |
633 | u8 pmr; | |
634 | ||
635 | if (sc_reg == SCR_ERROR) /* doesn't exist in PCI cfg space */ | |
636 | @@ -178,8 +180,9 @@ static int sis_scr_cfg_write(struct ata_ | |
637 | return 0; | |
638 | } | |
639 | ||
640 | -static int sis_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | |
641 | +static int sis_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val) | |
642 | { | |
643 | + struct ata_port *ap = link->ap; | |
644 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
645 | u8 pmr; | |
646 | ||
647 | @@ -187,7 +190,7 @@ static int sis_scr_read(struct ata_port | |
648 | return -EINVAL; | |
649 | ||
650 | if (ap->flags & SIS_FLAG_CFGSCR) | |
651 | - return sis_scr_cfg_read(ap, sc_reg, val); | |
652 | + return sis_scr_cfg_read(link, sc_reg, val); | |
653 | ||
654 | pci_read_config_byte(pdev, SIS_PMR, &pmr); | |
655 | ||
656 | @@ -202,8 +205,9 @@ static int sis_scr_read(struct ata_port | |
657 | return 0; | |
658 | } | |
659 | ||
660 | -static int sis_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | |
661 | +static int sis_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) | |
662 | { | |
663 | + struct ata_port *ap = link->ap; | |
664 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
665 | u8 pmr; | |
666 | ||
667 | @@ -213,7 +217,7 @@ static int sis_scr_write(struct ata_port | |
668 | pci_read_config_byte(pdev, SIS_PMR, &pmr); | |
669 | ||
670 | if (ap->flags & SIS_FLAG_CFGSCR) | |
671 | - return sis_scr_cfg_write(ap, sc_reg, val); | |
672 | + return sis_scr_cfg_write(link, sc_reg, val); | |
673 | else { | |
674 | iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4)); | |
675 | if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || | |
676 | --- a/drivers/ata/sata_svw.c | |
677 | +++ b/drivers/ata/sata_svw.c | |
678 | @@ -123,20 +123,22 @@ static int k2_sata_check_atapi_dma(struc | |
679 | } | |
680 | } | |
681 | ||
682 | -static int k2_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | |
683 | +static int k2_sata_scr_read(struct ata_link *link, | |
684 | + unsigned int sc_reg, u32 *val) | |
685 | { | |
686 | if (sc_reg > SCR_CONTROL) | |
687 | return -EINVAL; | |
688 | - *val = readl(ap->ioaddr.scr_addr + (sc_reg * 4)); | |
689 | + *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4)); | |
690 | return 0; | |
691 | } | |
692 | ||
693 | ||
694 | -static int k2_sata_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | |
695 | +static int k2_sata_scr_write(struct ata_link *link, | |
696 | + unsigned int sc_reg, u32 val) | |
697 | { | |
698 | if (sc_reg > SCR_CONTROL) | |
699 | return -EINVAL; | |
700 | - writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); | |
701 | + writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4)); | |
702 | return 0; | |
703 | } | |
704 | ||
705 | --- a/drivers/ata/sata_uli.c | |
706 | +++ b/drivers/ata/sata_uli.c | |
707 | @@ -57,8 +57,8 @@ struct uli_priv { | |
708 | }; | |
709 | ||
710 | static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | |
711 | -static int uli_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | |
712 | -static int uli_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | |
713 | +static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); | |
714 | +static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); | |
715 | ||
716 | static const struct pci_device_id uli_pci_tbl[] = { | |
717 | { PCI_VDEVICE(AL, 0x5289), uli_5289 }, | |
718 | @@ -107,39 +107,39 @@ static unsigned int get_scr_cfg_addr(str | |
719 | return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg); | |
720 | } | |
721 | ||
722 | -static u32 uli_scr_cfg_read(struct ata_port *ap, unsigned int sc_reg) | |
723 | +static u32 uli_scr_cfg_read(struct ata_link *link, unsigned int sc_reg) | |
724 | { | |
725 | - struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
726 | - unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); | |
727 | + struct pci_dev *pdev = to_pci_dev(link->ap->host->dev); | |
728 | + unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg); | |
729 | u32 val; | |
730 | ||
731 | pci_read_config_dword(pdev, cfg_addr, &val); | |
732 | return val; | |
733 | } | |
734 | ||
735 | -static void uli_scr_cfg_write(struct ata_port *ap, unsigned int scr, u32 val) | |
736 | +static void uli_scr_cfg_write(struct ata_link *link, unsigned int scr, u32 val) | |
737 | { | |
738 | - struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
739 | - unsigned int cfg_addr = get_scr_cfg_addr(ap, scr); | |
740 | + struct pci_dev *pdev = to_pci_dev(link->ap->host->dev); | |
741 | + unsigned int cfg_addr = get_scr_cfg_addr(link->ap, scr); | |
742 | ||
743 | pci_write_config_dword(pdev, cfg_addr, val); | |
744 | } | |
745 | ||
746 | -static int uli_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | |
747 | +static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val) | |
748 | { | |
749 | if (sc_reg > SCR_CONTROL) | |
750 | return -EINVAL; | |
751 | ||
752 | - *val = uli_scr_cfg_read(ap, sc_reg); | |
753 | + *val = uli_scr_cfg_read(link, sc_reg); | |
754 | return 0; | |
755 | } | |
756 | ||
757 | -static int uli_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | |
758 | +static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) | |
759 | { | |
760 | if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0 | |
761 | return -EINVAL; | |
762 | ||
763 | - uli_scr_cfg_write(ap, sc_reg, val); | |
764 | + uli_scr_cfg_write(link, sc_reg, val); | |
765 | return 0; | |
766 | } | |
767 | ||
768 | --- a/drivers/ata/sata_via.c | |
769 | +++ b/drivers/ata/sata_via.c | |
770 | @@ -68,8 +68,8 @@ enum { | |
771 | }; | |
772 | ||
773 | static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | |
774 | -static int svia_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | |
775 | -static int svia_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | |
776 | +static int svia_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); | |
777 | +static int svia_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); | |
778 | static void svia_noop_freeze(struct ata_port *ap); | |
779 | static int vt6420_prereset(struct ata_link *link, unsigned long deadline); | |
780 | static int vt6421_pata_cable_detect(struct ata_port *ap); | |
781 | @@ -152,19 +152,19 @@ MODULE_LICENSE("GPL"); | |
782 | MODULE_DEVICE_TABLE(pci, svia_pci_tbl); | |
783 | MODULE_VERSION(DRV_VERSION); | |
784 | ||
785 | -static int svia_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | |
786 | +static int svia_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val) | |
787 | { | |
788 | if (sc_reg > SCR_CONTROL) | |
789 | return -EINVAL; | |
790 | - *val = ioread32(ap->ioaddr.scr_addr + (4 * sc_reg)); | |
791 | + *val = ioread32(link->ap->ioaddr.scr_addr + (4 * sc_reg)); | |
792 | return 0; | |
793 | } | |
794 | ||
795 | -static int svia_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | |
796 | +static int svia_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) | |
797 | { | |
798 | if (sc_reg > SCR_CONTROL) | |
799 | return -EINVAL; | |
800 | - iowrite32(val, ap->ioaddr.scr_addr + (4 * sc_reg)); | |
801 | + iowrite32(val, link->ap->ioaddr.scr_addr + (4 * sc_reg)); | |
802 | return 0; | |
803 | } | |
804 | ||
805 | @@ -210,20 +210,20 @@ static int vt6420_prereset(struct ata_li | |
806 | goto skip_scr; | |
807 | ||
808 | /* Resume phy. This is the old SATA resume sequence */ | |
809 | - svia_scr_write(ap, SCR_CONTROL, 0x300); | |
810 | - svia_scr_read(ap, SCR_CONTROL, &scontrol); /* flush */ | |
811 | + svia_scr_write(link, SCR_CONTROL, 0x300); | |
812 | + svia_scr_read(link, SCR_CONTROL, &scontrol); /* flush */ | |
813 | ||
814 | /* wait for phy to become ready, if necessary */ | |
815 | do { | |
816 | msleep(200); | |
817 | - svia_scr_read(ap, SCR_STATUS, &sstatus); | |
818 | + svia_scr_read(link, SCR_STATUS, &sstatus); | |
819 | if ((sstatus & 0xf) != 1) | |
820 | break; | |
821 | } while (time_before(jiffies, timeout)); | |
822 | ||
823 | /* open code sata_print_link_status() */ | |
824 | - svia_scr_read(ap, SCR_STATUS, &sstatus); | |
825 | - svia_scr_read(ap, SCR_CONTROL, &scontrol); | |
826 | + svia_scr_read(link, SCR_STATUS, &sstatus); | |
827 | + svia_scr_read(link, SCR_CONTROL, &scontrol); | |
828 | ||
829 | online = (sstatus & 0xf) == 0x3; | |
830 | ||
831 | @@ -232,7 +232,7 @@ static int vt6420_prereset(struct ata_li | |
832 | online ? "up" : "down", sstatus, scontrol); | |
833 | ||
834 | /* SStatus is read one more time */ | |
835 | - svia_scr_read(ap, SCR_STATUS, &sstatus); | |
836 | + svia_scr_read(link, SCR_STATUS, &sstatus); | |
837 | ||
838 | if (!online) { | |
839 | /* tell EH to bail */ | |
840 | --- a/drivers/ata/sata_vsc.c | |
841 | +++ b/drivers/ata/sata_vsc.c | |
842 | @@ -98,20 +98,22 @@ enum { | |
843 | VSC_SATA_INT_PHY_CHANGE), | |
844 | }; | |
845 | ||
846 | -static int vsc_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | |
847 | +static int vsc_sata_scr_read(struct ata_link *link, | |
848 | + unsigned int sc_reg, u32 *val) | |
849 | { | |
850 | if (sc_reg > SCR_CONTROL) | |
851 | return -EINVAL; | |
852 | - *val = readl(ap->ioaddr.scr_addr + (sc_reg * 4)); | |
853 | + *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4)); | |
854 | return 0; | |
855 | } | |
856 | ||
857 | ||
858 | -static int vsc_sata_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | |
859 | +static int vsc_sata_scr_write(struct ata_link *link, | |
860 | + unsigned int sc_reg, u32 val) | |
861 | { | |
862 | if (sc_reg > SCR_CONTROL) | |
863 | return -EINVAL; | |
864 | - writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); | |
865 | + writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4)); | |
866 | return 0; | |
867 | } | |
868 | ||
869 | --- a/drivers/scsi/libsas/sas_ata.c | |
870 | +++ b/drivers/scsi/libsas/sas_ata.c | |
871 | @@ -294,10 +294,10 @@ static void sas_ata_post_internal(struct | |
872 | } | |
873 | } | |
874 | ||
875 | -static int sas_ata_scr_write(struct ata_port *ap, unsigned int sc_reg_in, | |
876 | +static int sas_ata_scr_write(struct ata_link *link, unsigned int sc_reg_in, | |
877 | u32 val) | |
878 | { | |
879 | - struct domain_device *dev = ap->private_data; | |
880 | + struct domain_device *dev = link->ap->private_data; | |
881 | ||
882 | SAS_DPRINTK("STUB %s\n", __func__); | |
883 | switch (sc_reg_in) { | |
884 | @@ -319,10 +319,10 @@ static int sas_ata_scr_write(struct ata_ | |
885 | return 0; | |
886 | } | |
887 | ||
888 | -static int sas_ata_scr_read(struct ata_port *ap, unsigned int sc_reg_in, | |
889 | +static int sas_ata_scr_read(struct ata_link *link, unsigned int sc_reg_in, | |
890 | u32 *val) | |
891 | { | |
892 | - struct domain_device *dev = ap->private_data; | |
893 | + struct domain_device *dev = link->ap->private_data; | |
894 | ||
895 | SAS_DPRINTK("STUB %s\n", __func__); | |
896 | switch (sc_reg_in) { | |
897 | --- a/include/linux/libata.h | |
898 | +++ b/include/linux/libata.h | |
899 | @@ -773,8 +773,8 @@ struct ata_port_operations { | |
900 | /* | |
901 | * Optional features | |
902 | */ | |
903 | - int (*scr_read)(struct ata_port *ap, unsigned int sc_reg, u32 *val); | |
904 | - int (*scr_write)(struct ata_port *ap, unsigned int sc_reg, u32 val); | |
905 | + int (*scr_read)(struct ata_link *link, unsigned int sc_reg, u32 *val); | |
906 | + int (*scr_write)(struct ata_link *link, unsigned int sc_reg, u32 val); | |
907 | void (*pmp_attach)(struct ata_port *ap); | |
908 | void (*pmp_detach)(struct ata_port *ap); | |
909 | int (*enable_pm)(struct ata_port *ap, enum link_pm policy); |