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3ab8611a | 1 | /* Install given floating-point control modes. |
2b778ceb | 2 | Copyright (C) 2020-2021 Free Software Foundation, Inc. |
3ab8611a VG |
3 | This file is part of the GNU C Library. |
4 | ||
5 | The GNU C Library is free software; you can redistribute it and/or | |
6 | modify it under the terms of the GNU Lesser General Public | |
7 | License as published by the Free Software Foundation; either | |
8 | version 2.1 of the License, or (at your option) any later version. | |
9 | ||
10 | The GNU C Library is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | Lesser General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU Lesser General Public | |
16 | License along with the GNU C Library. If not, see | |
17 | <https://www.gnu.org/licenses/>. */ | |
18 | ||
19 | #include <fenv.h> | |
20 | #include <fpu_control.h> | |
21 | ||
22 | int | |
23 | fesetmode (const femode_t *modep) | |
24 | { | |
25 | unsigned int fpcr; | |
26 | ||
27 | if (modep == FE_DFL_MODE) | |
28 | { | |
29 | fpcr = _FPU_DEFAULT; | |
30 | } | |
31 | else | |
32 | { | |
33 | /* No need to mask out reserved bits as they are IoW. */ | |
34 | fpcr = *modep; | |
35 | } | |
36 | ||
37 | _FPU_SETCW (fpcr); | |
38 | ||
39 | return 0; | |
40 | } |