]> git.ipfire.org Git - thirdparty/glibc.git/blame - sysdeps/unix/sysv/linux/sparc/sparc32/register-dump.h
Update copyright dates with scripts/update-copyrights
[thirdparty/glibc.git] / sysdeps / unix / sysv / linux / sparc / sparc32 / register-dump.h
CommitLineData
e1f601e8 1/* Dump registers.
2b778ceb 2 Copyright (C) 1999-2021 Free Software Foundation, Inc.
e1f601e8 3 This file is part of the GNU C Library.
313fed01 4 Contributed by Jakub Jelinek <jakub@redhat.com>, 1999.
e1f601e8
UD
5
6 The GNU C Library is free software; you can redistribute it and/or
41bdb6e2
AJ
7 modify it under the terms of the GNU Lesser General Public
8 License as published by the Free Software Foundation; either
9 version 2.1 of the License, or (at your option) any later version.
e1f601e8
UD
10
11 The GNU C Library is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
41bdb6e2 14 Lesser General Public License for more details.
e1f601e8 15
41bdb6e2 16 You should have received a copy of the GNU Lesser General Public
59ba27a6 17 License along with the GNU C Library; if not, see
5a82c748 18 <https://www.gnu.org/licenses/>. */
e1f601e8
UD
19
20#include <sys/uio.h>
eb96ffb0 21#include <_itoa.h>
e1f601e8
UD
22
23/* We will print the register dump in this format:
24
25 PSR: XXXXXXXX PC: XXXXXXXX NPC: XXXXXXXX Y: XXXXXXXX
26 g0: 00000000 g1: XXXXXXXX g2: XXXXXXXX g3: XXXXXXXX
27 g4: XXXXXXXX g5: XXXXXXXX g6: XXXXXXXX g7: XXXXXXXX
28 o0: XXXXXXXX o1: XXXXXXXX o2: XXXXXXXX o3: XXXXXXXX
29 o4: XXXXXXXX o5: XXXXXXXX sp: XXXXXXXX o7: XXXXXXXX
30 l0: XXXXXXXX l1: XXXXXXXX l2: XXXXXXXX l3: XXXXXXXX
31 l4: XXXXXXXX l5: XXXXXXXX l6: XXXXXXXX l7: XXXXXXXX
32 i0: XXXXXXXX i1: XXXXXXXX i2: XXXXXXXX i3: XXXXXXXX
33 i4: XXXXXXXX i5: XXXXXXXX fp: XXXXXXXX i7: XXXXXXXX
34
35 followed on sun4, sun4c, sun4d, sun4m by:
36
37 Old mask: XXXXXXXX FSR: XXXXXXXX FPQ: XXXXXXXX
38 f0: XXXXXXXXXXXXXXXX f2: XXXXXXXXXXXXXXXX f4: XXXXXXXXXXXXXXXX
39 f6: XXXXXXXXXXXXXXXX f8: XXXXXXXXXXXXXXXX f10: XXXXXXXXXXXXXXXX
40 f12: XXXXXXXXXXXXXXXX f14: XXXXXXXXXXXXXXXX f16: XXXXXXXXXXXXXXXX
41 f18: XXXXXXXXXXXXXXXX f20: XXXXXXXXXXXXXXXX f22: XXXXXXXXXXXXXXXX
42 f24: XXXXXXXXXXXXXXXX f26: XXXXXXXXXXXXXXXX f28: XXXXXXXXXXXXXXXX
43 f30: XXXXXXXXXXXXXXXX
44
45 and on sun4u by:
46
47 Old mask: XXXXXXXX XFSR: XXXXXXXXXXXXXXXX GSR: XX FPRS: X
48 f0: XXXXXXXXXXXXXXXX f2: XXXXXXXXXXXXXXXX f4: XXXXXXXXXXXXXXXX
49 f6: XXXXXXXXXXXXXXXX f8: XXXXXXXXXXXXXXXX f10: XXXXXXXXXXXXXXXX
50 f12: XXXXXXXXXXXXXXXX f14: XXXXXXXXXXXXXXXX f16: XXXXXXXXXXXXXXXX
51 f18: XXXXXXXXXXXXXXXX f20: XXXXXXXXXXXXXXXX f22: XXXXXXXXXXXXXXXX
52 f24: XXXXXXXXXXXXXXXX f26: XXXXXXXXXXXXXXXX f28: XXXXXXXXXXXXXXXX
53 f30: XXXXXXXXXXXXXXXX f32: XXXXXXXXXXXXXXXX f34: XXXXXXXXXXXXXXXX
54 f36: XXXXXXXXXXXXXXXX f38: XXXXXXXXXXXXXXXX f40: XXXXXXXXXXXXXXXX
55 f42: XXXXXXXXXXXXXXXX f44: XXXXXXXXXXXXXXXX f46: XXXXXXXXXXXXXXXX
56 f48: XXXXXXXXXXXXXXXX f50: XXXXXXXXXXXXXXXX f52: XXXXXXXXXXXXXXXX
57 f54: XXXXXXXXXXXXXXXX f56: XXXXXXXXXXXXXXXX f58: XXXXXXXXXXXXXXXX
58 f60: XXXXXXXXXXXXXXXX f62: XXXXXXXXXXXXXXXX
59
60 */
61
62static void
63hexvalue (unsigned long int value, char *buf, size_t len)
64{
65 char *cp = _itoa_word (value, buf + len, 16, 0);
66 while (cp > buf)
67 *--cp = '0';
68}
69
70struct __siginfo_sparc32_fpu
71{
72 unsigned int si_float_regs[32];
73 unsigned int si_fsr;
74 unsigned int si_fpq;
75};
76struct __siginfo_sparc64_fpu
77{
78 unsigned int si_float_regs[64];
79 unsigned int si_xfsr;
80 unsigned int si_fsr;
81 unsigned int _pad1;
82 unsigned int si_gsr;
83 unsigned int _pad2;
84 unsigned int si_fprs;
85};
86
a43565ac
AZ
87/* Unlike other architectures, sparc32 passes pt_regs32 REGS pointer as
88 the third argument to a sa_sigaction handler with SA_SIGINFO enabled. */
e1f601e8 89static void
a43565ac 90register_dump (int fd, void *ctx)
e1f601e8
UD
91{
92 char regs[36][8];
93 char fregs[68][8];
94 struct iovec iov[150];
95 size_t nr = 0;
96 int i;
a43565ac
AZ
97 struct pt_regs32 *ptregs = (struct pt_regs32 *) ctx;
98 struct compat_sigset_t
99 {
100 unsigned int sig[2];
101 };
102 struct compat_sigset_t *mask = (struct compat_sigset_t *)(ptregs + 1);
103 unsigned int *r = (unsigned int *) ptregs->u_regs[14];
e1f601e8
UD
104
105#define ADD_STRING(str) \
106 iov[nr].iov_base = (char *) str; \
107 iov[nr].iov_len = strlen (str); \
108 ++nr
109#define ADD_MEM(str, len) \
110 iov[nr].iov_base = str; \
111 iov[nr].iov_len = len; \
112 ++nr
113
114 /* Generate strings of register contents. */
a43565ac
AZ
115 hexvalue (ptregs->psr, regs[0], 8);
116 hexvalue (ptregs->pc, regs[1], 8);
117 hexvalue (ptregs->npc, regs[2], 8);
118 hexvalue (ptregs->y, regs[3], 8);
e1f601e8 119 for (i = 1; i <= 15; i++)
a43565ac 120 hexvalue (ptregs->u_regs[i], regs[3+i], 8);
e1f601e8 121 for (i = 0; i <= 15; i++)
313fed01 122 hexvalue (r[i], regs[19+i], 8);
a43565ac
AZ
123
124 hexvalue (mask->sig[0], regs[35], 8);
e1f601e8
UD
125
126 /* Generate the output. */
127 ADD_STRING ("Register dump:\n\n PSR: ");
128 ADD_MEM (regs[0], 8);
129 ADD_STRING (" PC: ");
130 ADD_MEM (regs[1], 8);
131 ADD_STRING (" NPC: ");
132 ADD_MEM (regs[2], 8);
133 ADD_STRING (" Y: ");
134 ADD_MEM (regs[3], 8);
135 ADD_STRING ("\n g0: 00000000 g1: ");
136 ADD_MEM (regs[4], 8);
137 ADD_STRING (" g2: ");
138 ADD_MEM (regs[5], 8);
139 ADD_STRING (" g3: ");
140 ADD_MEM (regs[6], 8);
141 ADD_STRING ("\n g4: ");
142 ADD_MEM (regs[7], 8);
143 ADD_STRING (" g5: ");
144 ADD_MEM (regs[8], 8);
145 ADD_STRING (" g6: ");
146 ADD_MEM (regs[9], 8);
147 ADD_STRING (" g7: ");
148 ADD_MEM (regs[10], 8);
149 ADD_STRING ("\n o0: ");
150 ADD_MEM (regs[11], 8);
151 ADD_STRING (" o1: ");
152 ADD_MEM (regs[12], 8);
153 ADD_STRING (" o2: ");
154 ADD_MEM (regs[13], 8);
155 ADD_STRING (" o3: ");
156 ADD_MEM (regs[14], 8);
157 ADD_STRING ("\n o4: ");
158 ADD_MEM (regs[15], 8);
159 ADD_STRING (" o5: ");
160 ADD_MEM (regs[16], 8);
161 ADD_STRING (" sp: ");
162 ADD_MEM (regs[17], 8);
163 ADD_STRING (" o7: ");
164 ADD_MEM (regs[18], 8);
165 ADD_STRING ("\n l0: ");
166 ADD_MEM (regs[19], 8);
167 ADD_STRING (" l1: ");
168 ADD_MEM (regs[20], 8);
169 ADD_STRING (" l2: ");
170 ADD_MEM (regs[21], 8);
171 ADD_STRING (" l3: ");
172 ADD_MEM (regs[22], 8);
173 ADD_STRING ("\n l4: ");
174 ADD_MEM (regs[23], 8);
175 ADD_STRING (" l5: ");
176 ADD_MEM (regs[24], 8);
177 ADD_STRING (" l6: ");
178 ADD_MEM (regs[25], 8);
179 ADD_STRING (" l7: ");
180 ADD_MEM (regs[26], 8);
181 ADD_STRING ("\n i0: ");
182 ADD_MEM (regs[27], 8);
183 ADD_STRING (" i1: ");
184 ADD_MEM (regs[28], 8);
185 ADD_STRING (" i2: ");
186 ADD_MEM (regs[29], 8);
187 ADD_STRING (" i3: ");
188 ADD_MEM (regs[30], 8);
189 ADD_STRING ("\n i4: ");
190 ADD_MEM (regs[31], 8);
191 ADD_STRING (" i5: ");
192 ADD_MEM (regs[32], 8);
193 ADD_STRING (" fp: ");
194 ADD_MEM (regs[33], 8);
195 ADD_STRING (" i7: ");
196 ADD_MEM (regs[34], 8);
197 ADD_STRING ("\n\n Old mask: ");
198 ADD_MEM (regs[35], 8);
199
a43565ac 200 if ((ptregs->psr & 0xff000000) == 0xff000000)
e1f601e8 201 {
a43565ac
AZ
202 struct __siginfo_sparc64_fpu *f = *(struct __siginfo_sparc64_fpu **)
203 (mask + 1);
e1f601e8 204
e1f601e8
UD
205 if (f != NULL)
206 {
207 for (i = 0; i < 64; i++)
208 hexvalue (f->si_float_regs[i], fregs[i], 8);
209 hexvalue (f->si_xfsr, fregs[64], 8);
210 hexvalue (f->si_fsr, fregs[65], 8);
211 hexvalue (f->si_gsr, fregs[66], 2);
212 hexvalue (f->si_fprs, fregs[67], 1);
213 ADD_STRING (" XFSR: ");
214 ADD_MEM (fregs[64], 8);
215 ADD_MEM (fregs[65], 8);
216 ADD_STRING (" GSR: ");
217 ADD_MEM (fregs[66], 2);
218 ADD_STRING (" FPRS: ");
219 ADD_MEM (fregs[67], 1);
220 ADD_STRING ("\n f0: ");
221 ADD_MEM (fregs[0], 16);
222 ADD_STRING (" f2: ");
223 ADD_MEM (fregs[2], 16);
224 ADD_STRING (" f4: ");
225 ADD_MEM (fregs[4], 16);
226 ADD_STRING ("\n f6: ");
227 ADD_MEM (fregs[6], 16);
228 ADD_STRING (" f8: ");
229 ADD_MEM (fregs[8], 16);
230 ADD_STRING (" f10: ");
231 ADD_MEM (fregs[10], 16);
232 ADD_STRING ("\n f12: ");
233 ADD_MEM (fregs[12], 16);
234 ADD_STRING (" f14: ");
235 ADD_MEM (fregs[14], 16);
236 ADD_STRING (" f16: ");
237 ADD_MEM (fregs[16], 16);
238 ADD_STRING ("\n f18: ");
239 ADD_MEM (fregs[18], 16);
240 ADD_STRING (" f20: ");
241 ADD_MEM (fregs[20], 16);
242 ADD_STRING (" f22: ");
243 ADD_MEM (fregs[22], 16);
244 ADD_STRING ("\n f24: ");
245 ADD_MEM (fregs[24], 16);
246 ADD_STRING (" f26: ");
247 ADD_MEM (fregs[26], 16);
248 ADD_STRING (" f28: ");
249 ADD_MEM (fregs[28], 16);
250 ADD_STRING ("\n f30: ");
251 ADD_MEM (fregs[30], 16);
252 ADD_STRING (" f32: ");
253 ADD_MEM (fregs[32], 16);
254 ADD_STRING (" f34: ");
255 ADD_MEM (fregs[34], 16);
256 ADD_STRING ("\n f36: ");
257 ADD_MEM (fregs[36], 16);
258 ADD_STRING (" f38: ");
259 ADD_MEM (fregs[38], 16);
313fed01 260 ADD_STRING (" f40: ");
e1f601e8
UD
261 ADD_MEM (fregs[40], 16);
262 ADD_STRING ("\n f42: ");
263 ADD_MEM (fregs[42], 16);
264 ADD_STRING (" f44: ");
265 ADD_MEM (fregs[44], 16);
266 ADD_STRING (" f46: ");
267 ADD_MEM (fregs[46], 16);
268 ADD_STRING ("\n f48: ");
269 ADD_MEM (fregs[48], 16);
270 ADD_STRING (" f50: ");
271 ADD_MEM (fregs[50], 16);
272 ADD_STRING (" f52: ");
273 ADD_MEM (fregs[52], 16);
274 ADD_STRING ("\n f54: ");
275 ADD_MEM (fregs[54], 16);
276 ADD_STRING (" f56: ");
277 ADD_MEM (fregs[56], 16);
278 ADD_STRING (" f58: ");
279 ADD_MEM (fregs[58], 16);
280 ADD_STRING ("\n f60: ");
281 ADD_MEM (fregs[60], 16);
282 ADD_STRING (" f62: ");
283 ADD_MEM (fregs[62], 16);
284 }
285 }
286 else
287 {
a43565ac
AZ
288 struct __siginfo_sparc32_fpu *f = *(struct __siginfo_sparc32_fpu **)
289 (mask + 1);
e1f601e8 290
e1f601e8
UD
291 if (f != NULL)
292 {
293 for (i = 0; i < 32; i++)
294 hexvalue (f->si_float_regs[i], fregs[i], 8);
295 hexvalue (f->si_fsr, fregs[64], 8);
296 hexvalue (f->si_fpq, fregs[65], 8);
297 ADD_STRING (" FSR: ");
298 ADD_MEM (fregs[64], 8);
299 ADD_STRING (" FPQ: ");
300 ADD_MEM (fregs[65], 8);
301 ADD_STRING ("\n f0: ");
302 ADD_MEM (fregs[0], 16);
303 ADD_STRING (" f2: ");
304 ADD_MEM (fregs[2], 16);
305 ADD_STRING (" f4: ");
306 ADD_MEM (fregs[4], 16);
307 ADD_STRING ("\n f6: ");
308 ADD_MEM (fregs[6], 16);
309 ADD_STRING (" f8: ");
310 ADD_MEM (fregs[8], 16);
311 ADD_STRING (" f10: ");
312 ADD_MEM (fregs[10], 16);
313 ADD_STRING ("\n f12: ");
314 ADD_MEM (fregs[12], 16);
315 ADD_STRING (" f14: ");
316 ADD_MEM (fregs[14], 16);
317 ADD_STRING (" f16: ");
318 ADD_MEM (fregs[16], 16);
319 ADD_STRING ("\n f18: ");
320 ADD_MEM (fregs[18], 16);
321 ADD_STRING (" f20: ");
322 ADD_MEM (fregs[20], 16);
323 ADD_STRING (" f22: ");
324 ADD_MEM (fregs[22], 16);
325 ADD_STRING ("\n f24: ");
326 ADD_MEM (fregs[24], 16);
327 ADD_STRING (" f26: ");
328 ADD_MEM (fregs[26], 16);
329 ADD_STRING (" f28: ");
330 ADD_MEM (fregs[28], 16);
331 ADD_STRING ("\n f30: ");
332 ADD_MEM (fregs[30], 16);
333 }
334 }
335
336 ADD_STRING ("\n");
337
338 /* Write the stuff out. */
339 writev (fd, iov, nr);
340}
341
342
343#define REGISTER_DUMP register_dump (fd, ctx)