projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 6a1c7cef SG |
2 | /* |
| 3 | * Copyright (C) 2015 Google, Inc | |
| 6a1c7cef SG |
4 | */ |
| 5 | ||
| d678a59d | 6 | #include <common.h> |
| d7a672e3 | 7 | #include <clk.h> |
| 6a1c7cef | 8 | #include <dm.h> |
| f7ae49fc | 9 | #include <log.h> |
| 336d4615 | 10 | #include <malloc.h> |
| 135aa950 | 11 | #include <asm/clk.h> |
| 6a1c7cef | 12 | #include <dm/test.h> |
| dd2e0ce2 | 13 | #include <dm/device-internal.h> |
| 6a1c7cef | 14 | #include <linux/err.h> |
| 0e1fad43 | 15 | #include <test/test.h> |
| 6a1c7cef SG |
16 | #include <test/ut.h> |
| 17 | ||
| d7a672e3 JT |
18 | /* Base test of the clk uclass */ |
| 19 | static int dm_test_clk_base(struct unit_test_state *uts) | |
| 20 | { | |
| 21 | struct udevice *dev; | |
| 22 | struct clk clk_method1; | |
| 23 | struct clk clk_method2; | |
| 24 | ||
| 25 | /* Get the device using the clk device */ | |
| 26 | ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test", &dev)); | |
| 27 | ||
| 28 | /* Get the same clk port in 2 different ways and compare */ | |
| 2050f824 SH |
29 | ut_assertok(clk_get_by_index(dev, 0, &clk_method1)); |
| 30 | ut_assertok(clk_get_by_name(dev, NULL, &clk_method2)); | |
| 31 | ut_asserteq(clk_is_match(&clk_method1, &clk_method2), true); | |
| 32 | ut_asserteq(clk_method1.id, clk_method2.id); | |
| 33 | ||
| d7a672e3 JT |
34 | ut_assertok(clk_get_by_index(dev, 1, &clk_method1)); |
| 35 | ut_assertok(clk_get_by_index_nodev(dev_ofnode(dev), 1, &clk_method2)); | |
| acbb7cd4 | 36 | ut_asserteq(clk_is_match(&clk_method1, &clk_method2), true); |
| d7a672e3 JT |
37 | ut_asserteq(clk_method1.id, clk_method2.id); |
| 38 | ||
| 99b46477 ARS |
39 | ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test2", &dev)); |
| 40 | ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE)); | |
| 41 | ||
| 42 | ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test3", &dev)); | |
| 43 | ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE)); | |
| 44 | ||
| 45 | ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test4", &dev)); | |
| 46 | ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE)); | |
| 47 | ||
| d7a672e3 JT |
48 | return 0; |
| 49 | } | |
| 50 | ||
| e180c2b1 | 51 | DM_TEST(dm_test_clk_base, UT_TESTF_SCAN_FDT); |
| d7a672e3 | 52 | |
| 135aa950 | 53 | static int dm_test_clk(struct unit_test_state *uts) |
| 6a1c7cef | 54 | { |
| b630d57d | 55 | struct udevice *dev_fixed, *dev_fixed_factor, *dev_clk, *dev_test; |
| 6a1c7cef SG |
56 | ulong rate; |
| 57 | ||
| 135aa950 SW |
58 | ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed", |
| 59 | &dev_fixed)); | |
| 6a1c7cef | 60 | |
| b630d57d AP |
61 | ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed-factor", |
| 62 | &dev_fixed_factor)); | |
| 63 | ||
| 135aa950 SW |
64 | ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox", |
| 65 | &dev_clk)); | |
| 66 | ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI)); | |
| 67 | ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C)); | |
| 68 | ut_asserteq(0, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_SPI)); | |
| 69 | ut_asserteq(0, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_I2C)); | |
| 6a1c7cef | 70 | |
| 135aa950 SW |
71 | ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test", |
| 72 | &dev_test)); | |
| 73 | ut_assertok(sandbox_clk_test_get(dev_test)); | |
| dd2e0ce2 | 74 | ut_assertok(sandbox_clk_test_devm_get(dev_test)); |
| 1fe243a1 | 75 | ut_assertok(sandbox_clk_test_valid(dev_test)); |
| 6a1c7cef | 76 | |
| dd2e0ce2 JJH |
77 | ut_asserteq(0, sandbox_clk_test_get_rate(dev_test, |
| 78 | SANDBOX_CLK_TEST_ID_DEVM_NULL)); | |
| 79 | ut_asserteq(0, sandbox_clk_test_set_rate(dev_test, | |
| 80 | SANDBOX_CLK_TEST_ID_DEVM_NULL, | |
| 81 | 0)); | |
| 82 | ut_asserteq(0, sandbox_clk_test_enable(dev_test, | |
| 83 | SANDBOX_CLK_TEST_ID_DEVM_NULL)); | |
| 84 | ut_asserteq(0, sandbox_clk_test_disable(dev_test, | |
| 85 | SANDBOX_CLK_TEST_ID_DEVM_NULL)); | |
| 86 | ||
| 135aa950 SW |
87 | ut_asserteq(1234, |
| 88 | sandbox_clk_test_get_rate(dev_test, | |
| 89 | SANDBOX_CLK_TEST_ID_FIXED)); | |
| 90 | ut_asserteq(0, sandbox_clk_test_get_rate(dev_test, | |
| 91 | SANDBOX_CLK_TEST_ID_SPI)); | |
| 92 | ut_asserteq(0, sandbox_clk_test_get_rate(dev_test, | |
| 93 | SANDBOX_CLK_TEST_ID_I2C)); | |
| 9a52be12 JJH |
94 | ut_asserteq(321, sandbox_clk_test_get_rate(dev_test, |
| 95 | SANDBOX_CLK_TEST_ID_DEVM1)); | |
| dd2e0ce2 JJH |
96 | ut_asserteq(0, sandbox_clk_test_get_rate(dev_test, |
| 97 | SANDBOX_CLK_TEST_ID_DEVM2)); | |
| 6a1c7cef | 98 | |
| 135aa950 SW |
99 | rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_FIXED, |
| 100 | 12345); | |
| 101 | ut_assert(IS_ERR_VALUE(rate)); | |
| 102 | rate = sandbox_clk_test_get_rate(dev_test, SANDBOX_CLK_TEST_ID_FIXED); | |
| 103 | ut_asserteq(1234, rate); | |
| 6a1c7cef | 104 | |
| 135aa950 SW |
105 | ut_asserteq(0, sandbox_clk_test_set_rate(dev_test, |
| 106 | SANDBOX_CLK_TEST_ID_SPI, | |
| 107 | 1000)); | |
| 108 | ut_asserteq(0, sandbox_clk_test_set_rate(dev_test, | |
| 109 | SANDBOX_CLK_TEST_ID_I2C, | |
| 110 | 2000)); | |
| 6a1c7cef | 111 | |
| 135aa950 SW |
112 | ut_asserteq(1000, sandbox_clk_test_get_rate(dev_test, |
| 113 | SANDBOX_CLK_TEST_ID_SPI)); | |
| 114 | ut_asserteq(2000, sandbox_clk_test_get_rate(dev_test, | |
| 115 | SANDBOX_CLK_TEST_ID_I2C)); | |
| 6a1c7cef | 116 | |
| 135aa950 SW |
117 | ut_asserteq(1000, sandbox_clk_test_set_rate(dev_test, |
| 118 | SANDBOX_CLK_TEST_ID_SPI, | |
| 119 | 10000)); | |
| 120 | ut_asserteq(2000, sandbox_clk_test_set_rate(dev_test, | |
| 121 | SANDBOX_CLK_TEST_ID_I2C, | |
| 122 | 20000)); | |
| 123 | ||
| 124 | rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_SPI, 0); | |
| 125 | ut_assert(IS_ERR_VALUE(rate)); | |
| 126 | rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_I2C, 0); | |
| 127 | ut_assert(IS_ERR_VALUE(rate)); | |
| 128 | ||
| 2983ad55 DB |
129 | ut_asserteq(10000, sandbox_clk_test_get_rate(dev_test, |
| 130 | SANDBOX_CLK_TEST_ID_SPI)); | |
| 131 | ut_asserteq(20000, sandbox_clk_test_get_rate(dev_test, | |
| 132 | SANDBOX_CLK_TEST_ID_I2C)); | |
| 133 | ||
| 134 | ut_asserteq(5000, sandbox_clk_test_round_rate(dev_test, | |
| 135 | SANDBOX_CLK_TEST_ID_SPI, | |
| 136 | 5000)); | |
| 137 | ut_asserteq(7000, sandbox_clk_test_round_rate(dev_test, | |
| 138 | SANDBOX_CLK_TEST_ID_I2C, | |
| 139 | 7000)); | |
| 140 | ||
| 141 | ut_asserteq(10000, sandbox_clk_test_get_rate(dev_test, | |
| 142 | SANDBOX_CLK_TEST_ID_SPI)); | |
| 143 | ut_asserteq(20000, sandbox_clk_test_get_rate(dev_test, | |
| 144 | SANDBOX_CLK_TEST_ID_I2C)); | |
| 145 | ||
| 146 | rate = sandbox_clk_test_round_rate(dev_test, SANDBOX_CLK_TEST_ID_SPI, 0); | |
| 147 | ut_assert(IS_ERR_VALUE(rate)); | |
| 148 | rate = sandbox_clk_test_round_rate(dev_test, SANDBOX_CLK_TEST_ID_I2C, 0); | |
| 149 | ut_assert(IS_ERR_VALUE(rate)); | |
| 150 | ||
| 135aa950 SW |
151 | ut_asserteq(10000, sandbox_clk_test_get_rate(dev_test, |
| 152 | SANDBOX_CLK_TEST_ID_SPI)); | |
| 153 | ut_asserteq(20000, sandbox_clk_test_get_rate(dev_test, | |
| 154 | SANDBOX_CLK_TEST_ID_I2C)); | |
| 155 | ||
| 156 | ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI)); | |
| 157 | ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C)); | |
| 158 | ut_asserteq(10000, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_SPI)); | |
| 159 | ut_asserteq(20000, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_I2C)); | |
| 160 | ||
| 161 | ut_assertok(sandbox_clk_test_enable(dev_test, SANDBOX_CLK_TEST_ID_SPI)); | |
| 162 | ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI)); | |
| 163 | ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C)); | |
| 164 | ||
| 165 | ut_assertok(sandbox_clk_test_enable(dev_test, SANDBOX_CLK_TEST_ID_I2C)); | |
| 166 | ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI)); | |
| 167 | ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C)); | |
| 168 | ||
| 169 | ut_assertok(sandbox_clk_test_disable(dev_test, | |
| 170 | SANDBOX_CLK_TEST_ID_SPI)); | |
| 171 | ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI)); | |
| 172 | ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C)); | |
| 173 | ||
| 174 | ut_assertok(sandbox_clk_test_disable(dev_test, | |
| 175 | SANDBOX_CLK_TEST_ID_I2C)); | |
| 176 | ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI)); | |
| 177 | ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C)); | |
| 6a1c7cef | 178 | |
| dd2e0ce2 JJH |
179 | ut_asserteq(1, sandbox_clk_query_requested(dev_clk, |
| 180 | SANDBOX_CLK_ID_SPI)); | |
| 181 | ut_asserteq(1, sandbox_clk_query_requested(dev_clk, | |
| 182 | SANDBOX_CLK_ID_I2C)); | |
| 183 | ut_asserteq(1, sandbox_clk_query_requested(dev_clk, | |
| 184 | SANDBOX_CLK_ID_UART2)); | |
| dd2e0ce2 JJH |
185 | |
| 186 | ut_asserteq(1, sandbox_clk_query_requested(dev_clk, | |
| 187 | SANDBOX_CLK_ID_UART1)); | |
| 188 | ut_assertok(device_remove(dev_test, DM_REMOVE_NORMAL)); | |
| 6a1c7cef SG |
189 | return 0; |
| 190 | } | |
| e180c2b1 | 191 | DM_TEST(dm_test_clk, UT_TESTF_SCAN_FDT); |
| 65388d0d NA |
192 | |
| 193 | static int dm_test_clk_bulk(struct unit_test_state *uts) | |
| 194 | { | |
| 195 | struct udevice *dev_clk, *dev_test; | |
| 196 | ||
| 197 | ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox", | |
| 198 | &dev_clk)); | |
| 199 | ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test", | |
| 200 | &dev_test)); | |
| 201 | ut_assertok(sandbox_clk_test_get_bulk(dev_test)); | |
| 202 | ||
| 203 | ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI)); | |
| 204 | ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C)); | |
| 205 | ||
| 206 | /* Fixed clock does not support enable, thus should not fail */ | |
| 207 | ut_assertok(sandbox_clk_test_enable_bulk(dev_test)); | |
| 208 | ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI)); | |
| 209 | ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C)); | |
| 210 | ||
| 211 | /* Fixed clock does not support disable, thus should not fail */ | |
| 212 | ut_assertok(sandbox_clk_test_disable_bulk(dev_test)); | |
| 213 | ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI)); | |
| 214 | ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C)); | |
| 215 | ||
| 216 | /* Fixed clock does not support enable, thus should not fail */ | |
| 217 | ut_assertok(sandbox_clk_test_enable_bulk(dev_test)); | |
| 218 | ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI)); | |
| 219 | ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C)); | |
| 220 | ||
| 221 | /* Fixed clock does not support disable, thus should not fail */ | |
| 222 | ut_assertok(sandbox_clk_test_release_bulk(dev_test)); | |
| 223 | ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI)); | |
| 224 | ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C)); | |
| dd2e0ce2 | 225 | ut_assertok(device_remove(dev_test, DM_REMOVE_NORMAL)); |
| 65388d0d NA |
226 | |
| 227 | return 0; | |
| 228 | } | |
| e180c2b1 | 229 | DM_TEST(dm_test_clk_bulk, UT_TESTF_SCAN_FDT); |