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1 | /* | |
2 | * Copyright 2009-2012, 2013 Freescale Semiconductor, Inc. | |
3 | * Jun-jie Zhang <b18070@freescale.com> | |
4 | * Mingkai Hu <Mingkai.hu@freescale.com> | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | #ifndef __FSL_PHY_H__ | |
10 | #define __FSL_PHY_H__ | |
11 | ||
12 | #include <net.h> | |
13 | #include <miiphy.h> | |
14 | ||
15 | struct tsec_mii_mng { | |
16 | u32 miimcfg; /* MII management configuration reg */ | |
17 | u32 miimcom; /* MII management command reg */ | |
18 | u32 miimadd; /* MII management address reg */ | |
19 | u32 miimcon; /* MII management control reg */ | |
20 | u32 miimstat; /* MII management status reg */ | |
21 | u32 miimind; /* MII management indication reg */ | |
22 | u32 ifstat; /* Interface Status Register */ | |
23 | }; | |
24 | ||
25 | int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc); | |
26 | ||
27 | /* PHY register offsets */ | |
28 | #define PHY_EXT_PAGE_ACCESS 0x1f | |
29 | ||
30 | /* MII Management Configuration Register */ | |
31 | #define MIIMCFG_RESET_MGMT 0x80000000 | |
32 | #define MIIMCFG_MGMT_CLOCK_SELECT 0x00000007 | |
33 | #define MIIMCFG_INIT_VALUE 0x00000003 | |
34 | ||
35 | /* MII Management Command Register */ | |
36 | #define MIIMCOM_READ_CYCLE 0x00000001 | |
37 | #define MIIMCOM_SCAN_CYCLE 0x00000002 | |
38 | ||
39 | /* MII Management Address Register */ | |
40 | #define MIIMADD_PHY_ADDR_SHIFT 8 | |
41 | ||
42 | /* MII Management Indicator Register */ | |
43 | #define MIIMIND_BUSY 0x00000001 | |
44 | #define MIIMIND_NOTVALID 0x00000004 | |
45 | ||
46 | void tsec_local_mdio_write(struct tsec_mii_mng __iomem *phyregs, int port_addr, | |
47 | int dev_addr, int reg, int value); | |
48 | int tsec_local_mdio_read(struct tsec_mii_mng __iomem *phyregs, int port_addr, | |
49 | int dev_addr, int regnum); | |
50 | int tsec_phy_read(struct mii_dev *bus, int addr, int dev_addr, int regnum); | |
51 | int tsec_phy_write(struct mii_dev *bus, int addr, int dev_addr, int regnum, | |
52 | u16 value); | |
53 | int memac_mdio_write(struct mii_dev *bus, int port_addr, int dev_addr, | |
54 | int regnum, u16 value); | |
55 | int memac_mdio_read(struct mii_dev *bus, int port_addr, int dev_addr, | |
56 | int regnum); | |
57 | ||
58 | struct fsl_pq_mdio_info { | |
59 | struct tsec_mii_mng __iomem *regs; | |
60 | char *name; | |
61 | }; | |
62 | int fsl_pq_mdio_init(bd_t *bis, struct fsl_pq_mdio_info *info); | |
63 | ||
64 | #endif /* __FSL_PHY_H__ */ |