]>
Commit | Line | Data |
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1 | Wed Aug 26 09:29:38 1998 Joyce Janczyn <janczyn@cygnus.com> | |
2 | ||
3 | * mn10300.igen (div,divu): Fix divide instructions so divide by 0 | |
4 | behaves like the hardware. | |
5 | ||
6 | Mon Aug 24 11:50:09 1998 Joyce Janczyn <janczyn@cygnus.com> | |
7 | ||
8 | * sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA. | |
9 | ||
10 | start-sanitize-am33 | |
11 | Wed Aug 12 12:36:07 1998 Jeffrey A Law (law@cygnus.com) | |
12 | ||
13 | * am33.igen: Handle case where first DSP operation modifies a | |
14 | register used in the second DSP operation correctly. | |
15 | ||
16 | Tue Jul 28 10:10:25 1998 Jeffrey A Law (law@cygnus.com) | |
17 | ||
18 | * am33.igen: Detect cases where two operands must not match for | |
19 | DSP instructions too. | |
20 | ||
21 | Mon Jul 27 12:04:17 1998 Jeffrey A Law (law@cygnus.com) | |
22 | ||
23 | * am33.igen: Detect cases where two operands must not match in | |
24 | non-DSP instructions. | |
25 | ||
26 | end-sanitize-am33 | |
27 | Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com> | |
28 | ||
29 | * op_utils.c (do_syscall): Rewrite to use common/syscall.c. | |
30 | (syscall_read_mem, syscall_write_mem): New functions for syscall | |
31 | callbacks. | |
32 | * mn10300_sim.h: Add prototypes for syscall_read_mem and | |
33 | syscall_write_mem. | |
34 | * mn10300.igen: Change C++ style comments to C style comments. | |
35 | Check for divide by zero in div and divu ops. | |
36 | ||
37 | start-sanitize-am33 | |
38 | Fri Jul 24 12:49:28 1998 Jeffrey A Law (law@cygnus.com) | |
39 | ||
40 | * am33.igen (translate_xreg): New function. Use it as needed. | |
41 | ||
42 | Thu Jul 23 10:05:28 1998 Jeffrey A Law (law@cygnus.com) | |
43 | ||
44 | * am33.igen: Add some missing instructions. | |
45 | ||
46 | * am33.igen: Autoincrement loads/store fixes. | |
47 | ||
48 | Tue Jul 21 09:48:14 1998 Jeffrey A Law (law@cygnus.com) | |
49 | ||
50 | * am33.igen: Add mov_lCC DSP instructions. | |
51 | ||
52 | * am33.igen: Add most am33 DSP instructions. | |
53 | ||
54 | end-sanitize-am33 | |
55 | Thu Jul 9 10:06:55 1998 Jeffrey A Law (law@cygnus.com) | |
56 | ||
57 | * mn10300.igen: Fix Z bit for addc and subc instructions. | |
58 | Minor fixes in multiply/divide patterns. | |
59 | ||
60 | start-sanitize-am33 | |
61 | * am33.igen: Add missing mul[u] imm32,Rn. Fix condition code | |
62 | handling for many instructions. Fix sign extension for some | |
63 | 24bit immediates. | |
64 | ||
65 | * am33.igen: Fix Z bit for remaining addc/subc instructions. | |
66 | Do not sign extend immediate for mov imm,XRn. | |
67 | More random mul, mac & div fixes. | |
68 | Remove some unused variables. | |
69 | Sign extend 24bit displacement in memory addresses. | |
70 | ||
71 | * am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn. Various | |
72 | fixes to 2 register multiply, divide and mac instructions. Set | |
73 | Z,N correctly for sat16. Sign extend 24 bit immediate for add, | |
74 | and sub instructions. | |
75 | ||
76 | * am33.igen: Add remaining non-DSP instructions. | |
77 | end-sanitize-am33 | |
78 | ||
79 | start-sanitize-am33 | |
80 | Wed Jul 8 16:29:12 1998 Jeffrey A Law (law@cygnus.com) | |
81 | ||
82 | * am33.igen (translate_rreg): New function. Use it as appropriate. | |
83 | ||
84 | * am33.igen: More am33 instructions. Fix "div". | |
85 | ||
86 | Mon Jul 6 15:39:22 1998 Jeffrey A Law (law@cygnus.com) | |
87 | ||
88 | * mn10300.igen: Add am33 support. | |
89 | ||
90 | * Makefile.in: Use multi-sim to support both a mn10300 and am33 | |
91 | simulator. | |
92 | ||
93 | * am33.igen: Add many more am33 instructions. | |
94 | ||
95 | end-sanitize-am33 | |
96 | Wed Jul 1 17:07:09 1998 Jeffrey A Law (law@cygnus.com) | |
97 | ||
98 | * mn10300_sim.h (FETCH24): Define. | |
99 | ||
100 | start-sanitize-am33 | |
101 | * mn10300_sim.h: Add defines for some registers found on the AM33. | |
102 | * am33.igen: New file with some am33 support. | |
103 | end-sanitize-am33 | |
104 | ||
105 | Tue Jun 30 11:23:20 1998 Jeffrey A Law (law@cygnus.com) | |
106 | ||
107 | * mn10300_sim.h: Include bfd.h | |
108 | (struct state): Add more room for processor specific registers. | |
109 | start-sanitize-am33 | |
110 | (REG_E0): Define. | |
111 | end-sanitize-am33 | |
112 | ||
113 | start-sanitize-am30 | |
114 | Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com> | |
115 | ||
116 | * dv-mn103tim.c: Include sim-assert.h | |
117 | * dv-mn103ser.c (do_polling_event): Check for incoming data on | |
118 | serial line and schedule next polling event. | |
119 | (read_status_reg): schedule events to check for incoming data on | |
120 | serial line and issue interrupt if necessary. | |
121 | ||
122 | Fri Jun 19 16:47:27 1998 Joyce Janczyn <janczyn@cygnus.com> | |
123 | ||
124 | * interp.c (sim_open): hook up serial 1 and 2 ports properly (typo). | |
125 | ||
126 | Fri Jun 19 11:59:26 1998 Joyce Janczyn <janczyn@cygnus.com> | |
127 | ||
128 | * interp.c (board): Rename am32 to stdeval1 as this is the name | |
129 | consistently used to refer to the mn1030002 board. | |
130 | ||
131 | Thu June 18 14:37:14 1998 Joyce Janczyn <janczyn@cygnus.com> | |
132 | * interp.c (sim_open): Fix typo in address of EXTMD register | |
133 | (0x34000280, not 0x3400280). | |
134 | ||
135 | end-sanitize-am30 | |
136 | Wed Jun 17 18:00:18 1998 Jeffrey A Law (law@cygnus.com) | |
137 | ||
138 | * simops.c (syscall): Handle change in opcode # for syscall. | |
139 | * mn10300.igen (syscall): Likewise. | |
140 | ||
141 | start-sanitize-am30 | |
142 | Tue June 16 09:36:21 1998 Joyce Janczyn <janczyn@cygnus.com> | |
143 | * dv-mn103int.c (mn103int_finish): Regular interrupts (not NMI or | |
144 | reset) are not enabled on reset. | |
145 | ||
146 | Sun June 14 17:04:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
147 | * dv-mn103iop.c (write_*_reg): Check for attempt to write r/o | |
148 | register bits. | |
149 | * dv-mn103ser.c: Fill in methods for reading and writing to serial | |
150 | device registers. | |
151 | * interp.c (sim_open): Make the serial device a polling device. | |
152 | ||
153 | Fri June 12 16:24:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
154 | * dv-mn103iop.c: New file for handling am32 io ports. | |
155 | * configure.in: Add mn103iop to hw_device list. | |
156 | * configure: Re-generate. | |
157 | * interp.c (sim_open): Create io port device. | |
158 | ||
159 | Wed June 10 14:34:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
160 | * dv-mn103int.c (external_group): Use enumerated types to access | |
161 | correct group addresses. | |
162 | * dv-mn103tim.c (do_counter_event): Underflow of cascaded timer | |
163 | triggers an interrupt on the higher-numbered timer's port. | |
164 | ||
165 | end-sanitize-am30 | |
166 | Mon June 8 13:30:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
167 | * interp.c: (mn10300_option_handler): New function parses arguments | |
168 | using sim-options. | |
169 | start-sanitize-am30 | |
170 | * (board): Add --board option for specifying am32. | |
171 | * (sim_open): Create new timer and serial devices and control | |
172 | configuration of other am32 devices via board option. | |
173 | * dv-mn103tim.c, dv-mn103ser.c: New files for timers and serial devices. | |
174 | * dv-mn103cpu.c: Fix typos in opening comments. | |
175 | * dv-mn103int.c: Adjust interrupt controller settings for am32 instead of am30. | |
176 | * configure.in: Add mn103tim and mn103ser to hw_device list. | |
177 | * configure: Re-generate. | |
178 | end-sanitize-am30 | |
179 | ||
180 | start-sanitize-am30 | |
181 | Mon May 25 20:50:35 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
182 | ||
183 | * dv-mn103int.c, dv-mn103cpu.c: Rename *_callback to *_method. | |
184 | ||
185 | * dv-mn103cpu.c, dv-mn103int.c: Include hw-main.h and | |
186 | sim-main.h. Declare a struct hw_descriptor instead of struct | |
187 | hw_device_descriptor. | |
188 | ||
189 | Mon May 25 17:33:33 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
190 | ||
191 | * dv-mn103cpu.c (struct mn103cpu): Change type of pending_handler | |
192 | to struct hw_event. | |
193 | ||
194 | Fri May 22 12:17:41 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
195 | ||
196 | * configure.in (SIM_AC_OPTION_HARDWARE): Add argument "yes". | |
197 | ||
198 | Wed May 6 13:29:06 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
199 | ||
200 | * interp.c (sim_open): Create a polling PAL device. | |
201 | ||
202 | end-sanitize-am30 | |
203 | Fri May 1 16:39:15 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
204 | ||
205 | * dv-mn103int.c (mn103int_port_event): | |
206 | (mn103int_port_event): | |
207 | (mn103int_io_read_buffer): | |
208 | (mn103int_io_write_buffer): | |
209 | ||
210 | * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Drop CPU/CIA args. | |
211 | (mn103cpu_port_event): Ditto. | |
212 | (mn103cpu_io_read_buffer): Ditto. | |
213 | (mn103cpu_io_write_buffer): Ditto. | |
214 | ||
215 | Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com> | |
216 | ||
217 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
218 | ||
219 | Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche> | |
220 | ||
221 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
222 | * config.in: Ditto. | |
223 | ||
224 | Sun Apr 26 15:19:55 1998 Tom Tromey <tromey@cygnus.com> | |
225 | ||
226 | * acconfig.h: New file. | |
227 | * configure.in: Reverted change of Apr 24; use sinclude again. | |
228 | ||
229 | Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche> | |
230 | ||
231 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
232 | * config.in: Ditto. | |
233 | ||
234 | Fri Apr 24 11:19:07 1998 Tom Tromey <tromey@cygnus.com> | |
235 | ||
236 | * configure.in: Don't call sinclude. | |
237 | ||
238 | Tue Apr 14 10:03:02 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
239 | ||
240 | * mn10300_sim.h: Declare all functions in op_utils.c using | |
241 | INLINE_SIM_MAIN. | |
242 | * op_utils.c: Ditto. | |
243 | * sim-main.c: New file. Include op_utils.c. | |
244 | ||
245 | * mn10300.igen (mov, cmp): Use new igen operators `!' and `=' to | |
246 | differentiate between MOV/CMP immediate/register instructions. | |
247 | ||
248 | * configure.in (SIM_AC_OPTION_INLINE): Add and enable. | |
249 | * configure: Regenerate. | |
250 | ||
251 | Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
252 | ||
253 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
254 | ||
255 | start-sanitize-am30 | |
256 | Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
257 | ||
258 | * interp.c (hw): Delete variable, moved to SIM_DESC. | |
259 | (sim_open): Delete calls to hw_tree_create, hw_tree_finish. | |
260 | Handled by sim-module. | |
261 | (sim_open): Do not anotate tree with trace properties, handled by | |
262 | sim-hw.c | |
263 | (sim_open): Call sim_hw_parse instead of hw_tree_parse. | |
264 | ||
265 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
266 | ||
267 | end-sanitize-am30 | |
268 | start-sanitize-am30 | |
269 | Thu Mar 26 20:46:18 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk> | |
270 | ||
271 | * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Save the entire PC | |
272 | on the stack when delivering interrupts (not just the lower | |
273 | half)... | |
274 | * mn10300.igen (mov (Di,Am),Dn): Fix decode. Registers were | |
275 | specified in the wrong order. | |
276 | ||
277 | end-sanitize-am30 | |
278 | start-sanitize-am30 | |
279 | Fri Mar 27 00:56:40 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
280 | ||
281 | * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Stop loss of | |
282 | succeeding interrupts, clear pending_handler when the handler | |
283 | isn't re-scheduled. | |
284 | ||
285 | end-sanitize-am30 | |
286 | Thu Mar 26 10:11:01 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk> | |
287 | ||
288 | * Makefile.in (tmp-igen): Prefix all usage of move-if-change | |
289 | script with $(SHELL) to make NT native builds happy. | |
290 | * configure: Regenerate because of change to ../common/aclocal.m4. | |
291 | ||
292 | Thu Mar 26 11:22:31 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
293 | ||
294 | * configure.in: Make --enable-sim-common the default. | |
295 | * configure: Re-generate. | |
296 | ||
297 | * sim-main.h (CIA_GET, CIA_SET): Save/restore current instruction | |
298 | address into Sate.regs[REG_PC] instead of common struct. | |
299 | ||
300 | Wed Mar 25 17:42:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
301 | ||
302 | * mn10300.igen (cmp imm8,An): Do not sign extend imm8 value. | |
303 | ||
304 | Wed Mar 25 12:08:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
305 | ||
306 | * simops.c (OP_F0FD): Initialise variable 'sp'. | |
307 | ||
308 | start-sanitize-am30 | |
309 | Thu Mar 26 00:21:32 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
310 | ||
311 | * dv-mn103int.c (decode_group): A group register every 4 bytes not | |
312 | 8. | |
313 | (write_icr): Rewrite equation updating request field. | |
314 | (read_iagr): Fix check that interrupt is still pending. | |
315 | ||
316 | end-sanitize-am30 | |
317 | start-sanitize-am30 | |
318 | Wed Mar 25 16:14:50 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
319 | ||
320 | * interp.c (sim_open): Tidy up device creation. | |
321 | ||
322 | * dv-mn103int.c (mn103int_port_event): Drive NMI with non-zero | |
323 | value. | |
324 | (mn103int_io_read_buffer): Convert absolute address to register | |
325 | block offsets. | |
326 | (read_icr, write_icr): Convert block offset into group offset. | |
327 | ||
328 | end-sanitize-am30 | |
329 | Wed Mar 25 15:08:49 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
330 | ||
331 | * interp.c (sim_open): Create second 1mb memory region at | |
332 | 0x40000000. | |
333 | (sim_open): Create a device tree. | |
334 | (sim-hw.h): Include. | |
335 | start-sanitize-am30 | |
336 | (do_interrupt): Delete, needs to use dv-mn103cpu.c | |
337 | ||
338 | * dv-mn103int.c, dv-mn103cpu.c: New files. | |
339 | end-sanitize-am30 | |
340 | ||
341 | Wed Mar 25 08:47:38 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
342 | ||
343 | * mn10300_sim.h (EXTRACT_PSW_LM, INSERT_PSW_LM, PSW_IE, PSW_LM): | |
344 | Define. | |
345 | (SP): Define. | |
346 | ||
347 | Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
348 | ||
349 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
350 | ||
351 | Wed Mar 25 10:24:48 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
352 | ||
353 | * interp.c (sim-options.h): Include. | |
354 | (sim_kind, myname): Declare when not using common framework. | |
355 | ||
356 | * mn10300_sim.h (do_syscall, generic*): Provide prototypes for | |
357 | functions found in op_utils.c | |
358 | ||
359 | * mn10300.igen (add): Discard unused variables. | |
360 | ||
361 | * configure, config.in: Re-generate with autoconf 2.12.1. | |
362 | ||
363 | Tue Mar 24 15:27:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
364 | ||
365 | Add support for --enable-sim-common option. | |
366 | * Makefile.in (WITHOUT_COMMON_OBJS): Files included if | |
367 | ! --enable-sim-common | |
368 | (WITH_COMMON_OBJS): Files included if --enable-sim-common. | |
369 | (MN10300_OBJS,MN10300_INTERP_DEP): New variables. | |
370 | (SIM_OBJS): Rewrite. | |
371 | ({WITHOUT,WITH}_COMMON_RUN_OBJS,SIM_RUN_OBJS): New variables. | |
372 | (SIM_EXTRA_CFLAGS): New variable. | |
373 | (clean-extra): Clean up igen files. | |
374 | (../igen/igen,clean-igen,tmp-igen): New rules. | |
375 | * configure.in: Add support for common framework via | |
376 | --enable-sim-common. | |
377 | * configure: Regenerate. | |
378 | * interp.c: #include sim-main if WITH_COMMON, not mn10300_sim.h. | |
379 | (hash,dispatch,sim_size): Don't compile if ! WITH_COMMON. | |
380 | (init_system,sim_write,compare_simops): Likewise. | |
381 | (sim_set_profile,sim_set_profile_size): Likewise. | |
382 | (sim_stop,sim_resume,sim_trace,sim_info): Likewise. | |
383 | (sim_set_callbacks,sim_stop_reason,sim_read,sim_load): Likewise. | |
384 | (enum interrupt_type): New enum. | |
385 | (interrupt_names): New global. | |
386 | (do_interrupt): New function. | |
387 | (sim_open): Define differently if WITH_COMMON. | |
388 | (sim_close,sim_create_inferior,sim_do_command): Likewise. | |
389 | * mn10300_sim.h ({load,store}_{byte,half,word}): Define versions | |
390 | for WITH_COMMON. | |
391 | * mn10300.igen: New file. | |
392 | * mn10300.dc: New file. | |
393 | * op_utils.c: New file. | |
394 | * sim-main.h: New file. | |
395 | ||
396 | Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
397 | ||
398 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
399 | ||
400 | Fri Feb 27 18:36:04 1998 Jeffrey A Law (law@cygnus.com) | |
401 | ||
402 | * simops.c (inc): Fix typo. | |
403 | ||
404 | Wed Feb 25 01:59:29 1998 Jeffrey A Law (law@cygnus.com) | |
405 | ||
406 | * simops.c (signed multiply instructions): Cast input operands to | |
407 | signed32 before casting them to signed64 so that the sign bit | |
408 | is propagated properly. | |
409 | ||
410 | Mon Feb 23 20:23:19 1998 Mark Alexander <marka@cygnus.com> | |
411 | ||
412 | * Makefile.in: Last change was bad. Define NL_TARGET | |
413 | so that targ-vals.h will be used instead of syscall.h. | |
414 | * simops.c: Use targ-vals.h instead of syscall.h. | |
415 | (OP_F020): Disable unsupported system calls. | |
416 | ||
417 | Mon Feb 23 09:44:38 1998 Mark Alexander <marka@cygnus.com> | |
418 | ||
419 | * Makefile.in: Get header files from libgloss/mn10300/sys. | |
420 | ||
421 | Sun Feb 22 16:02:24 1998 Jeffrey A Law (law@cygnus.com) | |
422 | ||
423 | * simops.c: Include sim-types.h. | |
424 | ||
425 | Wed Feb 18 13:07:08 1998 Jeffrey A Law (law@cygnus.com) | |
426 | ||
427 | * simops.c (multiply instructions): Cast input operands to a | |
428 | signed64/unsigned64 type as appropriate. | |
429 | ||
430 | Tue Feb 17 12:47:16 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
431 | ||
432 | * interp.c (sim_store_register, sim_fetch_register): Pass in | |
433 | length parameter. Return -1. | |
434 | ||
435 | Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
436 | ||
437 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
438 | ||
439 | Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
440 | ||
441 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
442 | ||
443 | Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> | |
444 | ||
445 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
446 | ||
447 | Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
448 | ||
449 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
450 | * config.in: Ditto. | |
451 | ||
452 | Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> | |
453 | ||
454 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
455 | ||
456 | Tue Nov 11 10:38:52 1997 Jeffrey A Law (law@cygnus.com) | |
457 | ||
458 | * simops.c (call:16 call:32): Stack adjustment is determined solely | |
459 | by the imm8 field. | |
460 | ||
461 | Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
462 | ||
463 | * interp.c (sim_load): Pass lma_p and sim_write args to | |
464 | sim_load_file. | |
465 | ||
466 | Tue Oct 21 10:12:03 1997 Jeffrey A Law (law@cygnus.com) | |
467 | ||
468 | * simops.c: Correctly handle register restores for "ret" and "retf" | |
469 | instructions. | |
470 | ||
471 | Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
472 | ||
473 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
474 | ||
475 | Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
476 | ||
477 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
478 | ||
479 | Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
480 | ||
481 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
482 | ||
483 | Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
484 | ||
485 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
486 | ||
487 | Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
488 | ||
489 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
490 | ||
491 | Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
492 | ||
493 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
494 | ||
495 | Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> | |
496 | ||
497 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
498 | ||
499 | Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
500 | ||
501 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
502 | * config.in: Ditto. | |
503 | ||
504 | Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
505 | ||
506 | * interp.c (sim_kill): Delete. | |
507 | (sim_create_inferior): Add ABFD argument. | |
508 | (sim_load): Move setting of PC from here. | |
509 | (sim_create_inferior): To here. | |
510 | ||
511 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
512 | ||
513 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
514 | * config.in: Ditto. | |
515 | ||
516 | Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
517 | ||
518 | * interp.c (sim_open): Add ABFD argument. | |
519 | ||
520 | Tue Jun 24 13:46:20 1997 Jeffrey A Law (law@cygnus.com) | |
521 | ||
522 | * interp.c (sim_resume): Clear State.exited. | |
523 | (sim_stop_reason): If State.exited is nonzero, then indicate that | |
524 | the simulator exited instead of stopped. | |
525 | * mn10300_sim.h (struct _state): Add exited field. | |
526 | * simops.c (syscall): Set State.exited for SYS_exit. | |
527 | ||
528 | Wed Jun 11 22:07:56 1997 Jeffrey A Law (law@cygnus.com) | |
529 | ||
530 | * simops.c: Fix thinko in last change. | |
531 | ||
532 | Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com) | |
533 | ||
534 | * simops.c: "call" stores the callee saved registers into the | |
535 | stack! Update the stack pointer properly when done with | |
536 | register saves. | |
537 | ||
538 | * simops.c: Fix return address computation for "call" instructions. | |
539 | ||
540 | Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com) | |
541 | ||
542 | * interp.c (sim_open): Fix typo. | |
543 | ||
544 | Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com) | |
545 | ||
546 | * interp.c (sim_resume): Add missing case in big switch | |
547 | statement (for extb instruction). | |
548 | ||
549 | Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com) | |
550 | ||
551 | * interp.c: Replace all references to load_mem and store_mem | |
552 | with references to load_byte, load_half, load_3_byte, load_word | |
553 | and store_byte, store_half, store_3_byte, store_word. | |
554 | (INLINE): Delete definition. | |
555 | (load_mem_big): Likewise. | |
556 | (max_mem): Make it global. | |
557 | (dispatch): Make this function inline. | |
558 | (load_mem, store_mem): Delete functions. | |
559 | * mn10300_sim.h (INLINE): Define. | |
560 | (RLW): Delete unused definition. | |
561 | (load_mem, store_mem): Delete declarations. | |
562 | (load_mem_big): New definition. | |
563 | (load_byte, load_half, load_3_byte, load_word): New functions. | |
564 | (store_byte, store_half, store_3_byte, store_word): New functions. | |
565 | * simops.c: Replace all references to load_mem and store_mem | |
566 | with references to load_byte, load_half, load_3_byte, load_word | |
567 | and store_byte, store_half, store_3_byte, store_word. | |
568 | ||
569 | Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
570 | ||
571 | * interp.c (sim_open): Add callback to arguments. | |
572 | (sim_set_callbacks): Delete SIM_DESC argument. | |
573 | ||
574 | Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com) | |
575 | ||
576 | * interp.c (dispatch): Make this an inline function. | |
577 | ||
578 | * simops.c (syscall): Use callback->write regardless of | |
579 | what file descriptor we're writing too. | |
580 | ||
581 | Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com) | |
582 | ||
583 | * interp.c (load_mem_big): Remove function. It's now a macro | |
584 | defined elsewhere. | |
585 | (compare_simops): New function. | |
586 | (sim_open): Sort the Simops table before inserting entries | |
587 | into the hash table. | |
588 | * mn10300_sim.h: Remove unused #defines. | |
589 | (load_mem_big): Define. | |
590 | ||
591 | Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com) | |
592 | ||
593 | * interp.c (load_mem): If we get a load from an out of range | |
594 | address, abort. | |
595 | (store_mem): Likewise for stores. | |
596 | (max_mem): New variable. | |
597 | ||
598 | Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com) | |
599 | ||
600 | * mn10300_sim.h: Fix ordering of bits in the PSW. | |
601 | ||
602 | * interp.c: Improve hashing routine to avoid long list | |
603 | traversals for common instructions. Add HASH_STAT support. | |
604 | Rewrite opcode dispatch code using a big switch instead of | |
605 | cascaded if/else statements. Avoid useless calls to load_mem. | |
606 | ||
607 | Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com) | |
608 | ||
609 | * mn10300_sim.h (struct _state): Add space for mdrq register. | |
610 | (REG_MDRQ): Define. | |
611 | * simops.c: Don't abort for trap. Add support for the extended | |
612 | instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24", | |
613 | and "bsch". | |
614 | ||
615 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> | |
616 | ||
617 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
618 | ||
619 | Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
620 | ||
621 | * interp.c (sim_stop): Add stub function. | |
622 | ||
623 | Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com> | |
624 | ||
625 | * Makefile.in (SIM_OBJS): Add sim-load.o. | |
626 | * interp.c (sim_kind, myname): New static locals. | |
627 | (sim_open): Set sim_kind, myname. Ignore -E arg. | |
628 | (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to | |
629 | load file into simulator. Set start address from bfd. | |
630 | (sim_create_inferior): Return SIM_RC. Delete arg start_address. | |
631 | ||
632 | Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
633 | ||
634 | * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime | |
635 | only include if implemented by host. | |
636 | (OP_F020): Typecast arg passed to time function; | |
637 | ||
638 | Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com) | |
639 | ||
640 | * simops.c (syscall): Handle new mn10300 calling conventions. | |
641 | ||
642 | Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
643 | ||
644 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
645 | * config.in: Ditto. | |
646 | ||
647 | Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com> | |
648 | ||
649 | * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match | |
650 | corresponding change in opcodes directory. | |
651 | ||
652 | Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> | |
653 | ||
654 | * interp.c (sim_open): New arg `kind'. | |
655 | ||
656 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
657 | ||
658 | Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
659 | ||
660 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
661 | ||
662 | Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com) | |
663 | ||
664 | * simops.c: Fix register extraction for a two "movbu" variants. | |
665 | Somewhat simplify "sub" instructions. | |
666 | Correctly sign extend operands for "mul". Put the correct | |
667 | half of the result in MDR for "mul" and "mulu". | |
668 | Implement remaining instructions. | |
669 | Tweak opcode for "syscall". | |
670 | ||
671 | Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com) | |
672 | ||
673 | * simops.c: Do syscall emulation in "syscall" instruction. Add | |
674 | dummy "trap" instruction. | |
675 | ||
676 | Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
677 | ||
678 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
679 | ||
680 | Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
681 | ||
682 | * configure: Re-generate. | |
683 | ||
684 | Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com> | |
685 | ||
686 | * configure: Regenerate to track ../common/aclocal.m4 changes. | |
687 | ||
688 | Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com> | |
689 | ||
690 | * interp.c (sim_open): New SIM_DESC result. Argument is now | |
691 | in argv form. | |
692 | (other sim_*): New SIM_DESC argument. | |
693 | ||
694 | Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com) | |
695 | ||
696 | * simops.c: Fix carry bit computation for "add" instructions. | |
697 | ||
698 | * simops.c: Fix typos in bset insns. Fix arguments to store_mem | |
699 | for bset imm8,(d8,an) and bclr imm8,(d8,an). | |
700 | ||
701 | Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com) | |
702 | ||
703 | * simops.c: Fix register references when computing Z and N bits | |
704 | for lsr imm8,dn. | |
705 | ||
706 | Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com> | |
707 | ||
708 | * Makefile.in (@COMMON_MAKEFILE_FRAG): Use | |
709 | COMMON_{PRE,POST}_CONFIG_FRAG instead. | |
710 | * configure.in: sinclude ../common/aclocal.m4. | |
711 | * configure: Regenerated. | |
712 | ||
713 | Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com) | |
714 | ||
715 | * interp.c (init_system): Allocate 2^19 bytes of space for the | |
716 | simulator. | |
717 | ||
718 | Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com) | |
719 | ||
720 | * configure configure.in Makefile.in: Update to new configure | |
721 | scheme which is more compatible with WinGDB builds. | |
722 | * configure.in: Improve comment on how to run autoconf. | |
723 | * configure: Re-run autoconf to get new ../common/aclocal.m4. | |
724 | * Makefile.in: Use autoconf substitution to install common | |
725 | makefile fragment. | |
726 | ||
727 | Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com) | |
728 | ||
729 | * simops.c: Undo last change to "rol" and "ror", original code | |
730 | was correct! | |
731 | ||
732 | Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com) | |
733 | ||
734 | * simops.c: Fix "rol" and "ror". | |
735 | ||
736 | Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com) | |
737 | ||
738 | * simops.c: Fix typo in last change. | |
739 | ||
740 | Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com) | |
741 | ||
742 | * simops.c: Use REG macros in few places not using them yet. | |
743 | ||
744 | Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com) | |
745 | ||
746 | * mn10300_sim.h (struct _state): Fix number of registers! | |
747 | ||
748 | Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com) | |
749 | ||
750 | * mn10300_sim.h (struct _state): Put all registers into a single | |
751 | array to make gdb implementation easier. | |
752 | (REG_*): Add definitions for all registers in the state array. | |
753 | (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros. | |
754 | * simops.c: Related changes. | |
755 | ||
756 | Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com) | |
757 | ||
758 | * interp.c (sim_resume): Handle 0xff as a single byte insn. | |
759 | ||
760 | * simops.c: Fix overflow computation for "add" and "inc" | |
761 | instructions. | |
762 | ||
763 | Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com) | |
764 | ||
765 | * simops.c: Handle "break" instruction. | |
766 | ||
767 | * simops.c: Fix restoring the PC for "ret" and "retf" instructions. | |
768 | ||
769 | Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com) | |
770 | ||
771 | * gencode.c (write_opcodes): Also write out the format of the | |
772 | opcode. | |
773 | * mn10300_sim.h (simops): Add "format" field. | |
774 | * interp.c (sim_resume): Deal with endianness issues here. | |
775 | ||
776 | Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com) | |
777 | ||
778 | * simops.c (REG0_4): Define. | |
779 | Use REG0_4 for indexed loads/stores. | |
780 | ||
781 | Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com) | |
782 | ||
783 | * simops.c (REG0_16): Fix typo. | |
784 | ||
785 | Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com) | |
786 | ||
787 | * simops.c: Call abort for any instruction that's not currently | |
788 | simulated. | |
789 | ||
790 | * simops.c: Define accessor macros to extract register | |
791 | values from instructions. Use them consistently. | |
792 | ||
793 | * interp.c: Delete unused global variable "OP". | |
794 | (sim_resume): Remove unused variable "opcode". | |
795 | * simops.c: Fix some uninitialized variable problems, add | |
796 | parens to fix various -Wall warnings. | |
797 | ||
798 | * gencode.c (write_header): Add "insn" and "extension" arguments | |
799 | to the OP_* declarations. | |
800 | (write_template): Similarly for function templates. | |
801 | * interp.c (insn, extension): Remove global variables. Instead | |
802 | pass them as arguments to the OP_* functions. | |
803 | * mn10300_sim.h: Remove decls for "insn" and "extension". | |
804 | * simops.c (OP_*): Accept "insn" and "extension" as arguments | |
805 | instead of using globals. | |
806 | ||
807 | Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com) | |
808 | ||
809 | * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)" | |
810 | ||
811 | * simops.c: Fix thinkos in last change to "inc dn". | |
812 | ||
813 | Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com) | |
814 | ||
815 | * simops.c: "add imm,sp" does not effect the condition codes. | |
816 | "inc dn" does effect the condition codes. | |
817 | ||
818 | Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com) | |
819 | ||
820 | * simops.c: Treat both operands as signed values for | |
821 | "div" instruction. | |
822 | ||
823 | * simops.c: Fix simulation of division instructions. | |
824 | Fix typos/thinkos in several "cmp" and "sub" instructions. | |
825 | ||
826 | Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com) | |
827 | ||
828 | * simops.c: Fix carry bit handling in "sub" and "cmp" | |
829 | instructions. | |
830 | ||
831 | * simops.c: Fix "mov imm8,an" and "mov imm16,dn". | |
832 | ||
833 | Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com) | |
834 | ||
835 | * simops.c: Fix overflow computation for many instructions. | |
836 | ||
837 | * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)". | |
838 | ||
839 | * simops.c: Fix "mov am, dn". | |
840 | ||
841 | * simops.c: Fix more bugs in "add imm,an" and | |
842 | "add imm,dn". | |
843 | ||
844 | Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com) | |
845 | ||
846 | * simops.c: Fix bugs in "movm" and "add imm,an". | |
847 | ||
848 | * simops.c: Don't lose the upper 24 bits of the return | |
849 | pointer in "call" and "calls" instructions. Rough cut | |
850 | at emulated system calls. | |
851 | ||
852 | * simops.c: Implement the remaining 5, 6 and 7 byte instructions. | |
853 | ||
854 | * simops.c: Implement remaining 4 byte instructions. | |
855 | ||
856 | * simops.c: Implement remaining 3 byte instructions. | |
857 | ||
858 | * simops.c: Implement remaining 2 byte instructions. Call | |
859 | abort for instructions we're not implementing now. | |
860 | ||
861 | Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com) | |
862 | ||
863 | * simops.c: Implement lots of random instructions. | |
864 | ||
865 | * simops.c: Implement "movm" and "bCC" insns. | |
866 | ||
867 | * mn10300_sim.h (_state): Add another register (MDR). | |
868 | (REG_MDR): Define. | |
869 | * simops.c: Implement "cmp", "calls", "rets", "jmp" and | |
870 | a few additional random insns. | |
871 | ||
872 | * mn10300_sim.h (PSW_*): Define for CC status tracking. | |
873 | (REG_D0, REG_A0, REG_SP): Define. | |
874 | * simops.c: Implement "add", "addc" and a few other random | |
875 | instructions. | |
876 | ||
877 | * gencode.c, interp.c: Snapshot current simulator code. | |
878 | ||
879 | Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com) | |
880 | ||
881 | * Makefile.in, config.in, configure, configure.in: New files. | |
882 | * gencode.c, interp.c, mn10300_sim.h, simops.c: New files. | |
883 |