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1 /**
2 * @file IxEthAccQueueAssign_p.h
3 *
4 * @author Intel Corporation
5 * @date 06-Mar-2002
6 *
7 * @brief Mapping from QMgr Q's to internal assignment
8 *
9 * Design Notes:
10 *
11 *
12 * @par
13 * IXP400 SW Release version 2.0
14 *
15 * -- Copyright Notice --
16 *
17 * @par
18 * Copyright 2001-2005, Intel Corporation.
19 * All rights reserved.
20 *
21 * @par
22 * Redistribution and use in source and binary forms, with or without
23 * modification, are permitted provided that the following conditions
24 * are met:
25 * 1. Redistributions of source code must retain the above copyright
26 * notice, this list of conditions and the following disclaimer.
27 * 2. Redistributions in binary form must reproduce the above copyright
28 * notice, this list of conditions and the following disclaimer in the
29 * documentation and/or other materials provided with the distribution.
30 * 3. Neither the name of the Intel Corporation nor the names of its contributors
31 * may be used to endorse or promote products derived from this software
32 * without specific prior written permission.
33 *
34 * @par
35 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
36 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
37 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
38 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
39 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
40 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
41 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
42 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
43 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
44 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
45 * SUCH DAMAGE.
46 *
47 * @par
48 * -- End of Copyright Notice --
49 */
50
51 /**
52 * @addtogroup IxEthAccPri
53 *@{
54 */
55
56 /*
57 * Os/System dependancies.
58 */
59 #include "IxOsal.h"
60
61 /*
62 * Intermodule dependancies
63 */
64 #include "IxQMgr.h"
65 #include "IxQueueAssignments.h"
66
67 /* Check range of Q's assigned to this component. */
68 #if IX_ETH_ACC_RX_FRAME_ETH_Q >= (IX_QMGR_MIN_QUEUPP_QID ) | \
69 IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \
70 IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \
71 IX_ETH_ACC_TX_FRAME_ENET0_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \
72 IX_ETH_ACC_TX_FRAME_ENET1_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \
73 IX_ETH_ACC_TX_FRAME_DONE_ETH_Q >= (IX_QMGR_MIN_QUEUPP_QID)
74 #error "Not all Ethernet Access Queues are betweem 1-31, requires full functionalty Q's unless otherwise validated "
75 #endif
76
77 /**
78 *
79 * @typedef IxEthAccQregInfo
80 *
81 * @brief
82 *
83 */
84 typedef struct
85 {
86 IxQMgrQId qId;
87 char *qName;
88 IxQMgrCallback qCallback;
89 IxQMgrCallbackId callbackTag;
90 IxQMgrQSizeInWords qSize;
91 IxQMgrQEntrySizeInWords qWords;
92 BOOL qNotificationEnableAtStartup;
93 IxQMgrSourceId qConditionSource;
94 IxQMgrWMLevel AlmostEmptyThreshold;
95 IxQMgrWMLevel AlmostFullThreshold;
96
97 } IxEthAccQregInfo;
98
99 /*
100 * Prototypes for all QM callbacks.
101 */
102
103 /*
104 * Rx Callbacks
105 */
106 IX_ETH_ACC_PUBLIC
107 void ixEthRxFrameQMCallback(IxQMgrQId, IxQMgrCallbackId);
108
109 IX_ETH_ACC_PUBLIC
110 void ixEthRxMultiBufferQMCallback(IxQMgrQId, IxQMgrCallbackId);
111
112 IX_ETH_ACC_PUBLIC
113 void ixEthRxFreeQMCallback(IxQMgrQId, IxQMgrCallbackId);
114
115 /*
116 * Tx Callback.
117 */
118 IX_ETH_ACC_PUBLIC
119 void ixEthTxFrameQMCallback(IxQMgrQId, IxQMgrCallbackId);
120
121 IX_ETH_ACC_PUBLIC
122 void ixEthTxFrameDoneQMCallback(IxQMgrQId, IxQMgrCallbackId );
123
124
125 #define IX_ETH_ACC_QM_QUEUE_DISPATCH_PRIORITY (IX_QMGR_Q_PRIORITY_0) /* Highest priority */
126
127 /*
128 * Queue watermarks
129 */
130 #define IX_ETH_ACC_RX_FRAME_ETH_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_NOT_E )
131 #define IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
132 #define IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
133 #define IX_ETH_ACC_RX_FREE_BUFF_ENET2_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
134 #define IX_ETH_ACC_TX_FRAME_ENET0_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
135 #define IX_ETH_ACC_TX_FRAME_ENET1_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
136 #define IX_ETH_ACC_TX_FRAME_ENET2_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
137 #define IX_ETH_ACC_TX_FRAME_DONE_ETH_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_NOT_E )