arch/arm/cpu/tegra-common/board.c

   1 /*
   2  *  (C) Copyright 2010,2011
   3  *  NVIDIA Corporation <www.nvidia.com>
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <asm/io.h>
  26 #include <asm/arch/clock.h>
  27 #include <asm/arch/funcmux.h>
  28 #include <asm/arch/pmc.h>
  29 #include <asm/arch/sys_proto.h>
  30 #include <asm/arch/tegra20.h>
  31 #include <asm/arch/warmboot.h>
  32
  33 DECLARE_GLOBAL_DATA_PTR;
  34
  35 enum {
  36         /* UARTs which we can enable */
  37         UARTA   = 1 << 0,
  38         UARTB   = 1 << 1,
  39         UARTD   = 1 << 3,
  40         UART_COUNT = 4,
  41 };
  42
  43 /*
  44  * Boot ROM initializes the odmdata in APBDEV_PMC_SCRATCH20_0,
  45  * so we are using this value to identify memory size.
  46  */
  47
  48 unsigned int query_sdram_size(void)
  49 {
  50         struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
  51         u32 reg;
  52
  53         reg = readl(&pmc->pmc_scratch20);
  54         debug("pmc->pmc_scratch20 (ODMData) = 0x%08x\n", reg);
  55
  56         /* bits 31:28 in OdmData are used for RAM size  */
  57         switch ((reg) >> 28) {
  58         case 1:
  59                 return 0x10000000;      /* 256 MB */
  60         case 2:
  61         default:
  62                 return 0x20000000;      /* 512 MB */
  63         case 3:
  64                 return 0x40000000;      /* 1GB */
  65         }
  66 }
  67
  68 int dram_init(void)
  69 {
  70         /* We do not initialise DRAM here. We just query the size */
  71         gd->ram_size = query_sdram_size();
  72         return 0;
  73 }
  74
  75 #ifdef CONFIG_DISPLAY_BOARDINFO
  76 int checkboard(void)
  77 {
  78         printf("Board: %s\n", sysinfo.board_string);
  79         return 0;
  80 }
  81 #endif  /* CONFIG_DISPLAY_BOARDINFO */
  82
  83 static int uart_configs[] = {
  84 #if defined(CONFIG_TEGRA_UARTA_UAA_UAB)
  85         FUNCMUX_UART1_UAA_UAB,
  86 #elif defined(CONFIG_TEGRA_UARTA_GPU)
  87         FUNCMUX_UART1_GPU,
  88 #elif defined(CONFIG_TEGRA_UARTA_SDIO1)
  89         FUNCMUX_UART1_SDIO1,
  90 #else
  91         FUNCMUX_UART1_IRRX_IRTX,
  92 #endif
  93         FUNCMUX_UART2_IRDA,
  94         -1,
  95         FUNCMUX_UART4_GMC,
  96         -1,
  97 };
  98
  99 /**
 100  * Set up the specified uarts
 101  *
 102  * @param uarts_ids     Mask containing UARTs to init (UARTx)
 103  */
 104 static void setup_uarts(int uart_ids)
 105 {
 106         static enum periph_id id_for_uart[] = {
 107                 PERIPH_ID_UART1,
 108                 PERIPH_ID_UART2,
 109                 PERIPH_ID_UART3,
 110                 PERIPH_ID_UART4,
 111         };
 112         size_t i;
 113
 114         for (i = 0; i < UART_COUNT; i++) {
 115                 if (uart_ids & (1 << i)) {
 116                         enum periph_id id = id_for_uart[i];
 117
 118                         funcmux_select(id, uart_configs[i]);
 119                         clock_ll_start_uart(id);
 120                 }
 121         }
 122 }
 123
 124 void board_init_uart_f(void)
 125 {
 126         int uart_ids = 0;       /* bit mask of which UART ids to enable */
 127
 128 #ifdef CONFIG_TEGRA_ENABLE_UARTA
 129         uart_ids |= UARTA;
 130 #endif
 131 #ifdef CONFIG_TEGRA_ENABLE_UARTB
 132         uart_ids |= UARTB;
 133 #endif
 134 #ifdef CONFIG_TEGRA_ENABLE_UARTD
 135         uart_ids |= UARTD;
 136 #endif
 137         setup_uarts(uart_ids);
 138 }
 139
 140 #ifndef CONFIG_SYS_DCACHE_OFF
 141 void enable_caches(void)
 142 {
 143         /* Enable D-cache. I-cache is already enabled in start.S */
 144         dcache_enable();
 145 }
 146 #endif