arch/arm/imx-common/spl.c

   1 /*
   2  * Copyright (C) 2014 Gateworks Corporation
   3  * Copyright (C) 2011-2012 Freescale Semiconductor, Inc.
   4  *
   5  * Author: Tim Harvey <tharvey@gateworks.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <common.h>
  11 #include <asm/io.h>
  12 #include <asm/arch/imx-regs.h>
  13 #include <asm/spl.h>
  14 #include <spl.h>
  15
  16 #if defined(CONFIG_MX6)
  17 /* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */
  18 u32 spl_boot_device(void)
  19 {
  20         struct src *psrc = (struct src *)SRC_BASE_ADDR;
  21         unsigned int gpr10_boot = readl(&psrc->gpr10) & (1 << 28);
  22         unsigned reg = gpr10_boot ? readl(&psrc->gpr9) : readl(&psrc->sbmr1);
  23         unsigned int bmode = readl(&psrc->sbmr2);
  24
  25         /*
  26          * Check for BMODE if serial downloader is enabled
  27          * BOOT_MODE - see IMX6DQRM Table 8-1
  28          */
  29         if ((((bmode >> 24) & 0x03)  == 0x01) || /* Serial Downloader */
  30                 (gpr10_boot && (reg == 1)))
  31                 return BOOT_DEVICE_UART;
  32         /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
  33         switch ((reg & 0x000000FF) >> 4) {
  34          /* EIM: See 8.5.1, Table 8-9 */
  35         case 0x0:
  36                 /* BOOT_CFG1[3]: NOR/OneNAND Selection */
  37                 if ((reg & 0x00000008) >> 3)
  38                         return BOOT_DEVICE_ONENAND;
  39                 else
  40                         return BOOT_DEVICE_NOR;
  41                 break;
  42         /* SATA: See 8.5.4, Table 8-20 */
  43         case 0x2:
  44                 return BOOT_DEVICE_SATA;
  45         /* Serial ROM: See 8.5.5.1, Table 8-22 */
  46         case 0x3:
  47                 /* BOOT_CFG4[2:0] */
  48                 switch ((reg & 0x07000000) >> 24) {
  49                 case 0x0 ... 0x4:
  50                         return BOOT_DEVICE_SPI;
  51                 case 0x5 ... 0x7:
  52                         return BOOT_DEVICE_I2C;
  53                 }
  54                 break;
  55         /* SD/eSD: 8.5.3, Table 8-15  */
  56         case 0x4:
  57         case 0x5:
  58                 return BOOT_DEVICE_MMC1;
  59         /* MMC/eMMC: 8.5.3 */
  60         case 0x6:
  61         case 0x7:
  62                 return BOOT_DEVICE_MMC1;
  63         /* NAND Flash: 8.5.2 */
  64         case 0x8 ... 0xf:
  65                 return BOOT_DEVICE_NAND;
  66         }
  67         return BOOT_DEVICE_NONE;
  68 }
  69 #endif
  70
  71 #if defined(CONFIG_SPL_MMC_SUPPORT)
  72 /* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */
  73 u32 spl_boot_mode(const u32 boot_device)
  74 {
  75         switch (spl_boot_device()) {
  76         /* for MMC return either RAW or FAT mode */
  77         case BOOT_DEVICE_MMC1:
  78         case BOOT_DEVICE_MMC2:
  79 #if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
  80                 return MMCSD_MODE_FS;
  81 #elif defined(CONFIG_SUPPORT_EMMC_BOOT)
  82                 return MMCSD_MODE_EMMCBOOT;
  83 #else
  84                 return MMCSD_MODE_RAW;
  85 #endif
  86                 break;
  87         default:
  88                 puts("spl: ERROR:  unsupported device\n");
  89                 hang();
  90         }
  91 }
  92 #endif