arch/arm/include/asm/arch-mxs/regs-base.h

   1 /*
   2  * Freescale i.MX23/i.MX28 Peripheral Base Addresses
   3  *
   4  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
   5  * on behalf of DENX Software Engineering GmbH
   6  *
   7  * Based on code from LTIB:
   8  * Copyright (C) 2008 Embedded Alley Solutions Inc.
   9  *
  10  * (C) Copyright 2009-2010 Freescale Semiconductor, Inc.
  11  *
  12  * SPDX-License-Identifier:     GPL-2.0+
  13  */
  14
  15 #ifndef __MXS_REGS_BASE_H__
  16 #define __MXS_REGS_BASE_H__
  17
  18 /*
  19  * Register base addresses for i.MX23
  20  */
  21 #if defined(CONFIG_MX23)
  22 #define MXS_ICOLL_BASE          0x80000000
  23 #define MXS_APBH_BASE           0x80004000
  24 #define MXS_ECC8_BASE           0x80008000
  25 #define MXS_BCH_BASE            0x8000A000
  26 #define MXS_GPMI_BASE           0x8000C000
  27 #define MXS_SSP0_BASE           0x80010000
  28 #define MXS_SSP1_BASE           0x80034000
  29 #define MXS_ETM_BASE            0x80014000
  30 #define MXS_PINCTRL_BASE        0x80018000
  31 #define MXS_DIGCTL_BASE         0x8001C000
  32 #define MXS_EMI_BASE            0x80020000
  33 #define MXS_APBX_BASE           0x80024000
  34 #define MXS_DCP_BASE            0x80028000
  35 #define MXS_PXP_BASE            0x8002A000
  36 #define MXS_OCOTP_BASE          0x8002C000
  37 #define MXS_AXI_BASE            0x8002E000
  38 #define MXS_LCDIF_BASE          0x80030000
  39 #define MXS_SSP1_BASE           0x80034000
  40 #define MXS_TVENC_BASE          0x80038000
  41 #define MXS_CLKCTRL_BASE        0x80040000
  42 #define MXS_SAIF0_BASE          0x80042000
  43 #define MXS_POWER_BASE          0x80044000
  44 #define MXS_SAIF1_BASE          0x80046000
  45 #define MXS_AUDIOOUT_BASE       0x80048000
  46 #define MXS_AUDIOIN_BASE        0x8004C000
  47 #define MXS_LRADC_BASE          0x80050000
  48 #define MXS_SPDIF_BASE          0x80054000
  49 #define MXS_I2C0_BASE           0x80058000
  50 #define MXS_RTC_BASE            0x8005C000
  51 #define MXS_PWM_BASE            0x80064000
  52 #define MXS_TIMROT_BASE         0x80068000
  53 #define MXS_UARTAPP0_BASE       0x8006C000
  54 #define MXS_UARTAPP1_BASE       0x8006E000
  55 #define MXS_UARTDBG_BASE        0x80070000
  56 #define MXS_USBPHY0_BASE        0x8007C000
  57 #define MXS_USBCTRL0_BASE       0x80080000
  58 #define MXS_DRAM_BASE           0x800E0000
  59
  60 /*
  61  * Register base addresses for i.MX28
  62  */
  63 #elif defined(CONFIG_MX28)
  64 #define MXS_ICOL_BASE           0x80000000
  65 #define MXS_HSADC_BASE          0x80002000
  66 #define MXS_APBH_BASE           0x80004000
  67 #define MXS_PERFMON_BASE        0x80006000
  68 #define MXS_BCH_BASE            0x8000A000
  69 #define MXS_GPMI_BASE           0x8000C000
  70 #define MXS_SSP0_BASE           0x80010000
  71 #define MXS_SSP1_BASE           0x80012000
  72 #define MXS_SSP2_BASE           0x80014000
  73 #define MXS_SSP3_BASE           0x80016000
  74 #define MXS_PINCTRL_BASE        0x80018000
  75 #define MXS_DIGCTL_BASE         0x8001C000
  76 #define MXS_ETM_BASE            0x80022000
  77 #define MXS_APBX_BASE           0x80024000
  78 #define MXS_DCP_BASE            0x80028000
  79 #define MXS_PXP_BASE            0x8002A000
  80 #define MXS_OCOTP_BASE          0x8002C000
  81 #define MXS_AXI_AHB0_BASE       0x8002E000
  82 #define MXS_LCDIF_BASE          0x80030000
  83 #define MXS_CAN0_BASE           0x80032000
  84 #define MXS_CAN1_BASE           0x80034000
  85 #define MXS_SIMDBG_BASE         0x8003C000
  86 #define MXS_SIMGPMISEL_BASE     0x8003C200
  87 #define MXS_SIMSSPSEL_BASE      0x8003C300
  88 #define MXS_SIMMEMSEL_BASE      0x8003C400
  89 #define MXS_GPIOMON_BASE        0x8003C500
  90 #define MXS_SIMENET_BASE        0x8003C700
  91 #define MXS_ARMJTAG_BASE        0x8003C800
  92 #define MXS_CLKCTRL_BASE        0x80040000
  93 #define MXS_SAIF0_BASE          0x80042000
  94 #define MXS_POWER_BASE          0x80044000
  95 #define MXS_SAIF1_BASE          0x80046000
  96 #define MXS_LRADC_BASE          0x80050000
  97 #define MXS_SPDIF_BASE          0x80054000
  98 #define MXS_RTC_BASE            0x80056000
  99 #define MXS_I2C0_BASE           0x80058000
 100 #define MXS_I2C1_BASE           0x8005A000
 101 #define MXS_PWM_BASE            0x80064000
 102 #define MXS_TIMROT_BASE         0x80068000
 103 #define MXS_UARTAPP0_BASE       0x8006A000
 104 #define MXS_UARTAPP1_BASE       0x8006C000
 105 #define MXS_UARTAPP2_BASE       0x8006E000
 106 #define MXS_UARTAPP3_BASE       0x80070000
 107 #define MXS_UARTAPP4_BASE       0x80072000
 108 #define MXS_UARTDBG_BASE        0x80074000
 109 #define MXS_USBPHY0_BASE        0x8007C000
 110 #define MXS_USBPHY1_BASE        0x8007E000
 111 #define MXS_USBCTRL0_BASE       0x80080000
 112 #define MXS_USBCTRL1_BASE       0x80090000
 113 #define MXS_DFLPT_BASE          0x800C0000
 114 #define MXS_DRAM_BASE           0x800E0000
 115 #define MXS_ENET0_BASE          0x800F0000
 116 #define MXS_ENET1_BASE          0x800F4000
 117 #else
 118 #error Unkown SoC. Please set CONFIG_MX23 or CONFIG_MX28
 119 #endif
 120
 121 #endif /* __MXS_REGS_BASE_H__ */