arch/arm/include/asm/arch-s3c24x0/iomux.h

   1 /*
   2  * Copyright (c) 2012
   3  *
   4  * Gabriel Huau <contact@huau-gabriel.fr>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef _S3C24X0_IOMUX_H_
  10 #define _S3C24X0_IOMUX_H_
  11
  12 enum s3c2440_iomux_func {
  13         /* PORT A */
  14         IOMUXA_ADDR0    = 1,
  15         IOMUXA_ADDR16   = (1 << 1),
  16         IOMUXA_ADDR17   = (1 << 2),
  17         IOMUXA_ADDR18   = (1 << 3),
  18         IOMUXA_ADDR19   = (1 << 4),
  19         IOMUXA_ADDR20   = (1 << 5),
  20         IOMUXA_ADDR21   = (1 << 6),
  21         IOMUXA_ADDR22   = (1 << 7),
  22         IOMUXA_ADDR23   = (1 << 8),
  23         IOMUXA_ADDR24   = (1 << 9),
  24         IOMUXA_ADDR25   = (1 << 10),
  25         IOMUXA_ADDR26   = (1 << 11),
  26         IOMUXA_nGCS1    = (1 << 12),
  27         IOMUXA_nGCS2    = (1 << 13),
  28         IOMUXA_nGCS3    = (1 << 14),
  29         IOMUXA_nGCS4    = (1 << 15),
  30         IOMUXA_nGCS5    = (1 << 16),
  31         IOMUXA_CLE      = (1 << 17),
  32         IOMUXA_ALE      = (1 << 18),
  33         IOMUXA_nFWE     = (1 << 19),
  34         IOMUXA_nFRE     = (1 << 20),
  35         IOMUXA_nRSTOUT  = (1 << 21),
  36         IOMUXA_nFCE             = (1 << 22),
  37
  38         /* PORT B */
  39         IOMUXB_nXDREQ0  = (2 << 20),
  40         IOMUXB_nXDACK0  = (2 << 18),
  41         IOMUXB_nXDREQ1  = (2 << 16),
  42         IOMUXB_nXDACK1  = (2 << 14),
  43         IOMUXB_nXBREQ   = (2 << 12),
  44         IOMUXB_nXBACK   = (2 << 10),
  45         IOMUXB_TCLK0    = (2 << 8),
  46         IOMUXB_TOUT3    = (2 << 6),
  47         IOMUXB_TOUT2    = (2 << 4),
  48         IOMUXB_TOUT1    = (2 << 2),
  49         IOMUXB_TOUT0    = 2,
  50
  51         /* PORT C */
  52         IOMUXC_VS7      = (2 << 30),
  53         IOMUXC_VS6      = (2 << 28),
  54         IOMUXC_VS5      = (2 << 26),
  55         IOMUXC_VS4      = (2 << 24),
  56         IOMUXC_VS3      = (2 << 22),
  57         IOMUXC_VS2      = (2 << 20),
  58         IOMUXC_VS1      = (2 << 18),
  59         IOMUXC_VS0      = (2 << 16),
  60         IOMUXC_LCD_LPCREVB      = (2 << 14),
  61         IOMUXC_LCD_LPCREV       = (2 << 12),
  62         IOMUXC_LCD_LPCOE        = (2 << 10),
  63         IOMUXC_VM               = (2 << 8),
  64         IOMUXC_VFRAME   = (2 << 6),
  65         IOMUXC_VLINE    = (2 << 4),
  66         IOMUXC_VCLK             = (2 << 2),
  67         IOMUXC_LEND             = 2,
  68         IOMUXC_I2SSDI   = (3 << 8),
  69
  70         /* PORT D */
  71         IOMUXD_VS23     = (2 << 30),
  72         IOMUXD_VS22     = (2 << 28),
  73         IOMUXD_VS21     = (2 << 26),
  74         IOMUXD_VS20     = (2 << 24),
  75         IOMUXD_VS19     = (2 << 22),
  76         IOMUXD_VS18     = (2 << 20),
  77         IOMUXD_VS17     = (2 << 18),
  78         IOMUXD_VS16     = (2 << 16),
  79         IOMUXD_VS15     = (2 << 14),
  80         IOMUXD_VS14     = (2 << 12),
  81         IOMUXD_VS13     = (2 << 10),
  82         IOMUXD_VS12     = (2 << 8),
  83         IOMUXD_VS11     = (2 << 6),
  84         IOMUXD_VS10     = (2 << 4),
  85         IOMUXD_VS9      = (2 << 2),
  86         IOMUXD_VS8      = 2,
  87         IOMUXD_nSS0     = (3 << 30),
  88         IOMUXD_nSS1     = (3 << 28),
  89         IOMUXD_SPICLK1  = (3 << 20),
  90         IOMUXD_SPIMOSI1 = (3 << 18),
  91         IOMUXD_SPIMISO1 = (3 << 16),
  92
  93         /* PORT E */
  94         IOMUXE_IICSDA   = (2 << 30),
  95         IOMUXE_IICSCL   = (2 << 28),
  96         IOMUXE_SPICLK0  = (2 << 26),
  97         IOMUXE_SPIMOSI0 = (2 << 24),
  98         IOMUXE_SPIMISO0 = (2 << 22),
  99         IOMUXE_SDDAT3   = (2 << 20),
 100         IOMUXE_SDDAT2   = (2 << 18),
 101         IOMUXE_SDDAT1   = (2 << 16),
 102         IOMUXE_SDDAT0   = (2 << 14),
 103         IOMUXE_SDCMD    = (2 << 12),
 104         IOMUXE_SDCLK    = (2 << 10),
 105         IOMUXE_I2SDO    = (2 << 8),
 106         IOMUXE_I2SDI    = (2 << 6),
 107         IOMUXE_CDCLK    = (2 << 4),
 108         IOMUXE_I2SSCLK  = (2 << 2),
 109         IOMUXE_I2SLRCK  = 2,
 110         IOMUXE_AC_SDATA_OUT     = (3 << 8),
 111         IOMUXE_AC_SDATA_IN      = (3 << 6),
 112         IOMUXE_AC_nRESET        = (3 << 4),
 113         IOMUXE_AC_BIT_CLK       = (3 << 2),
 114         IOMUXE_AC_SYNC          = 3,
 115
 116         /* PORT F */
 117         IOMUXF_EINT7    = (2 << 14),
 118         IOMUXF_EINT6    = (2 << 12),
 119         IOMUXF_EINT5    = (2 << 10),
 120         IOMUXF_EINT4    = (2 << 8),
 121         IOMUXF_EINT3    = (2 << 6),
 122         IOMUXF_EINT2    = (2 << 4),
 123         IOMUXF_EINT1    = (2 << 2),
 124         IOMUXF_EINT0    = 2,
 125
 126         /* PORT G */
 127         IOMUXG_EINT23   = (2 << 30),
 128         IOMUXG_EINT22   = (2 << 28),
 129         IOMUXG_EINT21   = (2 << 26),
 130         IOMUXG_EINT20   = (2 << 24),
 131         IOMUXG_EINT19   = (2 << 22),
 132         IOMUXG_EINT18   = (2 << 20),
 133         IOMUXG_EINT17   = (2 << 18),
 134         IOMUXG_EINT16   = (2 << 16),
 135         IOMUXG_EINT15   = (2 << 14),
 136         IOMUXG_EINT14   = (2 << 12),
 137         IOMUXG_EINT13   = (2 << 10),
 138         IOMUXG_EINT12   = (2 << 8),
 139         IOMUXG_EINT11   = (2 << 6),
 140         IOMUXG_EINT10   = (2 << 4),
 141         IOMUXG_EINT9    = (2 << 2),
 142         IOMUXG_EINT8    = 2,
 143         IOMUXG_TCLK1    = (3 << 22),
 144         IOMUXG_nCTS1    = (3 << 20),
 145         IOMUXG_nRTS1    = (3 << 18),
 146         IOMUXG_SPICLK1  = (3 << 14),
 147         IOMUXG_SPIMOSI1 = (3 << 12),
 148         IOMUXG_SPIMISO1 = (3 << 10),
 149         IOMUXG_LCD_PWRDN        = (3 << 8),
 150         IOMUXG_nSS1                     = (3 << 6),
 151         IOMUXG_nSS0                     = (3 << 4),
 152
 153         /* PORT H */
 154         IOMUXH_CLKOUT1  = (2 << 20),
 155         IOMUXH_CLKOUT0  = (2 << 18),
 156         IOMUXH_UEXTCLK  = (2 << 16),
 157         IOMUXH_RXD2             = (2 << 14),
 158         IOMUXH_TXD2             = (2 << 12),
 159         IOMUXH_RXD1             = (2 << 10),
 160         IOMUXH_TXD1             = (2 << 8),
 161         IOMUXH_RXD0             = (2 << 6),
 162         IOMUXH_TXD0             = (2 << 4),
 163         IOMUXH_nRTS0    = (2 << 2),
 164         IOMUXH_nCTS0    = 2,
 165         IOMUXH_nCTS1    = (3 << 14),
 166         IOMUXH_nRTS1    = (3 << 12),
 167
 168         /* PORT J */
 169         IOMUXJ_CAMRESET         = (2 << 24),
 170         IOMUXJ_CAMCLKOUT        = (2 << 22),
 171         IOMUXJ_CAMHREF          = (2 << 20),
 172         IOMUXJ_CAMVSYNC         = (2 << 18),
 173         IOMUXJ_CAMPCLK          = (2 << 16),
 174         IOMUXJ_CAMDATA7         = (2 << 14),
 175         IOMUXJ_CAMDATA6         = (2 << 12),
 176         IOMUXJ_CAMDATA5         = (2 << 10),
 177         IOMUXJ_CAMDATA4         = (2 << 8),
 178         IOMUXJ_CAMDATA3         = (2 << 6),
 179         IOMUXJ_CAMDATA2         = (2 << 4),
 180         IOMUXJ_CAMDATA1         = (2 << 2),
 181         IOMUXJ_CAMDATA0         = 2
 182 };
 183
 184 #endif