arch/arm/mach-omap2/omap4/emif.c

   1 /*
   2  * EMIF programming
   3  *
   4  * (C) Copyright 2010
   5  * Texas Instruments, <www.ti.com>
   6  *
   7  * Aneesh V <aneesh@ti.com>
   8  *
   9  * SPDX-License-Identifier:     GPL-2.0+
  10  */
  11
  12 #include <common.h>
  13 #include <asm/emif.h>
  14 #include <asm/arch/sys_proto.h>
  15 #include <asm/utils.h>
  16
  17 #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
  18 u32 *const T_num = (u32 *)OMAP_SRAM_SCRATCH_EMIF_T_NUM;
  19 u32 *const T_den = (u32 *)OMAP_SRAM_SCRATCH_EMIF_T_DEN;
  20 #endif
  21
  22 #ifdef CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
  23 /* Base AC Timing values specified by JESD209-2 for 400MHz operation */
  24 static const struct lpddr2_ac_timings timings_jedec_400_mhz = {
  25         .max_freq = 400000000,
  26         .RL = 6,
  27         .tRPab = 21,
  28         .tRCD = 18,
  29         .tWR = 15,
  30         .tRASmin = 42,
  31         .tRRD = 10,
  32         .tWTRx2 = 15,
  33         .tXSR = 140,
  34         .tXPx2 = 15,
  35         .tRFCab = 130,
  36         .tRTPx2 = 15,
  37         .tCKE = 3,
  38         .tCKESR = 15,
  39         .tZQCS = 90,
  40         .tZQCL = 360,
  41         .tZQINIT = 1000,
  42         .tDQSCKMAXx2 = 11,
  43         .tRASmax = 70,
  44         .tFAW = 50
  45 };
  46
  47 /* Base AC Timing values specified by JESD209-2 for 200 MHz operation */
  48 static const struct lpddr2_ac_timings timings_jedec_200_mhz = {
  49         .max_freq = 200000000,
  50         .RL = 3,
  51         .tRPab = 21,
  52         .tRCD = 18,
  53         .tWR = 15,
  54         .tRASmin = 42,
  55         .tRRD = 10,
  56         .tWTRx2 = 20,
  57         .tXSR = 140,
  58         .tXPx2 = 15,
  59         .tRFCab = 130,
  60         .tRTPx2 = 15,
  61         .tCKE = 3,
  62         .tCKESR = 15,
  63         .tZQCS = 90,
  64         .tZQCL = 360,
  65         .tZQINIT = 1000,
  66         .tDQSCKMAXx2 = 11,
  67         .tRASmax = 70,
  68         .tFAW = 50
  69 };
  70
  71 /*
  72  * Min tCK values specified by JESD209-2
  73  * Min tCK specifies the minimum duration of some AC timing parameters in terms
  74  * of the number of cycles. If the calculated number of cycles based on the
  75  * absolute time value is less than the min tCK value, min tCK value should
  76  * be used instead. This typically happens at low frequencies.
  77  */
  78 static const struct lpddr2_min_tck min_tck_jedec = {
  79         .tRL = 3,
  80         .tRP_AB = 3,
  81         .tRCD = 3,
  82         .tWR = 3,
  83         .tRAS_MIN = 3,
  84         .tRRD = 2,
  85         .tWTR = 2,
  86         .tXP = 2,
  87         .tRTP = 2,
  88         .tCKE = 3,
  89         .tCKESR = 3,
  90         .tFAW = 8
  91 };
  92
  93 static const struct lpddr2_ac_timings const*
  94                         jedec_ac_timings[MAX_NUM_SPEEDBINS] = {
  95         &timings_jedec_200_mhz,
  96         &timings_jedec_400_mhz
  97 };
  98
  99 const struct lpddr2_device_timings jedec_default_timings = {
 100         .ac_timings = jedec_ac_timings,
 101         .min_tck = &min_tck_jedec
 102 };
 103
 104 void emif_get_device_timings(u32 emif_nr,
 105                 const struct lpddr2_device_timings **cs0_device_timings,
 106                 const struct lpddr2_device_timings **cs1_device_timings)
 107 {
 108         /* Assume Identical devices on EMIF1 & EMIF2 */
 109         *cs0_device_timings = &jedec_default_timings;
 110         *cs1_device_timings = &jedec_default_timings;
 111 }
 112 #endif /* CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS */