arch/m68k/include/asm/coldfire/lcd.h

   1 /*
   2  * LCD controller Memory Map
   3  *
   4  * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
   5  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __LCDC_H__
  11 #define __LCDC_H__
  12
  13 /* LCD module registers */
  14 typedef struct lcd_ctrl {
  15         u32 ssar;               /* 0x00 Screen Start Address Register */
  16         u32 sr;                 /* 0x04 LCD Size Register */
  17         u32 vpw;                /* 0x08 Virtual Page Width Register */
  18         u32 cpr;                /* 0x0C Cursor Position Register */
  19         u32 cwhb;               /* 0x10 Cursor Width Height and Blink Register */
  20         u32 ccmr;               /* 0x14 Color Cursor Mapping Register */
  21         u32 pcr;                /* 0x18 Panel Configuration Register */
  22         u32 hcr;                /* 0x1C Horizontal Configuration Register */
  23         u32 vcr;                /* 0x20 Vertical Configuration Register */
  24         u32 por;                /* 0x24 Panning Offset Register */
  25         u32 scr;                /* 0x28 Sharp Configuration Register */
  26         u32 pccr;               /* 0x2C PWM Contrast Control Register */
  27         u32 dcr;                /* 0x30 DMA Control Register */
  28         u32 rmcr;               /* 0x34 Refresh Mode Control Register */
  29         u32 icr;                /* 0x38 Refresh Mode Control Register */
  30         u32 ier;                /* 0x3C Interrupt Enable Register */
  31         u32 isr;                /* 0x40 Interrupt Status Register */
  32         u32 res[4];
  33         u32 gwsar;              /* 0x50 Graphic Window Start Address Register */
  34         u32 gwsr;               /* 0x54 Graphic Window Size Register */
  35         u32 gwvpw;              /* 0x58 Graphic Window Virtual Page Width Register */
  36         u32 gwpor;              /* 0x5C Graphic Window Panning Offset Register */
  37         u32 gwpr;               /* 0x60 Graphic Window Position Register */
  38         u32 gwcr;               /* 0x64 Graphic Window Control Register */
  39         u32 gwdcr;              /* 0x68 Graphic Window DMA Control Register */
  40 } lcd_t;
  41
  42 typedef struct lcdbg_ctrl {
  43         u32 bglut[255];
  44 } lcdbg_t;
  45
  46 typedef struct lcdgw_ctrl {
  47         u32 gwlut[255];
  48 } lcdgw_t;
  49
  50 /* Bit definitions and macros for LCDC_LSSAR */
  51 #define LCDC_SSAR_SSA(x)                (((x)&0x3FFFFFFF)<<2)
  52
  53 /* Bit definitions and macros for LCDC_LSR */
  54 #define LCDC_SR_XMAX(x)                 (((x)&0x0000003F)<<20)
  55 #define LCDC_SR_YMAX(x)                 ((x)&0x000003FF)
  56
  57 /* Bit definitions and macros for LCDC_LVPWR */
  58 #define LCDC_VPWR_VPW(x)                (((x)&0x000003FF)
  59
  60 /* Bit definitions and macros for LCDC_LCPR */
  61 #define LCDC_CPR_CC(x)                  (((x)&0x00000003)<<30)
  62 #define LCDC_CPR_CC_AND                 (0xC0000000)
  63 #define LCDC_CPR_CC_XOR                 (0x80000000)
  64 #define LCDC_CPR_CC_OR                  (0x40000000)
  65 #define LCDC_CPR_CC_TRANSPARENT         (0x00000000)
  66 #define LCDC_CPR_OP                     (0x10000000)
  67 #define LCDC_CPR_CXP(x)                 (((x)&0x000003FF)<<16)
  68 #define LCDC_CPR_CYP(x)                 ((x)&0x000003FF)
  69
  70 /* Bit definitions and macros for LCDC_LCWHBR */
  71 #define LCDC_CWHBR_BK_EN                (0x80000000)
  72 #define LCDC_CWHBR_CW(x)                (((x)&0x0000001F)<<24)
  73 #define LCDC_CWHBR_CH(x)                (((x)&0x0000001F)<<16)
  74 #define LCDC_CWHBR_BD(x)                ((x)&0x000000FF)
  75
  76 /* Bit definitions and macros for LCDC_LCCMR */
  77 #define LCDC_CCMR_CUR_COL_R(x)          (((x)&0x0000003F)<<12)
  78 #define LCDC_CCMR_CUR_COL_G(x)          (((x)&0x0000003F)<<6)
  79 #define LCDC_CCMR_CUR_COL_B(x)          ((x)&0x0000003F)
  80
  81 /* Bit definitions and macros for LCDC_LPCR */
  82 #define LCDC_PCR_PANEL_TYPE(x)          (((x)&0x00000003)<<30)
  83 #define LCDC_PCR_MODE_TFT               (0xC0000000)
  84 #define LCDC_PCR_MODE_CSTN              (0x40000000)
  85 #define LCDC_PCR_MODE_MONOCHROME        (0x00000000)
  86 #define LCDC_PCR_TFT                    (0x80000000)
  87 #define LCDC_PCR_COLOR                  (0x40000000)
  88 #define LCDC_PCR_PBSIZ(x)               (((x)&0x00000003)<<28)
  89 #define LCDC_PCR_PBSIZ_8                (0x30000000)
  90 #define LCDC_PCR_PBSIZ_4                (0x20000000)
  91 #define LCDC_PCR_PBSIZ_2                (0x10000000)
  92 #define LCDC_PCR_PBSIZ_1                (0x00000000)
  93 #define LCDC_PCR_BPIX(x)                (((x)&0x00000007)<<25)
  94 #define LCDC_PCR_BPIX_18bpp             (0x0C000000)
  95 #define LCDC_PCR_BPIX_16bpp             (0x0A000000)
  96 #define LCDC_PCR_BPIX_12bpp             (0x08000000)
  97 #define LCDC_PCR_BPIX_8bpp              (0x06000000)
  98 #define LCDC_PCR_BPIX_4bpp              (0x04000000)
  99 #define LCDC_PCR_BPIX_2bpp              (0x02000000)
 100 #define LCDC_PCR_BPIX_1bpp              (0x00000000)
 101 #define LCDC_PCR_PIXPOL                 (0x01000000)
 102 #define LCDC_PCR_FLM                    (0x00800000)
 103 #define LCDC_PCR_LPPOL                  (0x00400000)
 104 #define LCDC_PCR_CLKPOL                 (0x00200000)
 105 #define LCDC_PCR_OEPOL                  (0x00100000)
 106 #define LCDC_PCR_SCLKIDLE               (0x00080000)
 107 #define LCDC_PCR_ENDSEL                 (0x00040000)
 108 #define LCDC_PCR_SWAP_SEL               (0x00020000)
 109 #define LCDC_PCR_REV_VS                 (0x00010000)
 110 #define LCDC_PCR_ACDSEL                 (0x00008000)
 111 #define LCDC_PCR_ACD(x)                 (((x)&0x0000007F)<<8)
 112 #define LCDC_PCR_SCLKSEL                (0x00000080)
 113 #define LCDC_PCR_SHARP                  (0x00000040)
 114 #define LCDC_PCR_PCD(x)                 ((x)&0x0000003F)
 115
 116 /* Bit definitions and macros for LCDC_LHCR */
 117 #define LCDC_HCR_H_WIDTH(x)             (((x)&0x0000003F)<<26)
 118 #define LCDC_HCR_H_WAIT_1(x)            (((x)&0x000000FF)<<8)
 119 #define LCDC_HCR_H_WAIT_2(x)            ((x)&0x000000FF)
 120
 121 /* Bit definitions and macros for LCDC_LVCR */
 122 #define LCDC_VCR_V_WIDTH(x)             (((x)&0x0000003F)<<26)
 123 #define LCDC_VCR_V_WAIT_1(x)            (((x)&0x000000FF)<<8)
 124 #define LCDC_VCR_V_WAIT_2(x)            ((x)&0x000000FF)
 125
 126 /* Bit definitions and macros for LCDC_SCR */
 127 #define LCDC_SCR_PS_R_DELAY(x)          (((x)&0x0000003F) << 26)
 128 #define LCDC_SCR_CLS_R_DELAY(x)         (((x)&0x000000FF) << 16)
 129 #define LCDC_SCR_RTG_DELAY(x)           (((x)&0x0000000F) << 8)
 130 #define LCDC_SCR_GRAY2(x)               (((x)&0x0000000F) << 4)
 131 #define LCDC_SCR_GRAY1(x)               ((x)&&0x0000000F)
 132
 133 /* Bit definitions and macros for LCDC_LPCCR */
 134 #define LCDC_PCCR_CLS_HI_WID(x)         (((x)&0x000001FF)<<16)
 135 #define LCDC_PCCR_LDMSK                 (0x00008000)
 136 #define LCDC_PCCR_SCR(x)                (((x)&0x00000003)<<9)
 137 #define LCDC_PCCR_SCR_LCDCLK            (0x00000400)
 138 #define LCDC_PCCR_SCR_PIXCLK            (0x00000200)
 139 #define LCDC_PCCR_SCR_LNPULSE           (0x00000000)
 140 #define LCDC_PCCR_CC_EN                 (0x00000100)
 141 #define LCDC_PCCR_PW(x)                 ((x)&0x000000FF)
 142
 143 /* Bit definitions and macros for LCDC_LDCR */
 144 #define LCDC_DCR_BURST                  (0x80000000)
 145 #define LCDC_DCR_HM(x)                  (((x)&0x0000001F)<<16)
 146 #define LCDC_DCR_TM(x)                  ((x)&0x0000001F)
 147
 148 /* Bit definitions and macros for LCDC_LRMCR */
 149 #define LCDC_RMCR_SEL_REF               (0x00000001)
 150
 151 /* Bit definitions and macros for LCDC_LICR */
 152 #define LCDC_ICR_GW_INT_CON             (0x00000010)
 153 #define LCDC_ICR_INTSYN                 (0x00000004)
 154 #define LCDC_ICR_INTCON                 (0x00000001)
 155
 156 /* Bit definitions and macros for LCDC_LIER */
 157 #define LCDC_IER_GW_UDR                 (0x00000080)
 158 #define LCDC_IER_GW_ERR                 (0x00000040)
 159 #define LCDC_IER_GW_EOF                 (0x00000020)
 160 #define LCDC_IER_GW_BOF                 (0x00000010)
 161 #define LCDC_IER_UDR                    (0x00000008)
 162 #define LCDC_IER_ERR                    (0x00000004)
 163 #define LCDC_IER_EOF                    (0x00000002)
 164 #define LCDC_IER_BOF                    (0x00000001)
 165
 166 /* Bit definitions and macros for LCDC_LGWSAR */
 167 #define LCDC_GWSAR_GWSA(x)              (((x)&0x3FFFFFFF)<<2)
 168
 169 /* Bit definitions and macros for LCDC_LGWSR */
 170 #define LCDC_GWSR_GWW(x)                (((x)&0x0000003F)<<20)
 171 #define LCDC_GWSR_GWH(x)                ((x)&0x000003FF)
 172
 173 /* Bit definitions and macros for LCDC_LGWVPWR */
 174 #define LCDC_GWVPWR_GWVPW(x)            ((x)&0x000003FF)
 175
 176 /* Bit definitions and macros for LCDC_LGWPOR */
 177 #define LCDC_GWPOR_GWPO(x)              ((x)&0x0000001F)
 178
 179 /* Bit definitions and macros for LCDC_LGWPR */
 180 #define LCDC_GWPR_GWXP(x)               (((x)&0x000003FF)<<16)
 181 #define LCDC_GWPR_GWYP(x)               ((x)&0x000003FF)
 182
 183 /* Bit definitions and macros for LCDC_LGWCR */
 184 #define LCDC_GWCR_GWAV(x)               (((x)&0x000000FF)<<24)
 185 #define LCDC_GWCR_GWCKE                 (0x00800000)
 186 #define LCDC_LGWCR_GWE                  (0x00400000)
 187 #define LCDC_LGWCR_GW_RVS               (0x00200000)
 188 #define LCDC_LGWCR_GWCKR(x)             (((x)&0x0000003F)<<12)
 189 #define LCDC_LGWCR_GWCKG(x)             (((x)&0x0000003F)<<6)
 190 #define LCDC_LGWCR_GWCKB(x)             ((x)&0x0000003F)
 191
 192 /* Bit definitions and macros for LCDC_LGWDCR */
 193 #define LCDC_LGWDCR_GWBT                (0x80000000)
 194 #define LCDC_LGWDCR_GWHM(x)             (((x)&0x0000001F)<<16)
 195 #define LCDC_LGWDCR_GWTM(x)             ((x)&0x0000001F)
 196
 197 #endif                          /* __LCDC_H__ */