]>
git.ipfire.org Git - people/ms/u-boot.git/blob - arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.c
2 * URB OHCI HCD (Host Controller Driver) for USB on the AU1x00.
5 * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
7 * SPDX-License-Identifier: GPL-2.0+
8 * Note: Part of this code has been derived from linux
13 * 1 - this driver is intended for use with USB Mass Storage Devices
14 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
19 #ifdef CONFIG_USB_OHCI
21 /* #include <pci.h> no PCI on the AU1x00 */
26 #include <asm/au1x00.h>
28 #include "au1x00_usb_ohci.h"
30 #define OHCI_USE_NPS /* force NoPowerSwitching mode */
31 #define OHCI_VERBOSE_DEBUG /* not always helpful */
32 #define OHCI_FILL_TRACE
34 #define USBH_ENABLE_BE (1<<0)
35 #define USBH_ENABLE_C (1<<1)
36 #define USBH_ENABLE_E (1<<2)
37 #define USBH_ENABLE_CE (1<<3)
38 #define USBH_ENABLE_RD (1<<4)
40 #ifdef __LITTLE_ENDIAN
41 #define USBH_ENABLE_INIT (USBH_ENABLE_CE | USBH_ENABLE_E | USBH_ENABLE_C)
43 #define USBH_ENABLE_INIT (USBH_ENABLE_CE | USBH_ENABLE_E | USBH_ENABLE_C | USBH_ENABLE_BE)
47 /* For initializing controller (mask in an HCFS mode too) */
48 #define OHCI_CONTROL_INIT \
49 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
54 #define readl(a) au_readl((long)(a))
55 #define writel(v,a) au_writel((v),(int)(a))
57 #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
61 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
63 #define dbg(format, arg...) do {} while(0)
65 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
68 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
70 #define info(format, arg...) do {} while(0)
73 #define m16_swap(x) swap_16(x)
74 #define m32_swap(x) swap_32(x)
78 /* this must be aligned to a 256 byte boundary */
79 struct ohci_hcca ghcca
[1];
80 /* a pointer to the aligned storage */
81 struct ohci_hcca
*phcca
;
82 /* this allocates EDs for all possible endpoints */
83 struct ohci_device ohci_dev
;
88 /* device which was disconnected */
89 struct usb_device
*devgone
;
91 /*-------------------------------------------------------------------------*/
93 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
94 * The erratum (#4) description is incorrect. AMD's workaround waits
95 * till some bits (mostly reserved) are clear; ok for all revs.
97 #define OHCI_QUIRK_AMD756 0xabcd
98 #define read_roothub(hc, register, mask) ({ \
99 u32 temp = readl (&hc->regs->roothub.register); \
100 if (hc->flags & OHCI_QUIRK_AMD756) \
101 while (temp & mask) \
102 temp = readl (&hc->regs->roothub.register); \
105 static u32
roothub_a (struct ohci
*hc
)
106 { return read_roothub (hc
, a
, 0xfc0fe000); }
107 static inline u32
roothub_b (struct ohci
*hc
)
108 { return readl (&hc
->regs
->roothub
.b
); }
109 static inline u32
roothub_status (struct ohci
*hc
)
110 { return readl (&hc
->regs
->roothub
.status
); }
111 static u32
roothub_portstatus (struct ohci
*hc
, int i
)
112 { return read_roothub (hc
, portstatus
[i
], 0xffe0fce0); }
115 /* forward declaration */
116 static int hc_interrupt (void);
118 td_submit_job (struct usb_device
* dev
, unsigned long pipe
, void * buffer
,
119 int transfer_len
, struct devrequest
* setup
, urb_priv_t
* urb
, int interval
);
121 /*-------------------------------------------------------------------------*
122 * URB support functions
123 *-------------------------------------------------------------------------*/
125 /* free HCD-private data associated with this URB */
127 static void urb_free_priv (urb_priv_t
* urb
)
133 last
= urb
->length
- 1;
135 for (i
= 0; i
<= last
; i
++) {
145 /*-------------------------------------------------------------------------*/
148 static int sohci_get_current_frame_number (struct usb_device
* dev
);
150 /* debug| print the main components of an URB
151 * small: 0) header + data packets 1) just header */
153 static void pkt_print (struct usb_device
* dev
, unsigned long pipe
, void * buffer
,
154 int transfer_len
, struct devrequest
* setup
, char * str
, int small
)
156 urb_priv_t
* purb
= &urb_priv
;
158 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
160 sohci_get_current_frame_number (dev
),
161 usb_pipedevice (pipe
),
162 usb_pipeendpoint (pipe
),
163 usb_pipeout (pipe
)? 'O': 'I',
164 usb_pipetype (pipe
) < 2? (usb_pipeint (pipe
)? "INTR": "ISOC"):
165 (usb_pipecontrol (pipe
)? "CTRL": "BULK"),
167 transfer_len
, dev
->status
);
168 #ifdef OHCI_VERBOSE_DEBUG
172 if (usb_pipecontrol (pipe
)) {
173 printf (__FILE__
": cmd(8):");
174 for (i
= 0; i
< 8 ; i
++)
175 printf (" %02x", ((__u8
*) setup
) [i
]);
178 if (transfer_len
> 0 && buffer
) {
179 printf (__FILE__
": data(%d/%d):",
182 len
= usb_pipeout (pipe
)?
183 transfer_len
: purb
->actual_length
;
184 for (i
= 0; i
< 16 && i
< len
; i
++)
185 printf (" %02x", ((__u8
*) buffer
) [i
]);
186 printf ("%s\n", i
< len
? "...": "");
192 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
193 void ep_print_int_eds (ohci_t
*ohci
, char * str
) {
196 for (i
= 0; i
< 32; i
++) {
198 ed_p
= &(ohci
->hcca
->int_table
[i
]);
201 printf (__FILE__
": %s branch int %2d(%2x):", str
, i
, i
);
202 while (*ed_p
!= 0 && j
--) {
203 ed_t
*ed
= (ed_t
*)m32_swap(ed_p
);
204 printf (" ed: %4x;", ed
->hwINFO
);
205 ed_p
= &ed
->hwNextED
;
211 static void ohci_dump_intr_mask (char *label
, __u32 mask
)
213 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
216 (mask
& OHCI_INTR_MIE
) ? " MIE" : "",
217 (mask
& OHCI_INTR_OC
) ? " OC" : "",
218 (mask
& OHCI_INTR_RHSC
) ? " RHSC" : "",
219 (mask
& OHCI_INTR_FNO
) ? " FNO" : "",
220 (mask
& OHCI_INTR_UE
) ? " UE" : "",
221 (mask
& OHCI_INTR_RD
) ? " RD" : "",
222 (mask
& OHCI_INTR_SF
) ? " SF" : "",
223 (mask
& OHCI_INTR_WDH
) ? " WDH" : "",
224 (mask
& OHCI_INTR_SO
) ? " SO" : ""
228 static void maybe_print_eds (char *label
, __u32 value
)
230 ed_t
*edp
= (ed_t
*)value
;
233 dbg ("%s %08x", label
, value
);
234 dbg ("%08x", edp
->hwINFO
);
235 dbg ("%08x", edp
->hwTailP
);
236 dbg ("%08x", edp
->hwHeadP
);
237 dbg ("%08x", edp
->hwNextED
);
241 static char * hcfs2string (int state
)
244 case OHCI_USB_RESET
: return "reset";
245 case OHCI_USB_RESUME
: return "resume";
246 case OHCI_USB_OPER
: return "operational";
247 case OHCI_USB_SUSPEND
: return "suspend";
252 /* dump control and status registers */
253 static void ohci_dump_status (ohci_t
*controller
)
255 struct ohci_regs
*regs
= controller
->regs
;
258 temp
= readl (®s
->revision
) & 0xff;
260 dbg ("spec %d.%d", (temp
>> 4), (temp
& 0x0f));
262 temp
= readl (®s
->control
);
263 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp
,
264 (temp
& OHCI_CTRL_RWE
) ? " RWE" : "",
265 (temp
& OHCI_CTRL_RWC
) ? " RWC" : "",
266 (temp
& OHCI_CTRL_IR
) ? " IR" : "",
267 hcfs2string (temp
& OHCI_CTRL_HCFS
),
268 (temp
& OHCI_CTRL_BLE
) ? " BLE" : "",
269 (temp
& OHCI_CTRL_CLE
) ? " CLE" : "",
270 (temp
& OHCI_CTRL_IE
) ? " IE" : "",
271 (temp
& OHCI_CTRL_PLE
) ? " PLE" : "",
272 temp
& OHCI_CTRL_CBSR
275 temp
= readl (®s
->cmdstatus
);
276 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp
,
277 (temp
& OHCI_SOC
) >> 16,
278 (temp
& OHCI_OCR
) ? " OCR" : "",
279 (temp
& OHCI_BLF
) ? " BLF" : "",
280 (temp
& OHCI_CLF
) ? " CLF" : "",
281 (temp
& OHCI_HCR
) ? " HCR" : ""
284 ohci_dump_intr_mask ("intrstatus", readl (®s
->intrstatus
));
285 ohci_dump_intr_mask ("intrenable", readl (®s
->intrenable
));
287 maybe_print_eds ("ed_periodcurrent", readl (®s
->ed_periodcurrent
));
289 maybe_print_eds ("ed_controlhead", readl (®s
->ed_controlhead
));
290 maybe_print_eds ("ed_controlcurrent", readl (®s
->ed_controlcurrent
));
292 maybe_print_eds ("ed_bulkhead", readl (®s
->ed_bulkhead
));
293 maybe_print_eds ("ed_bulkcurrent", readl (®s
->ed_bulkcurrent
));
295 maybe_print_eds ("donehead", readl (®s
->donehead
));
298 static void ohci_dump_roothub (ohci_t
*controller
, int verbose
)
302 temp
= roothub_a (controller
);
303 ndp
= (temp
& RH_A_NDP
);
306 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp
,
307 ((temp
& RH_A_POTPGT
) >> 24) & 0xff,
308 (temp
& RH_A_NOCP
) ? " NOCP" : "",
309 (temp
& RH_A_OCPM
) ? " OCPM" : "",
310 (temp
& RH_A_DT
) ? " DT" : "",
311 (temp
& RH_A_NPS
) ? " NPS" : "",
312 (temp
& RH_A_PSM
) ? " PSM" : "",
315 temp
= roothub_b (controller
);
316 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
318 (temp
& RH_B_PPCM
) >> 16,
321 temp
= roothub_status (controller
);
322 dbg ("roothub.status: %08x%s%s%s%s%s%s",
324 (temp
& RH_HS_CRWE
) ? " CRWE" : "",
325 (temp
& RH_HS_OCIC
) ? " OCIC" : "",
326 (temp
& RH_HS_LPSC
) ? " LPSC" : "",
327 (temp
& RH_HS_DRWE
) ? " DRWE" : "",
328 (temp
& RH_HS_OCI
) ? " OCI" : "",
329 (temp
& RH_HS_LPS
) ? " LPS" : ""
333 for (i
= 0; i
< ndp
; i
++) {
334 temp
= roothub_portstatus (controller
, i
);
335 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
338 (temp
& RH_PS_PRSC
) ? " PRSC" : "",
339 (temp
& RH_PS_OCIC
) ? " OCIC" : "",
340 (temp
& RH_PS_PSSC
) ? " PSSC" : "",
341 (temp
& RH_PS_PESC
) ? " PESC" : "",
342 (temp
& RH_PS_CSC
) ? " CSC" : "",
344 (temp
& RH_PS_LSDA
) ? " LSDA" : "",
345 (temp
& RH_PS_PPS
) ? " PPS" : "",
346 (temp
& RH_PS_PRS
) ? " PRS" : "",
347 (temp
& RH_PS_POCI
) ? " POCI" : "",
348 (temp
& RH_PS_PSS
) ? " PSS" : "",
350 (temp
& RH_PS_PES
) ? " PES" : "",
351 (temp
& RH_PS_CCS
) ? " CCS" : ""
356 static void ohci_dump (ohci_t
*controller
, int verbose
)
358 dbg ("OHCI controller usb-%s state", controller
->slot_name
);
360 /* dumps some of the state we know about */
361 ohci_dump_status (controller
);
363 ep_print_int_eds (controller
, "hcca");
364 dbg ("hcca frame #%04x", controller
->hcca
->frame_no
);
365 ohci_dump_roothub (controller
, 1);
371 /*-------------------------------------------------------------------------*
372 * Interface functions (URB)
373 *-------------------------------------------------------------------------*/
375 /* get a transfer request */
377 int sohci_submit_job(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
378 int transfer_len
, struct devrequest
*setup
, int interval
)
382 urb_priv_t
*purb_priv
;
387 /* when controller's hung, permit only roothub cleanup attempts
388 * such as powering down ports */
389 if (ohci
->disabled
) {
390 err("sohci_submit_job: EPIPE");
394 /* every endpoint has a ed, locate and fill it */
395 if (!(ed
= ep_add_ed (dev
, pipe
))) {
396 err("sohci_submit_job: ENOMEM");
400 /* for the private part of the URB we need the number of TDs (size) */
401 switch (usb_pipetype (pipe
)) {
402 case PIPE_BULK
: /* one TD for every 4096 Byte */
403 size
= (transfer_len
- 1) / 4096 + 1;
405 case PIPE_CONTROL
: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
406 size
= (transfer_len
== 0)? 2:
407 (transfer_len
- 1) / 4096 + 3;
411 if (size
>= (N_URB_TD
- 1)) {
412 err("need %d TDs, only have %d", size
, N_URB_TD
);
415 purb_priv
= &urb_priv
;
416 purb_priv
->pipe
= pipe
;
418 /* fill the private part of the URB */
419 purb_priv
->length
= size
;
421 purb_priv
->actual_length
= 0;
423 /* allocate the TDs */
424 /* note that td[0] was allocated in ep_add_ed */
425 for (i
= 0; i
< size
; i
++) {
426 purb_priv
->td
[i
] = td_alloc (dev
);
427 if (!purb_priv
->td
[i
]) {
428 purb_priv
->length
= i
;
429 urb_free_priv (purb_priv
);
430 err("sohci_submit_job: ENOMEM");
435 if (ed
->state
== ED_NEW
|| (ed
->state
& ED_DEL
)) {
436 urb_free_priv (purb_priv
);
437 err("sohci_submit_job: EINVAL");
441 /* link the ed into a chain if is not already */
442 if (ed
->state
!= ED_OPER
)
445 /* fill the TDs and link it to the ed */
446 td_submit_job(dev
, pipe
, buffer
, transfer_len
, setup
, purb_priv
, interval
);
451 /*-------------------------------------------------------------------------*/
454 /* tell us the current USB frame number */
456 static int sohci_get_current_frame_number (struct usb_device
*usb_dev
)
458 ohci_t
*ohci
= &gohci
;
460 return m16_swap (ohci
->hcca
->frame_no
);
464 /*-------------------------------------------------------------------------*
465 * ED handling functions
466 *-------------------------------------------------------------------------*/
468 /* link an ed into one of the HC chains */
470 static int ep_link (ohci_t
*ohci
, ed_t
*edi
)
472 volatile ed_t
*ed
= edi
;
479 if (ohci
->ed_controltail
== NULL
) {
480 writel ((long)ed
, &ohci
->regs
->ed_controlhead
);
482 ohci
->ed_controltail
->hwNextED
= m32_swap (ed
);
484 ed
->ed_prev
= ohci
->ed_controltail
;
485 if (!ohci
->ed_controltail
&& !ohci
->ed_rm_list
[0] &&
486 !ohci
->ed_rm_list
[1] && !ohci
->sleeping
) {
487 ohci
->hc_control
|= OHCI_CTRL_CLE
;
488 writel (ohci
->hc_control
, &ohci
->regs
->control
);
490 ohci
->ed_controltail
= edi
;
495 if (ohci
->ed_bulktail
== NULL
) {
496 writel ((long)ed
, &ohci
->regs
->ed_bulkhead
);
498 ohci
->ed_bulktail
->hwNextED
= m32_swap (ed
);
500 ed
->ed_prev
= ohci
->ed_bulktail
;
501 if (!ohci
->ed_bulktail
&& !ohci
->ed_rm_list
[0] &&
502 !ohci
->ed_rm_list
[1] && !ohci
->sleeping
) {
503 ohci
->hc_control
|= OHCI_CTRL_BLE
;
504 writel (ohci
->hc_control
, &ohci
->regs
->control
);
506 ohci
->ed_bulktail
= edi
;
512 /*-------------------------------------------------------------------------*/
514 /* unlink an ed from one of the HC chains.
515 * just the link to the ed is unlinked.
516 * the link from the ed still points to another operational ed or 0
517 * so the HC can eventually finish the processing of the unlinked ed */
519 static int ep_unlink (ohci_t
*ohci
, ed_t
*ed
)
521 ed
->hwINFO
|= m32_swap (OHCI_ED_SKIP
);
525 if (ed
->ed_prev
== NULL
) {
527 ohci
->hc_control
&= ~OHCI_CTRL_CLE
;
528 writel (ohci
->hc_control
, &ohci
->regs
->control
);
530 writel (m32_swap (*((__u32
*)&ed
->hwNextED
)), &ohci
->regs
->ed_controlhead
);
532 ed
->ed_prev
->hwNextED
= ed
->hwNextED
;
534 if (ohci
->ed_controltail
== ed
) {
535 ohci
->ed_controltail
= ed
->ed_prev
;
537 ((ed_t
*)m32_swap (*((__u32
*)&ed
->hwNextED
)))->ed_prev
= ed
->ed_prev
;
542 if (ed
->ed_prev
== NULL
) {
544 ohci
->hc_control
&= ~OHCI_CTRL_BLE
;
545 writel (ohci
->hc_control
, &ohci
->regs
->control
);
547 writel (m32_swap (*((__u32
*)&ed
->hwNextED
)), &ohci
->regs
->ed_bulkhead
);
549 ed
->ed_prev
->hwNextED
= ed
->hwNextED
;
551 if (ohci
->ed_bulktail
== ed
) {
552 ohci
->ed_bulktail
= ed
->ed_prev
;
554 ((ed_t
*)m32_swap (*((__u32
*)&ed
->hwNextED
)))->ed_prev
= ed
->ed_prev
;
558 ed
->state
= ED_UNLINK
;
563 /*-------------------------------------------------------------------------*/
565 /* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
566 * but the USB stack is a little bit stateless so we do it at every transaction
567 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
568 * in all other cases the state is left unchanged
569 * the ed info fields are setted anyway even though most of them should not change */
571 static ed_t
* ep_add_ed (struct usb_device
*usb_dev
, unsigned long pipe
)
577 ed
= ed_ret
= &ohci_dev
.ed
[(usb_pipeendpoint (pipe
) << 1) |
578 (usb_pipecontrol (pipe
)? 0: usb_pipeout (pipe
))];
580 if ((ed
->state
& ED_DEL
) || (ed
->state
& ED_URB_DEL
)) {
581 err("ep_add_ed: pending delete");
582 /* pending delete request */
586 if (ed
->state
== ED_NEW
) {
587 ed
->hwINFO
= m32_swap (OHCI_ED_SKIP
); /* skip ed */
588 /* dummy td; end of td list for ed */
589 td
= td_alloc (usb_dev
);
590 ed
->hwTailP
= m32_swap (td
);
591 ed
->hwHeadP
= ed
->hwTailP
;
592 ed
->state
= ED_UNLINK
;
593 ed
->type
= usb_pipetype (pipe
);
597 ed
->hwINFO
= m32_swap (usb_pipedevice (pipe
)
598 | usb_pipeendpoint (pipe
) << 7
599 | (usb_pipeisoc (pipe
)? 0x8000: 0)
600 | (usb_pipecontrol (pipe
)? 0: (usb_pipeout (pipe
)? 0x800: 0x1000))
601 | (usb_dev
->speed
== USB_SPEED_LOW
) << 13
602 | usb_maxpacket (usb_dev
, pipe
) << 16);
607 /*-------------------------------------------------------------------------*
608 * TD handling functions
609 *-------------------------------------------------------------------------*/
611 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
613 static void td_fill (ohci_t
*ohci
, unsigned int info
,
615 struct usb_device
*dev
, int index
, urb_priv_t
*urb_priv
)
617 volatile td_t
*td
, *td_pt
;
618 #ifdef OHCI_FILL_TRACE
622 if (index
> urb_priv
->length
) {
623 err("index > length");
626 /* use this td as the next dummy */
627 td_pt
= urb_priv
->td
[index
];
630 /* fill the old dummy TD */
631 td
= urb_priv
->td
[index
] = (td_t
*)(m32_swap (urb_priv
->ed
->hwTailP
) & ~0xf);
633 td
->ed
= urb_priv
->ed
;
634 td
->next_dl_td
= NULL
;
636 td
->data
= (__u32
)data
;
637 #ifdef OHCI_FILL_TRACE
638 if (1 || (usb_pipebulk(urb_priv
->pipe
) &&
639 usb_pipeout(urb_priv
->pipe
))) {
640 for (i
= 0; i
< len
; i
++)
641 printf("td->data[%d] %#2x\n",i
, ((unsigned char *)(td
->data
+0x80000000))[i
]);
647 td
->hwINFO
= m32_swap (info
);
648 td
->hwCBP
= m32_swap (data
);
650 td
->hwBE
= m32_swap (data
+ len
- 1);
653 td
->hwNextTD
= m32_swap (td_pt
);
654 td
->hwPSW
[0] = m16_swap (((__u32
)data
& 0x0FFF) | 0xE000);
656 /* append to queue */
657 td
->ed
->hwTailP
= td
->hwNextTD
;
660 /*-------------------------------------------------------------------------*/
662 /* prepare all TDs of a transfer */
664 #define kseg_to_phys(x) ((void *)((__u32)(x) - 0x80000000))
666 static void td_submit_job (struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
667 int transfer_len
, struct devrequest
*setup
, urb_priv_t
*urb
, int interval
)
669 ohci_t
*ohci
= &gohci
;
670 int data_len
= transfer_len
;
674 unsigned int toggle
= 0;
676 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
677 if(usb_gettoggle(dev
, usb_pipeendpoint(pipe
), usb_pipeout(pipe
))) {
678 toggle
= TD_T_TOGGLE
;
681 usb_settoggle(dev
, usb_pipeendpoint(pipe
), usb_pipeout(pipe
), 1);
685 data
= kseg_to_phys(buffer
);
689 switch (usb_pipetype (pipe
)) {
691 info
= usb_pipeout (pipe
)?
692 TD_CC
| TD_DP_OUT
: TD_CC
| TD_DP_IN
;
693 while(data_len
> 4096) {
694 td_fill (ohci
, info
| (cnt
? TD_T_TOGGLE
:toggle
), data
, 4096, dev
, cnt
, urb
);
695 data
+= 4096; data_len
-= 4096; cnt
++;
697 info
= usb_pipeout (pipe
)?
698 TD_CC
| TD_DP_OUT
: TD_CC
| TD_R
| TD_DP_IN
;
699 td_fill (ohci
, info
| (cnt
? TD_T_TOGGLE
:toggle
), data
, data_len
, dev
, cnt
, urb
);
703 writel (OHCI_BLF
, &ohci
->regs
->cmdstatus
); /* start bulk list */
707 info
= TD_CC
| TD_DP_SETUP
| TD_T_DATA0
;
708 td_fill (ohci
, info
, kseg_to_phys(setup
), 8, dev
, cnt
++, urb
);
710 info
= usb_pipeout (pipe
)?
711 TD_CC
| TD_R
| TD_DP_OUT
| TD_T_DATA1
: TD_CC
| TD_R
| TD_DP_IN
| TD_T_DATA1
;
712 /* NOTE: mishandles transfers >8K, some >4K */
713 td_fill (ohci
, info
, data
, data_len
, dev
, cnt
++, urb
);
715 info
= usb_pipeout (pipe
)?
716 TD_CC
| TD_DP_IN
| TD_T_DATA1
: TD_CC
| TD_DP_OUT
| TD_T_DATA1
;
717 td_fill (ohci
, info
, data
, 0, dev
, cnt
++, urb
);
719 writel (OHCI_CLF
, &ohci
->regs
->cmdstatus
); /* start Control list */
722 if (urb
->length
!= cnt
)
723 dbg("TD LENGTH %d != CNT %d", urb
->length
, cnt
);
726 /*-------------------------------------------------------------------------*
727 * Done List handling functions
728 *-------------------------------------------------------------------------*/
731 /* calculate the transfer length and update the urb */
733 static void dl_transfer_length(td_t
* td
)
735 __u32 tdINFO
, tdBE
, tdCBP
;
736 urb_priv_t
*lurb_priv
= &urb_priv
;
738 tdINFO
= m32_swap (td
->hwINFO
);
739 tdBE
= m32_swap (td
->hwBE
);
740 tdCBP
= m32_swap (td
->hwCBP
);
743 if (!(usb_pipecontrol(lurb_priv
->pipe
) &&
744 ((td
->index
== 0) || (td
->index
== lurb_priv
->length
- 1)))) {
747 lurb_priv
->actual_length
+= tdBE
- td
->data
+ 1;
749 lurb_priv
->actual_length
+= tdCBP
- td
->data
;
754 /*-------------------------------------------------------------------------*/
756 /* replies to the request have to be on a FIFO basis so
757 * we reverse the reversed done-list */
759 static td_t
* dl_reverse_done_list (ohci_t
*ohci
)
763 td_t
*td_list
= NULL
;
764 urb_priv_t
*lurb_priv
= NULL
;
766 td_list_hc
= m32_swap (ohci
->hcca
->done_head
) & 0xfffffff0;
767 ohci
->hcca
->done_head
= 0;
770 td_list
= (td_t
*)td_list_hc
;
772 if (TD_CC_GET (m32_swap (td_list
->hwINFO
))) {
773 lurb_priv
= &urb_priv
;
774 dbg(" USB-error/status: %x : %p",
775 TD_CC_GET (m32_swap (td_list
->hwINFO
)), td_list
);
776 if (td_list
->ed
->hwHeadP
& m32_swap (0x1)) {
777 if (lurb_priv
&& ((td_list
->index
+ 1) < lurb_priv
->length
)) {
778 td_list
->ed
->hwHeadP
=
779 (lurb_priv
->td
[lurb_priv
->length
- 1]->hwNextTD
& m32_swap (0xfffffff0)) |
780 (td_list
->ed
->hwHeadP
& m32_swap (0x2));
781 lurb_priv
->td_cnt
+= lurb_priv
->length
- td_list
->index
- 1;
783 td_list
->ed
->hwHeadP
&= m32_swap (0xfffffff2);
787 td_list
->next_dl_td
= td_rev
;
789 td_list_hc
= m32_swap (td_list
->hwNextTD
) & 0xfffffff0;
794 /*-------------------------------------------------------------------------*/
797 static int dl_done_list (ohci_t
*ohci
, td_t
*td_list
)
799 td_t
*td_list_next
= NULL
;
804 urb_priv_t
*lurb_priv
;
805 __u32 tdINFO
, edHeadP
, edTailP
;
808 td_list_next
= td_list
->next_dl_td
;
810 lurb_priv
= &urb_priv
;
811 tdINFO
= m32_swap (td_list
->hwINFO
);
815 dl_transfer_length(td_list
);
817 /* error code of transfer */
818 cc
= TD_CC_GET (tdINFO
);
820 dbg("ConditionCode %#x", cc
);
821 stat
= cc_to_error
[cc
];
824 if (ed
->state
!= ED_NEW
) {
825 edHeadP
= m32_swap (ed
->hwHeadP
) & 0xfffffff0;
826 edTailP
= m32_swap (ed
->hwTailP
);
828 /* unlink eds if they are not busy */
829 if ((edHeadP
== edTailP
) && (ed
->state
== ED_OPER
))
830 ep_unlink (ohci
, ed
);
833 td_list
= td_list_next
;
838 /*-------------------------------------------------------------------------*
840 *-------------------------------------------------------------------------*/
842 /* Device descriptor */
843 static __u8 root_hub_dev_des
[] =
845 0x12, /* __u8 bLength; */
846 0x01, /* __u8 bDescriptorType; Device */
847 0x10, /* __u16 bcdUSB; v1.1 */
849 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
850 0x00, /* __u8 bDeviceSubClass; */
851 0x00, /* __u8 bDeviceProtocol; */
852 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
853 0x00, /* __u16 idVendor; */
855 0x00, /* __u16 idProduct; */
857 0x00, /* __u16 bcdDevice; */
859 0x00, /* __u8 iManufacturer; */
860 0x01, /* __u8 iProduct; */
861 0x00, /* __u8 iSerialNumber; */
862 0x01 /* __u8 bNumConfigurations; */
866 /* Configuration descriptor */
867 static __u8 root_hub_config_des
[] =
869 0x09, /* __u8 bLength; */
870 0x02, /* __u8 bDescriptorType; Configuration */
871 0x19, /* __u16 wTotalLength; */
873 0x01, /* __u8 bNumInterfaces; */
874 0x01, /* __u8 bConfigurationValue; */
875 0x00, /* __u8 iConfiguration; */
876 0x40, /* __u8 bmAttributes;
877 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
878 0x00, /* __u8 MaxPower; */
881 0x09, /* __u8 if_bLength; */
882 0x04, /* __u8 if_bDescriptorType; Interface */
883 0x00, /* __u8 if_bInterfaceNumber; */
884 0x00, /* __u8 if_bAlternateSetting; */
885 0x01, /* __u8 if_bNumEndpoints; */
886 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
887 0x00, /* __u8 if_bInterfaceSubClass; */
888 0x00, /* __u8 if_bInterfaceProtocol; */
889 0x00, /* __u8 if_iInterface; */
892 0x07, /* __u8 ep_bLength; */
893 0x05, /* __u8 ep_bDescriptorType; Endpoint */
894 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
895 0x03, /* __u8 ep_bmAttributes; Interrupt */
896 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
898 0xff /* __u8 ep_bInterval; 255 ms */
901 static unsigned char root_hub_str_index0
[] =
903 0x04, /* __u8 bLength; */
904 0x03, /* __u8 bDescriptorType; String-descriptor */
905 0x09, /* __u8 lang ID */
906 0x04, /* __u8 lang ID */
909 static unsigned char root_hub_str_index1
[] =
911 28, /* __u8 bLength; */
912 0x03, /* __u8 bDescriptorType; String-descriptor */
913 'O', /* __u8 Unicode */
914 0, /* __u8 Unicode */
915 'H', /* __u8 Unicode */
916 0, /* __u8 Unicode */
917 'C', /* __u8 Unicode */
918 0, /* __u8 Unicode */
919 'I', /* __u8 Unicode */
920 0, /* __u8 Unicode */
921 ' ', /* __u8 Unicode */
922 0, /* __u8 Unicode */
923 'R', /* __u8 Unicode */
924 0, /* __u8 Unicode */
925 'o', /* __u8 Unicode */
926 0, /* __u8 Unicode */
927 'o', /* __u8 Unicode */
928 0, /* __u8 Unicode */
929 't', /* __u8 Unicode */
930 0, /* __u8 Unicode */
931 ' ', /* __u8 Unicode */
932 0, /* __u8 Unicode */
933 'H', /* __u8 Unicode */
934 0, /* __u8 Unicode */
935 'u', /* __u8 Unicode */
936 0, /* __u8 Unicode */
937 'b', /* __u8 Unicode */
938 0, /* __u8 Unicode */
941 /* Hub class-specific descriptor is constructed dynamically */
944 /*-------------------------------------------------------------------------*/
946 #define OK(x) len = (x); break
948 #define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
949 #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
951 #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
952 #define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
954 #define RD_RH_STAT roothub_status(&gohci)
955 #define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
957 /* request to virtual root hub */
959 int rh_check_port_status(ohci_t
*controller
)
965 temp
= roothub_a (controller
);
966 ndp
= (temp
& RH_A_NDP
);
967 for (i
= 0; i
< ndp
; i
++) {
968 temp
= roothub_portstatus (controller
, i
);
969 /* check for a device disconnect */
970 if (((temp
& (RH_PS_PESC
| RH_PS_CSC
)) ==
971 (RH_PS_PESC
| RH_PS_CSC
)) &&
972 ((temp
& RH_PS_CCS
) == 0)) {
980 static int ohci_submit_rh_msg(struct usb_device
*dev
, unsigned long pipe
,
981 void *buffer
, int transfer_len
, struct devrequest
*cmd
)
983 void * data
= buffer
;
984 int leni
= transfer_len
;
988 __u8
*data_buf
= (__u8
*)datab
;
995 urb_priv
.actual_length
= 0;
996 pkt_print(dev
, pipe
, buffer
, transfer_len
, cmd
, "SUB(rh)", usb_pipein(pipe
));
1000 if (usb_pipeint(pipe
)) {
1001 info("Root-Hub submit IRQ: NOT implemented");
1005 bmRType_bReq
= cmd
->requesttype
| (cmd
->request
<< 8);
1006 wValue
= m16_swap (cmd
->value
);
1007 wIndex
= m16_swap (cmd
->index
);
1008 wLength
= m16_swap (cmd
->length
);
1010 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1011 dev
->devnum
, 8, bmRType_bReq
, wValue
, wIndex
, wLength
);
1013 switch (bmRType_bReq
) {
1014 /* Request Destination:
1015 without flags: Device,
1016 RH_INTERFACE: interface,
1017 RH_ENDPOINT: endpoint,
1018 RH_CLASS means HUB here,
1019 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1023 *(__u16
*) data_buf
= m16_swap (1); OK (2);
1024 case RH_GET_STATUS
| RH_INTERFACE
:
1025 *(__u16
*) data_buf
= m16_swap (0); OK (2);
1026 case RH_GET_STATUS
| RH_ENDPOINT
:
1027 *(__u16
*) data_buf
= m16_swap (0); OK (2);
1028 case RH_GET_STATUS
| RH_CLASS
:
1029 *(__u32
*) data_buf
= m32_swap (
1030 RD_RH_STAT
& ~(RH_HS_CRWE
| RH_HS_DRWE
));
1032 case RH_GET_STATUS
| RH_OTHER
| RH_CLASS
:
1033 *(__u32
*) data_buf
= m32_swap (RD_RH_PORTSTAT
); OK (4);
1035 case RH_CLEAR_FEATURE
| RH_ENDPOINT
:
1037 case (RH_ENDPOINT_STALL
): OK (0);
1041 case RH_CLEAR_FEATURE
| RH_CLASS
:
1043 case RH_C_HUB_LOCAL_POWER
:
1045 case (RH_C_HUB_OVER_CURRENT
):
1046 WR_RH_STAT(RH_HS_OCIC
); OK (0);
1050 case RH_CLEAR_FEATURE
| RH_OTHER
| RH_CLASS
:
1052 case (RH_PORT_ENABLE
):
1053 WR_RH_PORTSTAT (RH_PS_CCS
); OK (0);
1054 case (RH_PORT_SUSPEND
):
1055 WR_RH_PORTSTAT (RH_PS_POCI
); OK (0);
1056 case (RH_PORT_POWER
):
1057 WR_RH_PORTSTAT (RH_PS_LSDA
); OK (0);
1058 case (RH_C_PORT_CONNECTION
):
1059 WR_RH_PORTSTAT (RH_PS_CSC
); OK (0);
1060 case (RH_C_PORT_ENABLE
):
1061 WR_RH_PORTSTAT (RH_PS_PESC
); OK (0);
1062 case (RH_C_PORT_SUSPEND
):
1063 WR_RH_PORTSTAT (RH_PS_PSSC
); OK (0);
1064 case (RH_C_PORT_OVER_CURRENT
):
1065 WR_RH_PORTSTAT (RH_PS_OCIC
); OK (0);
1066 case (RH_C_PORT_RESET
):
1067 WR_RH_PORTSTAT (RH_PS_PRSC
); OK (0);
1071 case RH_SET_FEATURE
| RH_OTHER
| RH_CLASS
:
1073 case (RH_PORT_SUSPEND
):
1074 WR_RH_PORTSTAT (RH_PS_PSS
); OK (0);
1075 case (RH_PORT_RESET
): /* BUG IN HUP CODE *********/
1076 if (RD_RH_PORTSTAT
& RH_PS_CCS
)
1077 WR_RH_PORTSTAT (RH_PS_PRS
);
1079 case (RH_PORT_POWER
):
1080 WR_RH_PORTSTAT (RH_PS_PPS
); OK (0);
1081 case (RH_PORT_ENABLE
): /* BUG IN HUP CODE *********/
1082 if (RD_RH_PORTSTAT
& RH_PS_CCS
)
1083 WR_RH_PORTSTAT (RH_PS_PES
);
1088 case RH_SET_ADDRESS
: gohci
.rh
.devnum
= wValue
; OK(0);
1090 case RH_GET_DESCRIPTOR
:
1091 switch ((wValue
& 0xff00) >> 8) {
1092 case (0x01): /* device descriptor */
1093 len
= min_t(unsigned int,
1096 sizeof (root_hub_dev_des
),
1098 data_buf
= root_hub_dev_des
; OK(len
);
1099 case (0x02): /* configuration descriptor */
1100 len
= min_t(unsigned int,
1103 sizeof (root_hub_config_des
),
1105 data_buf
= root_hub_config_des
; OK(len
);
1106 case (0x03): /* string descriptors */
1107 if(wValue
==0x0300) {
1108 len
= min_t(unsigned int,
1111 sizeof (root_hub_str_index0
),
1113 data_buf
= root_hub_str_index0
;
1116 if(wValue
==0x0301) {
1117 len
= min_t(unsigned int,
1120 sizeof (root_hub_str_index1
),
1122 data_buf
= root_hub_str_index1
;
1126 stat
= USB_ST_STALLED
;
1130 case RH_GET_DESCRIPTOR
| RH_CLASS
:
1132 __u32 temp
= roothub_a (&gohci
);
1134 data_buf
[0] = 9; /* min length; */
1135 data_buf
[1] = 0x29;
1136 data_buf
[2] = temp
& RH_A_NDP
;
1138 if (temp
& RH_A_PSM
) /* per-port power switching? */
1139 data_buf
[3] |= 0x1;
1140 if (temp
& RH_A_NOCP
) /* no overcurrent reporting? */
1141 data_buf
[3] |= 0x10;
1142 else if (temp
& RH_A_OCPM
) /* per-port overcurrent reporting? */
1143 data_buf
[3] |= 0x8;
1145 /* corresponds to data_buf[4-7] */
1147 data_buf
[5] = (temp
& RH_A_POTPGT
) >> 24;
1148 temp
= roothub_b (&gohci
);
1149 data_buf
[7] = temp
& RH_B_DR
;
1150 if (data_buf
[2] < 7) {
1151 data_buf
[8] = 0xff;
1154 data_buf
[8] = (temp
& RH_B_DR
) >> 8;
1155 data_buf
[10] = data_buf
[9] = 0xff;
1158 len
= min_t(unsigned int, leni
,
1159 min_t(unsigned int, data_buf
[0], wLength
));
1163 case RH_GET_CONFIGURATION
: *(__u8
*) data_buf
= 0x01; OK (1);
1165 case RH_SET_CONFIGURATION
: WR_RH_STAT (0x10000); OK (0);
1168 dbg ("unsupported root hub command");
1169 stat
= USB_ST_STALLED
;
1173 ohci_dump_roothub (&gohci
, 1);
1178 len
= min_t(int, len
, leni
);
1179 if (data
!= data_buf
)
1180 memcpy (data
, data_buf
, len
);
1186 urb_priv
.actual_length
= transfer_len
;
1187 pkt_print(dev
, pipe
, buffer
, transfer_len
, cmd
, "RET(rh)", 0/*usb_pipein(pipe)*/);
1195 /*-------------------------------------------------------------------------*/
1197 /* common code for handling submit messages - used for all but root hub */
1199 int submit_common_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
1200 int transfer_len
, struct devrequest
*setup
, int interval
)
1203 int maxsize
= usb_maxpacket(dev
, pipe
);
1206 /* device pulled? Shortcut the action. */
1207 if (devgone
== dev
) {
1208 dev
->status
= USB_ST_CRC_ERR
;
1213 urb_priv
.actual_length
= 0;
1214 pkt_print(dev
, pipe
, buffer
, transfer_len
, setup
, "SUB", usb_pipein(pipe
));
1219 err("submit_common_message: pipesize for pipe %lx is zero",
1224 if (sohci_submit_job(dev
, pipe
, buffer
, transfer_len
, setup
, interval
) < 0) {
1225 err("sohci_submit_job failed");
1230 /* ohci_dump_status(&gohci); */
1232 /* allow more time for a BULK device to react - some are slow */
1233 #define BULK_TO 5000 /* timeout in milliseconds */
1234 if (usb_pipebulk(pipe
))
1240 /* wait for it to complete */
1242 /* check whether the controller is done */
1243 stat
= hc_interrupt();
1245 stat
= USB_ST_CRC_ERR
;
1248 if (stat
>= 0 && stat
!= 0xff) {
1249 /* 0xff is returned for an SF-interrupt */
1253 udelay(250); /* mdelay(1); */
1255 err("CTL:TIMEOUT ");
1256 stat
= USB_ST_CRC_ERR
;
1260 /* we got an Root Hub Status Change interrupt */
1263 ohci_dump_roothub (&gohci
, 1);
1267 timeout
= rh_check_port_status(&gohci
);
1269 #if 0 /* this does nothing useful, but leave it here in case that changes */
1270 /* the called routine adds 1 to the passed value */
1271 usb_hub_port_connect_change(gohci
.rh
.dev
, timeout
- 1);
1275 * This is potentially dangerous because it assumes
1276 * that only one device is ever plugged in!
1283 dev
->act_len
= transfer_len
;
1286 pkt_print(dev
, pipe
, buffer
, transfer_len
, setup
, "RET(ctlr)", usb_pipein(pipe
));
1291 /* free TDs in urb_priv */
1292 urb_free_priv (&urb_priv
);
1296 /* submit routines called from usb.c */
1297 int submit_bulk_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
1300 info("submit_bulk_msg");
1301 return submit_common_msg(dev
, pipe
, buffer
, transfer_len
, NULL
, 0);
1304 int submit_control_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
1305 int transfer_len
, struct devrequest
*setup
)
1307 int maxsize
= usb_maxpacket(dev
, pipe
);
1309 info("submit_control_msg");
1311 urb_priv
.actual_length
= 0;
1312 pkt_print(dev
, pipe
, buffer
, transfer_len
, setup
, "SUB", usb_pipein(pipe
));
1317 err("submit_control_message: pipesize for pipe %lx is zero",
1321 if (((pipe
>> 8) & 0x7f) == gohci
.rh
.devnum
) {
1323 /* root hub - redirect */
1324 return ohci_submit_rh_msg(dev
, pipe
, buffer
, transfer_len
,
1328 return submit_common_msg(dev
, pipe
, buffer
, transfer_len
, setup
, 0);
1331 int submit_int_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
1332 int transfer_len
, int interval
)
1334 info("submit_int_msg");
1338 /*-------------------------------------------------------------------------*
1340 *-------------------------------------------------------------------------*/
1342 /* reset the HC and BUS */
1344 static int hc_reset (ohci_t
*ohci
)
1347 int smm_timeout
= 50; /* 0,5 sec */
1349 if (readl (&ohci
->regs
->control
) & OHCI_CTRL_IR
) { /* SMM owns the HC */
1350 writel (OHCI_OCR
, &ohci
->regs
->cmdstatus
); /* request ownership */
1351 info("USB HC TakeOver from SMM");
1352 while (readl (&ohci
->regs
->control
) & OHCI_CTRL_IR
) {
1354 if (--smm_timeout
== 0) {
1355 err("USB HC TakeOver failed!");
1361 /* Disable HC interrupts */
1362 writel (OHCI_INTR_MIE
, &ohci
->regs
->intrdisable
);
1364 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
1366 readl (&ohci
->regs
->control
));
1368 /* Reset USB (needed by some controllers) */
1369 writel (0, &ohci
->regs
->control
);
1371 /* HC Reset requires max 10 us delay */
1372 writel (OHCI_HCR
, &ohci
->regs
->cmdstatus
);
1373 while ((readl (&ohci
->regs
->cmdstatus
) & OHCI_HCR
) != 0) {
1374 if (--timeout
== 0) {
1375 err("USB HC reset timed out!");
1383 /*-------------------------------------------------------------------------*/
1385 /* Start an OHCI controller, set the BUS operational
1387 * connect the virtual root hub */
1389 static int hc_start (ohci_t
* ohci
)
1392 unsigned int fminterval
;
1396 /* Tell the controller where the control and bulk lists are
1397 * The lists are empty now. */
1399 writel (0, &ohci
->regs
->ed_controlhead
);
1400 writel (0, &ohci
->regs
->ed_bulkhead
);
1402 writel ((__u32
)ohci
->hcca
, &ohci
->regs
->hcca
); /* a reset clears this */
1404 fminterval
= 0x2edf;
1405 writel ((fminterval
* 9) / 10, &ohci
->regs
->periodicstart
);
1406 fminterval
|= ((((fminterval
- 210) * 6) / 7) << 16);
1407 writel (fminterval
, &ohci
->regs
->fminterval
);
1408 writel (0x628, &ohci
->regs
->lsthresh
);
1410 /* start controller operations */
1411 ohci
->hc_control
= OHCI_CONTROL_INIT
| OHCI_USB_OPER
;
1413 writel (ohci
->hc_control
, &ohci
->regs
->control
);
1415 /* disable all interrupts */
1416 mask
= (OHCI_INTR_SO
| OHCI_INTR_WDH
| OHCI_INTR_SF
| OHCI_INTR_RD
|
1417 OHCI_INTR_UE
| OHCI_INTR_FNO
| OHCI_INTR_RHSC
|
1418 OHCI_INTR_OC
| OHCI_INTR_MIE
);
1419 writel (mask
, &ohci
->regs
->intrdisable
);
1420 /* clear all interrupts */
1421 mask
&= ~OHCI_INTR_MIE
;
1422 writel (mask
, &ohci
->regs
->intrstatus
);
1423 /* Choose the interrupts we care about now - but w/o MIE */
1424 mask
= OHCI_INTR_RHSC
| OHCI_INTR_UE
| OHCI_INTR_WDH
| OHCI_INTR_SO
;
1425 writel (mask
, &ohci
->regs
->intrenable
);
1428 /* required for AMD-756 and some Mac platforms */
1429 writel ((roothub_a (ohci
) | RH_A_NPS
) & ~RH_A_PSM
,
1430 &ohci
->regs
->roothub
.a
);
1431 writel (RH_HS_LPSC
, &ohci
->regs
->roothub
.status
);
1432 #endif /* OHCI_USE_NPS */
1434 /* POTPGT delay is bits 24-31, in 2 ms units. */
1435 mdelay ((roothub_a (ohci
) >> 23) & 0x1fe);
1437 /* connect the virtual root hub */
1438 ohci
->rh
.devnum
= 0;
1443 /*-------------------------------------------------------------------------*/
1445 /* an interrupt happens */
1450 ohci_t
*ohci
= &gohci
;
1451 struct ohci_regs
*regs
= ohci
->regs
;
1455 if ((ohci
->hcca
->done_head
!= 0) && !(m32_swap (ohci
->hcca
->done_head
) & 0x01)) {
1456 ints
= OHCI_INTR_WDH
;
1458 ints
= readl (®s
->intrstatus
);
1461 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1463 if (ints
& OHCI_INTR_RHSC
) {
1467 if (ints
& OHCI_INTR_UE
) {
1469 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1471 /* e.g. due to PCI Master/Target Abort */
1474 ohci_dump (ohci
, 1);
1478 /* FIXME: be optimistic, hope that bug won't repeat often. */
1479 /* Make some non-interrupt context restart the controller. */
1480 /* Count and limit the retries though; either hardware or */
1481 /* software errors can go forever... */
1486 if (ints
& OHCI_INTR_WDH
) {
1488 writel (OHCI_INTR_WDH
, ®s
->intrdisable
);
1489 stat
= dl_done_list (&gohci
, dl_reverse_done_list (&gohci
));
1490 writel (OHCI_INTR_WDH
, ®s
->intrenable
);
1493 if (ints
& OHCI_INTR_SO
) {
1494 dbg("USB Schedule overrun\n");
1495 writel (OHCI_INTR_SO
, ®s
->intrenable
);
1499 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1500 if (ints
& OHCI_INTR_SF
) {
1501 unsigned int frame
= m16_swap (ohci
->hcca
->frame_no
) & 1;
1503 writel (OHCI_INTR_SF
, ®s
->intrdisable
);
1504 if (ohci
->ed_rm_list
[frame
] != NULL
)
1505 writel (OHCI_INTR_SF
, ®s
->intrenable
);
1509 writel (ints
, ®s
->intrstatus
);
1513 /*-------------------------------------------------------------------------*/
1515 /*-------------------------------------------------------------------------*/
1517 /* De-allocate all resources.. */
1519 static void hc_release_ohci (ohci_t
*ohci
)
1521 dbg ("USB HC release ohci usb-%s", ohci
->slot_name
);
1523 if (!ohci
->disabled
)
1527 /*-------------------------------------------------------------------------*/
1529 #define __read_32bit_c0_register(source, sel) \
1532 __asm__ __volatile__( \
1533 "mfc0\t%0, " #source "\n\t" \
1536 __asm__ __volatile__( \
1537 ".set\tmips32\n\t" \
1538 "mfc0\t%0, " #source ", " #sel "\n\t" \
1544 #define read_c0_prid() __read_32bit_c0_register($15, 0)
1547 * low level initalisation routine, called from usb.c
1549 static char ohci_inited
= 0;
1551 int usb_lowlevel_init(int index
, void **controller
)
1554 u32 sys_freqctrl
, sys_clksrc
;
1555 u32 prid
= read_c0_prid();
1557 dbg("in usb_lowlevel_init\n");
1559 /* zero and disable FREQ2 */
1560 sys_freqctrl
= au_readl(SYS_FREQCTRL0
);
1561 sys_freqctrl
&= ~0xFFF00000;
1562 au_writel(sys_freqctrl
, SYS_FREQCTRL0
);
1564 /* zero and disable USBH/USBD clocks */
1565 sys_clksrc
= au_readl(SYS_CLKSRC
);
1566 sys_clksrc
&= ~0x00007FE0;
1567 au_writel(sys_clksrc
, SYS_CLKSRC
);
1569 sys_freqctrl
= au_readl(SYS_FREQCTRL0
);
1570 sys_freqctrl
&= ~0xFFF00000;
1572 sys_clksrc
= au_readl(SYS_CLKSRC
);
1573 sys_clksrc
&= ~0x00007FE0;
1575 switch (prid
& 0x000000FF) {
1579 /* CPU core freq to 48MHz to slow it way down... */
1580 au_writel(4, SYS_CPUPLL
);
1583 * Setup 48MHz FREQ2 from CPUPLL for USB Host
1585 /* FRDIV2=3 -> div by 8 of 384MHz -> 48MHz */
1586 sys_freqctrl
|= ((3<<22) | (1<<21) | (0<<20));
1587 au_writel(sys_freqctrl
, SYS_FREQCTRL0
);
1589 /* CPU core freq to 384MHz */
1590 au_writel(0x20, SYS_CPUPLL
);
1592 printf("Au1000: 48MHz OHCI workaround enabled\n");
1595 default: /* HC and newer */
1596 /* FREQ2 = aux/2 = 48 MHz */
1597 sys_freqctrl
|= ((0<<22) | (1<<21) | (1<<20));
1598 au_writel(sys_freqctrl
, SYS_FREQCTRL0
);
1603 * Route 48MHz FREQ2 into USB Host and/or Device
1605 sys_clksrc
|= ((4<<12) | (0<<11) | (0<<10));
1606 au_writel(sys_clksrc
, SYS_CLKSRC
);
1608 /* configure pins GPIO[14:9] as GPIO */
1609 pin_func
= au_readl(SYS_PINFUNC
) & (u32
)(~0x8080);
1611 au_writel(pin_func
, SYS_PINFUNC
);
1612 au_writel(0x2800, SYS_TRIOUTCLR
);
1613 au_writel(0x0030, SYS_OUTPUTCLR
);
1615 dbg("OHCI board setup complete\n");
1617 /* enable host controller */
1618 au_writel(USBH_ENABLE_CE
, USB_HOST_CONFIG
);
1620 au_writel(USBH_ENABLE_INIT
, USB_HOST_CONFIG
);
1623 /* wait for reset complete (read register twice; see au1500 errata) */
1624 while (au_readl(USB_HOST_CONFIG
),
1625 !(au_readl(USB_HOST_CONFIG
) & USBH_ENABLE_RD
))
1628 dbg("OHCI clock running\n");
1630 memset (&gohci
, 0, sizeof (ohci_t
));
1631 memset (&urb_priv
, 0, sizeof (urb_priv_t
));
1633 /* align the storage */
1634 if ((__u32
)&ghcca
[0] & 0xff) {
1635 err("HCCA not aligned!!");
1639 info("aligned ghcca %p", phcca
);
1640 memset(&ohci_dev
, 0, sizeof(struct ohci_device
));
1641 if ((__u32
)&ohci_dev
.ed
[0] & 0x7) {
1642 err("EDs not aligned!!");
1645 memset(gtd
, 0, sizeof(td_t
) * (NUM_TD
+ 1));
1646 if ((__u32
)gtd
& 0x7) {
1647 err("TDs not aligned!!");
1652 memset (phcca
, 0, sizeof (struct ohci_hcca
));
1657 gohci
.regs
= (struct ohci_regs
*)(USB_OHCI_BASE
| 0xA0000000);
1660 gohci
.slot_name
= "au1x00";
1662 dbg("OHCI revision: 0x%08x\n"
1663 " RH: a: 0x%08x b: 0x%08x\n",
1664 readl(&gohci
.regs
->revision
),
1665 readl(&gohci
.regs
->roothub
.a
), readl(&gohci
.regs
->roothub
.b
));
1667 if (hc_reset (&gohci
) < 0)
1670 /* FIXME this is a second HC reset; why?? */
1671 writel (gohci
.hc_control
= OHCI_USB_RESET
, &gohci
.regs
->control
);
1674 if (hc_start (&gohci
) < 0)
1678 ohci_dump (&gohci
, 1);
1686 err("OHCI initialization error\n");
1687 hc_release_ohci (&gohci
);
1688 /* Initialization failed */
1689 au_writel(readl(USB_HOST_CONFIG
) & ~USBH_ENABLE_CE
, USB_HOST_CONFIG
);
1693 int usb_lowlevel_stop(int index
)
1695 /* this gets called really early - before the controller has */
1696 /* even been initialized! */
1699 /* TODO release any interrupts, etc. */
1700 /* call hc_release_ohci() here ? */
1702 /* may not want to do this */
1704 au_writel(readl(USB_HOST_CONFIG
) & ~USBH_ENABLE_CE
, USB_HOST_CONFIG
);
1708 #endif /* CONFIG_USB_OHCI */