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1 /*
2 * (C) Copyright 2000-2011
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 #include <common.h>
9 #include <watchdog.h>
10 #include <command.h>
11 #include <malloc.h>
12 #include <stdio_dev.h>
13 #ifdef CONFIG_8xx
14 #include <mpc8xx.h>
15 #endif
16 #ifdef CONFIG_5xx
17 #include <mpc5xx.h>
18 #endif
19 #ifdef CONFIG_MPC5xxx
20 #include <mpc5xxx.h>
21 #endif
22 #if defined(CONFIG_CMD_IDE)
23 #include <ide.h>
24 #endif
25 #if defined(CONFIG_CMD_SCSI)
26 #include <scsi.h>
27 #endif
28 #if defined(CONFIG_CMD_KGDB)
29 #include <kgdb.h>
30 #endif
31 #ifdef CONFIG_STATUS_LED
32 #include <status_led.h>
33 #endif
34 #include <net.h>
35 #ifdef CONFIG_GENERIC_MMC
36 #include <mmc.h>
37 #endif
38 #include <serial.h>
39 #ifdef CONFIG_SYS_ALLOC_DPRAM
40 #if !defined(CONFIG_CPM2)
41 #include <commproc.h>
42 #endif
43 #endif
44 #include <version.h>
45 #if defined(CONFIG_BAB7xx)
46 #include <w83c553f.h>
47 #endif
48 #include <dtt.h>
49 #if defined(CONFIG_POST)
50 #include <post.h>
51 #endif
52 #if defined(CONFIG_LOGBUFFER)
53 #include <logbuff.h>
54 #endif
55 #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
56 #include <asm/cache.h>
57 #endif
58 #ifdef CONFIG_PS2KBD
59 #include <keyboard.h>
60 #endif
61
62 #ifdef CONFIG_ADDR_MAP
63 #include <asm/mmu.h>
64 #endif
65
66 #ifdef CONFIG_MP
67 #include <asm/mp.h>
68 #endif
69
70 #ifdef CONFIG_BITBANGMII
71 #include <miiphy.h>
72 #endif
73
74 #ifdef CONFIG_SYS_UPDATE_FLASH_SIZE
75 extern int update_flash_size(int flash_size);
76 #endif
77
78 #if defined(CONFIG_SC3)
79 extern void sc3_read_eeprom(void);
80 #endif
81
82 #if defined(CONFIG_CMD_DOC)
83 void doc_init(void);
84 #endif
85 #if defined(CONFIG_HARD_I2C) || \
86 defined(CONFIG_SOFT_I2C)
87 #include <i2c.h>
88 #endif
89 #include <spi.h>
90 #include <nand.h>
91
92 static char *failed = "*** failed ***\n";
93
94 #if defined(CONFIG_OXC) || defined(CONFIG_RMU)
95 extern flash_info_t flash_info[];
96 #endif
97
98 #if defined(CONFIG_START_IDE)
99 extern int board_start_ide(void);
100 #endif
101 #include <environment.h>
102
103 DECLARE_GLOBAL_DATA_PTR;
104
105 #if !defined(CONFIG_SYS_MEM_TOP_HIDE)
106 #define CONFIG_SYS_MEM_TOP_HIDE 0
107 #endif
108
109 extern ulong __init_end;
110 extern ulong __bss_end;
111 ulong monitor_flash_len;
112
113 #if defined(CONFIG_CMD_BEDBUG)
114 #include <bedbug/type.h>
115 #endif
116
117 /*
118 * Utilities
119 */
120
121 /*
122 * All attempts to come up with a "common" initialization sequence
123 * that works for all boards and architectures failed: some of the
124 * requirements are just _too_ different. To get rid of the resulting
125 * mess of board dependend #ifdef'ed code we now make the whole
126 * initialization sequence configurable to the user.
127 *
128 * The requirements for any new initalization function is simple: it
129 * receives a pointer to the "global data" structure as it's only
130 * argument, and returns an integer return code, where 0 means
131 * "continue" and != 0 means "fatal error, hang the system".
132 */
133 typedef int (init_fnc_t)(void);
134
135 /*
136 * Init Utilities
137 *
138 * Some of this code should be moved into the core functions,
139 * but let's get it working (again) first...
140 */
141
142 static int init_baudrate(void)
143 {
144 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
145 return 0;
146 }
147
148 /***********************************************************************/
149
150 static void __board_add_ram_info(int use_default)
151 {
152 /* please define platform specific board_add_ram_info() */
153 }
154
155 void board_add_ram_info(int)
156 __attribute__ ((weak, alias("__board_add_ram_info")));
157
158 static int __board_flash_wp_on(void)
159 {
160 /*
161 * Most flashes can't be detected when write protection is enabled,
162 * so provide a way to let U-Boot gracefully ignore write protected
163 * devices.
164 */
165 return 0;
166 }
167
168 int board_flash_wp_on(void)
169 __attribute__ ((weak, alias("__board_flash_wp_on")));
170
171 static void __cpu_secondary_init_r(void)
172 {
173 }
174
175 void cpu_secondary_init_r(void)
176 __attribute__ ((weak, alias("__cpu_secondary_init_r")));
177
178 static int init_func_ram(void)
179 {
180 #ifdef CONFIG_BOARD_TYPES
181 int board_type = gd->board_type;
182 #else
183 int board_type = 0; /* use dummy arg */
184 #endif
185 puts("DRAM: ");
186
187 gd->ram_size = initdram(board_type);
188
189 if (gd->ram_size > 0) {
190 print_size(gd->ram_size, "");
191 board_add_ram_info(0);
192 putc('\n');
193 return 0;
194 }
195 puts(failed);
196 return 1;
197 }
198
199 /***********************************************************************/
200
201 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
202 static int init_func_i2c(void)
203 {
204 puts("I2C: ");
205 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
206 puts("ready\n");
207 return 0;
208 }
209 #endif
210
211 #if defined(CONFIG_HARD_SPI)
212 static int init_func_spi(void)
213 {
214 puts("SPI: ");
215 spi_init();
216 puts("ready\n");
217 return 0;
218 }
219 #endif
220
221 /***********************************************************************/
222
223 #if defined(CONFIG_WATCHDOG)
224 int init_func_watchdog_init(void)
225 {
226 puts(" Watchdog enabled\n");
227 WATCHDOG_RESET();
228 return 0;
229 }
230
231 int init_func_watchdog_reset(void)
232 {
233 WATCHDOG_RESET();
234 return 0;
235 }
236 #endif /* CONFIG_WATCHDOG */
237
238 /*
239 * Initialization sequence
240 */
241
242 static init_fnc_t *init_sequence[] = {
243 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
244 probecpu,
245 #endif
246 #if defined(CONFIG_BOARD_EARLY_INIT_F)
247 board_early_init_f,
248 #endif
249 #if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
250 get_clocks, /* get CPU and bus clocks (etc.) */
251 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
252 && !defined(CONFIG_TQM885D)
253 adjust_sdram_tbs_8xx,
254 #endif
255 init_timebase,
256 #endif
257 #ifdef CONFIG_SYS_ALLOC_DPRAM
258 #if !defined(CONFIG_CPM2)
259 dpram_init,
260 #endif
261 #endif
262 #if defined(CONFIG_BOARD_POSTCLK_INIT)
263 board_postclk_init,
264 #endif
265 env_init,
266 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
267 /* get CPU and bus clocks according to the environment variable */
268 get_clocks_866,
269 /* adjust sdram refresh rate according to the new clock */
270 sdram_adjust_866,
271 init_timebase,
272 #endif
273 init_baudrate,
274 serial_init,
275 console_init_f,
276 display_options,
277 #if defined(CONFIG_8260)
278 prt_8260_rsr,
279 prt_8260_clks,
280 #endif /* CONFIG_8260 */
281 #if defined(CONFIG_MPC83xx)
282 prt_83xx_rsr,
283 #endif
284 checkcpu,
285 #if defined(CONFIG_MPC5xxx)
286 prt_mpc5xxx_clks,
287 #endif /* CONFIG_MPC5xxx */
288 checkboard,
289 INIT_FUNC_WATCHDOG_INIT
290 #if defined(CONFIG_MISC_INIT_F)
291 misc_init_f,
292 #endif
293 INIT_FUNC_WATCHDOG_RESET
294 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
295 init_func_i2c,
296 #endif
297 #if defined(CONFIG_HARD_SPI)
298 init_func_spi,
299 #endif
300 #ifdef CONFIG_POST
301 post_init_f,
302 #endif
303 INIT_FUNC_WATCHDOG_RESET
304 init_func_ram,
305 #if defined(CONFIG_SYS_DRAM_TEST)
306 testdram,
307 #endif /* CONFIG_SYS_DRAM_TEST */
308 INIT_FUNC_WATCHDOG_RESET
309 NULL, /* Terminate this list */
310 };
311
312 ulong get_effective_memsize(void)
313 {
314 #ifndef CONFIG_VERY_BIG_RAM
315 return gd->ram_size;
316 #else
317 /* limit stack to what we can reasonable map */
318 return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
319 CONFIG_MAX_MEM_MAPPED : gd->ram_size);
320 #endif
321 }
322
323 static int __fixup_cpu(void)
324 {
325 return 0;
326 }
327
328 int fixup_cpu(void) __attribute__((weak, alias("__fixup_cpu")));
329
330 /*
331 * This is the first part of the initialization sequence that is
332 * implemented in C, but still running from ROM.
333 *
334 * The main purpose is to provide a (serial) console interface as
335 * soon as possible (so we can see any error messages), and to
336 * initialize the RAM so that we can relocate the monitor code to
337 * RAM.
338 *
339 * Be aware of the restrictions: global data is read-only, BSS is not
340 * initialized, and stack space is limited to a few kB.
341 */
342
343 #ifdef CONFIG_LOGBUFFER
344 unsigned long logbuffer_base(void)
345 {
346 return CONFIG_SYS_SDRAM_BASE + get_effective_memsize() - LOGBUFF_LEN;
347 }
348 #endif
349
350 void board_init_f(ulong bootflag)
351 {
352 bd_t *bd;
353 ulong len, addr, addr_sp;
354 ulong *s;
355 gd_t *id;
356 init_fnc_t **init_fnc_ptr;
357
358 #ifdef CONFIG_PRAM
359 ulong reg;
360 #endif
361
362 /* Pointer is writable since we allocated a register for it */
363 gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
364 /* compiler optimization barrier needed for GCC >= 3.4 */
365 __asm__ __volatile__("":::"memory");
366
367 #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
368 !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
369 !defined(CONFIG_MPC86xx)
370 /* Clear initial global data */
371 memset((void *) gd, 0, sizeof(gd_t));
372 #endif
373
374 for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr)
375 if ((*init_fnc_ptr) () != 0)
376 hang();
377
378 #ifdef CONFIG_POST
379 post_bootmode_init();
380 post_run(NULL, POST_ROM | post_bootmode_get(NULL));
381 #endif
382
383 WATCHDOG_RESET();
384
385 /*
386 * Now that we have DRAM mapped and working, we can
387 * relocate the code and continue running from DRAM.
388 *
389 * Reserve memory at end of RAM for (top down in that order):
390 * - area that won't get touched by U-Boot and Linux (optional)
391 * - kernel log buffer
392 * - protected RAM
393 * - LCD framebuffer
394 * - monitor code
395 * - board info struct
396 */
397 len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
398
399 /*
400 * Subtract specified amount of memory to hide so that it won't
401 * get "touched" at all by U-Boot. By fixing up gd->ram_size
402 * the Linux kernel should now get passed the now "corrected"
403 * memory size and won't touch it either. This should work
404 * for arch/ppc and arch/powerpc. Only Linux board ports in
405 * arch/powerpc with bootwrapper support, that recalculate the
406 * memory size from the SDRAM controller setup will have to
407 * get fixed.
408 */
409 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
410
411 addr = CONFIG_SYS_SDRAM_BASE + get_effective_memsize();
412
413 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
414 /*
415 * We need to make sure the location we intend to put secondary core
416 * boot code is reserved and not used by any part of u-boot
417 */
418 if (addr > determine_mp_bootpg(NULL)) {
419 addr = determine_mp_bootpg(NULL);
420 debug("Reserving MP boot page to %08lx\n", addr);
421 }
422 #endif
423
424 #ifdef CONFIG_LOGBUFFER
425 #ifndef CONFIG_ALT_LB_ADDR
426 /* reserve kernel log buffer */
427 addr -= (LOGBUFF_RESERVE);
428 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
429 addr);
430 #endif
431 #endif
432
433 #ifdef CONFIG_PRAM
434 /*
435 * reserve protected RAM
436 */
437 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
438 addr -= (reg << 10); /* size is in kB */
439 debug("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
440 #endif /* CONFIG_PRAM */
441
442 /* round down to next 4 kB limit */
443 addr &= ~(4096 - 1);
444 debug("Top of RAM usable for U-Boot at: %08lx\n", addr);
445
446 #ifdef CONFIG_LCD
447 #ifdef CONFIG_FB_ADDR
448 gd->fb_base = CONFIG_FB_ADDR;
449 #else
450 /* reserve memory for LCD display (always full pages) */
451 addr = lcd_setmem(addr);
452 gd->fb_base = addr;
453 #endif /* CONFIG_FB_ADDR */
454 #endif /* CONFIG_LCD */
455
456 #if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
457 /* reserve memory for video display (always full pages) */
458 addr = video_setmem(addr);
459 gd->fb_base = addr;
460 #endif /* CONFIG_VIDEO */
461
462 /*
463 * reserve memory for U-Boot code, data & bss
464 * round down to next 4 kB limit
465 */
466 addr -= len;
467 addr &= ~(4096 - 1);
468 #ifdef CONFIG_E500
469 /* round down to next 64 kB limit so that IVPR stays aligned */
470 addr &= ~(65536 - 1);
471 #endif
472
473 debug("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
474
475 /*
476 * reserve memory for malloc() arena
477 */
478 addr_sp = addr - TOTAL_MALLOC_LEN;
479 debug("Reserving %dk for malloc() at: %08lx\n",
480 TOTAL_MALLOC_LEN >> 10, addr_sp);
481
482 /*
483 * (permanently) allocate a Board Info struct
484 * and a permanent copy of the "global" data
485 */
486 addr_sp -= sizeof(bd_t);
487 bd = (bd_t *) addr_sp;
488 memset(bd, 0, sizeof(bd_t));
489 gd->bd = bd;
490 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
491 sizeof(bd_t), addr_sp);
492 addr_sp -= sizeof(gd_t);
493 id = (gd_t *) addr_sp;
494 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
495 sizeof(gd_t), addr_sp);
496
497 /*
498 * Finally, we set up a new (bigger) stack.
499 *
500 * Leave some safety gap for SP, force alignment on 16 byte boundary
501 * Clear initial stack frame
502 */
503 addr_sp -= 16;
504 addr_sp &= ~0xF;
505 s = (ulong *) addr_sp;
506 *s = 0; /* Terminate back chain */
507 *++s = 0; /* NULL return address */
508 debug("Stack Pointer at: %08lx\n", addr_sp);
509
510 /*
511 * Save local variables to board info struct
512 */
513
514 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
515 bd->bi_memsize = gd->ram_size; /* size in bytes */
516
517 #ifdef CONFIG_SYS_SRAM_BASE
518 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
519 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
520 #endif
521
522 #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
523 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
524 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
525 #endif
526 #if defined(CONFIG_MPC5xxx)
527 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
528 #endif
529 #if defined(CONFIG_MPC83xx)
530 bd->bi_immrbar = CONFIG_SYS_IMMR;
531 #endif
532
533 WATCHDOG_RESET();
534 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
535 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
536 #if defined(CONFIG_CPM2)
537 bd->bi_cpmfreq = gd->arch.cpm_clk;
538 bd->bi_brgfreq = gd->arch.brg_clk;
539 bd->bi_sccfreq = gd->arch.scc_clk;
540 bd->bi_vco = gd->arch.vco_out;
541 #endif /* CONFIG_CPM2 */
542 #if defined(CONFIG_MPC512X)
543 bd->bi_ipsfreq = gd->arch.ips_clk;
544 #endif /* CONFIG_MPC512X */
545 #if defined(CONFIG_MPC5xxx)
546 bd->bi_ipbfreq = gd->arch.ipb_clk;
547 bd->bi_pcifreq = gd->pci_clk;
548 #endif /* CONFIG_MPC5xxx */
549 bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
550
551 #ifdef CONFIG_SYS_EXTBDINFO
552 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
553 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
554 sizeof(bd->bi_r_version));
555
556 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
557 bd->bi_plb_busfreq = gd->bus_clk;
558 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
559 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
560 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
561 bd->bi_pci_busfreq = get_PCI_freq();
562 bd->bi_opbfreq = get_OPB_freq();
563 #elif defined(CONFIG_XILINX_405)
564 bd->bi_pci_busfreq = get_PCI_freq();
565 #endif
566 #endif
567
568 debug("New Stack Pointer is: %08lx\n", addr_sp);
569
570 WATCHDOG_RESET();
571
572 gd->relocaddr = addr; /* Store relocation addr, useful for debug */
573
574 memcpy(id, (void *) gd, sizeof(gd_t));
575
576 relocate_code(addr_sp, id, addr);
577
578 /* NOTREACHED - relocate_code() does not return */
579 }
580
581 /*
582 * This is the next part if the initialization sequence: we are now
583 * running from RAM and have a "normal" C environment, i. e. global
584 * data can be written, BSS has been cleared, the stack size in not
585 * that critical any more, etc.
586 */
587 void board_init_r(gd_t *id, ulong dest_addr)
588 {
589 bd_t *bd;
590 ulong malloc_start;
591
592 #ifndef CONFIG_SYS_NO_FLASH
593 ulong flash_size;
594 #endif
595
596 gd = id; /* initialize RAM version of global data */
597 bd = gd->bd;
598
599 gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
600
601 /* The Malloc area is immediately below the monitor copy in DRAM */
602 malloc_start = dest_addr - TOTAL_MALLOC_LEN;
603
604 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
605 /*
606 * The gd->arch.cpu pointer is set to an address in flash before
607 * relocation. We need to update it to point to the same CPU entry
608 * in RAM.
609 */
610 gd->arch.cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
611
612 /*
613 * If we didn't know the cpu mask & # cores, we can save them of
614 * now rather than 'computing' them constantly
615 */
616 fixup_cpu();
617 #endif
618
619 #ifdef CONFIG_SYS_EXTRA_ENV_RELOC
620 /*
621 * Some systems need to relocate the env_addr pointer early because the
622 * location it points to will get invalidated before env_relocate is
623 * called. One example is on systems that might use a L2 or L3 cache
624 * in SRAM mode and initialize that cache from SRAM mode back to being
625 * a cache in cpu_init_r.
626 */
627 gd->env_addr += dest_addr - CONFIG_SYS_MONITOR_BASE;
628 #endif
629
630 serial_initialize();
631
632 debug("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
633
634 WATCHDOG_RESET();
635
636 /*
637 * Setup trap handlers
638 */
639 trap_init(dest_addr);
640
641 #ifdef CONFIG_ADDR_MAP
642 init_addr_map();
643 #endif
644
645 #if defined(CONFIG_BOARD_EARLY_INIT_R)
646 board_early_init_r();
647 #endif
648
649 monitor_flash_len = (ulong)&__init_end - dest_addr;
650
651 WATCHDOG_RESET();
652
653 #ifdef CONFIG_LOGBUFFER
654 logbuff_init_ptrs();
655 #endif
656 #ifdef CONFIG_POST
657 post_output_backlog();
658 #endif
659
660 WATCHDOG_RESET();
661
662 #if defined(CONFIG_SYS_DELAYED_ICACHE)
663 icache_enable(); /* it's time to enable the instruction cache */
664 #endif
665
666 #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
667 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
668 #endif
669
670 #if defined(CONFIG_PCI) && defined(CONFIG_SYS_EARLY_PCI_INIT)
671 /*
672 * Do early PCI configuration _before_ the flash gets initialised,
673 * because PCU ressources are crucial for flash access on some boards.
674 */
675 pci_init();
676 #endif
677 #if defined(CONFIG_WINBOND_83C553)
678 /*
679 * Initialise the ISA bridge
680 */
681 initialise_w83c553f();
682 #endif
683
684 asm("sync ; isync");
685
686 mem_malloc_init(malloc_start, TOTAL_MALLOC_LEN);
687
688 #if !defined(CONFIG_SYS_NO_FLASH)
689 puts("Flash: ");
690
691 if (board_flash_wp_on()) {
692 printf("Uninitialized - Write Protect On\n");
693 /* Since WP is on, we can't find real size. Set to 0 */
694 flash_size = 0;
695 } else if ((flash_size = flash_init()) > 0) {
696 #ifdef CONFIG_SYS_FLASH_CHECKSUM
697 print_size(flash_size, "");
698 /*
699 * Compute and print flash CRC if flashchecksum is set to 'y'
700 *
701 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
702 */
703 if (getenv_yesno("flashchecksum") == 1) {
704 printf(" CRC: %08X",
705 crc32(0,
706 (const unsigned char *)
707 CONFIG_SYS_FLASH_BASE, flash_size)
708 );
709 }
710 putc('\n');
711 #else /* !CONFIG_SYS_FLASH_CHECKSUM */
712 print_size(flash_size, "\n");
713 #endif /* CONFIG_SYS_FLASH_CHECKSUM */
714 } else {
715 puts(failed);
716 hang();
717 }
718
719 /* update start of FLASH memory */
720 bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
721 /* size of FLASH memory (final value) */
722 bd->bi_flashsize = flash_size;
723
724 #if defined(CONFIG_SYS_UPDATE_FLASH_SIZE)
725 /* Make a update of the Memctrl. */
726 update_flash_size(flash_size);
727 #endif
728
729
730 #if defined(CONFIG_OXC) || defined(CONFIG_RMU)
731 /* flash mapped at end of memory map */
732 bd->bi_flashoffset = CONFIG_SYS_TEXT_BASE + flash_size;
733 #elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
734 bd->bi_flashoffset = monitor_flash_len; /* reserved area for monitor */
735 #endif
736 #endif /* !CONFIG_SYS_NO_FLASH */
737
738 WATCHDOG_RESET();
739
740 /* initialize higher level parts of CPU like time base and timers */
741 cpu_init_r();
742
743 WATCHDOG_RESET();
744
745 #ifdef CONFIG_SPI
746 #if !defined(CONFIG_ENV_IS_IN_EEPROM)
747 spi_init_f();
748 #endif
749 spi_init_r();
750 #endif
751
752 #if defined(CONFIG_CMD_NAND)
753 WATCHDOG_RESET();
754 puts("NAND: ");
755 nand_init(); /* go init the NAND */
756 #endif
757
758 #ifdef CONFIG_GENERIC_MMC
759 /*
760 * MMC initialization is called before relocating env.
761 * Thus It is required that operations like pin multiplexer
762 * be put in board_init.
763 */
764 WATCHDOG_RESET();
765 puts("MMC: ");
766 mmc_initialize(bd);
767 #endif
768
769 /* relocate environment function pointers etc. */
770 env_relocate();
771
772 /*
773 * after non-volatile devices & environment is setup and cpu code have
774 * another round to deal with any initialization that might require
775 * full access to the environment or loading of some image (firmware)
776 * from a non-volatile device
777 */
778 cpu_secondary_init_r();
779
780 /*
781 * Fill in missing fields of bd_info.
782 * We do this here, where we have "normal" access to the
783 * environment; we used to do this still running from ROM,
784 * where had to use getenv_f(), which can be pretty slow when
785 * the environment is in EEPROM.
786 */
787
788 #if defined(CONFIG_SYS_EXTBDINFO)
789 #if defined(CONFIG_405GP) || defined(CONFIG_405EP)
790 #if defined(CONFIG_I2CFAST)
791 /*
792 * set bi_iic_fast for linux taking environment variable
793 * "i2cfast" into account
794 */
795 {
796 if (getenv_yesno("i2cfast") == 1) {
797 bd->bi_iic_fast[0] = 1;
798 bd->bi_iic_fast[1] = 1;
799 }
800 }
801 #endif /* CONFIG_I2CFAST */
802 #endif /* CONFIG_405GP, CONFIG_405EP */
803 #endif /* CONFIG_SYS_EXTBDINFO */
804
805 #if defined(CONFIG_SC3)
806 sc3_read_eeprom();
807 #endif
808
809 #if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET)
810 mac_read_from_eeprom();
811 #endif
812
813 #ifdef CONFIG_HERMES
814 if ((gd->board_type >> 16) == 2)
815 bd->bi_ethspeed = gd->board_type & 0xFFFF;
816 else
817 bd->bi_ethspeed = 0xFFFF;
818 #endif
819
820 #ifdef CONFIG_CMD_NET
821 /* kept around for legacy kernels only ... ignore the next section */
822 eth_getenv_enetaddr("ethaddr", bd->bi_enetaddr);
823 #ifdef CONFIG_HAS_ETH1
824 eth_getenv_enetaddr("eth1addr", bd->bi_enet1addr);
825 #endif
826 #ifdef CONFIG_HAS_ETH2
827 eth_getenv_enetaddr("eth2addr", bd->bi_enet2addr);
828 #endif
829 #ifdef CONFIG_HAS_ETH3
830 eth_getenv_enetaddr("eth3addr", bd->bi_enet3addr);
831 #endif
832 #ifdef CONFIG_HAS_ETH4
833 eth_getenv_enetaddr("eth4addr", bd->bi_enet4addr);
834 #endif
835 #ifdef CONFIG_HAS_ETH5
836 eth_getenv_enetaddr("eth5addr", bd->bi_enet5addr);
837 #endif
838 #endif /* CONFIG_CMD_NET */
839
840 WATCHDOG_RESET();
841
842 #if defined(CONFIG_PCI) && !defined(CONFIG_SYS_EARLY_PCI_INIT)
843 /*
844 * Do pci configuration
845 */
846 pci_init();
847 #endif
848
849 /** leave this here (after malloc(), environment and PCI are working) **/
850 /* Initialize stdio devices */
851 stdio_init();
852
853 /* Initialize the jump table for applications */
854 jumptable_init();
855
856 #if defined(CONFIG_API)
857 /* Initialize API */
858 api_init();
859 #endif
860
861 /* Initialize the console (after the relocation and devices init) */
862 console_init_r();
863
864 #if defined(CONFIG_MISC_INIT_R)
865 /* miscellaneous platform dependent initialisations */
866 misc_init_r();
867 #endif
868
869 #ifdef CONFIG_HERMES
870 if (bd->bi_ethspeed != 0xFFFF)
871 hermes_start_lxt980((int) bd->bi_ethspeed);
872 #endif
873
874 #if defined(CONFIG_CMD_KGDB)
875 WATCHDOG_RESET();
876 puts("KGDB: ");
877 kgdb_init();
878 #endif
879
880 debug("U-Boot relocated to %08lx\n", dest_addr);
881
882 /*
883 * Enable Interrupts
884 */
885 interrupt_init();
886
887 #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
888 status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
889 #endif
890
891 udelay(20);
892
893 /* Initialize from environment */
894 load_addr = getenv_ulong("loadaddr", 16, load_addr);
895
896 WATCHDOG_RESET();
897
898 #if defined(CONFIG_CMD_SCSI)
899 WATCHDOG_RESET();
900 puts("SCSI: ");
901 scsi_init();
902 #endif
903
904 #if defined(CONFIG_CMD_DOC)
905 WATCHDOG_RESET();
906 puts("DOC: ");
907 doc_init();
908 #endif
909
910 #ifdef CONFIG_BITBANGMII
911 bb_miiphy_init();
912 #endif
913 #if defined(CONFIG_CMD_NET)
914 WATCHDOG_RESET();
915 puts("Net: ");
916 eth_initialize(bd);
917 #endif
918
919 #if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
920 WATCHDOG_RESET();
921 debug("Reset Ethernet PHY\n");
922 reset_phy();
923 #endif
924
925 #ifdef CONFIG_POST
926 post_run(NULL, POST_RAM | post_bootmode_get(0));
927 #endif
928
929 #if defined(CONFIG_CMD_PCMCIA) \
930 && !defined(CONFIG_CMD_IDE)
931 WATCHDOG_RESET();
932 puts("PCMCIA:");
933 pcmcia_init();
934 #endif
935
936 #if defined(CONFIG_CMD_IDE)
937 WATCHDOG_RESET();
938 #ifdef CONFIG_IDE_8xx_PCCARD
939 puts("PCMCIA:");
940 #else
941 puts("IDE: ");
942 #endif
943 #if defined(CONFIG_START_IDE)
944 if (board_start_ide())
945 ide_init();
946 #else
947 ide_init();
948 #endif
949 #endif
950
951 #ifdef CONFIG_LAST_STAGE_INIT
952 WATCHDOG_RESET();
953 /*
954 * Some parts can be only initialized if all others (like
955 * Interrupts) are up and running (i.e. the PC-style ISA
956 * keyboard).
957 */
958 last_stage_init();
959 #endif
960
961 #if defined(CONFIG_CMD_BEDBUG)
962 WATCHDOG_RESET();
963 bedbug_init();
964 #endif
965
966 #if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
967 /*
968 * Export available size of memory for Linux,
969 * taking into account the protected RAM at top of memory
970 */
971 {
972 ulong pram = 0;
973 char memsz[32];
974
975 #ifdef CONFIG_PRAM
976 pram = getenv_ulong("pram", 10, CONFIG_PRAM);
977 #endif
978 #ifdef CONFIG_LOGBUFFER
979 #ifndef CONFIG_ALT_LB_ADDR
980 /* Also take the logbuffer into account (pram is in kB) */
981 pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
982 #endif
983 #endif
984 sprintf(memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
985 setenv("mem", memsz);
986 }
987 #endif
988
989 #ifdef CONFIG_PS2KBD
990 puts("PS/2: ");
991 kbd_init();
992 #endif
993
994 #ifdef CONFIG_MODEM_SUPPORT
995 {
996 extern int do_mdm_init;
997
998 do_mdm_init = gd->do_mdm_init;
999 }
1000 #endif
1001
1002 /* Initialization complete - start the monitor */
1003
1004 /* main_loop() can return to retry autoboot, if so just run it again. */
1005 for (;;) {
1006 WATCHDOG_RESET();
1007 main_loop();
1008 }
1009
1010 /* NOTREACHED - no way out of command loop except booting */
1011 }
1012
1013 #if 0 /* We could use plain global data, but the resulting code is bigger */
1014 /*
1015 * Pointer to initial global data area
1016 *
1017 * Here we initialize it.
1018 */
1019 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
1020 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
1021 DECLARE_GLOBAL_DATA_PTR =
1022 (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
1023 #endif /* 0 */
1024
1025 /************************************************************************/