arch/ppc/cpu/mpc86xx/speed.c

   1 /*
   2  * Copyright 2004 Freescale Semiconductor.
   3  * Jeff Brown
   4  * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
   5  *
   6  * (C) Copyright 2000-2002
   7  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   8  *
   9  * See file CREDITS for list of people who contributed to this
  10  * project.
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25  * MA 02111-1307 USA
  26  */
  27
  28 #include <common.h>
  29 #include <mpc86xx.h>
  30 #include <asm/processor.h>
  31 #include <asm/io.h>
  32
  33 DECLARE_GLOBAL_DATA_PTR;
  34
  35 /* used in some defintiions of CONFIG_SYS_CLK_FREQ */
  36 extern unsigned long get_board_sys_clk(unsigned long dummy);
  37
  38 void get_sys_info(sys_info_t *sysInfo)
  39 {
  40         volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
  41         volatile ccsr_gur_t *gur = &immap->im_gur;
  42         uint plat_ratio, e600_ratio;
  43         uint lcrr_div;
  44
  45         plat_ratio = (gur->porpllsr) & 0x0000003e;
  46         plat_ratio >>= 1;
  47
  48         switch (plat_ratio) {
  49         case 0x0:
  50                 sysInfo->freqSystemBus = 16 * CONFIG_SYS_CLK_FREQ;
  51                 break;
  52         case 0x02:
  53         case 0x03:
  54         case 0x04:
  55         case 0x05:
  56         case 0x06:
  57         case 0x08:
  58         case 0x09:
  59         case 0x0a:
  60         case 0x0c:
  61         case 0x10:
  62                 sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
  63                 break;
  64         default:
  65                 sysInfo->freqSystemBus = 0;
  66                 break;
  67         }
  68
  69         e600_ratio = (gur->porpllsr) & 0x003f0000;
  70         e600_ratio >>= 16;
  71
  72         switch (e600_ratio) {
  73         case 0x10:
  74                 sysInfo->freqProcessor = 2 * sysInfo->freqSystemBus;
  75                 break;
  76         case 0x19:
  77                 sysInfo->freqProcessor = 5 * sysInfo->freqSystemBus / 2;
  78                 break;
  79         case 0x20:
  80                 sysInfo->freqProcessor = 3 * sysInfo->freqSystemBus;
  81                 break;
  82         case 0x39:
  83                 sysInfo->freqProcessor = 7 * sysInfo->freqSystemBus / 2;
  84                 break;
  85         case 0x28:
  86                 sysInfo->freqProcessor = 4 * sysInfo->freqSystemBus;
  87                 break;
  88         case 0x1d:
  89                 sysInfo->freqProcessor = 9 * sysInfo->freqSystemBus / 2;
  90                 break;
  91         default:
  92                 sysInfo->freqProcessor = e600_ratio + sysInfo->freqSystemBus;
  93                 break;
  94         }
  95
  96 #if defined(CONFIG_SYS_LBC_LCRR)
  97         /* We will program LCRR to this value later */
  98         lcrr_div = CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV;
  99 #else
 100         {
 101                 volatile ccsr_lbc_t *lbc = &immap->im_lbc;
 102                 lcrr_div = in_be32(&lbc->lcrr) & LCRR_CLKDIV;
 103         }
 104 #endif
 105         if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) {
 106                 sysInfo->freqLocalBus = sysInfo->freqSystemBus / (lcrr_div * 2);
 107         } else {
 108                 /* In case anyone cares what the unknown value is */
 109                 sysInfo->freqLocalBus = lcrr_div;
 110         }
 111 }
 112
 113
 114 /*
 115  * Measure CPU clock speed (core clock GCLK1, GCLK2)
 116  * (Approx. GCLK frequency in Hz)
 117  */
 118
 119 int get_clocks(void)
 120 {
 121         sys_info_t sys_info;
 122
 123         get_sys_info(&sys_info);
 124         gd->cpu_clk = sys_info.freqProcessor;
 125         gd->bus_clk = sys_info.freqSystemBus;
 126         gd->lbc_clk = sys_info.freqLocalBus;
 127
 128         /*
 129          * The base clock for I2C depends on the actual SOC.  Unfortunately,
 130          * there is no pattern that can be used to determine the frequency, so
 131          * the only choice is to look up the actual SOC number and use the value
 132          * for that SOC. This information is taken from application note
 133          * AN2919.
 134          */
 135 #ifdef CONFIG_MPC8610
 136         gd->i2c1_clk = sys_info.freqSystemBus;
 137 #else
 138         gd->i2c1_clk = sys_info.freqSystemBus / 2;
 139 #endif
 140         gd->i2c2_clk = gd->i2c1_clk;
 141
 142         if (gd->cpu_clk != 0)
 143                 return 0;
 144         else
 145                 return 1;
 146 }
 147
 148
 149 /*
 150  * get_bus_freq
 151  *      Return system bus freq in Hz
 152  */
 153
 154 ulong get_bus_freq(ulong dummy)
 155 {
 156         ulong val;
 157         sys_info_t sys_info;
 158
 159         get_sys_info(&sys_info);
 160         val = sys_info.freqSystemBus;
 161
 162         return val;
 163 }