arch/sh/include/asm/cpu_sh7752.h

   1 /*
   2  * Copyright (C) 2012  Renesas Solutions Corp.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #ifndef _ASM_CPU_SH7752_H_
   8 #define _ASM_CPU_SH7752_H_
   9
  10 #define CCR             0xFF00001C
  11 #define WTCNT           0xFFCC0000
  12 #define CCR_CACHE_INIT  0x0000090b
  13 #define CACHE_OC_NUM_WAYS       1
  14
  15 #ifndef __ASSEMBLY__            /* put C only stuff in this section */
  16 /* MMU */
  17 struct mmu_regs {
  18         unsigned int    reserved[4];
  19         unsigned int    mmucr;
  20 };
  21 #define MMU_BASE        ((struct mmu_regs *)0xff000000)
  22
  23 /* Watchdog */
  24 #define WTCSR0          0xffcc0002
  25 #define WRSTCSR_R       0xffcc0003
  26 #define WRSTCSR_W       0xffcc0002
  27 #define WTCSR_PREFIX            0xa500
  28 #define WRSTCSR_PREFIX          0x6900
  29 #define WRSTCSR_WOVF_PREFIX     0x9600
  30
  31 /* SCIF */
  32 #define SCIF0_BASE      0xfe4b0000      /* The real name is SCIF2 */
  33 #define SCIF1_BASE      0xfe4c0000      /* The real name is SCIF3 */
  34 #define SCIF2_BASE      0xfe4d0000      /* The real name is SCIF4 */
  35
  36 /* TMU0 */
  37 #define TMU_BASE         0xFE430000
  38
  39 /* ETHER, GETHER MAC address */
  40 struct ether_mac_regs {
  41         unsigned int    reserved[114];
  42         unsigned int    mahr;
  43         unsigned int    reserved2;
  44         unsigned int    malr;
  45 };
  46 #define GETHER0_MAC_BASE        ((struct ether_mac_regs *)0xfee0400)
  47 #define GETHER1_MAC_BASE        ((struct ether_mac_regs *)0xfee0c00)
  48 #define ETHER0_MAC_BASE         ((struct ether_mac_regs *)0xfef0000)
  49 #define ETHER1_MAC_BASE         ((struct ether_mac_regs *)0xfef0800)
  50
  51 /* GETHER */
  52 struct gether_control_regs {
  53         unsigned int    gbecont;
  54 };
  55 #define GETHER_CONTROL_BASE     ((struct gether_control_regs *)0xffc10100)
  56 #define GBECONT_RMII1           0x00020000
  57 #define GBECONT_RMII0           0x00010000
  58
  59 /* SerMux */
  60 struct sermux_regs {
  61         unsigned char   smr0;
  62         unsigned char   smr1;
  63         unsigned char   smr2;
  64         unsigned char   smr3;
  65         unsigned char   smr4;
  66         unsigned char   smr5;
  67 };
  68 #define SERMUX_BASE     ((struct sermux_regs *)0xfe470000)
  69
  70
  71 /* USB0/1 */
  72 struct usb_common_regs {
  73         unsigned short  reserved[129];
  74         unsigned short  suspmode;
  75 };
  76 #define USB0_COMMON_BASE        ((struct usb_common_regs *)0xfe450000)
  77 #define USB1_COMMON_BASE        ((struct usb_common_regs *)0xfe4f0000)
  78
  79 struct usb0_phy_regs {
  80         unsigned short  reset;
  81         unsigned short  reserved[4];
  82         unsigned short  portsel;
  83 };
  84 #define USB0_PHY_BASE           ((struct usb0_phy_regs *)0xfe5f0000)
  85
  86 struct usb1_port_regs {
  87         unsigned int    port1sel;
  88         unsigned int    reserved;
  89         unsigned int    usb1intsts;
  90 };
  91 #define USB1_PORT_BASE          ((struct usb1_port_regs *)0xfe4f2000)
  92
  93 struct usb1_alignment_regs {
  94         unsigned int    ehcidatac;      /* 0xfe4fe018 */
  95         unsigned int    reserved[63];
  96         unsigned int    ohcidatac;
  97 };
  98 #define USB1_ALIGNMENT_BASE     ((struct usb1_alignment_regs *)0xfe4fe018)
  99
 100 /* GPIO */
 101 struct gpio_regs {
 102         unsigned short  pacr;
 103         unsigned short  pbcr;
 104         unsigned short  pccr;
 105         unsigned short  pdcr;
 106         unsigned short  pecr;
 107         unsigned short  pfcr;
 108         unsigned short  pgcr;
 109         unsigned short  phcr;
 110         unsigned short  picr;
 111         unsigned short  pjcr;
 112         unsigned short  pkcr;
 113         unsigned short  plcr;
 114         unsigned short  pmcr;
 115         unsigned short  pncr;
 116         unsigned short  pocr;
 117         unsigned short  reserved;
 118         unsigned short  pqcr;
 119         unsigned short  prcr;
 120         unsigned short  pscr;
 121         unsigned short  ptcr;
 122         unsigned short  pucr;
 123         unsigned short  pvcr;
 124         unsigned short  pwcr;
 125         unsigned short  pxcr;
 126         unsigned short  pycr;
 127         unsigned short  pzcr;
 128         unsigned char   padr;
 129         unsigned char   reserved_a;
 130         unsigned char   pbdr;
 131         unsigned char   reserved_b;
 132         unsigned char   pcdr;
 133         unsigned char   reserved_c;
 134         unsigned char   pddr;
 135         unsigned char   reserved_d;
 136         unsigned char   pedr;
 137         unsigned char   reserved_e;
 138         unsigned char   pfdr;
 139         unsigned char   reserved_f;
 140         unsigned char   pgdr;
 141         unsigned char   reserved_g;
 142         unsigned char   phdr;
 143         unsigned char   reserved_h;
 144         unsigned char   pidr;
 145         unsigned char   reserved_i;
 146         unsigned char   pjdr;
 147         unsigned char   reserved_j;
 148         unsigned char   pkdr;
 149         unsigned char   reserved_k;
 150         unsigned char   pldr;
 151         unsigned char   reserved_l;
 152         unsigned char   pmdr;
 153         unsigned char   reserved_m;
 154         unsigned char   pndr;
 155         unsigned char   reserved_n;
 156         unsigned char   podr;
 157         unsigned char   reserved_o;
 158         unsigned char   ppdr;
 159         unsigned char   reserved_p;
 160         unsigned char   pqdr;
 161         unsigned char   reserved_q;
 162         unsigned char   prdr;
 163         unsigned char   reserved_r;
 164         unsigned char   psdr;
 165         unsigned char   reserved_s;
 166         unsigned char   ptdr;
 167         unsigned char   reserved_t;
 168         unsigned char   pudr;
 169         unsigned char   reserved_u;
 170         unsigned char   pvdr;
 171         unsigned char   reserved_v;
 172         unsigned char   pwdr;
 173         unsigned char   reserved_w;
 174         unsigned char   pxdr;
 175         unsigned char   reserved_x;
 176         unsigned char   pydr;
 177         unsigned char   reserved_y;
 178         unsigned char   pzdr;
 179         unsigned char   reserved_z;
 180         unsigned short  ncer;
 181         unsigned short  ncmcr;
 182         unsigned short  nccsr;
 183         unsigned char   reserved2[2];
 184         unsigned short  psel0;          /* +0x70 */
 185         unsigned short  psel1;
 186         unsigned short  psel2;
 187         unsigned short  psel3;
 188         unsigned short  psel4;
 189         unsigned short  psel5;
 190         unsigned short  psel6;
 191         unsigned short  reserved3[2];
 192         unsigned short  psel7;
 193 };
 194 #define GPIO_BASE       ((struct gpio_regs *)0xffec0000)
 195
 196 #endif  /* ifndef __ASSEMBLY__ */
 197 #endif  /* _ASM_CPU_SH7752_H_ */