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Fix ld-arm bug in encoding of blx calls jumping from thumb to arm instructions
[thirdparty/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2022 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "libiberty.h"
26 #include "libbfd.h"
27 #include "elf-bfd.h"
28 #include "elf-nacl.h"
29 #include "elf-vxworks.h"
30 #include "elf/arm.h"
31 #include "elf32-arm.h"
32 #include "cpu-arm.h"
33
34 /* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36 #define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
39 /* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41 #define RELOC_SIZE(HTAB) \
42 ((HTAB)->use_rel \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
45
46 /* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48 #define SWAP_RELOC_IN(HTAB) \
49 ((HTAB)->use_rel \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
52
53 /* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55 #define SWAP_RELOC_OUT(HTAB) \
56 ((HTAB)->use_rel \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
59
60 #define elf_info_to_howto NULL
61 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62
63 #define ARM_ELF_ABI_VERSION 0
64 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65
66 /* The Adjusted Place, as defined by AAELF. */
67 #define Pa(X) ((X) & 0xfffffffc)
68
69 static bool elf32_arm_write_section (bfd *output_bfd,
70 struct bfd_link_info *link_info,
71 asection *sec,
72 bfd_byte *contents);
73
74 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
75 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
76 in that slot. */
77
78 static reloc_howto_type elf32_arm_howto_table_1[] =
79 {
80 /* No relocation. */
81 HOWTO (R_ARM_NONE, /* type */
82 0, /* rightshift */
83 3, /* size (0 = byte, 1 = short, 2 = long) */
84 0, /* bitsize */
85 false, /* pc_relative */
86 0, /* bitpos */
87 complain_overflow_dont,/* complain_on_overflow */
88 bfd_elf_generic_reloc, /* special_function */
89 "R_ARM_NONE", /* name */
90 false, /* partial_inplace */
91 0, /* src_mask */
92 0, /* dst_mask */
93 false), /* pcrel_offset */
94
95 HOWTO (R_ARM_PC24, /* type */
96 2, /* rightshift */
97 2, /* size (0 = byte, 1 = short, 2 = long) */
98 24, /* bitsize */
99 true, /* pc_relative */
100 0, /* bitpos */
101 complain_overflow_signed,/* complain_on_overflow */
102 bfd_elf_generic_reloc, /* special_function */
103 "R_ARM_PC24", /* name */
104 false, /* partial_inplace */
105 0x00ffffff, /* src_mask */
106 0x00ffffff, /* dst_mask */
107 true), /* pcrel_offset */
108
109 /* 32 bit absolute */
110 HOWTO (R_ARM_ABS32, /* type */
111 0, /* rightshift */
112 2, /* size (0 = byte, 1 = short, 2 = long) */
113 32, /* bitsize */
114 false, /* pc_relative */
115 0, /* bitpos */
116 complain_overflow_bitfield,/* complain_on_overflow */
117 bfd_elf_generic_reloc, /* special_function */
118 "R_ARM_ABS32", /* name */
119 false, /* partial_inplace */
120 0xffffffff, /* src_mask */
121 0xffffffff, /* dst_mask */
122 false), /* pcrel_offset */
123
124 /* standard 32bit pc-relative reloc */
125 HOWTO (R_ARM_REL32, /* type */
126 0, /* rightshift */
127 2, /* size (0 = byte, 1 = short, 2 = long) */
128 32, /* bitsize */
129 true, /* pc_relative */
130 0, /* bitpos */
131 complain_overflow_bitfield,/* complain_on_overflow */
132 bfd_elf_generic_reloc, /* special_function */
133 "R_ARM_REL32", /* name */
134 false, /* partial_inplace */
135 0xffffffff, /* src_mask */
136 0xffffffff, /* dst_mask */
137 true), /* pcrel_offset */
138
139 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
140 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* rightshift */
142 0, /* size (0 = byte, 1 = short, 2 = long) */
143 32, /* bitsize */
144 true, /* pc_relative */
145 0, /* bitpos */
146 complain_overflow_dont,/* complain_on_overflow */
147 bfd_elf_generic_reloc, /* special_function */
148 "R_ARM_LDR_PC_G0", /* name */
149 false, /* partial_inplace */
150 0xffffffff, /* src_mask */
151 0xffffffff, /* dst_mask */
152 true), /* pcrel_offset */
153
154 /* 16 bit absolute */
155 HOWTO (R_ARM_ABS16, /* type */
156 0, /* rightshift */
157 1, /* size (0 = byte, 1 = short, 2 = long) */
158 16, /* bitsize */
159 false, /* pc_relative */
160 0, /* bitpos */
161 complain_overflow_bitfield,/* complain_on_overflow */
162 bfd_elf_generic_reloc, /* special_function */
163 "R_ARM_ABS16", /* name */
164 false, /* partial_inplace */
165 0x0000ffff, /* src_mask */
166 0x0000ffff, /* dst_mask */
167 false), /* pcrel_offset */
168
169 /* 12 bit absolute */
170 HOWTO (R_ARM_ABS12, /* type */
171 0, /* rightshift */
172 2, /* size (0 = byte, 1 = short, 2 = long) */
173 12, /* bitsize */
174 false, /* pc_relative */
175 0, /* bitpos */
176 complain_overflow_bitfield,/* complain_on_overflow */
177 bfd_elf_generic_reloc, /* special_function */
178 "R_ARM_ABS12", /* name */
179 false, /* partial_inplace */
180 0x00000fff, /* src_mask */
181 0x00000fff, /* dst_mask */
182 false), /* pcrel_offset */
183
184 HOWTO (R_ARM_THM_ABS5, /* type */
185 6, /* rightshift */
186 1, /* size (0 = byte, 1 = short, 2 = long) */
187 5, /* bitsize */
188 false, /* pc_relative */
189 0, /* bitpos */
190 complain_overflow_bitfield,/* complain_on_overflow */
191 bfd_elf_generic_reloc, /* special_function */
192 "R_ARM_THM_ABS5", /* name */
193 false, /* partial_inplace */
194 0x000007e0, /* src_mask */
195 0x000007e0, /* dst_mask */
196 false), /* pcrel_offset */
197
198 /* 8 bit absolute */
199 HOWTO (R_ARM_ABS8, /* type */
200 0, /* rightshift */
201 0, /* size (0 = byte, 1 = short, 2 = long) */
202 8, /* bitsize */
203 false, /* pc_relative */
204 0, /* bitpos */
205 complain_overflow_bitfield,/* complain_on_overflow */
206 bfd_elf_generic_reloc, /* special_function */
207 "R_ARM_ABS8", /* name */
208 false, /* partial_inplace */
209 0x000000ff, /* src_mask */
210 0x000000ff, /* dst_mask */
211 false), /* pcrel_offset */
212
213 HOWTO (R_ARM_SBREL32, /* type */
214 0, /* rightshift */
215 2, /* size (0 = byte, 1 = short, 2 = long) */
216 32, /* bitsize */
217 false, /* pc_relative */
218 0, /* bitpos */
219 complain_overflow_dont,/* complain_on_overflow */
220 bfd_elf_generic_reloc, /* special_function */
221 "R_ARM_SBREL32", /* name */
222 false, /* partial_inplace */
223 0xffffffff, /* src_mask */
224 0xffffffff, /* dst_mask */
225 false), /* pcrel_offset */
226
227 HOWTO (R_ARM_THM_CALL, /* type */
228 1, /* rightshift */
229 2, /* size (0 = byte, 1 = short, 2 = long) */
230 24, /* bitsize */
231 true, /* pc_relative */
232 0, /* bitpos */
233 complain_overflow_signed,/* complain_on_overflow */
234 bfd_elf_generic_reloc, /* special_function */
235 "R_ARM_THM_CALL", /* name */
236 false, /* partial_inplace */
237 0x07ff2fff, /* src_mask */
238 0x07ff2fff, /* dst_mask */
239 true), /* pcrel_offset */
240
241 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* rightshift */
243 1, /* size (0 = byte, 1 = short, 2 = long) */
244 8, /* bitsize */
245 true, /* pc_relative */
246 0, /* bitpos */
247 complain_overflow_signed,/* complain_on_overflow */
248 bfd_elf_generic_reloc, /* special_function */
249 "R_ARM_THM_PC8", /* name */
250 false, /* partial_inplace */
251 0x000000ff, /* src_mask */
252 0x000000ff, /* dst_mask */
253 true), /* pcrel_offset */
254
255 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* rightshift */
257 1, /* size (0 = byte, 1 = short, 2 = long) */
258 32, /* bitsize */
259 false, /* pc_relative */
260 0, /* bitpos */
261 complain_overflow_signed,/* complain_on_overflow */
262 bfd_elf_generic_reloc, /* special_function */
263 "R_ARM_BREL_ADJ", /* name */
264 false, /* partial_inplace */
265 0xffffffff, /* src_mask */
266 0xffffffff, /* dst_mask */
267 false), /* pcrel_offset */
268
269 HOWTO (R_ARM_TLS_DESC, /* type */
270 0, /* rightshift */
271 2, /* size (0 = byte, 1 = short, 2 = long) */
272 32, /* bitsize */
273 false, /* pc_relative */
274 0, /* bitpos */
275 complain_overflow_bitfield,/* complain_on_overflow */
276 bfd_elf_generic_reloc, /* special_function */
277 "R_ARM_TLS_DESC", /* name */
278 false, /* partial_inplace */
279 0xffffffff, /* src_mask */
280 0xffffffff, /* dst_mask */
281 false), /* pcrel_offset */
282
283 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* rightshift */
285 0, /* size (0 = byte, 1 = short, 2 = long) */
286 0, /* bitsize */
287 false, /* pc_relative */
288 0, /* bitpos */
289 complain_overflow_signed,/* complain_on_overflow */
290 bfd_elf_generic_reloc, /* special_function */
291 "R_ARM_SWI8", /* name */
292 false, /* partial_inplace */
293 0x00000000, /* src_mask */
294 0x00000000, /* dst_mask */
295 false), /* pcrel_offset */
296
297 /* BLX instruction for the ARM. */
298 HOWTO (R_ARM_XPC25, /* type */
299 2, /* rightshift */
300 2, /* size (0 = byte, 1 = short, 2 = long) */
301 24, /* bitsize */
302 true, /* pc_relative */
303 0, /* bitpos */
304 complain_overflow_signed,/* complain_on_overflow */
305 bfd_elf_generic_reloc, /* special_function */
306 "R_ARM_XPC25", /* name */
307 false, /* partial_inplace */
308 0x00ffffff, /* src_mask */
309 0x00ffffff, /* dst_mask */
310 true), /* pcrel_offset */
311
312 /* BLX instruction for the Thumb. */
313 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* rightshift */
315 2, /* size (0 = byte, 1 = short, 2 = long) */
316 24, /* bitsize */
317 true, /* pc_relative */
318 0, /* bitpos */
319 complain_overflow_signed,/* complain_on_overflow */
320 bfd_elf_generic_reloc, /* special_function */
321 "R_ARM_THM_XPC22", /* name */
322 false, /* partial_inplace */
323 0x07ff2fff, /* src_mask */
324 0x07ff2fff, /* dst_mask */
325 true), /* pcrel_offset */
326
327 /* Dynamic TLS relocations. */
328
329 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 0, /* rightshift */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
332 32, /* bitsize */
333 false, /* pc_relative */
334 0, /* bitpos */
335 complain_overflow_bitfield,/* complain_on_overflow */
336 bfd_elf_generic_reloc, /* special_function */
337 "R_ARM_TLS_DTPMOD32", /* name */
338 true, /* partial_inplace */
339 0xffffffff, /* src_mask */
340 0xffffffff, /* dst_mask */
341 false), /* pcrel_offset */
342
343 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 0, /* rightshift */
345 2, /* size (0 = byte, 1 = short, 2 = long) */
346 32, /* bitsize */
347 false, /* pc_relative */
348 0, /* bitpos */
349 complain_overflow_bitfield,/* complain_on_overflow */
350 bfd_elf_generic_reloc, /* special_function */
351 "R_ARM_TLS_DTPOFF32", /* name */
352 true, /* partial_inplace */
353 0xffffffff, /* src_mask */
354 0xffffffff, /* dst_mask */
355 false), /* pcrel_offset */
356
357 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 0, /* rightshift */
359 2, /* size (0 = byte, 1 = short, 2 = long) */
360 32, /* bitsize */
361 false, /* pc_relative */
362 0, /* bitpos */
363 complain_overflow_bitfield,/* complain_on_overflow */
364 bfd_elf_generic_reloc, /* special_function */
365 "R_ARM_TLS_TPOFF32", /* name */
366 true, /* partial_inplace */
367 0xffffffff, /* src_mask */
368 0xffffffff, /* dst_mask */
369 false), /* pcrel_offset */
370
371 /* Relocs used in ARM Linux */
372
373 HOWTO (R_ARM_COPY, /* type */
374 0, /* rightshift */
375 2, /* size (0 = byte, 1 = short, 2 = long) */
376 32, /* bitsize */
377 false, /* pc_relative */
378 0, /* bitpos */
379 complain_overflow_bitfield,/* complain_on_overflow */
380 bfd_elf_generic_reloc, /* special_function */
381 "R_ARM_COPY", /* name */
382 true, /* partial_inplace */
383 0xffffffff, /* src_mask */
384 0xffffffff, /* dst_mask */
385 false), /* pcrel_offset */
386
387 HOWTO (R_ARM_GLOB_DAT, /* type */
388 0, /* rightshift */
389 2, /* size (0 = byte, 1 = short, 2 = long) */
390 32, /* bitsize */
391 false, /* pc_relative */
392 0, /* bitpos */
393 complain_overflow_bitfield,/* complain_on_overflow */
394 bfd_elf_generic_reloc, /* special_function */
395 "R_ARM_GLOB_DAT", /* name */
396 true, /* partial_inplace */
397 0xffffffff, /* src_mask */
398 0xffffffff, /* dst_mask */
399 false), /* pcrel_offset */
400
401 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 0, /* rightshift */
403 2, /* size (0 = byte, 1 = short, 2 = long) */
404 32, /* bitsize */
405 false, /* pc_relative */
406 0, /* bitpos */
407 complain_overflow_bitfield,/* complain_on_overflow */
408 bfd_elf_generic_reloc, /* special_function */
409 "R_ARM_JUMP_SLOT", /* name */
410 true, /* partial_inplace */
411 0xffffffff, /* src_mask */
412 0xffffffff, /* dst_mask */
413 false), /* pcrel_offset */
414
415 HOWTO (R_ARM_RELATIVE, /* type */
416 0, /* rightshift */
417 2, /* size (0 = byte, 1 = short, 2 = long) */
418 32, /* bitsize */
419 false, /* pc_relative */
420 0, /* bitpos */
421 complain_overflow_bitfield,/* complain_on_overflow */
422 bfd_elf_generic_reloc, /* special_function */
423 "R_ARM_RELATIVE", /* name */
424 true, /* partial_inplace */
425 0xffffffff, /* src_mask */
426 0xffffffff, /* dst_mask */
427 false), /* pcrel_offset */
428
429 HOWTO (R_ARM_GOTOFF32, /* type */
430 0, /* rightshift */
431 2, /* size (0 = byte, 1 = short, 2 = long) */
432 32, /* bitsize */
433 false, /* pc_relative */
434 0, /* bitpos */
435 complain_overflow_bitfield,/* complain_on_overflow */
436 bfd_elf_generic_reloc, /* special_function */
437 "R_ARM_GOTOFF32", /* name */
438 true, /* partial_inplace */
439 0xffffffff, /* src_mask */
440 0xffffffff, /* dst_mask */
441 false), /* pcrel_offset */
442
443 HOWTO (R_ARM_GOTPC, /* type */
444 0, /* rightshift */
445 2, /* size (0 = byte, 1 = short, 2 = long) */
446 32, /* bitsize */
447 true, /* pc_relative */
448 0, /* bitpos */
449 complain_overflow_bitfield,/* complain_on_overflow */
450 bfd_elf_generic_reloc, /* special_function */
451 "R_ARM_GOTPC", /* name */
452 true, /* partial_inplace */
453 0xffffffff, /* src_mask */
454 0xffffffff, /* dst_mask */
455 true), /* pcrel_offset */
456
457 HOWTO (R_ARM_GOT32, /* type */
458 0, /* rightshift */
459 2, /* size (0 = byte, 1 = short, 2 = long) */
460 32, /* bitsize */
461 false, /* pc_relative */
462 0, /* bitpos */
463 complain_overflow_bitfield,/* complain_on_overflow */
464 bfd_elf_generic_reloc, /* special_function */
465 "R_ARM_GOT32", /* name */
466 true, /* partial_inplace */
467 0xffffffff, /* src_mask */
468 0xffffffff, /* dst_mask */
469 false), /* pcrel_offset */
470
471 HOWTO (R_ARM_PLT32, /* type */
472 2, /* rightshift */
473 2, /* size (0 = byte, 1 = short, 2 = long) */
474 24, /* bitsize */
475 true, /* pc_relative */
476 0, /* bitpos */
477 complain_overflow_bitfield,/* complain_on_overflow */
478 bfd_elf_generic_reloc, /* special_function */
479 "R_ARM_PLT32", /* name */
480 false, /* partial_inplace */
481 0x00ffffff, /* src_mask */
482 0x00ffffff, /* dst_mask */
483 true), /* pcrel_offset */
484
485 HOWTO (R_ARM_CALL, /* type */
486 2, /* rightshift */
487 2, /* size (0 = byte, 1 = short, 2 = long) */
488 24, /* bitsize */
489 true, /* pc_relative */
490 0, /* bitpos */
491 complain_overflow_signed,/* complain_on_overflow */
492 bfd_elf_generic_reloc, /* special_function */
493 "R_ARM_CALL", /* name */
494 false, /* partial_inplace */
495 0x00ffffff, /* src_mask */
496 0x00ffffff, /* dst_mask */
497 true), /* pcrel_offset */
498
499 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* rightshift */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
502 24, /* bitsize */
503 true, /* pc_relative */
504 0, /* bitpos */
505 complain_overflow_signed,/* complain_on_overflow */
506 bfd_elf_generic_reloc, /* special_function */
507 "R_ARM_JUMP24", /* name */
508 false, /* partial_inplace */
509 0x00ffffff, /* src_mask */
510 0x00ffffff, /* dst_mask */
511 true), /* pcrel_offset */
512
513 HOWTO (R_ARM_THM_JUMP24, /* type */
514 1, /* rightshift */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
516 24, /* bitsize */
517 true, /* pc_relative */
518 0, /* bitpos */
519 complain_overflow_signed,/* complain_on_overflow */
520 bfd_elf_generic_reloc, /* special_function */
521 "R_ARM_THM_JUMP24", /* name */
522 false, /* partial_inplace */
523 0x07ff2fff, /* src_mask */
524 0x07ff2fff, /* dst_mask */
525 true), /* pcrel_offset */
526
527 HOWTO (R_ARM_BASE_ABS, /* type */
528 0, /* rightshift */
529 2, /* size (0 = byte, 1 = short, 2 = long) */
530 32, /* bitsize */
531 false, /* pc_relative */
532 0, /* bitpos */
533 complain_overflow_dont,/* complain_on_overflow */
534 bfd_elf_generic_reloc, /* special_function */
535 "R_ARM_BASE_ABS", /* name */
536 false, /* partial_inplace */
537 0xffffffff, /* src_mask */
538 0xffffffff, /* dst_mask */
539 false), /* pcrel_offset */
540
541 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 0, /* rightshift */
543 2, /* size (0 = byte, 1 = short, 2 = long) */
544 12, /* bitsize */
545 true, /* pc_relative */
546 0, /* bitpos */
547 complain_overflow_dont,/* complain_on_overflow */
548 bfd_elf_generic_reloc, /* special_function */
549 "R_ARM_ALU_PCREL_7_0", /* name */
550 false, /* partial_inplace */
551 0x00000fff, /* src_mask */
552 0x00000fff, /* dst_mask */
553 true), /* pcrel_offset */
554
555 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 0, /* rightshift */
557 2, /* size (0 = byte, 1 = short, 2 = long) */
558 12, /* bitsize */
559 true, /* pc_relative */
560 8, /* bitpos */
561 complain_overflow_dont,/* complain_on_overflow */
562 bfd_elf_generic_reloc, /* special_function */
563 "R_ARM_ALU_PCREL_15_8",/* name */
564 false, /* partial_inplace */
565 0x00000fff, /* src_mask */
566 0x00000fff, /* dst_mask */
567 true), /* pcrel_offset */
568
569 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 0, /* rightshift */
571 2, /* size (0 = byte, 1 = short, 2 = long) */
572 12, /* bitsize */
573 true, /* pc_relative */
574 16, /* bitpos */
575 complain_overflow_dont,/* complain_on_overflow */
576 bfd_elf_generic_reloc, /* special_function */
577 "R_ARM_ALU_PCREL_23_15",/* name */
578 false, /* partial_inplace */
579 0x00000fff, /* src_mask */
580 0x00000fff, /* dst_mask */
581 true), /* pcrel_offset */
582
583 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 0, /* rightshift */
585 2, /* size (0 = byte, 1 = short, 2 = long) */
586 12, /* bitsize */
587 false, /* pc_relative */
588 0, /* bitpos */
589 complain_overflow_dont,/* complain_on_overflow */
590 bfd_elf_generic_reloc, /* special_function */
591 "R_ARM_LDR_SBREL_11_0",/* name */
592 false, /* partial_inplace */
593 0x00000fff, /* src_mask */
594 0x00000fff, /* dst_mask */
595 false), /* pcrel_offset */
596
597 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 0, /* rightshift */
599 2, /* size (0 = byte, 1 = short, 2 = long) */
600 8, /* bitsize */
601 false, /* pc_relative */
602 12, /* bitpos */
603 complain_overflow_dont,/* complain_on_overflow */
604 bfd_elf_generic_reloc, /* special_function */
605 "R_ARM_ALU_SBREL_19_12",/* name */
606 false, /* partial_inplace */
607 0x000ff000, /* src_mask */
608 0x000ff000, /* dst_mask */
609 false), /* pcrel_offset */
610
611 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 0, /* rightshift */
613 2, /* size (0 = byte, 1 = short, 2 = long) */
614 8, /* bitsize */
615 false, /* pc_relative */
616 20, /* bitpos */
617 complain_overflow_dont,/* complain_on_overflow */
618 bfd_elf_generic_reloc, /* special_function */
619 "R_ARM_ALU_SBREL_27_20",/* name */
620 false, /* partial_inplace */
621 0x0ff00000, /* src_mask */
622 0x0ff00000, /* dst_mask */
623 false), /* pcrel_offset */
624
625 HOWTO (R_ARM_TARGET1, /* type */
626 0, /* rightshift */
627 2, /* size (0 = byte, 1 = short, 2 = long) */
628 32, /* bitsize */
629 false, /* pc_relative */
630 0, /* bitpos */
631 complain_overflow_dont,/* complain_on_overflow */
632 bfd_elf_generic_reloc, /* special_function */
633 "R_ARM_TARGET1", /* name */
634 false, /* partial_inplace */
635 0xffffffff, /* src_mask */
636 0xffffffff, /* dst_mask */
637 false), /* pcrel_offset */
638
639 HOWTO (R_ARM_ROSEGREL32, /* type */
640 0, /* rightshift */
641 2, /* size (0 = byte, 1 = short, 2 = long) */
642 32, /* bitsize */
643 false, /* pc_relative */
644 0, /* bitpos */
645 complain_overflow_dont,/* complain_on_overflow */
646 bfd_elf_generic_reloc, /* special_function */
647 "R_ARM_ROSEGREL32", /* name */
648 false, /* partial_inplace */
649 0xffffffff, /* src_mask */
650 0xffffffff, /* dst_mask */
651 false), /* pcrel_offset */
652
653 HOWTO (R_ARM_V4BX, /* type */
654 0, /* rightshift */
655 2, /* size (0 = byte, 1 = short, 2 = long) */
656 32, /* bitsize */
657 false, /* pc_relative */
658 0, /* bitpos */
659 complain_overflow_dont,/* complain_on_overflow */
660 bfd_elf_generic_reloc, /* special_function */
661 "R_ARM_V4BX", /* name */
662 false, /* partial_inplace */
663 0xffffffff, /* src_mask */
664 0xffffffff, /* dst_mask */
665 false), /* pcrel_offset */
666
667 HOWTO (R_ARM_TARGET2, /* type */
668 0, /* rightshift */
669 2, /* size (0 = byte, 1 = short, 2 = long) */
670 32, /* bitsize */
671 false, /* pc_relative */
672 0, /* bitpos */
673 complain_overflow_signed,/* complain_on_overflow */
674 bfd_elf_generic_reloc, /* special_function */
675 "R_ARM_TARGET2", /* name */
676 false, /* partial_inplace */
677 0xffffffff, /* src_mask */
678 0xffffffff, /* dst_mask */
679 true), /* pcrel_offset */
680
681 HOWTO (R_ARM_PREL31, /* type */
682 0, /* rightshift */
683 2, /* size (0 = byte, 1 = short, 2 = long) */
684 31, /* bitsize */
685 true, /* pc_relative */
686 0, /* bitpos */
687 complain_overflow_signed,/* complain_on_overflow */
688 bfd_elf_generic_reloc, /* special_function */
689 "R_ARM_PREL31", /* name */
690 false, /* partial_inplace */
691 0x7fffffff, /* src_mask */
692 0x7fffffff, /* dst_mask */
693 true), /* pcrel_offset */
694
695 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 0, /* rightshift */
697 2, /* size (0 = byte, 1 = short, 2 = long) */
698 16, /* bitsize */
699 false, /* pc_relative */
700 0, /* bitpos */
701 complain_overflow_dont,/* complain_on_overflow */
702 bfd_elf_generic_reloc, /* special_function */
703 "R_ARM_MOVW_ABS_NC", /* name */
704 false, /* partial_inplace */
705 0x000f0fff, /* src_mask */
706 0x000f0fff, /* dst_mask */
707 false), /* pcrel_offset */
708
709 HOWTO (R_ARM_MOVT_ABS, /* type */
710 0, /* rightshift */
711 2, /* size (0 = byte, 1 = short, 2 = long) */
712 16, /* bitsize */
713 false, /* pc_relative */
714 0, /* bitpos */
715 complain_overflow_bitfield,/* complain_on_overflow */
716 bfd_elf_generic_reloc, /* special_function */
717 "R_ARM_MOVT_ABS", /* name */
718 false, /* partial_inplace */
719 0x000f0fff, /* src_mask */
720 0x000f0fff, /* dst_mask */
721 false), /* pcrel_offset */
722
723 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 0, /* rightshift */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
726 16, /* bitsize */
727 true, /* pc_relative */
728 0, /* bitpos */
729 complain_overflow_dont,/* complain_on_overflow */
730 bfd_elf_generic_reloc, /* special_function */
731 "R_ARM_MOVW_PREL_NC", /* name */
732 false, /* partial_inplace */
733 0x000f0fff, /* src_mask */
734 0x000f0fff, /* dst_mask */
735 true), /* pcrel_offset */
736
737 HOWTO (R_ARM_MOVT_PREL, /* type */
738 0, /* rightshift */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
740 16, /* bitsize */
741 true, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_bitfield,/* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_ARM_MOVT_PREL", /* name */
746 false, /* partial_inplace */
747 0x000f0fff, /* src_mask */
748 0x000f0fff, /* dst_mask */
749 true), /* pcrel_offset */
750
751 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 0, /* rightshift */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
754 16, /* bitsize */
755 false, /* pc_relative */
756 0, /* bitpos */
757 complain_overflow_dont,/* complain_on_overflow */
758 bfd_elf_generic_reloc, /* special_function */
759 "R_ARM_THM_MOVW_ABS_NC",/* name */
760 false, /* partial_inplace */
761 0x040f70ff, /* src_mask */
762 0x040f70ff, /* dst_mask */
763 false), /* pcrel_offset */
764
765 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 0, /* rightshift */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
768 16, /* bitsize */
769 false, /* pc_relative */
770 0, /* bitpos */
771 complain_overflow_bitfield,/* complain_on_overflow */
772 bfd_elf_generic_reloc, /* special_function */
773 "R_ARM_THM_MOVT_ABS", /* name */
774 false, /* partial_inplace */
775 0x040f70ff, /* src_mask */
776 0x040f70ff, /* dst_mask */
777 false), /* pcrel_offset */
778
779 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 0, /* rightshift */
781 2, /* size (0 = byte, 1 = short, 2 = long) */
782 16, /* bitsize */
783 true, /* pc_relative */
784 0, /* bitpos */
785 complain_overflow_dont,/* complain_on_overflow */
786 bfd_elf_generic_reloc, /* special_function */
787 "R_ARM_THM_MOVW_PREL_NC",/* name */
788 false, /* partial_inplace */
789 0x040f70ff, /* src_mask */
790 0x040f70ff, /* dst_mask */
791 true), /* pcrel_offset */
792
793 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 0, /* rightshift */
795 2, /* size (0 = byte, 1 = short, 2 = long) */
796 16, /* bitsize */
797 true, /* pc_relative */
798 0, /* bitpos */
799 complain_overflow_bitfield,/* complain_on_overflow */
800 bfd_elf_generic_reloc, /* special_function */
801 "R_ARM_THM_MOVT_PREL", /* name */
802 false, /* partial_inplace */
803 0x040f70ff, /* src_mask */
804 0x040f70ff, /* dst_mask */
805 true), /* pcrel_offset */
806
807 HOWTO (R_ARM_THM_JUMP19, /* type */
808 1, /* rightshift */
809 2, /* size (0 = byte, 1 = short, 2 = long) */
810 19, /* bitsize */
811 true, /* pc_relative */
812 0, /* bitpos */
813 complain_overflow_signed,/* complain_on_overflow */
814 bfd_elf_generic_reloc, /* special_function */
815 "R_ARM_THM_JUMP19", /* name */
816 false, /* partial_inplace */
817 0x043f2fff, /* src_mask */
818 0x043f2fff, /* dst_mask */
819 true), /* pcrel_offset */
820
821 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* rightshift */
823 1, /* size (0 = byte, 1 = short, 2 = long) */
824 6, /* bitsize */
825 true, /* pc_relative */
826 0, /* bitpos */
827 complain_overflow_unsigned,/* complain_on_overflow */
828 bfd_elf_generic_reloc, /* special_function */
829 "R_ARM_THM_JUMP6", /* name */
830 false, /* partial_inplace */
831 0x02f8, /* src_mask */
832 0x02f8, /* dst_mask */
833 true), /* pcrel_offset */
834
835 /* These are declared as 13-bit signed relocations because we can
836 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 versa. */
838 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 0, /* rightshift */
840 2, /* size (0 = byte, 1 = short, 2 = long) */
841 13, /* bitsize */
842 true, /* pc_relative */
843 0, /* bitpos */
844 complain_overflow_dont,/* complain_on_overflow */
845 bfd_elf_generic_reloc, /* special_function */
846 "R_ARM_THM_ALU_PREL_11_0",/* name */
847 false, /* partial_inplace */
848 0xffffffff, /* src_mask */
849 0xffffffff, /* dst_mask */
850 true), /* pcrel_offset */
851
852 HOWTO (R_ARM_THM_PC12, /* type */
853 0, /* rightshift */
854 2, /* size (0 = byte, 1 = short, 2 = long) */
855 13, /* bitsize */
856 true, /* pc_relative */
857 0, /* bitpos */
858 complain_overflow_dont,/* complain_on_overflow */
859 bfd_elf_generic_reloc, /* special_function */
860 "R_ARM_THM_PC12", /* name */
861 false, /* partial_inplace */
862 0xffffffff, /* src_mask */
863 0xffffffff, /* dst_mask */
864 true), /* pcrel_offset */
865
866 HOWTO (R_ARM_ABS32_NOI, /* type */
867 0, /* rightshift */
868 2, /* size (0 = byte, 1 = short, 2 = long) */
869 32, /* bitsize */
870 false, /* pc_relative */
871 0, /* bitpos */
872 complain_overflow_dont,/* complain_on_overflow */
873 bfd_elf_generic_reloc, /* special_function */
874 "R_ARM_ABS32_NOI", /* name */
875 false, /* partial_inplace */
876 0xffffffff, /* src_mask */
877 0xffffffff, /* dst_mask */
878 false), /* pcrel_offset */
879
880 HOWTO (R_ARM_REL32_NOI, /* type */
881 0, /* rightshift */
882 2, /* size (0 = byte, 1 = short, 2 = long) */
883 32, /* bitsize */
884 true, /* pc_relative */
885 0, /* bitpos */
886 complain_overflow_dont,/* complain_on_overflow */
887 bfd_elf_generic_reloc, /* special_function */
888 "R_ARM_REL32_NOI", /* name */
889 false, /* partial_inplace */
890 0xffffffff, /* src_mask */
891 0xffffffff, /* dst_mask */
892 false), /* pcrel_offset */
893
894 /* Group relocations. */
895
896 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 0, /* rightshift */
898 2, /* size (0 = byte, 1 = short, 2 = long) */
899 32, /* bitsize */
900 true, /* pc_relative */
901 0, /* bitpos */
902 complain_overflow_dont,/* complain_on_overflow */
903 bfd_elf_generic_reloc, /* special_function */
904 "R_ARM_ALU_PC_G0_NC", /* name */
905 false, /* partial_inplace */
906 0xffffffff, /* src_mask */
907 0xffffffff, /* dst_mask */
908 true), /* pcrel_offset */
909
910 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 0, /* rightshift */
912 2, /* size (0 = byte, 1 = short, 2 = long) */
913 32, /* bitsize */
914 true, /* pc_relative */
915 0, /* bitpos */
916 complain_overflow_dont,/* complain_on_overflow */
917 bfd_elf_generic_reloc, /* special_function */
918 "R_ARM_ALU_PC_G0", /* name */
919 false, /* partial_inplace */
920 0xffffffff, /* src_mask */
921 0xffffffff, /* dst_mask */
922 true), /* pcrel_offset */
923
924 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 0, /* rightshift */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
927 32, /* bitsize */
928 true, /* pc_relative */
929 0, /* bitpos */
930 complain_overflow_dont,/* complain_on_overflow */
931 bfd_elf_generic_reloc, /* special_function */
932 "R_ARM_ALU_PC_G1_NC", /* name */
933 false, /* partial_inplace */
934 0xffffffff, /* src_mask */
935 0xffffffff, /* dst_mask */
936 true), /* pcrel_offset */
937
938 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 0, /* rightshift */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
941 32, /* bitsize */
942 true, /* pc_relative */
943 0, /* bitpos */
944 complain_overflow_dont,/* complain_on_overflow */
945 bfd_elf_generic_reloc, /* special_function */
946 "R_ARM_ALU_PC_G1", /* name */
947 false, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 true), /* pcrel_offset */
951
952 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 0, /* rightshift */
954 2, /* size (0 = byte, 1 = short, 2 = long) */
955 32, /* bitsize */
956 true, /* pc_relative */
957 0, /* bitpos */
958 complain_overflow_dont,/* complain_on_overflow */
959 bfd_elf_generic_reloc, /* special_function */
960 "R_ARM_ALU_PC_G2", /* name */
961 false, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 true), /* pcrel_offset */
965
966 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 0, /* rightshift */
968 2, /* size (0 = byte, 1 = short, 2 = long) */
969 32, /* bitsize */
970 true, /* pc_relative */
971 0, /* bitpos */
972 complain_overflow_dont,/* complain_on_overflow */
973 bfd_elf_generic_reloc, /* special_function */
974 "R_ARM_LDR_PC_G1", /* name */
975 false, /* partial_inplace */
976 0xffffffff, /* src_mask */
977 0xffffffff, /* dst_mask */
978 true), /* pcrel_offset */
979
980 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 0, /* rightshift */
982 2, /* size (0 = byte, 1 = short, 2 = long) */
983 32, /* bitsize */
984 true, /* pc_relative */
985 0, /* bitpos */
986 complain_overflow_dont,/* complain_on_overflow */
987 bfd_elf_generic_reloc, /* special_function */
988 "R_ARM_LDR_PC_G2", /* name */
989 false, /* partial_inplace */
990 0xffffffff, /* src_mask */
991 0xffffffff, /* dst_mask */
992 true), /* pcrel_offset */
993
994 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 0, /* rightshift */
996 2, /* size (0 = byte, 1 = short, 2 = long) */
997 32, /* bitsize */
998 true, /* pc_relative */
999 0, /* bitpos */
1000 complain_overflow_dont,/* complain_on_overflow */
1001 bfd_elf_generic_reloc, /* special_function */
1002 "R_ARM_LDRS_PC_G0", /* name */
1003 false, /* partial_inplace */
1004 0xffffffff, /* src_mask */
1005 0xffffffff, /* dst_mask */
1006 true), /* pcrel_offset */
1007
1008 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 0, /* rightshift */
1010 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 32, /* bitsize */
1012 true, /* pc_relative */
1013 0, /* bitpos */
1014 complain_overflow_dont,/* complain_on_overflow */
1015 bfd_elf_generic_reloc, /* special_function */
1016 "R_ARM_LDRS_PC_G1", /* name */
1017 false, /* partial_inplace */
1018 0xffffffff, /* src_mask */
1019 0xffffffff, /* dst_mask */
1020 true), /* pcrel_offset */
1021
1022 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 0, /* rightshift */
1024 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 32, /* bitsize */
1026 true, /* pc_relative */
1027 0, /* bitpos */
1028 complain_overflow_dont,/* complain_on_overflow */
1029 bfd_elf_generic_reloc, /* special_function */
1030 "R_ARM_LDRS_PC_G2", /* name */
1031 false, /* partial_inplace */
1032 0xffffffff, /* src_mask */
1033 0xffffffff, /* dst_mask */
1034 true), /* pcrel_offset */
1035
1036 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 0, /* rightshift */
1038 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 32, /* bitsize */
1040 true, /* pc_relative */
1041 0, /* bitpos */
1042 complain_overflow_dont,/* complain_on_overflow */
1043 bfd_elf_generic_reloc, /* special_function */
1044 "R_ARM_LDC_PC_G0", /* name */
1045 false, /* partial_inplace */
1046 0xffffffff, /* src_mask */
1047 0xffffffff, /* dst_mask */
1048 true), /* pcrel_offset */
1049
1050 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 0, /* rightshift */
1052 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 32, /* bitsize */
1054 true, /* pc_relative */
1055 0, /* bitpos */
1056 complain_overflow_dont,/* complain_on_overflow */
1057 bfd_elf_generic_reloc, /* special_function */
1058 "R_ARM_LDC_PC_G1", /* name */
1059 false, /* partial_inplace */
1060 0xffffffff, /* src_mask */
1061 0xffffffff, /* dst_mask */
1062 true), /* pcrel_offset */
1063
1064 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 0, /* rightshift */
1066 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 32, /* bitsize */
1068 true, /* pc_relative */
1069 0, /* bitpos */
1070 complain_overflow_dont,/* complain_on_overflow */
1071 bfd_elf_generic_reloc, /* special_function */
1072 "R_ARM_LDC_PC_G2", /* name */
1073 false, /* partial_inplace */
1074 0xffffffff, /* src_mask */
1075 0xffffffff, /* dst_mask */
1076 true), /* pcrel_offset */
1077
1078 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 0, /* rightshift */
1080 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 32, /* bitsize */
1082 true, /* pc_relative */
1083 0, /* bitpos */
1084 complain_overflow_dont,/* complain_on_overflow */
1085 bfd_elf_generic_reloc, /* special_function */
1086 "R_ARM_ALU_SB_G0_NC", /* name */
1087 false, /* partial_inplace */
1088 0xffffffff, /* src_mask */
1089 0xffffffff, /* dst_mask */
1090 true), /* pcrel_offset */
1091
1092 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 0, /* rightshift */
1094 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 32, /* bitsize */
1096 true, /* pc_relative */
1097 0, /* bitpos */
1098 complain_overflow_dont,/* complain_on_overflow */
1099 bfd_elf_generic_reloc, /* special_function */
1100 "R_ARM_ALU_SB_G0", /* name */
1101 false, /* partial_inplace */
1102 0xffffffff, /* src_mask */
1103 0xffffffff, /* dst_mask */
1104 true), /* pcrel_offset */
1105
1106 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 0, /* rightshift */
1108 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 32, /* bitsize */
1110 true, /* pc_relative */
1111 0, /* bitpos */
1112 complain_overflow_dont,/* complain_on_overflow */
1113 bfd_elf_generic_reloc, /* special_function */
1114 "R_ARM_ALU_SB_G1_NC", /* name */
1115 false, /* partial_inplace */
1116 0xffffffff, /* src_mask */
1117 0xffffffff, /* dst_mask */
1118 true), /* pcrel_offset */
1119
1120 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 0, /* rightshift */
1122 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 32, /* bitsize */
1124 true, /* pc_relative */
1125 0, /* bitpos */
1126 complain_overflow_dont,/* complain_on_overflow */
1127 bfd_elf_generic_reloc, /* special_function */
1128 "R_ARM_ALU_SB_G1", /* name */
1129 false, /* partial_inplace */
1130 0xffffffff, /* src_mask */
1131 0xffffffff, /* dst_mask */
1132 true), /* pcrel_offset */
1133
1134 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 0, /* rightshift */
1136 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 32, /* bitsize */
1138 true, /* pc_relative */
1139 0, /* bitpos */
1140 complain_overflow_dont,/* complain_on_overflow */
1141 bfd_elf_generic_reloc, /* special_function */
1142 "R_ARM_ALU_SB_G2", /* name */
1143 false, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 true), /* pcrel_offset */
1147
1148 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 0, /* rightshift */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 32, /* bitsize */
1152 true, /* pc_relative */
1153 0, /* bitpos */
1154 complain_overflow_dont,/* complain_on_overflow */
1155 bfd_elf_generic_reloc, /* special_function */
1156 "R_ARM_LDR_SB_G0", /* name */
1157 false, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 true), /* pcrel_offset */
1161
1162 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 0, /* rightshift */
1164 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 32, /* bitsize */
1166 true, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 bfd_elf_generic_reloc, /* special_function */
1170 "R_ARM_LDR_SB_G1", /* name */
1171 false, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 true), /* pcrel_offset */
1175
1176 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 0, /* rightshift */
1178 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 32, /* bitsize */
1180 true, /* pc_relative */
1181 0, /* bitpos */
1182 complain_overflow_dont,/* complain_on_overflow */
1183 bfd_elf_generic_reloc, /* special_function */
1184 "R_ARM_LDR_SB_G2", /* name */
1185 false, /* partial_inplace */
1186 0xffffffff, /* src_mask */
1187 0xffffffff, /* dst_mask */
1188 true), /* pcrel_offset */
1189
1190 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 0, /* rightshift */
1192 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 32, /* bitsize */
1194 true, /* pc_relative */
1195 0, /* bitpos */
1196 complain_overflow_dont,/* complain_on_overflow */
1197 bfd_elf_generic_reloc, /* special_function */
1198 "R_ARM_LDRS_SB_G0", /* name */
1199 false, /* partial_inplace */
1200 0xffffffff, /* src_mask */
1201 0xffffffff, /* dst_mask */
1202 true), /* pcrel_offset */
1203
1204 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 0, /* rightshift */
1206 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 32, /* bitsize */
1208 true, /* pc_relative */
1209 0, /* bitpos */
1210 complain_overflow_dont,/* complain_on_overflow */
1211 bfd_elf_generic_reloc, /* special_function */
1212 "R_ARM_LDRS_SB_G1", /* name */
1213 false, /* partial_inplace */
1214 0xffffffff, /* src_mask */
1215 0xffffffff, /* dst_mask */
1216 true), /* pcrel_offset */
1217
1218 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 0, /* rightshift */
1220 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 32, /* bitsize */
1222 true, /* pc_relative */
1223 0, /* bitpos */
1224 complain_overflow_dont,/* complain_on_overflow */
1225 bfd_elf_generic_reloc, /* special_function */
1226 "R_ARM_LDRS_SB_G2", /* name */
1227 false, /* partial_inplace */
1228 0xffffffff, /* src_mask */
1229 0xffffffff, /* dst_mask */
1230 true), /* pcrel_offset */
1231
1232 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 0, /* rightshift */
1234 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 32, /* bitsize */
1236 true, /* pc_relative */
1237 0, /* bitpos */
1238 complain_overflow_dont,/* complain_on_overflow */
1239 bfd_elf_generic_reloc, /* special_function */
1240 "R_ARM_LDC_SB_G0", /* name */
1241 false, /* partial_inplace */
1242 0xffffffff, /* src_mask */
1243 0xffffffff, /* dst_mask */
1244 true), /* pcrel_offset */
1245
1246 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 0, /* rightshift */
1248 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 32, /* bitsize */
1250 true, /* pc_relative */
1251 0, /* bitpos */
1252 complain_overflow_dont,/* complain_on_overflow */
1253 bfd_elf_generic_reloc, /* special_function */
1254 "R_ARM_LDC_SB_G1", /* name */
1255 false, /* partial_inplace */
1256 0xffffffff, /* src_mask */
1257 0xffffffff, /* dst_mask */
1258 true), /* pcrel_offset */
1259
1260 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 0, /* rightshift */
1262 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 32, /* bitsize */
1264 true, /* pc_relative */
1265 0, /* bitpos */
1266 complain_overflow_dont,/* complain_on_overflow */
1267 bfd_elf_generic_reloc, /* special_function */
1268 "R_ARM_LDC_SB_G2", /* name */
1269 false, /* partial_inplace */
1270 0xffffffff, /* src_mask */
1271 0xffffffff, /* dst_mask */
1272 true), /* pcrel_offset */
1273
1274 /* End of group relocations. */
1275
1276 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 0, /* rightshift */
1278 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 16, /* bitsize */
1280 false, /* pc_relative */
1281 0, /* bitpos */
1282 complain_overflow_dont,/* complain_on_overflow */
1283 bfd_elf_generic_reloc, /* special_function */
1284 "R_ARM_MOVW_BREL_NC", /* name */
1285 false, /* partial_inplace */
1286 0x0000ffff, /* src_mask */
1287 0x0000ffff, /* dst_mask */
1288 false), /* pcrel_offset */
1289
1290 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 0, /* rightshift */
1292 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 16, /* bitsize */
1294 false, /* pc_relative */
1295 0, /* bitpos */
1296 complain_overflow_bitfield,/* complain_on_overflow */
1297 bfd_elf_generic_reloc, /* special_function */
1298 "R_ARM_MOVT_BREL", /* name */
1299 false, /* partial_inplace */
1300 0x0000ffff, /* src_mask */
1301 0x0000ffff, /* dst_mask */
1302 false), /* pcrel_offset */
1303
1304 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 0, /* rightshift */
1306 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 16, /* bitsize */
1308 false, /* pc_relative */
1309 0, /* bitpos */
1310 complain_overflow_dont,/* complain_on_overflow */
1311 bfd_elf_generic_reloc, /* special_function */
1312 "R_ARM_MOVW_BREL", /* name */
1313 false, /* partial_inplace */
1314 0x0000ffff, /* src_mask */
1315 0x0000ffff, /* dst_mask */
1316 false), /* pcrel_offset */
1317
1318 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 0, /* rightshift */
1320 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 16, /* bitsize */
1322 false, /* pc_relative */
1323 0, /* bitpos */
1324 complain_overflow_dont,/* complain_on_overflow */
1325 bfd_elf_generic_reloc, /* special_function */
1326 "R_ARM_THM_MOVW_BREL_NC",/* name */
1327 false, /* partial_inplace */
1328 0x040f70ff, /* src_mask */
1329 0x040f70ff, /* dst_mask */
1330 false), /* pcrel_offset */
1331
1332 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 0, /* rightshift */
1334 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 16, /* bitsize */
1336 false, /* pc_relative */
1337 0, /* bitpos */
1338 complain_overflow_bitfield,/* complain_on_overflow */
1339 bfd_elf_generic_reloc, /* special_function */
1340 "R_ARM_THM_MOVT_BREL", /* name */
1341 false, /* partial_inplace */
1342 0x040f70ff, /* src_mask */
1343 0x040f70ff, /* dst_mask */
1344 false), /* pcrel_offset */
1345
1346 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 0, /* rightshift */
1348 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 16, /* bitsize */
1350 false, /* pc_relative */
1351 0, /* bitpos */
1352 complain_overflow_dont,/* complain_on_overflow */
1353 bfd_elf_generic_reloc, /* special_function */
1354 "R_ARM_THM_MOVW_BREL", /* name */
1355 false, /* partial_inplace */
1356 0x040f70ff, /* src_mask */
1357 0x040f70ff, /* dst_mask */
1358 false), /* pcrel_offset */
1359
1360 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 0, /* rightshift */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 32, /* bitsize */
1364 false, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_bitfield,/* complain_on_overflow */
1367 NULL, /* special_function */
1368 "R_ARM_TLS_GOTDESC", /* name */
1369 true, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 false), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_TLS_CALL, /* type */
1375 0, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 24, /* bitsize */
1378 false, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_TLS_CALL", /* name */
1383 false, /* partial_inplace */
1384 0x00ffffff, /* src_mask */
1385 0x00ffffff, /* dst_mask */
1386 false), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 0, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 0, /* bitsize */
1392 false, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont,/* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_TLS_DESCSEQ", /* name */
1397 false, /* partial_inplace */
1398 0x00000000, /* src_mask */
1399 0x00000000, /* dst_mask */
1400 false), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 0, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 24, /* bitsize */
1406 false, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_dont,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_THM_TLS_CALL", /* name */
1411 false, /* partial_inplace */
1412 0x07ff07ff, /* src_mask */
1413 0x07ff07ff, /* dst_mask */
1414 false), /* pcrel_offset */
1415
1416 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 32, /* bitsize */
1420 false, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_dont,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_PLT32_ABS", /* name */
1425 false, /* partial_inplace */
1426 0xffffffff, /* src_mask */
1427 0xffffffff, /* dst_mask */
1428 false), /* pcrel_offset */
1429
1430 HOWTO (R_ARM_GOT_ABS, /* type */
1431 0, /* rightshift */
1432 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 32, /* bitsize */
1434 false, /* pc_relative */
1435 0, /* bitpos */
1436 complain_overflow_dont,/* complain_on_overflow */
1437 bfd_elf_generic_reloc, /* special_function */
1438 "R_ARM_GOT_ABS", /* name */
1439 false, /* partial_inplace */
1440 0xffffffff, /* src_mask */
1441 0xffffffff, /* dst_mask */
1442 false), /* pcrel_offset */
1443
1444 HOWTO (R_ARM_GOT_PREL, /* type */
1445 0, /* rightshift */
1446 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 32, /* bitsize */
1448 true, /* pc_relative */
1449 0, /* bitpos */
1450 complain_overflow_dont, /* complain_on_overflow */
1451 bfd_elf_generic_reloc, /* special_function */
1452 "R_ARM_GOT_PREL", /* name */
1453 false, /* partial_inplace */
1454 0xffffffff, /* src_mask */
1455 0xffffffff, /* dst_mask */
1456 true), /* pcrel_offset */
1457
1458 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 0, /* rightshift */
1460 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 12, /* bitsize */
1462 false, /* pc_relative */
1463 0, /* bitpos */
1464 complain_overflow_bitfield,/* complain_on_overflow */
1465 bfd_elf_generic_reloc, /* special_function */
1466 "R_ARM_GOT_BREL12", /* name */
1467 false, /* partial_inplace */
1468 0x00000fff, /* src_mask */
1469 0x00000fff, /* dst_mask */
1470 false), /* pcrel_offset */
1471
1472 HOWTO (R_ARM_GOTOFF12, /* type */
1473 0, /* rightshift */
1474 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 12, /* bitsize */
1476 false, /* pc_relative */
1477 0, /* bitpos */
1478 complain_overflow_bitfield,/* complain_on_overflow */
1479 bfd_elf_generic_reloc, /* special_function */
1480 "R_ARM_GOTOFF12", /* name */
1481 false, /* partial_inplace */
1482 0x00000fff, /* src_mask */
1483 0x00000fff, /* dst_mask */
1484 false), /* pcrel_offset */
1485
1486 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487
1488 /* GNU extension to record C++ vtable member usage */
1489 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 0, /* rightshift */
1491 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 0, /* bitsize */
1493 false, /* pc_relative */
1494 0, /* bitpos */
1495 complain_overflow_dont, /* complain_on_overflow */
1496 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1497 "R_ARM_GNU_VTENTRY", /* name */
1498 false, /* partial_inplace */
1499 0, /* src_mask */
1500 0, /* dst_mask */
1501 false), /* pcrel_offset */
1502
1503 /* GNU extension to record C++ vtable hierarchy */
1504 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 0, /* rightshift */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 0, /* bitsize */
1508 false, /* pc_relative */
1509 0, /* bitpos */
1510 complain_overflow_dont, /* complain_on_overflow */
1511 NULL, /* special_function */
1512 "R_ARM_GNU_VTINHERIT", /* name */
1513 false, /* partial_inplace */
1514 0, /* src_mask */
1515 0, /* dst_mask */
1516 false), /* pcrel_offset */
1517
1518 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* rightshift */
1520 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 11, /* bitsize */
1522 true, /* pc_relative */
1523 0, /* bitpos */
1524 complain_overflow_signed, /* complain_on_overflow */
1525 bfd_elf_generic_reloc, /* special_function */
1526 "R_ARM_THM_JUMP11", /* name */
1527 false, /* partial_inplace */
1528 0x000007ff, /* src_mask */
1529 0x000007ff, /* dst_mask */
1530 true), /* pcrel_offset */
1531
1532 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* rightshift */
1534 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 8, /* bitsize */
1536 true, /* pc_relative */
1537 0, /* bitpos */
1538 complain_overflow_signed, /* complain_on_overflow */
1539 bfd_elf_generic_reloc, /* special_function */
1540 "R_ARM_THM_JUMP8", /* name */
1541 false, /* partial_inplace */
1542 0x000000ff, /* src_mask */
1543 0x000000ff, /* dst_mask */
1544 true), /* pcrel_offset */
1545
1546 /* TLS relocations */
1547 HOWTO (R_ARM_TLS_GD32, /* type */
1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 32, /* bitsize */
1551 false, /* pc_relative */
1552 0, /* bitpos */
1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 NULL, /* special_function */
1555 "R_ARM_TLS_GD32", /* name */
1556 true, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 false), /* pcrel_offset */
1560
1561 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 0, /* rightshift */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 32, /* bitsize */
1565 false, /* pc_relative */
1566 0, /* bitpos */
1567 complain_overflow_bitfield,/* complain_on_overflow */
1568 bfd_elf_generic_reloc, /* special_function */
1569 "R_ARM_TLS_LDM32", /* name */
1570 true, /* partial_inplace */
1571 0xffffffff, /* src_mask */
1572 0xffffffff, /* dst_mask */
1573 false), /* pcrel_offset */
1574
1575 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 0, /* rightshift */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 32, /* bitsize */
1579 false, /* pc_relative */
1580 0, /* bitpos */
1581 complain_overflow_bitfield,/* complain_on_overflow */
1582 bfd_elf_generic_reloc, /* special_function */
1583 "R_ARM_TLS_LDO32", /* name */
1584 true, /* partial_inplace */
1585 0xffffffff, /* src_mask */
1586 0xffffffff, /* dst_mask */
1587 false), /* pcrel_offset */
1588
1589 HOWTO (R_ARM_TLS_IE32, /* type */
1590 0, /* rightshift */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 32, /* bitsize */
1593 false, /* pc_relative */
1594 0, /* bitpos */
1595 complain_overflow_bitfield,/* complain_on_overflow */
1596 NULL, /* special_function */
1597 "R_ARM_TLS_IE32", /* name */
1598 true, /* partial_inplace */
1599 0xffffffff, /* src_mask */
1600 0xffffffff, /* dst_mask */
1601 false), /* pcrel_offset */
1602
1603 HOWTO (R_ARM_TLS_LE32, /* type */
1604 0, /* rightshift */
1605 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 32, /* bitsize */
1607 false, /* pc_relative */
1608 0, /* bitpos */
1609 complain_overflow_bitfield,/* complain_on_overflow */
1610 NULL, /* special_function */
1611 "R_ARM_TLS_LE32", /* name */
1612 true, /* partial_inplace */
1613 0xffffffff, /* src_mask */
1614 0xffffffff, /* dst_mask */
1615 false), /* pcrel_offset */
1616
1617 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 0, /* rightshift */
1619 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 12, /* bitsize */
1621 false, /* pc_relative */
1622 0, /* bitpos */
1623 complain_overflow_bitfield,/* complain_on_overflow */
1624 bfd_elf_generic_reloc, /* special_function */
1625 "R_ARM_TLS_LDO12", /* name */
1626 false, /* partial_inplace */
1627 0x00000fff, /* src_mask */
1628 0x00000fff, /* dst_mask */
1629 false), /* pcrel_offset */
1630
1631 HOWTO (R_ARM_TLS_LE12, /* type */
1632 0, /* rightshift */
1633 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 12, /* bitsize */
1635 false, /* pc_relative */
1636 0, /* bitpos */
1637 complain_overflow_bitfield,/* complain_on_overflow */
1638 bfd_elf_generic_reloc, /* special_function */
1639 "R_ARM_TLS_LE12", /* name */
1640 false, /* partial_inplace */
1641 0x00000fff, /* src_mask */
1642 0x00000fff, /* dst_mask */
1643 false), /* pcrel_offset */
1644
1645 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 0, /* rightshift */
1647 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 12, /* bitsize */
1649 false, /* pc_relative */
1650 0, /* bitpos */
1651 complain_overflow_bitfield,/* complain_on_overflow */
1652 bfd_elf_generic_reloc, /* special_function */
1653 "R_ARM_TLS_IE12GP", /* name */
1654 false, /* partial_inplace */
1655 0x00000fff, /* src_mask */
1656 0x00000fff, /* dst_mask */
1657 false), /* pcrel_offset */
1658
1659 /* 112-127 private relocations. */
1660 EMPTY_HOWTO (112),
1661 EMPTY_HOWTO (113),
1662 EMPTY_HOWTO (114),
1663 EMPTY_HOWTO (115),
1664 EMPTY_HOWTO (116),
1665 EMPTY_HOWTO (117),
1666 EMPTY_HOWTO (118),
1667 EMPTY_HOWTO (119),
1668 EMPTY_HOWTO (120),
1669 EMPTY_HOWTO (121),
1670 EMPTY_HOWTO (122),
1671 EMPTY_HOWTO (123),
1672 EMPTY_HOWTO (124),
1673 EMPTY_HOWTO (125),
1674 EMPTY_HOWTO (126),
1675 EMPTY_HOWTO (127),
1676
1677 /* R_ARM_ME_TOO, obsolete. */
1678 EMPTY_HOWTO (128),
1679
1680 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 0, /* rightshift */
1682 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 0, /* bitsize */
1684 false, /* pc_relative */
1685 0, /* bitpos */
1686 complain_overflow_dont,/* complain_on_overflow */
1687 bfd_elf_generic_reloc, /* special_function */
1688 "R_ARM_THM_TLS_DESCSEQ",/* name */
1689 false, /* partial_inplace */
1690 0x00000000, /* src_mask */
1691 0x00000000, /* dst_mask */
1692 false), /* pcrel_offset */
1693 EMPTY_HOWTO (130),
1694 EMPTY_HOWTO (131),
1695 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1696 0, /* rightshift. */
1697 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 16, /* bitsize. */
1699 false, /* pc_relative. */
1700 0, /* bitpos. */
1701 complain_overflow_bitfield,/* complain_on_overflow. */
1702 bfd_elf_generic_reloc, /* special_function. */
1703 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1704 false, /* partial_inplace. */
1705 0x00000000, /* src_mask. */
1706 0x00000000, /* dst_mask. */
1707 false), /* pcrel_offset. */
1708 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1709 0, /* rightshift. */
1710 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 16, /* bitsize. */
1712 false, /* pc_relative. */
1713 0, /* bitpos. */
1714 complain_overflow_bitfield,/* complain_on_overflow. */
1715 bfd_elf_generic_reloc, /* special_function. */
1716 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1717 false, /* partial_inplace. */
1718 0x00000000, /* src_mask. */
1719 0x00000000, /* dst_mask. */
1720 false), /* pcrel_offset. */
1721 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1722 0, /* rightshift. */
1723 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 16, /* bitsize. */
1725 false, /* pc_relative. */
1726 0, /* bitpos. */
1727 complain_overflow_bitfield,/* complain_on_overflow. */
1728 bfd_elf_generic_reloc, /* special_function. */
1729 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1730 false, /* partial_inplace. */
1731 0x00000000, /* src_mask. */
1732 0x00000000, /* dst_mask. */
1733 false), /* pcrel_offset. */
1734 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1735 0, /* rightshift. */
1736 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 16, /* bitsize. */
1738 false, /* pc_relative. */
1739 0, /* bitpos. */
1740 complain_overflow_bitfield,/* complain_on_overflow. */
1741 bfd_elf_generic_reloc, /* special_function. */
1742 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1743 false, /* partial_inplace. */
1744 0x00000000, /* src_mask. */
1745 0x00000000, /* dst_mask. */
1746 false), /* pcrel_offset. */
1747 /* Relocations for Armv8.1-M Mainline. */
1748 HOWTO (R_ARM_THM_BF16, /* type. */
1749 0, /* rightshift. */
1750 1, /* size (0 = byte, 1 = short, 2 = long). */
1751 16, /* bitsize. */
1752 true, /* pc_relative. */
1753 0, /* bitpos. */
1754 complain_overflow_dont,/* do not complain_on_overflow. */
1755 bfd_elf_generic_reloc, /* special_function. */
1756 "R_ARM_THM_BF16", /* name. */
1757 false, /* partial_inplace. */
1758 0x001f0ffe, /* src_mask. */
1759 0x001f0ffe, /* dst_mask. */
1760 true), /* pcrel_offset. */
1761 HOWTO (R_ARM_THM_BF12, /* type. */
1762 0, /* rightshift. */
1763 1, /* size (0 = byte, 1 = short, 2 = long). */
1764 12, /* bitsize. */
1765 true, /* pc_relative. */
1766 0, /* bitpos. */
1767 complain_overflow_dont,/* do not complain_on_overflow. */
1768 bfd_elf_generic_reloc, /* special_function. */
1769 "R_ARM_THM_BF12", /* name. */
1770 false, /* partial_inplace. */
1771 0x00010ffe, /* src_mask. */
1772 0x00010ffe, /* dst_mask. */
1773 true), /* pcrel_offset. */
1774 HOWTO (R_ARM_THM_BF18, /* type. */
1775 0, /* rightshift. */
1776 1, /* size (0 = byte, 1 = short, 2 = long). */
1777 18, /* bitsize. */
1778 true, /* pc_relative. */
1779 0, /* bitpos. */
1780 complain_overflow_dont,/* do not complain_on_overflow. */
1781 bfd_elf_generic_reloc, /* special_function. */
1782 "R_ARM_THM_BF18", /* name. */
1783 false, /* partial_inplace. */
1784 0x007f0ffe, /* src_mask. */
1785 0x007f0ffe, /* dst_mask. */
1786 true), /* pcrel_offset. */
1787 };
1788
1789 /* 160 onwards: */
1790 static reloc_howto_type elf32_arm_howto_table_2[8] =
1791 {
1792 HOWTO (R_ARM_IRELATIVE, /* type */
1793 0, /* rightshift */
1794 2, /* size (0 = byte, 1 = short, 2 = long) */
1795 32, /* bitsize */
1796 false, /* pc_relative */
1797 0, /* bitpos */
1798 complain_overflow_bitfield,/* complain_on_overflow */
1799 bfd_elf_generic_reloc, /* special_function */
1800 "R_ARM_IRELATIVE", /* name */
1801 true, /* partial_inplace */
1802 0xffffffff, /* src_mask */
1803 0xffffffff, /* dst_mask */
1804 false), /* pcrel_offset */
1805 HOWTO (R_ARM_GOTFUNCDESC, /* type */
1806 0, /* rightshift */
1807 2, /* size (0 = byte, 1 = short, 2 = long) */
1808 32, /* bitsize */
1809 false, /* pc_relative */
1810 0, /* bitpos */
1811 complain_overflow_bitfield,/* complain_on_overflow */
1812 bfd_elf_generic_reloc, /* special_function */
1813 "R_ARM_GOTFUNCDESC", /* name */
1814 false, /* partial_inplace */
1815 0, /* src_mask */
1816 0xffffffff, /* dst_mask */
1817 false), /* pcrel_offset */
1818 HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */
1819 0, /* rightshift */
1820 2, /* size (0 = byte, 1 = short, 2 = long) */
1821 32, /* bitsize */
1822 false, /* pc_relative */
1823 0, /* bitpos */
1824 complain_overflow_bitfield,/* complain_on_overflow */
1825 bfd_elf_generic_reloc, /* special_function */
1826 "R_ARM_GOTOFFFUNCDESC",/* name */
1827 false, /* partial_inplace */
1828 0, /* src_mask */
1829 0xffffffff, /* dst_mask */
1830 false), /* pcrel_offset */
1831 HOWTO (R_ARM_FUNCDESC, /* type */
1832 0, /* rightshift */
1833 2, /* size (0 = byte, 1 = short, 2 = long) */
1834 32, /* bitsize */
1835 false, /* pc_relative */
1836 0, /* bitpos */
1837 complain_overflow_bitfield,/* complain_on_overflow */
1838 bfd_elf_generic_reloc, /* special_function */
1839 "R_ARM_FUNCDESC", /* name */
1840 false, /* partial_inplace */
1841 0, /* src_mask */
1842 0xffffffff, /* dst_mask */
1843 false), /* pcrel_offset */
1844 HOWTO (R_ARM_FUNCDESC_VALUE, /* type */
1845 0, /* rightshift */
1846 2, /* size (0 = byte, 1 = short, 2 = long) */
1847 64, /* bitsize */
1848 false, /* pc_relative */
1849 0, /* bitpos */
1850 complain_overflow_bitfield,/* complain_on_overflow */
1851 bfd_elf_generic_reloc, /* special_function */
1852 "R_ARM_FUNCDESC_VALUE",/* name */
1853 false, /* partial_inplace */
1854 0, /* src_mask */
1855 0xffffffff, /* dst_mask */
1856 false), /* pcrel_offset */
1857 HOWTO (R_ARM_TLS_GD32_FDPIC, /* type */
1858 0, /* rightshift */
1859 2, /* size (0 = byte, 1 = short, 2 = long) */
1860 32, /* bitsize */
1861 false, /* pc_relative */
1862 0, /* bitpos */
1863 complain_overflow_bitfield,/* complain_on_overflow */
1864 bfd_elf_generic_reloc, /* special_function */
1865 "R_ARM_TLS_GD32_FDPIC",/* name */
1866 false, /* partial_inplace */
1867 0, /* src_mask */
1868 0xffffffff, /* dst_mask */
1869 false), /* pcrel_offset */
1870 HOWTO (R_ARM_TLS_LDM32_FDPIC, /* type */
1871 0, /* rightshift */
1872 2, /* size (0 = byte, 1 = short, 2 = long) */
1873 32, /* bitsize */
1874 false, /* pc_relative */
1875 0, /* bitpos */
1876 complain_overflow_bitfield,/* complain_on_overflow */
1877 bfd_elf_generic_reloc, /* special_function */
1878 "R_ARM_TLS_LDM32_FDPIC",/* name */
1879 false, /* partial_inplace */
1880 0, /* src_mask */
1881 0xffffffff, /* dst_mask */
1882 false), /* pcrel_offset */
1883 HOWTO (R_ARM_TLS_IE32_FDPIC, /* type */
1884 0, /* rightshift */
1885 2, /* size (0 = byte, 1 = short, 2 = long) */
1886 32, /* bitsize */
1887 false, /* pc_relative */
1888 0, /* bitpos */
1889 complain_overflow_bitfield,/* complain_on_overflow */
1890 bfd_elf_generic_reloc, /* special_function */
1891 "R_ARM_TLS_IE32_FDPIC",/* name */
1892 false, /* partial_inplace */
1893 0, /* src_mask */
1894 0xffffffff, /* dst_mask */
1895 false), /* pcrel_offset */
1896 };
1897
1898 /* 249-255 extended, currently unused, relocations: */
1899 static reloc_howto_type elf32_arm_howto_table_3[4] =
1900 {
1901 HOWTO (R_ARM_RREL32, /* type */
1902 0, /* rightshift */
1903 0, /* size (0 = byte, 1 = short, 2 = long) */
1904 0, /* bitsize */
1905 false, /* pc_relative */
1906 0, /* bitpos */
1907 complain_overflow_dont,/* complain_on_overflow */
1908 bfd_elf_generic_reloc, /* special_function */
1909 "R_ARM_RREL32", /* name */
1910 false, /* partial_inplace */
1911 0, /* src_mask */
1912 0, /* dst_mask */
1913 false), /* pcrel_offset */
1914
1915 HOWTO (R_ARM_RABS32, /* type */
1916 0, /* rightshift */
1917 0, /* size (0 = byte, 1 = short, 2 = long) */
1918 0, /* bitsize */
1919 false, /* pc_relative */
1920 0, /* bitpos */
1921 complain_overflow_dont,/* complain_on_overflow */
1922 bfd_elf_generic_reloc, /* special_function */
1923 "R_ARM_RABS32", /* name */
1924 false, /* partial_inplace */
1925 0, /* src_mask */
1926 0, /* dst_mask */
1927 false), /* pcrel_offset */
1928
1929 HOWTO (R_ARM_RPC24, /* type */
1930 0, /* rightshift */
1931 0, /* size (0 = byte, 1 = short, 2 = long) */
1932 0, /* bitsize */
1933 false, /* pc_relative */
1934 0, /* bitpos */
1935 complain_overflow_dont,/* complain_on_overflow */
1936 bfd_elf_generic_reloc, /* special_function */
1937 "R_ARM_RPC24", /* name */
1938 false, /* partial_inplace */
1939 0, /* src_mask */
1940 0, /* dst_mask */
1941 false), /* pcrel_offset */
1942
1943 HOWTO (R_ARM_RBASE, /* type */
1944 0, /* rightshift */
1945 0, /* size (0 = byte, 1 = short, 2 = long) */
1946 0, /* bitsize */
1947 false, /* pc_relative */
1948 0, /* bitpos */
1949 complain_overflow_dont,/* complain_on_overflow */
1950 bfd_elf_generic_reloc, /* special_function */
1951 "R_ARM_RBASE", /* name */
1952 false, /* partial_inplace */
1953 0, /* src_mask */
1954 0, /* dst_mask */
1955 false) /* pcrel_offset */
1956 };
1957
1958 static reloc_howto_type *
1959 elf32_arm_howto_from_type (unsigned int r_type)
1960 {
1961 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1962 return &elf32_arm_howto_table_1[r_type];
1963
1964 if (r_type >= R_ARM_IRELATIVE
1965 && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2))
1966 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1967
1968 if (r_type >= R_ARM_RREL32
1969 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1970 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1971
1972 return NULL;
1973 }
1974
1975 static bool
1976 elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
1977 Elf_Internal_Rela * elf_reloc)
1978 {
1979 unsigned int r_type;
1980
1981 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1982 if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
1983 {
1984 /* xgettext:c-format */
1985 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1986 abfd, r_type);
1987 bfd_set_error (bfd_error_bad_value);
1988 return false;
1989 }
1990 return true;
1991 }
1992
1993 struct elf32_arm_reloc_map
1994 {
1995 bfd_reloc_code_real_type bfd_reloc_val;
1996 unsigned char elf_reloc_val;
1997 };
1998
1999 /* All entries in this list must also be present in elf32_arm_howto_table. */
2000 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
2001 {
2002 {BFD_RELOC_NONE, R_ARM_NONE},
2003 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
2004 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
2005 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
2006 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
2007 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
2008 {BFD_RELOC_32, R_ARM_ABS32},
2009 {BFD_RELOC_32_PCREL, R_ARM_REL32},
2010 {BFD_RELOC_8, R_ARM_ABS8},
2011 {BFD_RELOC_16, R_ARM_ABS16},
2012 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
2013 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
2014 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
2015 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
2016 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
2017 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
2018 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
2019 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
2020 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
2021 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
2022 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
2023 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
2024 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
2025 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
2026 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
2027 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2028 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
2029 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
2030 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
2031 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
2032 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
2033 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2034 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
2035 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
2036 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
2037 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
2038 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
2039 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
2040 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
2041 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
2042 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
2043 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
2044 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
2045 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
2046 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
2047 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
2048 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
2049 {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC},
2050 {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC},
2051 {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC},
2052 {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE},
2053 {BFD_RELOC_ARM_TLS_GD32_FDPIC, R_ARM_TLS_GD32_FDPIC},
2054 {BFD_RELOC_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_LDM32_FDPIC},
2055 {BFD_RELOC_ARM_TLS_IE32_FDPIC, R_ARM_TLS_IE32_FDPIC},
2056 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
2057 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
2058 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
2059 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
2060 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
2061 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
2062 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
2063 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
2064 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
2065 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
2066 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
2067 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
2068 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
2069 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
2070 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
2071 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
2072 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
2073 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
2074 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
2075 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
2076 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
2077 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
2078 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
2079 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
2080 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
2081 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
2082 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
2083 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
2084 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
2085 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
2086 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
2087 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
2088 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
2089 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
2090 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
2091 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
2092 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
2093 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
2094 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
2095 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
2096 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
2097 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
2098 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC},
2099 {BFD_RELOC_ARM_THUMB_BF17, R_ARM_THM_BF16},
2100 {BFD_RELOC_ARM_THUMB_BF13, R_ARM_THM_BF12},
2101 {BFD_RELOC_ARM_THUMB_BF19, R_ARM_THM_BF18}
2102 };
2103
2104 static reloc_howto_type *
2105 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2106 bfd_reloc_code_real_type code)
2107 {
2108 unsigned int i;
2109
2110 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
2111 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
2112 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
2113
2114 return NULL;
2115 }
2116
2117 static reloc_howto_type *
2118 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2119 const char *r_name)
2120 {
2121 unsigned int i;
2122
2123 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
2124 if (elf32_arm_howto_table_1[i].name != NULL
2125 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
2126 return &elf32_arm_howto_table_1[i];
2127
2128 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
2129 if (elf32_arm_howto_table_2[i].name != NULL
2130 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
2131 return &elf32_arm_howto_table_2[i];
2132
2133 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
2134 if (elf32_arm_howto_table_3[i].name != NULL
2135 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
2136 return &elf32_arm_howto_table_3[i];
2137
2138 return NULL;
2139 }
2140
2141 /* Support for core dump NOTE sections. */
2142
2143 static bool
2144 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2145 {
2146 int offset;
2147 size_t size;
2148
2149 switch (note->descsz)
2150 {
2151 default:
2152 return false;
2153
2154 case 148: /* Linux/ARM 32-bit. */
2155 /* pr_cursig */
2156 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2157
2158 /* pr_pid */
2159 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2160
2161 /* pr_reg */
2162 offset = 72;
2163 size = 72;
2164
2165 break;
2166 }
2167
2168 /* Make a ".reg/999" section. */
2169 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2170 size, note->descpos + offset);
2171 }
2172
2173 static bool
2174 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2175 {
2176 switch (note->descsz)
2177 {
2178 default:
2179 return false;
2180
2181 case 124: /* Linux/ARM elf_prpsinfo. */
2182 elf_tdata (abfd)->core->pid
2183 = bfd_get_32 (abfd, note->descdata + 12);
2184 elf_tdata (abfd)->core->program
2185 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2186 elf_tdata (abfd)->core->command
2187 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2188 }
2189
2190 /* Note that for some reason, a spurious space is tacked
2191 onto the end of the args in some (at least one anyway)
2192 implementations, so strip it off if it exists. */
2193 {
2194 char *command = elf_tdata (abfd)->core->command;
2195 int n = strlen (command);
2196
2197 if (0 < n && command[n - 1] == ' ')
2198 command[n - 1] = '\0';
2199 }
2200
2201 return true;
2202 }
2203
2204 static char *
2205 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2206 int note_type, ...)
2207 {
2208 switch (note_type)
2209 {
2210 default:
2211 return NULL;
2212
2213 case NT_PRPSINFO:
2214 {
2215 char data[124] ATTRIBUTE_NONSTRING;
2216 va_list ap;
2217
2218 va_start (ap, note_type);
2219 memset (data, 0, sizeof (data));
2220 strncpy (data + 28, va_arg (ap, const char *), 16);
2221 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2222 DIAGNOSTIC_PUSH;
2223 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
2224 -Wstringop-truncation:
2225 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
2226 */
2227 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
2228 #endif
2229 strncpy (data + 44, va_arg (ap, const char *), 80);
2230 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2231 DIAGNOSTIC_POP;
2232 #endif
2233 va_end (ap);
2234
2235 return elfcore_write_note (abfd, buf, bufsiz,
2236 "CORE", note_type, data, sizeof (data));
2237 }
2238
2239 case NT_PRSTATUS:
2240 {
2241 char data[148];
2242 va_list ap;
2243 long pid;
2244 int cursig;
2245 const void *greg;
2246
2247 va_start (ap, note_type);
2248 memset (data, 0, sizeof (data));
2249 pid = va_arg (ap, long);
2250 bfd_put_32 (abfd, pid, data + 24);
2251 cursig = va_arg (ap, int);
2252 bfd_put_16 (abfd, cursig, data + 12);
2253 greg = va_arg (ap, const void *);
2254 memcpy (data + 72, greg, 72);
2255 va_end (ap);
2256
2257 return elfcore_write_note (abfd, buf, bufsiz,
2258 "CORE", note_type, data, sizeof (data));
2259 }
2260 }
2261 }
2262
2263 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2264 #define TARGET_LITTLE_NAME "elf32-littlearm"
2265 #define TARGET_BIG_SYM arm_elf32_be_vec
2266 #define TARGET_BIG_NAME "elf32-bigarm"
2267
2268 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2269 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2270 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2271
2272 typedef unsigned long int insn32;
2273 typedef unsigned short int insn16;
2274
2275 /* In lieu of proper flags, assume all EABIv4 or later objects are
2276 interworkable. */
2277 #define INTERWORK_FLAG(abfd) \
2278 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2279 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2280 || ((abfd)->flags & BFD_LINKER_CREATED))
2281
2282 /* The linker script knows the section names for placement.
2283 The entry_names are used to do simple name mangling on the stubs.
2284 Given a function name, and its type, the stub can be found. The
2285 name can be changed. The only requirement is the %s be present. */
2286 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2287 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2288
2289 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2290 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2291
2292 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2293 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2294
2295 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2296 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2297
2298 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2299 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2300
2301 #define STUB_ENTRY_NAME "__%s_veneer"
2302
2303 #define CMSE_PREFIX "__acle_se_"
2304
2305 #define CMSE_STUB_NAME ".gnu.sgstubs"
2306
2307 /* The name of the dynamic interpreter. This is put in the .interp
2308 section. */
2309 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2310
2311 /* FDPIC default stack size. */
2312 #define DEFAULT_STACK_SIZE 0x8000
2313
2314 static const unsigned long tls_trampoline [] =
2315 {
2316 0xe08e0000, /* add r0, lr, r0 */
2317 0xe5901004, /* ldr r1, [r0,#4] */
2318 0xe12fff11, /* bx r1 */
2319 };
2320
2321 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2322 {
2323 0xe52d2004, /* push {r2} */
2324 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2325 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2326 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2327 0xe081100f, /* 2: add r1, pc */
2328 0xe12fff12, /* bx r2 */
2329 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2330 + dl_tlsdesc_lazy_resolver(GOT) */
2331 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2332 };
2333
2334 /* NOTE: [Thumb nop sequence]
2335 When adding code that transitions from Thumb to Arm the instruction that
2336 should be used for the alignment padding should be 0xe7fd (b .-2) instead of
2337 a nop for performance reasons. */
2338
2339 /* ARM FDPIC PLT entry. */
2340 /* The last 5 words contain PLT lazy fragment code and data. */
2341 static const bfd_vma elf32_arm_fdpic_plt_entry [] =
2342 {
2343 0xe59fc008, /* ldr r12, .L1 */
2344 0xe08cc009, /* add r12, r12, r9 */
2345 0xe59c9004, /* ldr r9, [r12, #4] */
2346 0xe59cf000, /* ldr pc, [r12] */
2347 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2348 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2349 0xe51fc00c, /* ldr r12, [pc, #-12] */
2350 0xe92d1000, /* push {r12} */
2351 0xe599c004, /* ldr r12, [r9, #4] */
2352 0xe599f000, /* ldr pc, [r9] */
2353 };
2354
2355 /* Thumb FDPIC PLT entry. */
2356 /* The last 5 words contain PLT lazy fragment code and data. */
2357 static const bfd_vma elf32_arm_fdpic_thumb_plt_entry [] =
2358 {
2359 0xc00cf8df, /* ldr.w r12, .L1 */
2360 0x0c09eb0c, /* add.w r12, r12, r9 */
2361 0x9004f8dc, /* ldr.w r9, [r12, #4] */
2362 0xf000f8dc, /* ldr.w pc, [r12] */
2363 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */
2364 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */
2365 0xc008f85f, /* ldr.w r12, .L2 */
2366 0xcd04f84d, /* push {r12} */
2367 0xc004f8d9, /* ldr.w r12, [r9, #4] */
2368 0xf000f8d9, /* ldr.w pc, [r9] */
2369 };
2370
2371 #ifdef FOUR_WORD_PLT
2372
2373 /* The first entry in a procedure linkage table looks like
2374 this. It is set up so that any shared library function that is
2375 called before the relocation has been set up calls the dynamic
2376 linker first. */
2377 static const bfd_vma elf32_arm_plt0_entry [] =
2378 {
2379 0xe52de004, /* str lr, [sp, #-4]! */
2380 0xe59fe010, /* ldr lr, [pc, #16] */
2381 0xe08fe00e, /* add lr, pc, lr */
2382 0xe5bef008, /* ldr pc, [lr, #8]! */
2383 };
2384
2385 /* Subsequent entries in a procedure linkage table look like
2386 this. */
2387 static const bfd_vma elf32_arm_plt_entry [] =
2388 {
2389 0xe28fc600, /* add ip, pc, #NN */
2390 0xe28cca00, /* add ip, ip, #NN */
2391 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2392 0x00000000, /* unused */
2393 };
2394
2395 #else /* not FOUR_WORD_PLT */
2396
2397 /* The first entry in a procedure linkage table looks like
2398 this. It is set up so that any shared library function that is
2399 called before the relocation has been set up calls the dynamic
2400 linker first. */
2401 static const bfd_vma elf32_arm_plt0_entry [] =
2402 {
2403 0xe52de004, /* str lr, [sp, #-4]! */
2404 0xe59fe004, /* ldr lr, [pc, #4] */
2405 0xe08fe00e, /* add lr, pc, lr */
2406 0xe5bef008, /* ldr pc, [lr, #8]! */
2407 0x00000000, /* &GOT[0] - . */
2408 };
2409
2410 /* By default subsequent entries in a procedure linkage table look like
2411 this. Offsets that don't fit into 28 bits will cause link error. */
2412 static const bfd_vma elf32_arm_plt_entry_short [] =
2413 {
2414 0xe28fc600, /* add ip, pc, #0xNN00000 */
2415 0xe28cca00, /* add ip, ip, #0xNN000 */
2416 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2417 };
2418
2419 /* When explicitly asked, we'll use this "long" entry format
2420 which can cope with arbitrary displacements. */
2421 static const bfd_vma elf32_arm_plt_entry_long [] =
2422 {
2423 0xe28fc200, /* add ip, pc, #0xN0000000 */
2424 0xe28cc600, /* add ip, ip, #0xNN00000 */
2425 0xe28cca00, /* add ip, ip, #0xNN000 */
2426 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2427 };
2428
2429 static bool elf32_arm_use_long_plt_entry = false;
2430
2431 #endif /* not FOUR_WORD_PLT */
2432
2433 /* The first entry in a procedure linkage table looks like this.
2434 It is set up so that any shared library function that is called before the
2435 relocation has been set up calls the dynamic linker first. */
2436 static const bfd_vma elf32_thumb2_plt0_entry [] =
2437 {
2438 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2439 an instruction maybe encoded to one or two array elements. */
2440 0xf8dfb500, /* push {lr} */
2441 0x44fee008, /* ldr.w lr, [pc, #8] */
2442 /* add lr, pc */
2443 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2444 0x00000000, /* &GOT[0] - . */
2445 };
2446
2447 /* Subsequent entries in a procedure linkage table for thumb only target
2448 look like this. */
2449 static const bfd_vma elf32_thumb2_plt_entry [] =
2450 {
2451 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2452 an instruction maybe encoded to one or two array elements. */
2453 0x0c00f240, /* movw ip, #0xNNNN */
2454 0x0c00f2c0, /* movt ip, #0xNNNN */
2455 0xf8dc44fc, /* add ip, pc */
2456 0xe7fcf000 /* ldr.w pc, [ip] */
2457 /* b .-4 */
2458 };
2459
2460 /* The format of the first entry in the procedure linkage table
2461 for a VxWorks executable. */
2462 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2463 {
2464 0xe52dc008, /* str ip,[sp,#-8]! */
2465 0xe59fc000, /* ldr ip,[pc] */
2466 0xe59cf008, /* ldr pc,[ip,#8] */
2467 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2468 };
2469
2470 /* The format of subsequent entries in a VxWorks executable. */
2471 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2472 {
2473 0xe59fc000, /* ldr ip,[pc] */
2474 0xe59cf000, /* ldr pc,[ip] */
2475 0x00000000, /* .long @got */
2476 0xe59fc000, /* ldr ip,[pc] */
2477 0xea000000, /* b _PLT */
2478 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2479 };
2480
2481 /* The format of entries in a VxWorks shared library. */
2482 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2483 {
2484 0xe59fc000, /* ldr ip,[pc] */
2485 0xe79cf009, /* ldr pc,[ip,r9] */
2486 0x00000000, /* .long @got */
2487 0xe59fc000, /* ldr ip,[pc] */
2488 0xe599f008, /* ldr pc,[r9,#8] */
2489 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2490 };
2491
2492 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2493 #define PLT_THUMB_STUB_SIZE 4
2494 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2495 {
2496 0x4778, /* bx pc */
2497 0xe7fd /* b .-2 */
2498 };
2499
2500 /* The first entry in a procedure linkage table looks like
2501 this. It is set up so that any shared library function that is
2502 called before the relocation has been set up calls the dynamic
2503 linker first. */
2504 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2505 {
2506 /* First bundle: */
2507 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2508 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2509 0xe08cc00f, /* add ip, ip, pc */
2510 0xe52dc008, /* str ip, [sp, #-8]! */
2511 /* Second bundle: */
2512 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2513 0xe59cc000, /* ldr ip, [ip] */
2514 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2515 0xe12fff1c, /* bx ip */
2516 /* Third bundle: */
2517 0xe320f000, /* nop */
2518 0xe320f000, /* nop */
2519 0xe320f000, /* nop */
2520 /* .Lplt_tail: */
2521 0xe50dc004, /* str ip, [sp, #-4] */
2522 /* Fourth bundle: */
2523 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2524 0xe59cc000, /* ldr ip, [ip] */
2525 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2526 0xe12fff1c, /* bx ip */
2527 };
2528 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2529
2530 /* Subsequent entries in a procedure linkage table look like this. */
2531 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2532 {
2533 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2534 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2535 0xe08cc00f, /* add ip, ip, pc */
2536 0xea000000, /* b .Lplt_tail */
2537 };
2538
2539 /* PR 28924:
2540 There was a bug due to too high values of THM_MAX_FWD_BRANCH_OFFSET and
2541 THM2_MAX_FWD_BRANCH_OFFSET. The first macro concerns the case when Thumb-2
2542 is not available, and second macro when Thumb-2 is available. Among other
2543 things, they affect the range of branches represented as BLX instructions
2544 in Encoding T2 defined in Section A8.8.25 of the ARM Architecture
2545 Reference Manual ARMv7-A and ARMv7-R edition issue C.d. Such branches are
2546 specified there to have a maximum forward offset that is a multiple of 4.
2547 Previously, the respective values defined here were multiples of 2 but not
2548 4 and they are included in comments for reference. */
2549 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2550 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2551 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) - 4 + 4)
2552 /* #def THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) - 2 + 4) */
2553 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2554 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 4) + 4)
2555 /* #def THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4) */
2556 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2557 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2558 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2559
2560 enum stub_insn_type
2561 {
2562 THUMB16_TYPE = 1,
2563 THUMB32_TYPE,
2564 ARM_TYPE,
2565 DATA_TYPE
2566 };
2567
2568 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2569 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2570 is inserted in arm_build_one_stub(). */
2571 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2572 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2573 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2574 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2575 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2576 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2577 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2578 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2579
2580 typedef struct
2581 {
2582 bfd_vma data;
2583 enum stub_insn_type type;
2584 unsigned int r_type;
2585 int reloc_addend;
2586 } insn_sequence;
2587
2588 /* See note [Thumb nop sequence] when adding a veneer. */
2589
2590 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2591 to reach the stub if necessary. */
2592 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2593 {
2594 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2595 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2596 };
2597
2598 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2599 available. */
2600 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2601 {
2602 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2603 ARM_INSN (0xe12fff1c), /* bx ip */
2604 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2605 };
2606
2607 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2608 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2609 {
2610 THUMB16_INSN (0xb401), /* push {r0} */
2611 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2612 THUMB16_INSN (0x4684), /* mov ip, r0 */
2613 THUMB16_INSN (0xbc01), /* pop {r0} */
2614 THUMB16_INSN (0x4760), /* bx ip */
2615 THUMB16_INSN (0xbf00), /* nop */
2616 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2617 };
2618
2619 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2620 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2621 {
2622 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2623 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2624 };
2625
2626 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2627 M-profile architectures. */
2628 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2629 {
2630 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2631 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2632 THUMB16_INSN (0x4760), /* bx ip */
2633 };
2634
2635 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2636 allowed. */
2637 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2638 {
2639 THUMB16_INSN (0x4778), /* bx pc */
2640 THUMB16_INSN (0xe7fd), /* b .-2 */
2641 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2642 ARM_INSN (0xe12fff1c), /* bx ip */
2643 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2644 };
2645
2646 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2647 available. */
2648 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2649 {
2650 THUMB16_INSN (0x4778), /* bx pc */
2651 THUMB16_INSN (0xe7fd), /* b .-2 */
2652 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2653 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2654 };
2655
2656 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2657 one, when the destination is close enough. */
2658 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2659 {
2660 THUMB16_INSN (0x4778), /* bx pc */
2661 THUMB16_INSN (0xe7fd), /* b .-2 */
2662 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2663 };
2664
2665 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2666 blx to reach the stub if necessary. */
2667 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2668 {
2669 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2670 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2671 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2672 };
2673
2674 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2675 blx to reach the stub if necessary. We can not add into pc;
2676 it is not guaranteed to mode switch (different in ARMv6 and
2677 ARMv7). */
2678 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2679 {
2680 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2681 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2682 ARM_INSN (0xe12fff1c), /* bx ip */
2683 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2684 };
2685
2686 /* V4T ARM -> ARM long branch stub, PIC. */
2687 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2688 {
2689 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2690 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2691 ARM_INSN (0xe12fff1c), /* bx ip */
2692 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2693 };
2694
2695 /* V4T Thumb -> ARM long branch stub, PIC. */
2696 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2697 {
2698 THUMB16_INSN (0x4778), /* bx pc */
2699 THUMB16_INSN (0xe7fd), /* b .-2 */
2700 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2701 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2702 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2703 };
2704
2705 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2706 architectures. */
2707 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2708 {
2709 THUMB16_INSN (0xb401), /* push {r0} */
2710 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2711 THUMB16_INSN (0x46fc), /* mov ip, pc */
2712 THUMB16_INSN (0x4484), /* add ip, r0 */
2713 THUMB16_INSN (0xbc01), /* pop {r0} */
2714 THUMB16_INSN (0x4760), /* bx ip */
2715 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2716 };
2717
2718 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2719 allowed. */
2720 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2721 {
2722 THUMB16_INSN (0x4778), /* bx pc */
2723 THUMB16_INSN (0xe7fd), /* b .-2 */
2724 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2725 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2726 ARM_INSN (0xe12fff1c), /* bx ip */
2727 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2728 };
2729
2730 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2731 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2732 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2733 {
2734 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2735 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2736 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2737 };
2738
2739 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2740 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2741 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2742 {
2743 THUMB16_INSN (0x4778), /* bx pc */
2744 THUMB16_INSN (0xe7fd), /* b .-2 */
2745 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2746 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2747 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2748 };
2749
2750 /* NaCl ARM -> ARM long branch stub. */
2751 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2752 {
2753 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2754 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2755 ARM_INSN (0xe12fff1c), /* bx ip */
2756 ARM_INSN (0xe320f000), /* nop */
2757 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2758 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2759 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2760 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2761 };
2762
2763 /* NaCl ARM -> ARM long branch stub, PIC. */
2764 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2765 {
2766 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2767 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2768 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2769 ARM_INSN (0xe12fff1c), /* bx ip */
2770 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2771 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2772 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2773 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2774 };
2775
2776 /* Stub used for transition to secure state (aka SG veneer). */
2777 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2778 {
2779 THUMB32_INSN (0xe97fe97f), /* sg. */
2780 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2781 };
2782
2783
2784 /* Cortex-A8 erratum-workaround stubs. */
2785
2786 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2787 can't use a conditional branch to reach this stub). */
2788
2789 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2790 {
2791 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2792 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2793 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2794 };
2795
2796 /* Stub used for b.w and bl.w instructions. */
2797
2798 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2799 {
2800 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2801 };
2802
2803 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2804 {
2805 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2806 };
2807
2808 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2809 instruction (which switches to ARM mode) to point to this stub. Jump to the
2810 real destination using an ARM-mode branch. */
2811
2812 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2813 {
2814 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2815 };
2816
2817 /* For each section group there can be a specially created linker section
2818 to hold the stubs for that group. The name of the stub section is based
2819 upon the name of another section within that group with the suffix below
2820 applied.
2821
2822 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2823 create what appeared to be a linker stub section when it actually
2824 contained user code/data. For example, consider this fragment:
2825
2826 const char * stubborn_problems[] = { "np" };
2827
2828 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2829 section called:
2830
2831 .data.rel.local.stubborn_problems
2832
2833 This then causes problems in arm32_arm_build_stubs() as it triggers:
2834
2835 // Ignore non-stub sections.
2836 if (!strstr (stub_sec->name, STUB_SUFFIX))
2837 continue;
2838
2839 And so the section would be ignored instead of being processed. Hence
2840 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2841 C identifier. */
2842 #define STUB_SUFFIX ".__stub"
2843
2844 /* One entry per long/short branch stub defined above. */
2845 #define DEF_STUBS \
2846 DEF_STUB (long_branch_any_any) \
2847 DEF_STUB (long_branch_v4t_arm_thumb) \
2848 DEF_STUB (long_branch_thumb_only) \
2849 DEF_STUB (long_branch_v4t_thumb_thumb) \
2850 DEF_STUB (long_branch_v4t_thumb_arm) \
2851 DEF_STUB (short_branch_v4t_thumb_arm) \
2852 DEF_STUB (long_branch_any_arm_pic) \
2853 DEF_STUB (long_branch_any_thumb_pic) \
2854 DEF_STUB (long_branch_v4t_thumb_thumb_pic) \
2855 DEF_STUB (long_branch_v4t_arm_thumb_pic) \
2856 DEF_STUB (long_branch_v4t_thumb_arm_pic) \
2857 DEF_STUB (long_branch_thumb_only_pic) \
2858 DEF_STUB (long_branch_any_tls_pic) \
2859 DEF_STUB (long_branch_v4t_thumb_tls_pic) \
2860 DEF_STUB (long_branch_arm_nacl) \
2861 DEF_STUB (long_branch_arm_nacl_pic) \
2862 DEF_STUB (cmse_branch_thumb_only) \
2863 DEF_STUB (a8_veneer_b_cond) \
2864 DEF_STUB (a8_veneer_b) \
2865 DEF_STUB (a8_veneer_bl) \
2866 DEF_STUB (a8_veneer_blx) \
2867 DEF_STUB (long_branch_thumb2_only) \
2868 DEF_STUB (long_branch_thumb2_only_pure)
2869
2870 #define DEF_STUB(x) arm_stub_##x,
2871 enum elf32_arm_stub_type
2872 {
2873 arm_stub_none,
2874 DEF_STUBS
2875 max_stub_type
2876 };
2877 #undef DEF_STUB
2878
2879 /* Note the first a8_veneer type. */
2880 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2881
2882 typedef struct
2883 {
2884 const insn_sequence* template_sequence;
2885 int template_size;
2886 } stub_def;
2887
2888 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2889 static const stub_def stub_definitions[] =
2890 {
2891 {NULL, 0},
2892 DEF_STUBS
2893 };
2894
2895 struct elf32_arm_stub_hash_entry
2896 {
2897 /* Base hash table entry structure. */
2898 struct bfd_hash_entry root;
2899
2900 /* The stub section. */
2901 asection *stub_sec;
2902
2903 /* Offset within stub_sec of the beginning of this stub. */
2904 bfd_vma stub_offset;
2905
2906 /* Given the symbol's value and its section we can determine its final
2907 value when building the stubs (so the stub knows where to jump). */
2908 bfd_vma target_value;
2909 asection *target_section;
2910
2911 /* Same as above but for the source of the branch to the stub. Used for
2912 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2913 such, source section does not need to be recorded since Cortex-A8 erratum
2914 workaround stubs are only generated when both source and target are in the
2915 same section. */
2916 bfd_vma source_value;
2917
2918 /* The instruction which caused this stub to be generated (only valid for
2919 Cortex-A8 erratum workaround stubs at present). */
2920 unsigned long orig_insn;
2921
2922 /* The stub type. */
2923 enum elf32_arm_stub_type stub_type;
2924 /* Its encoding size in bytes. */
2925 int stub_size;
2926 /* Its template. */
2927 const insn_sequence *stub_template;
2928 /* The size of the template (number of entries). */
2929 int stub_template_size;
2930
2931 /* The symbol table entry, if any, that this was derived from. */
2932 struct elf32_arm_link_hash_entry *h;
2933
2934 /* Type of branch. */
2935 enum arm_st_branch_type branch_type;
2936
2937 /* Where this stub is being called from, or, in the case of combined
2938 stub sections, the first input section in the group. */
2939 asection *id_sec;
2940
2941 /* The name for the local symbol at the start of this stub. The
2942 stub name in the hash table has to be unique; this does not, so
2943 it can be friendlier. */
2944 char *output_name;
2945 };
2946
2947 /* Used to build a map of a section. This is required for mixed-endian
2948 code/data. */
2949
2950 typedef struct elf32_elf_section_map
2951 {
2952 bfd_vma vma;
2953 char type;
2954 }
2955 elf32_arm_section_map;
2956
2957 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2958
2959 typedef enum
2960 {
2961 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2962 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2963 VFP11_ERRATUM_ARM_VENEER,
2964 VFP11_ERRATUM_THUMB_VENEER
2965 }
2966 elf32_vfp11_erratum_type;
2967
2968 typedef struct elf32_vfp11_erratum_list
2969 {
2970 struct elf32_vfp11_erratum_list *next;
2971 bfd_vma vma;
2972 union
2973 {
2974 struct
2975 {
2976 struct elf32_vfp11_erratum_list *veneer;
2977 unsigned int vfp_insn;
2978 } b;
2979 struct
2980 {
2981 struct elf32_vfp11_erratum_list *branch;
2982 unsigned int id;
2983 } v;
2984 } u;
2985 elf32_vfp11_erratum_type type;
2986 }
2987 elf32_vfp11_erratum_list;
2988
2989 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2990 veneer. */
2991 typedef enum
2992 {
2993 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2994 STM32L4XX_ERRATUM_VENEER
2995 }
2996 elf32_stm32l4xx_erratum_type;
2997
2998 typedef struct elf32_stm32l4xx_erratum_list
2999 {
3000 struct elf32_stm32l4xx_erratum_list *next;
3001 bfd_vma vma;
3002 union
3003 {
3004 struct
3005 {
3006 struct elf32_stm32l4xx_erratum_list *veneer;
3007 unsigned int insn;
3008 } b;
3009 struct
3010 {
3011 struct elf32_stm32l4xx_erratum_list *branch;
3012 unsigned int id;
3013 } v;
3014 } u;
3015 elf32_stm32l4xx_erratum_type type;
3016 }
3017 elf32_stm32l4xx_erratum_list;
3018
3019 typedef enum
3020 {
3021 DELETE_EXIDX_ENTRY,
3022 INSERT_EXIDX_CANTUNWIND_AT_END
3023 }
3024 arm_unwind_edit_type;
3025
3026 /* A (sorted) list of edits to apply to an unwind table. */
3027 typedef struct arm_unwind_table_edit
3028 {
3029 arm_unwind_edit_type type;
3030 /* Note: we sometimes want to insert an unwind entry corresponding to a
3031 section different from the one we're currently writing out, so record the
3032 (text) section this edit relates to here. */
3033 asection *linked_section;
3034 unsigned int index;
3035 struct arm_unwind_table_edit *next;
3036 }
3037 arm_unwind_table_edit;
3038
3039 typedef struct _arm_elf_section_data
3040 {
3041 /* Information about mapping symbols. */
3042 struct bfd_elf_section_data elf;
3043 unsigned int mapcount;
3044 unsigned int mapsize;
3045 elf32_arm_section_map *map;
3046 /* Information about CPU errata. */
3047 unsigned int erratumcount;
3048 elf32_vfp11_erratum_list *erratumlist;
3049 unsigned int stm32l4xx_erratumcount;
3050 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
3051 unsigned int additional_reloc_count;
3052 /* Information about unwind tables. */
3053 union
3054 {
3055 /* Unwind info attached to a text section. */
3056 struct
3057 {
3058 asection *arm_exidx_sec;
3059 } text;
3060
3061 /* Unwind info attached to an .ARM.exidx section. */
3062 struct
3063 {
3064 arm_unwind_table_edit *unwind_edit_list;
3065 arm_unwind_table_edit *unwind_edit_tail;
3066 } exidx;
3067 } u;
3068 }
3069 _arm_elf_section_data;
3070
3071 #define elf32_arm_section_data(sec) \
3072 ((_arm_elf_section_data *) elf_section_data (sec))
3073
3074 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
3075 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
3076 so may be created multiple times: we use an array of these entries whilst
3077 relaxing which we can refresh easily, then create stubs for each potentially
3078 erratum-triggering instruction once we've settled on a solution. */
3079
3080 struct a8_erratum_fix
3081 {
3082 bfd *input_bfd;
3083 asection *section;
3084 bfd_vma offset;
3085 bfd_vma target_offset;
3086 unsigned long orig_insn;
3087 char *stub_name;
3088 enum elf32_arm_stub_type stub_type;
3089 enum arm_st_branch_type branch_type;
3090 };
3091
3092 /* A table of relocs applied to branches which might trigger Cortex-A8
3093 erratum. */
3094
3095 struct a8_erratum_reloc
3096 {
3097 bfd_vma from;
3098 bfd_vma destination;
3099 struct elf32_arm_link_hash_entry *hash;
3100 const char *sym_name;
3101 unsigned int r_type;
3102 enum arm_st_branch_type branch_type;
3103 bool non_a8_stub;
3104 };
3105
3106 /* The size of the thread control block. */
3107 #define TCB_SIZE 8
3108
3109 /* ARM-specific information about a PLT entry, over and above the usual
3110 gotplt_union. */
3111 struct arm_plt_info
3112 {
3113 /* We reference count Thumb references to a PLT entry separately,
3114 so that we can emit the Thumb trampoline only if needed. */
3115 bfd_signed_vma thumb_refcount;
3116
3117 /* Some references from Thumb code may be eliminated by BL->BLX
3118 conversion, so record them separately. */
3119 bfd_signed_vma maybe_thumb_refcount;
3120
3121 /* How many of the recorded PLT accesses were from non-call relocations.
3122 This information is useful when deciding whether anything takes the
3123 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3124 non-call references to the function should resolve directly to the
3125 real runtime target. */
3126 unsigned int noncall_refcount;
3127
3128 /* Since PLT entries have variable size if the Thumb prologue is
3129 used, we need to record the index into .got.plt instead of
3130 recomputing it from the PLT offset. */
3131 bfd_signed_vma got_offset;
3132 };
3133
3134 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3135 struct arm_local_iplt_info
3136 {
3137 /* The information that is usually found in the generic ELF part of
3138 the hash table entry. */
3139 union gotplt_union root;
3140
3141 /* The information that is usually found in the ARM-specific part of
3142 the hash table entry. */
3143 struct arm_plt_info arm;
3144
3145 /* A list of all potential dynamic relocations against this symbol. */
3146 struct elf_dyn_relocs *dyn_relocs;
3147 };
3148
3149 /* Structure to handle FDPIC support for local functions. */
3150 struct fdpic_local
3151 {
3152 unsigned int funcdesc_cnt;
3153 unsigned int gotofffuncdesc_cnt;
3154 int funcdesc_offset;
3155 };
3156
3157 struct elf_arm_obj_tdata
3158 {
3159 struct elf_obj_tdata root;
3160
3161 /* Zero to warn when linking objects with incompatible enum sizes. */
3162 int no_enum_size_warning;
3163
3164 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3165 int no_wchar_size_warning;
3166
3167 /* The number of entries in each of the arrays in this strcuture.
3168 Used to avoid buffer overruns. */
3169 bfd_size_type num_entries;
3170
3171 /* tls_type for each local got entry. */
3172 char *local_got_tls_type;
3173
3174 /* GOTPLT entries for TLS descriptors. */
3175 bfd_vma *local_tlsdesc_gotent;
3176
3177 /* Information for local symbols that need entries in .iplt. */
3178 struct arm_local_iplt_info **local_iplt;
3179
3180 /* Maintains FDPIC counters and funcdesc info. */
3181 struct fdpic_local *local_fdpic_cnts;
3182 };
3183
3184 #define elf_arm_tdata(bfd) \
3185 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3186
3187 #define elf32_arm_num_entries(bfd) \
3188 (elf_arm_tdata (bfd)->num_entries)
3189
3190 #define elf32_arm_local_got_tls_type(bfd) \
3191 (elf_arm_tdata (bfd)->local_got_tls_type)
3192
3193 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3194 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3195
3196 #define elf32_arm_local_iplt(bfd) \
3197 (elf_arm_tdata (bfd)->local_iplt)
3198
3199 #define elf32_arm_local_fdpic_cnts(bfd) \
3200 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3201
3202 #define is_arm_elf(bfd) \
3203 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3204 && elf_tdata (bfd) != NULL \
3205 && elf_object_id (bfd) == ARM_ELF_DATA)
3206
3207 static bool
3208 elf32_arm_mkobject (bfd *abfd)
3209 {
3210 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
3211 ARM_ELF_DATA);
3212 }
3213
3214 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3215
3216 /* Structure to handle FDPIC support for extern functions. */
3217 struct fdpic_global {
3218 unsigned int gotofffuncdesc_cnt;
3219 unsigned int gotfuncdesc_cnt;
3220 unsigned int funcdesc_cnt;
3221 int funcdesc_offset;
3222 int gotfuncdesc_offset;
3223 };
3224
3225 /* Arm ELF linker hash entry. */
3226 struct elf32_arm_link_hash_entry
3227 {
3228 struct elf_link_hash_entry root;
3229
3230 /* ARM-specific PLT information. */
3231 struct arm_plt_info plt;
3232
3233 #define GOT_UNKNOWN 0
3234 #define GOT_NORMAL 1
3235 #define GOT_TLS_GD 2
3236 #define GOT_TLS_IE 4
3237 #define GOT_TLS_GDESC 8
3238 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3239 unsigned int tls_type : 8;
3240
3241 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3242 unsigned int is_iplt : 1;
3243
3244 unsigned int unused : 23;
3245
3246 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3247 starting at the end of the jump table. */
3248 bfd_vma tlsdesc_got;
3249
3250 /* The symbol marking the real symbol location for exported thumb
3251 symbols with Arm stubs. */
3252 struct elf_link_hash_entry *export_glue;
3253
3254 /* A pointer to the most recently used stub hash entry against this
3255 symbol. */
3256 struct elf32_arm_stub_hash_entry *stub_cache;
3257
3258 /* Counter for FDPIC relocations against this symbol. */
3259 struct fdpic_global fdpic_cnts;
3260 };
3261
3262 /* Traverse an arm ELF linker hash table. */
3263 #define elf32_arm_link_hash_traverse(table, func, info) \
3264 (elf_link_hash_traverse \
3265 (&(table)->root, \
3266 (bool (*) (struct elf_link_hash_entry *, void *)) (func), \
3267 (info)))
3268
3269 /* Get the ARM elf linker hash table from a link_info structure. */
3270 #define elf32_arm_hash_table(p) \
3271 ((is_elf_hash_table ((p)->hash) \
3272 && elf_hash_table_id (elf_hash_table (p)) == ARM_ELF_DATA) \
3273 ? (struct elf32_arm_link_hash_table *) (p)->hash : NULL)
3274
3275 #define arm_stub_hash_lookup(table, string, create, copy) \
3276 ((struct elf32_arm_stub_hash_entry *) \
3277 bfd_hash_lookup ((table), (string), (create), (copy)))
3278
3279 /* Array to keep track of which stub sections have been created, and
3280 information on stub grouping. */
3281 struct map_stub
3282 {
3283 /* This is the section to which stubs in the group will be
3284 attached. */
3285 asection *link_sec;
3286 /* The stub section. */
3287 asection *stub_sec;
3288 };
3289
3290 #define elf32_arm_compute_jump_table_size(htab) \
3291 ((htab)->next_tls_desc_index * 4)
3292
3293 /* ARM ELF linker hash table. */
3294 struct elf32_arm_link_hash_table
3295 {
3296 /* The main hash table. */
3297 struct elf_link_hash_table root;
3298
3299 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3300 bfd_size_type thumb_glue_size;
3301
3302 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3303 bfd_size_type arm_glue_size;
3304
3305 /* The size in bytes of section containing the ARMv4 BX veneers. */
3306 bfd_size_type bx_glue_size;
3307
3308 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3309 veneer has been populated. */
3310 bfd_vma bx_glue_offset[15];
3311
3312 /* The size in bytes of the section containing glue for VFP11 erratum
3313 veneers. */
3314 bfd_size_type vfp11_erratum_glue_size;
3315
3316 /* The size in bytes of the section containing glue for STM32L4XX erratum
3317 veneers. */
3318 bfd_size_type stm32l4xx_erratum_glue_size;
3319
3320 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3321 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3322 elf32_arm_write_section(). */
3323 struct a8_erratum_fix *a8_erratum_fixes;
3324 unsigned int num_a8_erratum_fixes;
3325
3326 /* An arbitrary input BFD chosen to hold the glue sections. */
3327 bfd * bfd_of_glue_owner;
3328
3329 /* Nonzero to output a BE8 image. */
3330 int byteswap_code;
3331
3332 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3333 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3334 int target1_is_rel;
3335
3336 /* The relocation to use for R_ARM_TARGET2 relocations. */
3337 int target2_reloc;
3338
3339 /* 0 = Ignore R_ARM_V4BX.
3340 1 = Convert BX to MOV PC.
3341 2 = Generate v4 interworing stubs. */
3342 int fix_v4bx;
3343
3344 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3345 int fix_cortex_a8;
3346
3347 /* Whether we should fix the ARM1176 BLX immediate issue. */
3348 int fix_arm1176;
3349
3350 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3351 int use_blx;
3352
3353 /* What sort of code sequences we should look for which may trigger the
3354 VFP11 denorm erratum. */
3355 bfd_arm_vfp11_fix vfp11_fix;
3356
3357 /* Global counter for the number of fixes we have emitted. */
3358 int num_vfp11_fixes;
3359
3360 /* What sort of code sequences we should look for which may trigger the
3361 STM32L4XX erratum. */
3362 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3363
3364 /* Global counter for the number of fixes we have emitted. */
3365 int num_stm32l4xx_fixes;
3366
3367 /* Nonzero to force PIC branch veneers. */
3368 int pic_veneer;
3369
3370 /* The number of bytes in the initial entry in the PLT. */
3371 bfd_size_type plt_header_size;
3372
3373 /* The number of bytes in the subsequent PLT etries. */
3374 bfd_size_type plt_entry_size;
3375
3376 /* True if the target uses REL relocations. */
3377 bool use_rel;
3378
3379 /* Nonzero if import library must be a secure gateway import library
3380 as per ARMv8-M Security Extensions. */
3381 int cmse_implib;
3382
3383 /* The import library whose symbols' address must remain stable in
3384 the import library generated. */
3385 bfd *in_implib_bfd;
3386
3387 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3388 bfd_vma next_tls_desc_index;
3389
3390 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3391 bfd_vma num_tls_desc;
3392
3393 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3394 asection *srelplt2;
3395
3396 /* Offset in .plt section of tls_arm_trampoline. */
3397 bfd_vma tls_trampoline;
3398
3399 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3400 union
3401 {
3402 bfd_signed_vma refcount;
3403 bfd_vma offset;
3404 } tls_ldm_got;
3405
3406 /* For convenience in allocate_dynrelocs. */
3407 bfd * obfd;
3408
3409 /* The amount of space used by the reserved portion of the sgotplt
3410 section, plus whatever space is used by the jump slots. */
3411 bfd_vma sgotplt_jump_table_size;
3412
3413 /* The stub hash table. */
3414 struct bfd_hash_table stub_hash_table;
3415
3416 /* Linker stub bfd. */
3417 bfd *stub_bfd;
3418
3419 /* Linker call-backs. */
3420 asection * (*add_stub_section) (const char *, asection *, asection *,
3421 unsigned int);
3422 void (*layout_sections_again) (void);
3423
3424 /* Array to keep track of which stub sections have been created, and
3425 information on stub grouping. */
3426 struct map_stub *stub_group;
3427
3428 /* Input stub section holding secure gateway veneers. */
3429 asection *cmse_stub_sec;
3430
3431 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3432 start to be allocated. */
3433 bfd_vma new_cmse_stub_offset;
3434
3435 /* Number of elements in stub_group. */
3436 unsigned int top_id;
3437
3438 /* Assorted information used by elf32_arm_size_stubs. */
3439 unsigned int bfd_count;
3440 unsigned int top_index;
3441 asection **input_list;
3442
3443 /* True if the target system uses FDPIC. */
3444 int fdpic_p;
3445
3446 /* Fixup section. Used for FDPIC. */
3447 asection *srofixup;
3448 };
3449
3450 /* Add an FDPIC read-only fixup. */
3451 static void
3452 arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset)
3453 {
3454 bfd_vma fixup_offset;
3455
3456 fixup_offset = srofixup->reloc_count++ * 4;
3457 BFD_ASSERT (fixup_offset < srofixup->size);
3458 bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset);
3459 }
3460
3461 static inline int
3462 ctz (unsigned int mask)
3463 {
3464 #if GCC_VERSION >= 3004
3465 return __builtin_ctz (mask);
3466 #else
3467 unsigned int i;
3468
3469 for (i = 0; i < 8 * sizeof (mask); i++)
3470 {
3471 if (mask & 0x1)
3472 break;
3473 mask = (mask >> 1);
3474 }
3475 return i;
3476 #endif
3477 }
3478
3479 static inline int
3480 elf32_arm_popcount (unsigned int mask)
3481 {
3482 #if GCC_VERSION >= 3004
3483 return __builtin_popcount (mask);
3484 #else
3485 unsigned int i;
3486 int sum = 0;
3487
3488 for (i = 0; i < 8 * sizeof (mask); i++)
3489 {
3490 if (mask & 0x1)
3491 sum++;
3492 mask = (mask >> 1);
3493 }
3494 return sum;
3495 #endif
3496 }
3497
3498 static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
3499 asection *sreloc, Elf_Internal_Rela *rel);
3500
3501 static void
3502 arm_elf_fill_funcdesc (bfd *output_bfd,
3503 struct bfd_link_info *info,
3504 int *funcdesc_offset,
3505 int dynindx,
3506 int offset,
3507 bfd_vma addr,
3508 bfd_vma dynreloc_value,
3509 bfd_vma seg)
3510 {
3511 if ((*funcdesc_offset & 1) == 0)
3512 {
3513 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
3514 asection *sgot = globals->root.sgot;
3515
3516 if (bfd_link_pic (info))
3517 {
3518 asection *srelgot = globals->root.srelgot;
3519 Elf_Internal_Rela outrel;
3520
3521 outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
3522 outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset;
3523 outrel.r_addend = 0;
3524
3525 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
3526 bfd_put_32 (output_bfd, addr, sgot->contents + offset);
3527 bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4);
3528 }
3529 else
3530 {
3531 struct elf_link_hash_entry *hgot = globals->root.hgot;
3532 bfd_vma got_value = hgot->root.u.def.value
3533 + hgot->root.u.def.section->output_section->vma
3534 + hgot->root.u.def.section->output_offset;
3535
3536 arm_elf_add_rofixup (output_bfd, globals->srofixup,
3537 sgot->output_section->vma + sgot->output_offset
3538 + offset);
3539 arm_elf_add_rofixup (output_bfd, globals->srofixup,
3540 sgot->output_section->vma + sgot->output_offset
3541 + offset + 4);
3542 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset);
3543 bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4);
3544 }
3545 *funcdesc_offset |= 1;
3546 }
3547 }
3548
3549 /* Create an entry in an ARM ELF linker hash table. */
3550
3551 static struct bfd_hash_entry *
3552 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3553 struct bfd_hash_table * table,
3554 const char * string)
3555 {
3556 struct elf32_arm_link_hash_entry * ret =
3557 (struct elf32_arm_link_hash_entry *) entry;
3558
3559 /* Allocate the structure if it has not already been allocated by a
3560 subclass. */
3561 if (ret == NULL)
3562 ret = (struct elf32_arm_link_hash_entry *)
3563 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3564 if (ret == NULL)
3565 return (struct bfd_hash_entry *) ret;
3566
3567 /* Call the allocation method of the superclass. */
3568 ret = ((struct elf32_arm_link_hash_entry *)
3569 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3570 table, string));
3571 if (ret != NULL)
3572 {
3573 ret->tls_type = GOT_UNKNOWN;
3574 ret->tlsdesc_got = (bfd_vma) -1;
3575 ret->plt.thumb_refcount = 0;
3576 ret->plt.maybe_thumb_refcount = 0;
3577 ret->plt.noncall_refcount = 0;
3578 ret->plt.got_offset = -1;
3579 ret->is_iplt = false;
3580 ret->export_glue = NULL;
3581
3582 ret->stub_cache = NULL;
3583
3584 ret->fdpic_cnts.gotofffuncdesc_cnt = 0;
3585 ret->fdpic_cnts.gotfuncdesc_cnt = 0;
3586 ret->fdpic_cnts.funcdesc_cnt = 0;
3587 ret->fdpic_cnts.funcdesc_offset = -1;
3588 ret->fdpic_cnts.gotfuncdesc_offset = -1;
3589 }
3590
3591 return (struct bfd_hash_entry *) ret;
3592 }
3593
3594 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3595 symbols. */
3596
3597 static bool
3598 elf32_arm_allocate_local_sym_info (bfd *abfd)
3599 {
3600 if (elf_local_got_refcounts (abfd) == NULL)
3601 {
3602 bfd_size_type num_syms;
3603
3604 elf32_arm_num_entries (abfd) = 0;
3605
3606 /* Whilst it might be tempting to allocate a single block of memory and
3607 then divide it up amoungst the arrays in the elf_arm_obj_tdata
3608 structure, this interferes with the work of memory checkers looking
3609 for buffer overruns. So allocate each array individually. */
3610
3611 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3612
3613 elf_local_got_refcounts (abfd) = bfd_zalloc
3614 (abfd, num_syms * sizeof (* elf_local_got_refcounts (abfd)));
3615
3616 if (elf_local_got_refcounts (abfd) == NULL)
3617 return false;
3618
3619 elf32_arm_local_tlsdesc_gotent (abfd) = bfd_zalloc
3620 (abfd, num_syms * sizeof (* elf32_arm_local_tlsdesc_gotent (abfd)));
3621
3622 if (elf32_arm_local_tlsdesc_gotent (abfd) == NULL)
3623 return false;
3624
3625 elf32_arm_local_iplt (abfd) = bfd_zalloc
3626 (abfd, num_syms * sizeof (* elf32_arm_local_iplt (abfd)));
3627
3628 if (elf32_arm_local_iplt (abfd) == NULL)
3629 return false;
3630
3631 elf32_arm_local_fdpic_cnts (abfd) = bfd_zalloc
3632 (abfd, num_syms * sizeof (* elf32_arm_local_fdpic_cnts (abfd)));
3633
3634 if (elf32_arm_local_fdpic_cnts (abfd) == NULL)
3635 return false;
3636
3637 elf32_arm_local_got_tls_type (abfd) = bfd_zalloc
3638 (abfd, num_syms * sizeof (* elf32_arm_local_got_tls_type (abfd)));
3639
3640 if (elf32_arm_local_got_tls_type (abfd) == NULL)
3641 return false;
3642
3643 elf32_arm_num_entries (abfd) = num_syms;
3644
3645 #if GCC_VERSION >= 3000
3646 BFD_ASSERT (__alignof__ (*elf32_arm_local_tlsdesc_gotent (abfd))
3647 <= __alignof__ (*elf_local_got_refcounts (abfd)));
3648 BFD_ASSERT (__alignof__ (*elf32_arm_local_iplt (abfd))
3649 <= __alignof__ (*elf32_arm_local_tlsdesc_gotent (abfd)));
3650 BFD_ASSERT (__alignof__ (*elf32_arm_local_fdpic_cnts (abfd))
3651 <= __alignof__ (*elf32_arm_local_iplt (abfd)));
3652 BFD_ASSERT (__alignof__ (*elf32_arm_local_got_tls_type (abfd))
3653 <= __alignof__ (*elf32_arm_local_fdpic_cnts (abfd)));
3654 #endif
3655 }
3656 return true;
3657 }
3658
3659 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3660 to input bfd ABFD. Create the information if it doesn't already exist.
3661 Return null if an allocation fails. */
3662
3663 static struct arm_local_iplt_info *
3664 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3665 {
3666 struct arm_local_iplt_info **ptr;
3667
3668 if (!elf32_arm_allocate_local_sym_info (abfd))
3669 return NULL;
3670
3671 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3672 BFD_ASSERT (r_symndx < elf32_arm_num_entries (abfd));
3673 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3674 if (*ptr == NULL)
3675 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3676 return *ptr;
3677 }
3678
3679 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3680 in ABFD's symbol table. If the symbol is global, H points to its
3681 hash table entry, otherwise H is null.
3682
3683 Return true if the symbol does have PLT information. When returning
3684 true, point *ROOT_PLT at the target-independent reference count/offset
3685 union and *ARM_PLT at the ARM-specific information. */
3686
3687 static bool
3688 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3689 struct elf32_arm_link_hash_entry *h,
3690 unsigned long r_symndx, union gotplt_union **root_plt,
3691 struct arm_plt_info **arm_plt)
3692 {
3693 struct arm_local_iplt_info *local_iplt;
3694
3695 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3696 return false;
3697
3698 if (h != NULL)
3699 {
3700 *root_plt = &h->root.plt;
3701 *arm_plt = &h->plt;
3702 return true;
3703 }
3704
3705 if (elf32_arm_local_iplt (abfd) == NULL)
3706 return false;
3707
3708 if (r_symndx >= elf32_arm_num_entries (abfd))
3709 return false;
3710
3711 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3712 if (local_iplt == NULL)
3713 return false;
3714
3715 *root_plt = &local_iplt->root;
3716 *arm_plt = &local_iplt->arm;
3717 return true;
3718 }
3719
3720 static bool using_thumb_only (struct elf32_arm_link_hash_table *globals);
3721
3722 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3723 before it. */
3724
3725 static bool
3726 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3727 struct arm_plt_info *arm_plt)
3728 {
3729 struct elf32_arm_link_hash_table *htab;
3730
3731 htab = elf32_arm_hash_table (info);
3732
3733 return (!using_thumb_only (htab) && (arm_plt->thumb_refcount != 0
3734 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0)));
3735 }
3736
3737 /* Return a pointer to the head of the dynamic reloc list that should
3738 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3739 ABFD's symbol table. Return null if an error occurs. */
3740
3741 static struct elf_dyn_relocs **
3742 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3743 Elf_Internal_Sym *isym)
3744 {
3745 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3746 {
3747 struct arm_local_iplt_info *local_iplt;
3748
3749 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3750 if (local_iplt == NULL)
3751 return NULL;
3752 return &local_iplt->dyn_relocs;
3753 }
3754 else
3755 {
3756 /* Track dynamic relocs needed for local syms too.
3757 We really need local syms available to do this
3758 easily. Oh well. */
3759 asection *s;
3760 void *vpp;
3761
3762 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3763 if (s == NULL)
3764 return NULL;
3765
3766 vpp = &elf_section_data (s)->local_dynrel;
3767 return (struct elf_dyn_relocs **) vpp;
3768 }
3769 }
3770
3771 /* Initialize an entry in the stub hash table. */
3772
3773 static struct bfd_hash_entry *
3774 stub_hash_newfunc (struct bfd_hash_entry *entry,
3775 struct bfd_hash_table *table,
3776 const char *string)
3777 {
3778 /* Allocate the structure if it has not already been allocated by a
3779 subclass. */
3780 if (entry == NULL)
3781 {
3782 entry = (struct bfd_hash_entry *)
3783 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3784 if (entry == NULL)
3785 return entry;
3786 }
3787
3788 /* Call the allocation method of the superclass. */
3789 entry = bfd_hash_newfunc (entry, table, string);
3790 if (entry != NULL)
3791 {
3792 struct elf32_arm_stub_hash_entry *eh;
3793
3794 /* Initialize the local fields. */
3795 eh = (struct elf32_arm_stub_hash_entry *) entry;
3796 eh->stub_sec = NULL;
3797 eh->stub_offset = (bfd_vma) -1;
3798 eh->source_value = 0;
3799 eh->target_value = 0;
3800 eh->target_section = NULL;
3801 eh->orig_insn = 0;
3802 eh->stub_type = arm_stub_none;
3803 eh->stub_size = 0;
3804 eh->stub_template = NULL;
3805 eh->stub_template_size = -1;
3806 eh->h = NULL;
3807 eh->id_sec = NULL;
3808 eh->output_name = NULL;
3809 }
3810
3811 return entry;
3812 }
3813
3814 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3815 shortcuts to them in our hash table. */
3816
3817 static bool
3818 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3819 {
3820 struct elf32_arm_link_hash_table *htab;
3821
3822 htab = elf32_arm_hash_table (info);
3823 if (htab == NULL)
3824 return false;
3825
3826 if (! _bfd_elf_create_got_section (dynobj, info))
3827 return false;
3828
3829 /* Also create .rofixup. */
3830 if (htab->fdpic_p)
3831 {
3832 htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup",
3833 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3834 | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY));
3835 if (htab->srofixup == NULL
3836 || !bfd_set_section_alignment (htab->srofixup, 2))
3837 return false;
3838 }
3839
3840 return true;
3841 }
3842
3843 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3844
3845 static bool
3846 create_ifunc_sections (struct bfd_link_info *info)
3847 {
3848 struct elf32_arm_link_hash_table *htab;
3849 const struct elf_backend_data *bed;
3850 bfd *dynobj;
3851 asection *s;
3852 flagword flags;
3853
3854 htab = elf32_arm_hash_table (info);
3855 dynobj = htab->root.dynobj;
3856 bed = get_elf_backend_data (dynobj);
3857 flags = bed->dynamic_sec_flags;
3858
3859 if (htab->root.iplt == NULL)
3860 {
3861 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3862 flags | SEC_READONLY | SEC_CODE);
3863 if (s == NULL
3864 || !bfd_set_section_alignment (s, bed->plt_alignment))
3865 return false;
3866 htab->root.iplt = s;
3867 }
3868
3869 if (htab->root.irelplt == NULL)
3870 {
3871 s = bfd_make_section_anyway_with_flags (dynobj,
3872 RELOC_SECTION (htab, ".iplt"),
3873 flags | SEC_READONLY);
3874 if (s == NULL
3875 || !bfd_set_section_alignment (s, bed->s->log_file_align))
3876 return false;
3877 htab->root.irelplt = s;
3878 }
3879
3880 if (htab->root.igotplt == NULL)
3881 {
3882 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3883 if (s == NULL
3884 || !bfd_set_section_alignment (s, bed->s->log_file_align))
3885 return false;
3886 htab->root.igotplt = s;
3887 }
3888 return true;
3889 }
3890
3891 /* Determine if we're dealing with a Thumb only architecture. */
3892
3893 static bool
3894 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3895 {
3896 int arch;
3897 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3898 Tag_CPU_arch_profile);
3899
3900 if (profile)
3901 return profile == 'M';
3902
3903 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3904
3905 /* Force return logic to be reviewed for each new architecture. */
3906 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3907
3908 if (arch == TAG_CPU_ARCH_V6_M
3909 || arch == TAG_CPU_ARCH_V6S_M
3910 || arch == TAG_CPU_ARCH_V7E_M
3911 || arch == TAG_CPU_ARCH_V8M_BASE
3912 || arch == TAG_CPU_ARCH_V8M_MAIN
3913 || arch == TAG_CPU_ARCH_V8_1M_MAIN)
3914 return true;
3915
3916 return false;
3917 }
3918
3919 /* Determine if we're dealing with a Thumb-2 object. */
3920
3921 static bool
3922 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3923 {
3924 int arch;
3925 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3926 Tag_THUMB_ISA_use);
3927
3928 /* No use of thumb permitted, or a legacy thumb-1/2 definition. */
3929 if (thumb_isa < 3)
3930 return thumb_isa == 2;
3931
3932 /* Variant of thumb is described by the architecture tag. */
3933 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3934
3935 /* Force return logic to be reviewed for each new architecture. */
3936 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3937
3938 return (arch == TAG_CPU_ARCH_V6T2
3939 || arch == TAG_CPU_ARCH_V7
3940 || arch == TAG_CPU_ARCH_V7E_M
3941 || arch == TAG_CPU_ARCH_V8
3942 || arch == TAG_CPU_ARCH_V8R
3943 || arch == TAG_CPU_ARCH_V8M_MAIN
3944 || arch == TAG_CPU_ARCH_V8_1M_MAIN);
3945 }
3946
3947 /* Determine whether Thumb-2 BL instruction is available. */
3948
3949 static bool
3950 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3951 {
3952 int arch =
3953 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3954
3955 /* Force return logic to be reviewed for each new architecture. */
3956 BFD_ASSERT (arch <= TAG_CPU_ARCH_V9);
3957
3958 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3959 return (arch == TAG_CPU_ARCH_V6T2
3960 || arch >= TAG_CPU_ARCH_V7);
3961 }
3962
3963 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3964 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3965 hash table. */
3966
3967 static bool
3968 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3969 {
3970 struct elf32_arm_link_hash_table *htab;
3971
3972 htab = elf32_arm_hash_table (info);
3973 if (htab == NULL)
3974 return false;
3975
3976 if (!htab->root.sgot && !create_got_section (dynobj, info))
3977 return false;
3978
3979 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3980 return false;
3981
3982 if (htab->root.target_os == is_vxworks)
3983 {
3984 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3985 return false;
3986
3987 if (bfd_link_pic (info))
3988 {
3989 htab->plt_header_size = 0;
3990 htab->plt_entry_size
3991 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3992 }
3993 else
3994 {
3995 htab->plt_header_size
3996 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3997 htab->plt_entry_size
3998 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3999 }
4000
4001 if (elf_elfheader (dynobj))
4002 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
4003 }
4004 else
4005 {
4006 /* PR ld/16017
4007 Test for thumb only architectures. Note - we cannot just call
4008 using_thumb_only() as the attributes in the output bfd have not been
4009 initialised at this point, so instead we use the input bfd. */
4010 bfd * saved_obfd = htab->obfd;
4011
4012 htab->obfd = dynobj;
4013 if (using_thumb_only (htab))
4014 {
4015 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
4016 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
4017 }
4018 htab->obfd = saved_obfd;
4019 }
4020
4021 if (htab->fdpic_p) {
4022 htab->plt_header_size = 0;
4023 if (info->flags & DF_BIND_NOW)
4024 htab->plt_entry_size = 4 * (ARRAY_SIZE (elf32_arm_fdpic_plt_entry) - 5);
4025 else
4026 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_fdpic_plt_entry);
4027 }
4028
4029 if (!htab->root.splt
4030 || !htab->root.srelplt
4031 || !htab->root.sdynbss
4032 || (!bfd_link_pic (info) && !htab->root.srelbss))
4033 abort ();
4034
4035 return true;
4036 }
4037
4038 /* Copy the extra info we tack onto an elf_link_hash_entry. */
4039
4040 static void
4041 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
4042 struct elf_link_hash_entry *dir,
4043 struct elf_link_hash_entry *ind)
4044 {
4045 struct elf32_arm_link_hash_entry *edir, *eind;
4046
4047 edir = (struct elf32_arm_link_hash_entry *) dir;
4048 eind = (struct elf32_arm_link_hash_entry *) ind;
4049
4050 if (ind->root.type == bfd_link_hash_indirect)
4051 {
4052 /* Copy over PLT info. */
4053 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
4054 eind->plt.thumb_refcount = 0;
4055 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
4056 eind->plt.maybe_thumb_refcount = 0;
4057 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
4058 eind->plt.noncall_refcount = 0;
4059
4060 /* Copy FDPIC counters. */
4061 edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt;
4062 edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt;
4063 edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt;
4064
4065 /* We should only allocate a function to .iplt once the final
4066 symbol information is known. */
4067 BFD_ASSERT (!eind->is_iplt);
4068
4069 if (dir->got.refcount <= 0)
4070 {
4071 edir->tls_type = eind->tls_type;
4072 eind->tls_type = GOT_UNKNOWN;
4073 }
4074 }
4075
4076 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
4077 }
4078
4079 /* Destroy an ARM elf linker hash table. */
4080
4081 static void
4082 elf32_arm_link_hash_table_free (bfd *obfd)
4083 {
4084 struct elf32_arm_link_hash_table *ret
4085 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
4086
4087 bfd_hash_table_free (&ret->stub_hash_table);
4088 _bfd_elf_link_hash_table_free (obfd);
4089 }
4090
4091 /* Create an ARM elf linker hash table. */
4092
4093 static struct bfd_link_hash_table *
4094 elf32_arm_link_hash_table_create (bfd *abfd)
4095 {
4096 struct elf32_arm_link_hash_table *ret;
4097 size_t amt = sizeof (struct elf32_arm_link_hash_table);
4098
4099 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
4100 if (ret == NULL)
4101 return NULL;
4102
4103 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
4104 elf32_arm_link_hash_newfunc,
4105 sizeof (struct elf32_arm_link_hash_entry),
4106 ARM_ELF_DATA))
4107 {
4108 free (ret);
4109 return NULL;
4110 }
4111
4112 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4113 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
4114 #ifdef FOUR_WORD_PLT
4115 ret->plt_header_size = 16;
4116 ret->plt_entry_size = 16;
4117 #else
4118 ret->plt_header_size = 20;
4119 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
4120 #endif
4121 ret->use_rel = true;
4122 ret->obfd = abfd;
4123 ret->fdpic_p = 0;
4124
4125 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
4126 sizeof (struct elf32_arm_stub_hash_entry)))
4127 {
4128 _bfd_elf_link_hash_table_free (abfd);
4129 return NULL;
4130 }
4131 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
4132
4133 return &ret->root.root;
4134 }
4135
4136 /* Determine what kind of NOPs are available. */
4137
4138 static bool
4139 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
4140 {
4141 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4142 Tag_CPU_arch);
4143
4144 /* Force return logic to be reviewed for each new architecture. */
4145 BFD_ASSERT (arch <= TAG_CPU_ARCH_V9);
4146
4147 return (arch == TAG_CPU_ARCH_V6T2
4148 || arch == TAG_CPU_ARCH_V6K
4149 || arch == TAG_CPU_ARCH_V7
4150 || arch == TAG_CPU_ARCH_V8
4151 || arch == TAG_CPU_ARCH_V8R
4152 || arch == TAG_CPU_ARCH_V9);
4153 }
4154
4155 static bool
4156 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
4157 {
4158 switch (stub_type)
4159 {
4160 case arm_stub_long_branch_thumb_only:
4161 case arm_stub_long_branch_thumb2_only:
4162 case arm_stub_long_branch_thumb2_only_pure:
4163 case arm_stub_long_branch_v4t_thumb_arm:
4164 case arm_stub_short_branch_v4t_thumb_arm:
4165 case arm_stub_long_branch_v4t_thumb_arm_pic:
4166 case arm_stub_long_branch_v4t_thumb_tls_pic:
4167 case arm_stub_long_branch_thumb_only_pic:
4168 case arm_stub_cmse_branch_thumb_only:
4169 return true;
4170 case arm_stub_none:
4171 BFD_FAIL ();
4172 return false;
4173 break;
4174 default:
4175 return false;
4176 }
4177 }
4178
4179 /* Determine the type of stub needed, if any, for a call. */
4180
4181 static enum elf32_arm_stub_type
4182 arm_type_of_stub (struct bfd_link_info *info,
4183 asection *input_sec,
4184 const Elf_Internal_Rela *rel,
4185 unsigned char st_type,
4186 enum arm_st_branch_type *actual_branch_type,
4187 struct elf32_arm_link_hash_entry *hash,
4188 bfd_vma destination,
4189 asection *sym_sec,
4190 bfd *input_bfd,
4191 const char *name)
4192 {
4193 bfd_vma location;
4194 bfd_signed_vma branch_offset;
4195 unsigned int r_type;
4196 struct elf32_arm_link_hash_table * globals;
4197 bool thumb2, thumb2_bl, thumb_only;
4198 enum elf32_arm_stub_type stub_type = arm_stub_none;
4199 int use_plt = 0;
4200 enum arm_st_branch_type branch_type = *actual_branch_type;
4201 union gotplt_union *root_plt;
4202 struct arm_plt_info *arm_plt;
4203 int arch;
4204 int thumb2_movw;
4205
4206 if (branch_type == ST_BRANCH_LONG)
4207 return stub_type;
4208
4209 globals = elf32_arm_hash_table (info);
4210 if (globals == NULL)
4211 return stub_type;
4212
4213 thumb_only = using_thumb_only (globals);
4214 thumb2 = using_thumb2 (globals);
4215 thumb2_bl = using_thumb2_bl (globals);
4216
4217 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
4218
4219 /* True for architectures that implement the thumb2 movw instruction. */
4220 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
4221
4222 /* Determine where the call point is. */
4223 location = (input_sec->output_offset
4224 + input_sec->output_section->vma
4225 + rel->r_offset);
4226
4227 r_type = ELF32_R_TYPE (rel->r_info);
4228
4229 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4230 are considering a function call relocation. */
4231 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4232 || r_type == R_ARM_THM_JUMP19)
4233 && branch_type == ST_BRANCH_TO_ARM)
4234 branch_type = ST_BRANCH_TO_THUMB;
4235
4236 /* For TLS call relocs, it is the caller's responsibility to provide
4237 the address of the appropriate trampoline. */
4238 if (r_type != R_ARM_TLS_CALL
4239 && r_type != R_ARM_THM_TLS_CALL
4240 && elf32_arm_get_plt_info (input_bfd, globals, hash,
4241 ELF32_R_SYM (rel->r_info), &root_plt,
4242 &arm_plt)
4243 && root_plt->offset != (bfd_vma) -1)
4244 {
4245 asection *splt;
4246
4247 if (hash == NULL || hash->is_iplt)
4248 splt = globals->root.iplt;
4249 else
4250 splt = globals->root.splt;
4251 if (splt != NULL)
4252 {
4253 use_plt = 1;
4254
4255 /* Note when dealing with PLT entries: the main PLT stub is in
4256 ARM mode, so if the branch is in Thumb mode, another
4257 Thumb->ARM stub will be inserted later just before the ARM
4258 PLT stub. If a long branch stub is needed, we'll add a
4259 Thumb->Arm one and branch directly to the ARM PLT entry.
4260 Here, we have to check if a pre-PLT Thumb->ARM stub
4261 is needed and if it will be close enough. */
4262
4263 destination = (splt->output_section->vma
4264 + splt->output_offset
4265 + root_plt->offset);
4266 st_type = STT_FUNC;
4267
4268 /* Thumb branch/call to PLT: it can become a branch to ARM
4269 or to Thumb. We must perform the same checks and
4270 corrections as in elf32_arm_final_link_relocate. */
4271 if ((r_type == R_ARM_THM_CALL)
4272 || (r_type == R_ARM_THM_JUMP24))
4273 {
4274 if (globals->use_blx
4275 && r_type == R_ARM_THM_CALL
4276 && !thumb_only)
4277 {
4278 /* If the Thumb BLX instruction is available, convert
4279 the BL to a BLX instruction to call the ARM-mode
4280 PLT entry. */
4281 branch_type = ST_BRANCH_TO_ARM;
4282 }
4283 else
4284 {
4285 if (!thumb_only)
4286 /* Target the Thumb stub before the ARM PLT entry. */
4287 destination -= PLT_THUMB_STUB_SIZE;
4288 branch_type = ST_BRANCH_TO_THUMB;
4289 }
4290 }
4291 else
4292 {
4293 branch_type = ST_BRANCH_TO_ARM;
4294 }
4295 }
4296 }
4297 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4298 BFD_ASSERT (st_type != STT_GNU_IFUNC);
4299
4300 branch_offset = (bfd_signed_vma)(destination - location);
4301
4302 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4303 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
4304 {
4305 /* Handle cases where:
4306 - this call goes too far (different Thumb/Thumb2 max
4307 distance)
4308 - it's a Thumb->Arm call and blx is not available, or it's a
4309 Thumb->Arm branch (not bl). A stub is needed in this case,
4310 but only if this call is not through a PLT entry. Indeed,
4311 PLT stubs handle mode switching already. */
4312 if ((!thumb2_bl
4313 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4314 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4315 || (thumb2_bl
4316 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4317 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4318 || (thumb2
4319 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4320 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4321 && (r_type == R_ARM_THM_JUMP19))
4322 || (branch_type == ST_BRANCH_TO_ARM
4323 && (((r_type == R_ARM_THM_CALL
4324 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4325 || (r_type == R_ARM_THM_JUMP24)
4326 || (r_type == R_ARM_THM_JUMP19))
4327 && !use_plt))
4328 {
4329 /* If we need to insert a Thumb-Thumb long branch stub to a
4330 PLT, use one that branches directly to the ARM PLT
4331 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4332 stub, undo this now. */
4333 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4334 {
4335 branch_type = ST_BRANCH_TO_ARM;
4336 branch_offset += PLT_THUMB_STUB_SIZE;
4337 }
4338
4339 if (branch_type == ST_BRANCH_TO_THUMB)
4340 {
4341 /* Thumb to thumb. */
4342 if (!thumb_only)
4343 {
4344 if (input_sec->flags & SEC_ELF_PURECODE)
4345 _bfd_error_handler
4346 (_("%pB(%pA): warning: long branch veneers used in"
4347 " section with SHF_ARM_PURECODE section"
4348 " attribute is only supported for M-profile"
4349 " targets that implement the movw instruction"),
4350 input_bfd, input_sec);
4351
4352 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4353 /* PIC stubs. */
4354 ? ((globals->use_blx
4355 && (r_type == R_ARM_THM_CALL))
4356 /* V5T and above. Stub starts with ARM code, so
4357 we must be able to switch mode before
4358 reaching it, which is only possible for 'bl'
4359 (ie R_ARM_THM_CALL relocation). */
4360 ? arm_stub_long_branch_any_thumb_pic
4361 /* On V4T, use Thumb code only. */
4362 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4363
4364 /* non-PIC stubs. */
4365 : ((globals->use_blx
4366 && (r_type == R_ARM_THM_CALL))
4367 /* V5T and above. */
4368 ? arm_stub_long_branch_any_any
4369 /* V4T. */
4370 : arm_stub_long_branch_v4t_thumb_thumb);
4371 }
4372 else
4373 {
4374 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4375 stub_type = arm_stub_long_branch_thumb2_only_pure;
4376 else
4377 {
4378 if (input_sec->flags & SEC_ELF_PURECODE)
4379 _bfd_error_handler
4380 (_("%pB(%pA): warning: long branch veneers used in"
4381 " section with SHF_ARM_PURECODE section"
4382 " attribute is only supported for M-profile"
4383 " targets that implement the movw instruction"),
4384 input_bfd, input_sec);
4385
4386 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4387 /* PIC stub. */
4388 ? arm_stub_long_branch_thumb_only_pic
4389 /* non-PIC stub. */
4390 : (thumb2 ? arm_stub_long_branch_thumb2_only
4391 : arm_stub_long_branch_thumb_only);
4392 }
4393 }
4394 }
4395 else
4396 {
4397 if (input_sec->flags & SEC_ELF_PURECODE)
4398 _bfd_error_handler
4399 (_("%pB(%pA): warning: long branch veneers used in"
4400 " section with SHF_ARM_PURECODE section"
4401 " attribute is only supported" " for M-profile"
4402 " targets that implement the movw instruction"),
4403 input_bfd, input_sec);
4404
4405 /* Thumb to arm. */
4406 if (sym_sec != NULL
4407 && sym_sec->owner != NULL
4408 && !INTERWORK_FLAG (sym_sec->owner))
4409 {
4410 _bfd_error_handler
4411 (_("%pB(%s): warning: interworking not enabled;"
4412 " first occurrence: %pB: %s call to %s"),
4413 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
4414 }
4415
4416 stub_type =
4417 (bfd_link_pic (info) | globals->pic_veneer)
4418 /* PIC stubs. */
4419 ? (r_type == R_ARM_THM_TLS_CALL
4420 /* TLS PIC stubs. */
4421 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4422 : arm_stub_long_branch_v4t_thumb_tls_pic)
4423 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4424 /* V5T PIC and above. */
4425 ? arm_stub_long_branch_any_arm_pic
4426 /* V4T PIC stub. */
4427 : arm_stub_long_branch_v4t_thumb_arm_pic))
4428
4429 /* non-PIC stubs. */
4430 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4431 /* V5T and above. */
4432 ? arm_stub_long_branch_any_any
4433 /* V4T. */
4434 : arm_stub_long_branch_v4t_thumb_arm);
4435
4436 /* Handle v4t short branches. */
4437 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4438 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4439 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4440 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4441 }
4442 }
4443 }
4444 else if (r_type == R_ARM_CALL
4445 || r_type == R_ARM_JUMP24
4446 || r_type == R_ARM_PLT32
4447 || r_type == R_ARM_TLS_CALL)
4448 {
4449 if (input_sec->flags & SEC_ELF_PURECODE)
4450 _bfd_error_handler
4451 (_("%pB(%pA): warning: long branch veneers used in"
4452 " section with SHF_ARM_PURECODE section"
4453 " attribute is only supported for M-profile"
4454 " targets that implement the movw instruction"),
4455 input_bfd, input_sec);
4456 if (branch_type == ST_BRANCH_TO_THUMB)
4457 {
4458 /* Arm to thumb. */
4459
4460 if (sym_sec != NULL
4461 && sym_sec->owner != NULL
4462 && !INTERWORK_FLAG (sym_sec->owner))
4463 {
4464 _bfd_error_handler
4465 (_("%pB(%s): warning: interworking not enabled;"
4466 " first occurrence: %pB: %s call to %s"),
4467 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
4468 }
4469
4470 /* We have an extra 2-bytes reach because of
4471 the mode change (bit 24 (H) of BLX encoding). */
4472 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4473 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4474 || (r_type == R_ARM_CALL && !globals->use_blx)
4475 || (r_type == R_ARM_JUMP24)
4476 || (r_type == R_ARM_PLT32))
4477 {
4478 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4479 /* PIC stubs. */
4480 ? ((globals->use_blx)
4481 /* V5T and above. */
4482 ? arm_stub_long_branch_any_thumb_pic
4483 /* V4T stub. */
4484 : arm_stub_long_branch_v4t_arm_thumb_pic)
4485
4486 /* non-PIC stubs. */
4487 : ((globals->use_blx)
4488 /* V5T and above. */
4489 ? arm_stub_long_branch_any_any
4490 /* V4T. */
4491 : arm_stub_long_branch_v4t_arm_thumb);
4492 }
4493 }
4494 else
4495 {
4496 /* Arm to arm. */
4497 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4498 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4499 {
4500 stub_type =
4501 (bfd_link_pic (info) | globals->pic_veneer)
4502 /* PIC stubs. */
4503 ? (r_type == R_ARM_TLS_CALL
4504 /* TLS PIC Stub. */
4505 ? arm_stub_long_branch_any_tls_pic
4506 : (globals->root.target_os == is_nacl
4507 ? arm_stub_long_branch_arm_nacl_pic
4508 : arm_stub_long_branch_any_arm_pic))
4509 /* non-PIC stubs. */
4510 : (globals->root.target_os == is_nacl
4511 ? arm_stub_long_branch_arm_nacl
4512 : arm_stub_long_branch_any_any);
4513 }
4514 }
4515 }
4516
4517 /* If a stub is needed, record the actual destination type. */
4518 if (stub_type != arm_stub_none)
4519 *actual_branch_type = branch_type;
4520
4521 return stub_type;
4522 }
4523
4524 /* Build a name for an entry in the stub hash table. */
4525
4526 static char *
4527 elf32_arm_stub_name (const asection *input_section,
4528 const asection *sym_sec,
4529 const struct elf32_arm_link_hash_entry *hash,
4530 const Elf_Internal_Rela *rel,
4531 enum elf32_arm_stub_type stub_type)
4532 {
4533 char *stub_name;
4534 bfd_size_type len;
4535
4536 if (hash)
4537 {
4538 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4539 stub_name = (char *) bfd_malloc (len);
4540 if (stub_name != NULL)
4541 sprintf (stub_name, "%08x_%s+%x_%d",
4542 input_section->id & 0xffffffff,
4543 hash->root.root.root.string,
4544 (int) rel->r_addend & 0xffffffff,
4545 (int) stub_type);
4546 }
4547 else
4548 {
4549 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4550 stub_name = (char *) bfd_malloc (len);
4551 if (stub_name != NULL)
4552 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4553 input_section->id & 0xffffffff,
4554 sym_sec->id & 0xffffffff,
4555 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4556 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4557 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4558 (int) rel->r_addend & 0xffffffff,
4559 (int) stub_type);
4560 }
4561
4562 return stub_name;
4563 }
4564
4565 /* Look up an entry in the stub hash. Stub entries are cached because
4566 creating the stub name takes a bit of time. */
4567
4568 static struct elf32_arm_stub_hash_entry *
4569 elf32_arm_get_stub_entry (const asection *input_section,
4570 const asection *sym_sec,
4571 struct elf_link_hash_entry *hash,
4572 const Elf_Internal_Rela *rel,
4573 struct elf32_arm_link_hash_table *htab,
4574 enum elf32_arm_stub_type stub_type)
4575 {
4576 struct elf32_arm_stub_hash_entry *stub_entry;
4577 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4578 const asection *id_sec;
4579
4580 if ((input_section->flags & SEC_CODE) == 0)
4581 return NULL;
4582
4583 /* If the input section is the CMSE stubs one and it needs a long
4584 branch stub to reach it's final destination, give up with an
4585 error message: this is not supported. See PR ld/24709. */
4586 if (!strncmp (input_section->name, CMSE_STUB_NAME, strlen (CMSE_STUB_NAME)))
4587 {
4588 bfd *output_bfd = htab->obfd;
4589 asection *out_sec = bfd_get_section_by_name (output_bfd, CMSE_STUB_NAME);
4590
4591 _bfd_error_handler (_("ERROR: CMSE stub (%s section) too far "
4592 "(%#" PRIx64 ") from destination (%#" PRIx64 ")"),
4593 CMSE_STUB_NAME,
4594 (uint64_t)out_sec->output_section->vma
4595 + out_sec->output_offset,
4596 (uint64_t)sym_sec->output_section->vma
4597 + sym_sec->output_offset
4598 + h->root.root.u.def.value);
4599 /* Exit, rather than leave incompletely processed
4600 relocations. */
4601 xexit (1);
4602 }
4603
4604 /* If this input section is part of a group of sections sharing one
4605 stub section, then use the id of the first section in the group.
4606 Stub names need to include a section id, as there may well be
4607 more than one stub used to reach say, printf, and we need to
4608 distinguish between them. */
4609 BFD_ASSERT (input_section->id <= htab->top_id);
4610 id_sec = htab->stub_group[input_section->id].link_sec;
4611
4612 if (h != NULL && h->stub_cache != NULL
4613 && h->stub_cache->h == h
4614 && h->stub_cache->id_sec == id_sec
4615 && h->stub_cache->stub_type == stub_type)
4616 {
4617 stub_entry = h->stub_cache;
4618 }
4619 else
4620 {
4621 char *stub_name;
4622
4623 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4624 if (stub_name == NULL)
4625 return NULL;
4626
4627 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4628 stub_name, false, false);
4629 if (h != NULL)
4630 h->stub_cache = stub_entry;
4631
4632 free (stub_name);
4633 }
4634
4635 return stub_entry;
4636 }
4637
4638 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4639 section. */
4640
4641 static bool
4642 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4643 {
4644 if (stub_type >= max_stub_type)
4645 abort (); /* Should be unreachable. */
4646
4647 switch (stub_type)
4648 {
4649 case arm_stub_cmse_branch_thumb_only:
4650 return true;
4651
4652 default:
4653 return false;
4654 }
4655
4656 abort (); /* Should be unreachable. */
4657 }
4658
4659 /* Required alignment (as a power of 2) for the dedicated section holding
4660 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4661 with input sections. */
4662
4663 static int
4664 arm_dedicated_stub_output_section_required_alignment
4665 (enum elf32_arm_stub_type stub_type)
4666 {
4667 if (stub_type >= max_stub_type)
4668 abort (); /* Should be unreachable. */
4669
4670 switch (stub_type)
4671 {
4672 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4673 boundary. */
4674 case arm_stub_cmse_branch_thumb_only:
4675 return 5;
4676
4677 default:
4678 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4679 return 0;
4680 }
4681
4682 abort (); /* Should be unreachable. */
4683 }
4684
4685 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4686 NULL if veneers of this type are interspersed with input sections. */
4687
4688 static const char *
4689 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4690 {
4691 if (stub_type >= max_stub_type)
4692 abort (); /* Should be unreachable. */
4693
4694 switch (stub_type)
4695 {
4696 case arm_stub_cmse_branch_thumb_only:
4697 return CMSE_STUB_NAME;
4698
4699 default:
4700 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4701 return NULL;
4702 }
4703
4704 abort (); /* Should be unreachable. */
4705 }
4706
4707 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4708 returns the address of the hash table field in HTAB holding a pointer to the
4709 corresponding input section. Otherwise, returns NULL. */
4710
4711 static asection **
4712 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4713 enum elf32_arm_stub_type stub_type)
4714 {
4715 if (stub_type >= max_stub_type)
4716 abort (); /* Should be unreachable. */
4717
4718 switch (stub_type)
4719 {
4720 case arm_stub_cmse_branch_thumb_only:
4721 return &htab->cmse_stub_sec;
4722
4723 default:
4724 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4725 return NULL;
4726 }
4727
4728 abort (); /* Should be unreachable. */
4729 }
4730
4731 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4732 is the section that branch into veneer and can be NULL if stub should go in
4733 a dedicated output section. Returns a pointer to the stub section, and the
4734 section to which the stub section will be attached (in *LINK_SEC_P).
4735 LINK_SEC_P may be NULL. */
4736
4737 static asection *
4738 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4739 struct elf32_arm_link_hash_table *htab,
4740 enum elf32_arm_stub_type stub_type)
4741 {
4742 asection *link_sec, *out_sec, **stub_sec_p;
4743 const char *stub_sec_prefix;
4744 bool dedicated_output_section =
4745 arm_dedicated_stub_output_section_required (stub_type);
4746 int align;
4747
4748 if (dedicated_output_section)
4749 {
4750 bfd *output_bfd = htab->obfd;
4751 const char *out_sec_name =
4752 arm_dedicated_stub_output_section_name (stub_type);
4753 link_sec = NULL;
4754 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4755 stub_sec_prefix = out_sec_name;
4756 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4757 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4758 if (out_sec == NULL)
4759 {
4760 _bfd_error_handler (_("no address assigned to the veneers output "
4761 "section %s"), out_sec_name);
4762 return NULL;
4763 }
4764 }
4765 else
4766 {
4767 BFD_ASSERT (section->id <= htab->top_id);
4768 link_sec = htab->stub_group[section->id].link_sec;
4769 BFD_ASSERT (link_sec != NULL);
4770 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4771 if (*stub_sec_p == NULL)
4772 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4773 stub_sec_prefix = link_sec->name;
4774 out_sec = link_sec->output_section;
4775 align = htab->root.target_os == is_nacl ? 4 : 3;
4776 }
4777
4778 if (*stub_sec_p == NULL)
4779 {
4780 size_t namelen;
4781 bfd_size_type len;
4782 char *s_name;
4783
4784 namelen = strlen (stub_sec_prefix);
4785 len = namelen + sizeof (STUB_SUFFIX);
4786 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4787 if (s_name == NULL)
4788 return NULL;
4789
4790 memcpy (s_name, stub_sec_prefix, namelen);
4791 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4792 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4793 align);
4794 if (*stub_sec_p == NULL)
4795 return NULL;
4796
4797 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4798 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4799 | SEC_KEEP;
4800 }
4801
4802 if (!dedicated_output_section)
4803 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4804
4805 if (link_sec_p)
4806 *link_sec_p = link_sec;
4807
4808 return *stub_sec_p;
4809 }
4810
4811 /* Add a new stub entry to the stub hash. Not all fields of the new
4812 stub entry are initialised. */
4813
4814 static struct elf32_arm_stub_hash_entry *
4815 elf32_arm_add_stub (const char *stub_name, asection *section,
4816 struct elf32_arm_link_hash_table *htab,
4817 enum elf32_arm_stub_type stub_type)
4818 {
4819 asection *link_sec;
4820 asection *stub_sec;
4821 struct elf32_arm_stub_hash_entry *stub_entry;
4822
4823 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4824 stub_type);
4825 if (stub_sec == NULL)
4826 return NULL;
4827
4828 /* Enter this entry into the linker stub hash table. */
4829 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4830 true, false);
4831 if (stub_entry == NULL)
4832 {
4833 if (section == NULL)
4834 section = stub_sec;
4835 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4836 section->owner, stub_name);
4837 return NULL;
4838 }
4839
4840 stub_entry->stub_sec = stub_sec;
4841 stub_entry->stub_offset = (bfd_vma) -1;
4842 stub_entry->id_sec = link_sec;
4843
4844 return stub_entry;
4845 }
4846
4847 /* Store an Arm insn into an output section not processed by
4848 elf32_arm_write_section. */
4849
4850 static void
4851 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4852 bfd * output_bfd, bfd_vma val, void * ptr)
4853 {
4854 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4855 bfd_putl32 (val, ptr);
4856 else
4857 bfd_putb32 (val, ptr);
4858 }
4859
4860 /* Store a 16-bit Thumb insn into an output section not processed by
4861 elf32_arm_write_section. */
4862
4863 static void
4864 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4865 bfd * output_bfd, bfd_vma val, void * ptr)
4866 {
4867 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4868 bfd_putl16 (val, ptr);
4869 else
4870 bfd_putb16 (val, ptr);
4871 }
4872
4873 /* Store a Thumb2 insn into an output section not processed by
4874 elf32_arm_write_section. */
4875
4876 static void
4877 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4878 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4879 {
4880 /* T2 instructions are 16-bit streamed. */
4881 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4882 {
4883 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4884 bfd_putl16 ((val & 0xffff), ptr + 2);
4885 }
4886 else
4887 {
4888 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4889 bfd_putb16 ((val & 0xffff), ptr + 2);
4890 }
4891 }
4892
4893 /* If it's possible to change R_TYPE to a more efficient access
4894 model, return the new reloc type. */
4895
4896 static unsigned
4897 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4898 struct elf_link_hash_entry *h)
4899 {
4900 int is_local = (h == NULL);
4901
4902 if (bfd_link_dll (info)
4903 || (h && h->root.type == bfd_link_hash_undefweak))
4904 return r_type;
4905
4906 /* We do not support relaxations for Old TLS models. */
4907 switch (r_type)
4908 {
4909 case R_ARM_TLS_GOTDESC:
4910 case R_ARM_TLS_CALL:
4911 case R_ARM_THM_TLS_CALL:
4912 case R_ARM_TLS_DESCSEQ:
4913 case R_ARM_THM_TLS_DESCSEQ:
4914 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4915 }
4916
4917 return r_type;
4918 }
4919
4920 static bfd_reloc_status_type elf32_arm_final_link_relocate
4921 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4922 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4923 const char *, unsigned char, enum arm_st_branch_type,
4924 struct elf_link_hash_entry *, bool *, char **);
4925
4926 static unsigned int
4927 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4928 {
4929 switch (stub_type)
4930 {
4931 case arm_stub_a8_veneer_b_cond:
4932 case arm_stub_a8_veneer_b:
4933 case arm_stub_a8_veneer_bl:
4934 return 2;
4935
4936 case arm_stub_long_branch_any_any:
4937 case arm_stub_long_branch_v4t_arm_thumb:
4938 case arm_stub_long_branch_thumb_only:
4939 case arm_stub_long_branch_thumb2_only:
4940 case arm_stub_long_branch_thumb2_only_pure:
4941 case arm_stub_long_branch_v4t_thumb_thumb:
4942 case arm_stub_long_branch_v4t_thumb_arm:
4943 case arm_stub_short_branch_v4t_thumb_arm:
4944 case arm_stub_long_branch_any_arm_pic:
4945 case arm_stub_long_branch_any_thumb_pic:
4946 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4947 case arm_stub_long_branch_v4t_arm_thumb_pic:
4948 case arm_stub_long_branch_v4t_thumb_arm_pic:
4949 case arm_stub_long_branch_thumb_only_pic:
4950 case arm_stub_long_branch_any_tls_pic:
4951 case arm_stub_long_branch_v4t_thumb_tls_pic:
4952 case arm_stub_cmse_branch_thumb_only:
4953 case arm_stub_a8_veneer_blx:
4954 return 4;
4955
4956 case arm_stub_long_branch_arm_nacl:
4957 case arm_stub_long_branch_arm_nacl_pic:
4958 return 16;
4959
4960 default:
4961 abort (); /* Should be unreachable. */
4962 }
4963 }
4964
4965 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4966 veneering (TRUE) or have their own symbol (FALSE). */
4967
4968 static bool
4969 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4970 {
4971 if (stub_type >= max_stub_type)
4972 abort (); /* Should be unreachable. */
4973
4974 switch (stub_type)
4975 {
4976 case arm_stub_cmse_branch_thumb_only:
4977 return true;
4978
4979 default:
4980 return false;
4981 }
4982
4983 abort (); /* Should be unreachable. */
4984 }
4985
4986 /* Returns the padding needed for the dedicated section used stubs of type
4987 STUB_TYPE. */
4988
4989 static int
4990 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4991 {
4992 if (stub_type >= max_stub_type)
4993 abort (); /* Should be unreachable. */
4994
4995 switch (stub_type)
4996 {
4997 case arm_stub_cmse_branch_thumb_only:
4998 return 32;
4999
5000 default:
5001 return 0;
5002 }
5003
5004 abort (); /* Should be unreachable. */
5005 }
5006
5007 /* If veneers of type STUB_TYPE should go in a dedicated output section,
5008 returns the address of the hash table field in HTAB holding the offset at
5009 which new veneers should be layed out in the stub section. */
5010
5011 static bfd_vma*
5012 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
5013 enum elf32_arm_stub_type stub_type)
5014 {
5015 switch (stub_type)
5016 {
5017 case arm_stub_cmse_branch_thumb_only:
5018 return &htab->new_cmse_stub_offset;
5019
5020 default:
5021 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
5022 return NULL;
5023 }
5024 }
5025
5026 static bool
5027 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
5028 void * in_arg)
5029 {
5030 #define MAXRELOCS 3
5031 bool removed_sg_veneer;
5032 struct elf32_arm_stub_hash_entry *stub_entry;
5033 struct elf32_arm_link_hash_table *globals;
5034 struct bfd_link_info *info;
5035 asection *stub_sec;
5036 bfd *stub_bfd;
5037 bfd_byte *loc;
5038 bfd_vma sym_value;
5039 int template_size;
5040 int size;
5041 const insn_sequence *template_sequence;
5042 int i;
5043 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
5044 int stub_reloc_offset[MAXRELOCS] = {0, 0};
5045 int nrelocs = 0;
5046 int just_allocated = 0;
5047
5048 /* Massage our args to the form they really have. */
5049 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5050 info = (struct bfd_link_info *) in_arg;
5051
5052 /* Fail if the target section could not be assigned to an output
5053 section. The user should fix his linker script. */
5054 if (stub_entry->target_section->output_section == NULL
5055 && info->non_contiguous_regions)
5056 info->callbacks->einfo (_("%F%P: Could not assign '%pA' to an output section. "
5057 "Retry without --enable-non-contiguous-regions.\n"),
5058 stub_entry->target_section);
5059
5060 globals = elf32_arm_hash_table (info);
5061 if (globals == NULL)
5062 return false;
5063
5064 stub_sec = stub_entry->stub_sec;
5065
5066 if ((globals->fix_cortex_a8 < 0)
5067 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
5068 /* We have to do less-strictly-aligned fixes last. */
5069 return true;
5070
5071 /* Assign a slot at the end of section if none assigned yet. */
5072 if (stub_entry->stub_offset == (bfd_vma) -1)
5073 {
5074 stub_entry->stub_offset = stub_sec->size;
5075 just_allocated = 1;
5076 }
5077 loc = stub_sec->contents + stub_entry->stub_offset;
5078
5079 stub_bfd = stub_sec->owner;
5080
5081 /* This is the address of the stub destination. */
5082 sym_value = (stub_entry->target_value
5083 + stub_entry->target_section->output_offset
5084 + stub_entry->target_section->output_section->vma);
5085
5086 template_sequence = stub_entry->stub_template;
5087 template_size = stub_entry->stub_template_size;
5088
5089 size = 0;
5090 for (i = 0; i < template_size; i++)
5091 {
5092 switch (template_sequence[i].type)
5093 {
5094 case THUMB16_TYPE:
5095 {
5096 bfd_vma data = (bfd_vma) template_sequence[i].data;
5097 if (template_sequence[i].reloc_addend != 0)
5098 {
5099 /* We've borrowed the reloc_addend field to mean we should
5100 insert a condition code into this (Thumb-1 branch)
5101 instruction. See THUMB16_BCOND_INSN. */
5102 BFD_ASSERT ((data & 0xff00) == 0xd000);
5103 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
5104 }
5105 bfd_put_16 (stub_bfd, data, loc + size);
5106 size += 2;
5107 }
5108 break;
5109
5110 case THUMB32_TYPE:
5111 bfd_put_16 (stub_bfd,
5112 (template_sequence[i].data >> 16) & 0xffff,
5113 loc + size);
5114 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
5115 loc + size + 2);
5116 if (template_sequence[i].r_type != R_ARM_NONE)
5117 {
5118 stub_reloc_idx[nrelocs] = i;
5119 stub_reloc_offset[nrelocs++] = size;
5120 }
5121 size += 4;
5122 break;
5123
5124 case ARM_TYPE:
5125 bfd_put_32 (stub_bfd, template_sequence[i].data,
5126 loc + size);
5127 /* Handle cases where the target is encoded within the
5128 instruction. */
5129 if (template_sequence[i].r_type == R_ARM_JUMP24)
5130 {
5131 stub_reloc_idx[nrelocs] = i;
5132 stub_reloc_offset[nrelocs++] = size;
5133 }
5134 size += 4;
5135 break;
5136
5137 case DATA_TYPE:
5138 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
5139 stub_reloc_idx[nrelocs] = i;
5140 stub_reloc_offset[nrelocs++] = size;
5141 size += 4;
5142 break;
5143
5144 default:
5145 BFD_FAIL ();
5146 return false;
5147 }
5148 }
5149
5150 if (just_allocated)
5151 stub_sec->size += size;
5152
5153 /* Stub size has already been computed in arm_size_one_stub. Check
5154 consistency. */
5155 BFD_ASSERT (size == stub_entry->stub_size);
5156
5157 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5158 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
5159 sym_value |= 1;
5160
5161 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5162 to relocate in each stub. */
5163 removed_sg_veneer =
5164 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5165 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
5166
5167 for (i = 0; i < nrelocs; i++)
5168 {
5169 Elf_Internal_Rela rel;
5170 bool unresolved_reloc;
5171 char *error_message;
5172 bfd_vma points_to =
5173 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
5174
5175 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
5176 rel.r_info = ELF32_R_INFO (0,
5177 template_sequence[stub_reloc_idx[i]].r_type);
5178 rel.r_addend = 0;
5179
5180 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
5181 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5182 template should refer back to the instruction after the original
5183 branch. We use target_section as Cortex-A8 erratum workaround stubs
5184 are only generated when both source and target are in the same
5185 section. */
5186 points_to = stub_entry->target_section->output_section->vma
5187 + stub_entry->target_section->output_offset
5188 + stub_entry->source_value;
5189
5190 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5191 (template_sequence[stub_reloc_idx[i]].r_type),
5192 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
5193 points_to, info, stub_entry->target_section, "", STT_FUNC,
5194 stub_entry->branch_type,
5195 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
5196 &error_message);
5197 }
5198
5199 return true;
5200 #undef MAXRELOCS
5201 }
5202
5203 /* Calculate the template, template size and instruction size for a stub.
5204 Return value is the instruction size. */
5205
5206 static unsigned int
5207 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
5208 const insn_sequence **stub_template,
5209 int *stub_template_size)
5210 {
5211 const insn_sequence *template_sequence = NULL;
5212 int template_size = 0, i;
5213 unsigned int size;
5214
5215 template_sequence = stub_definitions[stub_type].template_sequence;
5216 if (stub_template)
5217 *stub_template = template_sequence;
5218
5219 template_size = stub_definitions[stub_type].template_size;
5220 if (stub_template_size)
5221 *stub_template_size = template_size;
5222
5223 size = 0;
5224 for (i = 0; i < template_size; i++)
5225 {
5226 switch (template_sequence[i].type)
5227 {
5228 case THUMB16_TYPE:
5229 size += 2;
5230 break;
5231
5232 case ARM_TYPE:
5233 case THUMB32_TYPE:
5234 case DATA_TYPE:
5235 size += 4;
5236 break;
5237
5238 default:
5239 BFD_FAIL ();
5240 return 0;
5241 }
5242 }
5243
5244 return size;
5245 }
5246
5247 /* As above, but don't actually build the stub. Just bump offset so
5248 we know stub section sizes. */
5249
5250 static bool
5251 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
5252 void *in_arg ATTRIBUTE_UNUSED)
5253 {
5254 struct elf32_arm_stub_hash_entry *stub_entry;
5255 const insn_sequence *template_sequence;
5256 int template_size, size;
5257
5258 /* Massage our args to the form they really have. */
5259 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5260
5261 BFD_ASSERT ((stub_entry->stub_type > arm_stub_none)
5262 && stub_entry->stub_type < ARRAY_SIZE (stub_definitions));
5263
5264 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
5265 &template_size);
5266
5267 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5268 if (stub_entry->stub_template_size)
5269 {
5270 stub_entry->stub_size = size;
5271 stub_entry->stub_template = template_sequence;
5272 stub_entry->stub_template_size = template_size;
5273 }
5274
5275 /* Already accounted for. */
5276 if (stub_entry->stub_offset != (bfd_vma) -1)
5277 return true;
5278
5279 size = (size + 7) & ~7;
5280 stub_entry->stub_sec->size += size;
5281
5282 return true;
5283 }
5284
5285 /* External entry points for sizing and building linker stubs. */
5286
5287 /* Set up various things so that we can make a list of input sections
5288 for each output section included in the link. Returns -1 on error,
5289 0 when no stubs will be needed, and 1 on success. */
5290
5291 int
5292 elf32_arm_setup_section_lists (bfd *output_bfd,
5293 struct bfd_link_info *info)
5294 {
5295 bfd *input_bfd;
5296 unsigned int bfd_count;
5297 unsigned int top_id, top_index;
5298 asection *section;
5299 asection **input_list, **list;
5300 size_t amt;
5301 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5302
5303 if (htab == NULL)
5304 return 0;
5305
5306 /* Count the number of input BFDs and find the top input section id. */
5307 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
5308 input_bfd != NULL;
5309 input_bfd = input_bfd->link.next)
5310 {
5311 bfd_count += 1;
5312 for (section = input_bfd->sections;
5313 section != NULL;
5314 section = section->next)
5315 {
5316 if (top_id < section->id)
5317 top_id = section->id;
5318 }
5319 }
5320 htab->bfd_count = bfd_count;
5321
5322 amt = sizeof (struct map_stub) * (top_id + 1);
5323 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
5324 if (htab->stub_group == NULL)
5325 return -1;
5326 htab->top_id = top_id;
5327
5328 /* We can't use output_bfd->section_count here to find the top output
5329 section index as some sections may have been removed, and
5330 _bfd_strip_section_from_output doesn't renumber the indices. */
5331 for (section = output_bfd->sections, top_index = 0;
5332 section != NULL;
5333 section = section->next)
5334 {
5335 if (top_index < section->index)
5336 top_index = section->index;
5337 }
5338
5339 htab->top_index = top_index;
5340 amt = sizeof (asection *) * (top_index + 1);
5341 input_list = (asection **) bfd_malloc (amt);
5342 htab->input_list = input_list;
5343 if (input_list == NULL)
5344 return -1;
5345
5346 /* For sections we aren't interested in, mark their entries with a
5347 value we can check later. */
5348 list = input_list + top_index;
5349 do
5350 *list = bfd_abs_section_ptr;
5351 while (list-- != input_list);
5352
5353 for (section = output_bfd->sections;
5354 section != NULL;
5355 section = section->next)
5356 {
5357 if ((section->flags & SEC_CODE) != 0)
5358 input_list[section->index] = NULL;
5359 }
5360
5361 return 1;
5362 }
5363
5364 /* The linker repeatedly calls this function for each input section,
5365 in the order that input sections are linked into output sections.
5366 Build lists of input sections to determine groupings between which
5367 we may insert linker stubs. */
5368
5369 void
5370 elf32_arm_next_input_section (struct bfd_link_info *info,
5371 asection *isec)
5372 {
5373 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5374
5375 if (htab == NULL)
5376 return;
5377
5378 if (isec->output_section->index <= htab->top_index)
5379 {
5380 asection **list = htab->input_list + isec->output_section->index;
5381
5382 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5383 {
5384 /* Steal the link_sec pointer for our list. */
5385 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5386 /* This happens to make the list in reverse order,
5387 which we reverse later. */
5388 PREV_SEC (isec) = *list;
5389 *list = isec;
5390 }
5391 }
5392 }
5393
5394 /* See whether we can group stub sections together. Grouping stub
5395 sections may result in fewer stubs. More importantly, we need to
5396 put all .init* and .fini* stubs at the end of the .init or
5397 .fini output sections respectively, because glibc splits the
5398 _init and _fini functions into multiple parts. Putting a stub in
5399 the middle of a function is not a good idea. */
5400
5401 static void
5402 group_sections (struct elf32_arm_link_hash_table *htab,
5403 bfd_size_type stub_group_size,
5404 bool stubs_always_after_branch)
5405 {
5406 asection **list = htab->input_list;
5407
5408 do
5409 {
5410 asection *tail = *list;
5411 asection *head;
5412
5413 if (tail == bfd_abs_section_ptr)
5414 continue;
5415
5416 /* Reverse the list: we must avoid placing stubs at the
5417 beginning of the section because the beginning of the text
5418 section may be required for an interrupt vector in bare metal
5419 code. */
5420 #define NEXT_SEC PREV_SEC
5421 head = NULL;
5422 while (tail != NULL)
5423 {
5424 /* Pop from tail. */
5425 asection *item = tail;
5426 tail = PREV_SEC (item);
5427
5428 /* Push on head. */
5429 NEXT_SEC (item) = head;
5430 head = item;
5431 }
5432
5433 while (head != NULL)
5434 {
5435 asection *curr;
5436 asection *next;
5437 bfd_vma stub_group_start = head->output_offset;
5438 bfd_vma end_of_next;
5439
5440 curr = head;
5441 while (NEXT_SEC (curr) != NULL)
5442 {
5443 next = NEXT_SEC (curr);
5444 end_of_next = next->output_offset + next->size;
5445 if (end_of_next - stub_group_start >= stub_group_size)
5446 /* End of NEXT is too far from start, so stop. */
5447 break;
5448 /* Add NEXT to the group. */
5449 curr = next;
5450 }
5451
5452 /* OK, the size from the start to the start of CURR is less
5453 than stub_group_size and thus can be handled by one stub
5454 section. (Or the head section is itself larger than
5455 stub_group_size, in which case we may be toast.)
5456 We should really be keeping track of the total size of
5457 stubs added here, as stubs contribute to the final output
5458 section size. */
5459 do
5460 {
5461 next = NEXT_SEC (head);
5462 /* Set up this stub group. */
5463 htab->stub_group[head->id].link_sec = curr;
5464 }
5465 while (head != curr && (head = next) != NULL);
5466
5467 /* But wait, there's more! Input sections up to stub_group_size
5468 bytes after the stub section can be handled by it too. */
5469 if (!stubs_always_after_branch)
5470 {
5471 stub_group_start = curr->output_offset + curr->size;
5472
5473 while (next != NULL)
5474 {
5475 end_of_next = next->output_offset + next->size;
5476 if (end_of_next - stub_group_start >= stub_group_size)
5477 /* End of NEXT is too far from stubs, so stop. */
5478 break;
5479 /* Add NEXT to the stub group. */
5480 head = next;
5481 next = NEXT_SEC (head);
5482 htab->stub_group[head->id].link_sec = curr;
5483 }
5484 }
5485 head = next;
5486 }
5487 }
5488 while (list++ != htab->input_list + htab->top_index);
5489
5490 free (htab->input_list);
5491 #undef PREV_SEC
5492 #undef NEXT_SEC
5493 }
5494
5495 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5496 erratum fix. */
5497
5498 static int
5499 a8_reloc_compare (const void *a, const void *b)
5500 {
5501 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5502 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5503
5504 if (ra->from < rb->from)
5505 return -1;
5506 else if (ra->from > rb->from)
5507 return 1;
5508 else
5509 return 0;
5510 }
5511
5512 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5513 const char *, char **);
5514
5515 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5516 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5517 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5518 otherwise. */
5519
5520 static bool
5521 cortex_a8_erratum_scan (bfd *input_bfd,
5522 struct bfd_link_info *info,
5523 struct a8_erratum_fix **a8_fixes_p,
5524 unsigned int *num_a8_fixes_p,
5525 unsigned int *a8_fix_table_size_p,
5526 struct a8_erratum_reloc *a8_relocs,
5527 unsigned int num_a8_relocs,
5528 unsigned prev_num_a8_fixes,
5529 bool *stub_changed_p)
5530 {
5531 asection *section;
5532 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5533 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5534 unsigned int num_a8_fixes = *num_a8_fixes_p;
5535 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5536
5537 if (htab == NULL)
5538 return false;
5539
5540 for (section = input_bfd->sections;
5541 section != NULL;
5542 section = section->next)
5543 {
5544 bfd_byte *contents = NULL;
5545 struct _arm_elf_section_data *sec_data;
5546 unsigned int span;
5547 bfd_vma base_vma;
5548
5549 if (elf_section_type (section) != SHT_PROGBITS
5550 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5551 || (section->flags & SEC_EXCLUDE) != 0
5552 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5553 || (section->output_section == bfd_abs_section_ptr))
5554 continue;
5555
5556 base_vma = section->output_section->vma + section->output_offset;
5557
5558 if (elf_section_data (section)->this_hdr.contents != NULL)
5559 contents = elf_section_data (section)->this_hdr.contents;
5560 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5561 return true;
5562
5563 sec_data = elf32_arm_section_data (section);
5564
5565 for (span = 0; span < sec_data->mapcount; span++)
5566 {
5567 unsigned int span_start = sec_data->map[span].vma;
5568 unsigned int span_end = (span == sec_data->mapcount - 1)
5569 ? section->size : sec_data->map[span + 1].vma;
5570 unsigned int i;
5571 char span_type = sec_data->map[span].type;
5572 bool last_was_32bit = false, last_was_branch = false;
5573
5574 if (span_type != 't')
5575 continue;
5576
5577 /* Span is entirely within a single 4KB region: skip scanning. */
5578 if (((base_vma + span_start) & ~0xfff)
5579 == ((base_vma + span_end) & ~0xfff))
5580 continue;
5581
5582 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5583
5584 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5585 * The branch target is in the same 4KB region as the
5586 first half of the branch.
5587 * The instruction before the branch is a 32-bit
5588 length non-branch instruction. */
5589 for (i = span_start; i < span_end;)
5590 {
5591 unsigned int insn = bfd_getl16 (&contents[i]);
5592 bool insn_32bit = false, is_blx = false, is_b = false;
5593 bool is_bl = false, is_bcc = false, is_32bit_branch;
5594
5595 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5596 insn_32bit = true;
5597
5598 if (insn_32bit)
5599 {
5600 /* Load the rest of the insn (in manual-friendly order). */
5601 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5602
5603 /* Encoding T4: B<c>.W. */
5604 is_b = (insn & 0xf800d000) == 0xf0009000;
5605 /* Encoding T1: BL<c>.W. */
5606 is_bl = (insn & 0xf800d000) == 0xf000d000;
5607 /* Encoding T2: BLX<c>.W. */
5608 is_blx = (insn & 0xf800d000) == 0xf000c000;
5609 /* Encoding T3: B<c>.W (not permitted in IT block). */
5610 is_bcc = (insn & 0xf800d000) == 0xf0008000
5611 && (insn & 0x07f00000) != 0x03800000;
5612 }
5613
5614 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5615
5616 if (((base_vma + i) & 0xfff) == 0xffe
5617 && insn_32bit
5618 && is_32bit_branch
5619 && last_was_32bit
5620 && ! last_was_branch)
5621 {
5622 bfd_signed_vma offset = 0;
5623 bool force_target_arm = false;
5624 bool force_target_thumb = false;
5625 bfd_vma target;
5626 enum elf32_arm_stub_type stub_type = arm_stub_none;
5627 struct a8_erratum_reloc key, *found;
5628 bool use_plt = false;
5629
5630 key.from = base_vma + i;
5631 found = (struct a8_erratum_reloc *)
5632 bsearch (&key, a8_relocs, num_a8_relocs,
5633 sizeof (struct a8_erratum_reloc),
5634 &a8_reloc_compare);
5635
5636 if (found)
5637 {
5638 char *error_message = NULL;
5639 struct elf_link_hash_entry *entry;
5640
5641 /* We don't care about the error returned from this
5642 function, only if there is glue or not. */
5643 entry = find_thumb_glue (info, found->sym_name,
5644 &error_message);
5645
5646 if (entry)
5647 found->non_a8_stub = true;
5648
5649 /* Keep a simpler condition, for the sake of clarity. */
5650 if (htab->root.splt != NULL && found->hash != NULL
5651 && found->hash->root.plt.offset != (bfd_vma) -1)
5652 use_plt = true;
5653
5654 if (found->r_type == R_ARM_THM_CALL)
5655 {
5656 if (found->branch_type == ST_BRANCH_TO_ARM
5657 || use_plt)
5658 force_target_arm = true;
5659 else
5660 force_target_thumb = true;
5661 }
5662 }
5663
5664 /* Check if we have an offending branch instruction. */
5665
5666 if (found && found->non_a8_stub)
5667 /* We've already made a stub for this instruction, e.g.
5668 it's a long branch or a Thumb->ARM stub. Assume that
5669 stub will suffice to work around the A8 erratum (see
5670 setting of always_after_branch above). */
5671 ;
5672 else if (is_bcc)
5673 {
5674 offset = (insn & 0x7ff) << 1;
5675 offset |= (insn & 0x3f0000) >> 4;
5676 offset |= (insn & 0x2000) ? 0x40000 : 0;
5677 offset |= (insn & 0x800) ? 0x80000 : 0;
5678 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5679 if (offset & 0x100000)
5680 offset |= ~ ((bfd_signed_vma) 0xfffff);
5681 stub_type = arm_stub_a8_veneer_b_cond;
5682 }
5683 else if (is_b || is_bl || is_blx)
5684 {
5685 int s = (insn & 0x4000000) != 0;
5686 int j1 = (insn & 0x2000) != 0;
5687 int j2 = (insn & 0x800) != 0;
5688 int i1 = !(j1 ^ s);
5689 int i2 = !(j2 ^ s);
5690
5691 offset = (insn & 0x7ff) << 1;
5692 offset |= (insn & 0x3ff0000) >> 4;
5693 offset |= i2 << 22;
5694 offset |= i1 << 23;
5695 offset |= s << 24;
5696 if (offset & 0x1000000)
5697 offset |= ~ ((bfd_signed_vma) 0xffffff);
5698
5699 if (is_blx)
5700 offset &= ~ ((bfd_signed_vma) 3);
5701
5702 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5703 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5704 }
5705
5706 if (stub_type != arm_stub_none)
5707 {
5708 bfd_vma pc_for_insn = base_vma + i + 4;
5709
5710 /* The original instruction is a BL, but the target is
5711 an ARM instruction. If we were not making a stub,
5712 the BL would have been converted to a BLX. Use the
5713 BLX stub instead in that case. */
5714 if (htab->use_blx && force_target_arm
5715 && stub_type == arm_stub_a8_veneer_bl)
5716 {
5717 stub_type = arm_stub_a8_veneer_blx;
5718 is_blx = true;
5719 is_bl = false;
5720 }
5721 /* Conversely, if the original instruction was
5722 BLX but the target is Thumb mode, use the BL
5723 stub. */
5724 else if (force_target_thumb
5725 && stub_type == arm_stub_a8_veneer_blx)
5726 {
5727 stub_type = arm_stub_a8_veneer_bl;
5728 is_blx = false;
5729 is_bl = true;
5730 }
5731
5732 if (is_blx)
5733 pc_for_insn &= ~ ((bfd_vma) 3);
5734
5735 /* If we found a relocation, use the proper destination,
5736 not the offset in the (unrelocated) instruction.
5737 Note this is always done if we switched the stub type
5738 above. */
5739 if (found)
5740 offset =
5741 (bfd_signed_vma) (found->destination - pc_for_insn);
5742
5743 /* If the stub will use a Thumb-mode branch to a
5744 PLT target, redirect it to the preceding Thumb
5745 entry point. */
5746 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5747 offset -= PLT_THUMB_STUB_SIZE;
5748
5749 target = pc_for_insn + offset;
5750
5751 /* The BLX stub is ARM-mode code. Adjust the offset to
5752 take the different PC value (+8 instead of +4) into
5753 account. */
5754 if (stub_type == arm_stub_a8_veneer_blx)
5755 offset += 4;
5756
5757 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5758 {
5759 char *stub_name = NULL;
5760
5761 if (num_a8_fixes == a8_fix_table_size)
5762 {
5763 a8_fix_table_size *= 2;
5764 a8_fixes = (struct a8_erratum_fix *)
5765 bfd_realloc (a8_fixes,
5766 sizeof (struct a8_erratum_fix)
5767 * a8_fix_table_size);
5768 }
5769
5770 if (num_a8_fixes < prev_num_a8_fixes)
5771 {
5772 /* If we're doing a subsequent scan,
5773 check if we've found the same fix as
5774 before, and try and reuse the stub
5775 name. */
5776 stub_name = a8_fixes[num_a8_fixes].stub_name;
5777 if ((a8_fixes[num_a8_fixes].section != section)
5778 || (a8_fixes[num_a8_fixes].offset != i))
5779 {
5780 free (stub_name);
5781 stub_name = NULL;
5782 *stub_changed_p = true;
5783 }
5784 }
5785
5786 if (!stub_name)
5787 {
5788 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5789 if (stub_name != NULL)
5790 sprintf (stub_name, "%x:%x", section->id, i);
5791 }
5792
5793 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5794 a8_fixes[num_a8_fixes].section = section;
5795 a8_fixes[num_a8_fixes].offset = i;
5796 a8_fixes[num_a8_fixes].target_offset =
5797 target - base_vma;
5798 a8_fixes[num_a8_fixes].orig_insn = insn;
5799 a8_fixes[num_a8_fixes].stub_name = stub_name;
5800 a8_fixes[num_a8_fixes].stub_type = stub_type;
5801 a8_fixes[num_a8_fixes].branch_type =
5802 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5803
5804 num_a8_fixes++;
5805 }
5806 }
5807 }
5808
5809 i += insn_32bit ? 4 : 2;
5810 last_was_32bit = insn_32bit;
5811 last_was_branch = is_32bit_branch;
5812 }
5813 }
5814
5815 if (elf_section_data (section)->this_hdr.contents == NULL)
5816 free (contents);
5817 }
5818
5819 *a8_fixes_p = a8_fixes;
5820 *num_a8_fixes_p = num_a8_fixes;
5821 *a8_fix_table_size_p = a8_fix_table_size;
5822
5823 return false;
5824 }
5825
5826 /* Create or update a stub entry depending on whether the stub can already be
5827 found in HTAB. The stub is identified by:
5828 - its type STUB_TYPE
5829 - its source branch (note that several can share the same stub) whose
5830 section and relocation (if any) are given by SECTION and IRELA
5831 respectively
5832 - its target symbol whose input section, hash, name, value and branch type
5833 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5834 respectively
5835
5836 If found, the value of the stub's target symbol is updated from SYM_VALUE
5837 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5838 TRUE and the stub entry is initialized.
5839
5840 Returns the stub that was created or updated, or NULL if an error
5841 occurred. */
5842
5843 static struct elf32_arm_stub_hash_entry *
5844 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5845 enum elf32_arm_stub_type stub_type, asection *section,
5846 Elf_Internal_Rela *irela, asection *sym_sec,
5847 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5848 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5849 bool *new_stub)
5850 {
5851 const asection *id_sec;
5852 char *stub_name;
5853 struct elf32_arm_stub_hash_entry *stub_entry;
5854 unsigned int r_type;
5855 bool sym_claimed = arm_stub_sym_claimed (stub_type);
5856
5857 BFD_ASSERT (stub_type != arm_stub_none);
5858 *new_stub = false;
5859
5860 if (sym_claimed)
5861 stub_name = sym_name;
5862 else
5863 {
5864 BFD_ASSERT (irela);
5865 BFD_ASSERT (section);
5866 BFD_ASSERT (section->id <= htab->top_id);
5867
5868 /* Support for grouping stub sections. */
5869 id_sec = htab->stub_group[section->id].link_sec;
5870
5871 /* Get the name of this stub. */
5872 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5873 stub_type);
5874 if (!stub_name)
5875 return NULL;
5876 }
5877
5878 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, false,
5879 false);
5880 /* The proper stub has already been created, just update its value. */
5881 if (stub_entry != NULL)
5882 {
5883 if (!sym_claimed)
5884 free (stub_name);
5885 stub_entry->target_value = sym_value;
5886 return stub_entry;
5887 }
5888
5889 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5890 if (stub_entry == NULL)
5891 {
5892 if (!sym_claimed)
5893 free (stub_name);
5894 return NULL;
5895 }
5896
5897 stub_entry->target_value = sym_value;
5898 stub_entry->target_section = sym_sec;
5899 stub_entry->stub_type = stub_type;
5900 stub_entry->h = hash;
5901 stub_entry->branch_type = branch_type;
5902
5903 if (sym_claimed)
5904 stub_entry->output_name = sym_name;
5905 else
5906 {
5907 if (sym_name == NULL)
5908 sym_name = "unnamed";
5909 stub_entry->output_name = (char *)
5910 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5911 + strlen (sym_name));
5912 if (stub_entry->output_name == NULL)
5913 {
5914 free (stub_name);
5915 return NULL;
5916 }
5917
5918 /* For historical reasons, use the existing names for ARM-to-Thumb and
5919 Thumb-to-ARM stubs. */
5920 r_type = ELF32_R_TYPE (irela->r_info);
5921 if ((r_type == (unsigned int) R_ARM_THM_CALL
5922 || r_type == (unsigned int) R_ARM_THM_JUMP24
5923 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5924 && branch_type == ST_BRANCH_TO_ARM)
5925 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5926 else if ((r_type == (unsigned int) R_ARM_CALL
5927 || r_type == (unsigned int) R_ARM_JUMP24)
5928 && branch_type == ST_BRANCH_TO_THUMB)
5929 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5930 else
5931 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5932 }
5933
5934 *new_stub = true;
5935 return stub_entry;
5936 }
5937
5938 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5939 gateway veneer to transition from non secure to secure state and create them
5940 accordingly.
5941
5942 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5943 defines the conditions that govern Secure Gateway veneer creation for a
5944 given symbol <SYM> as follows:
5945 - it has function type
5946 - it has non local binding
5947 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5948 same type, binding and value as <SYM> (called normal symbol).
5949 An entry function can handle secure state transition itself in which case
5950 its special symbol would have a different value from the normal symbol.
5951
5952 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5953 entry mapping while HTAB gives the name to hash entry mapping.
5954 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5955 created.
5956
5957 The return value gives whether a stub failed to be allocated. */
5958
5959 static bool
5960 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5961 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5962 int *cmse_stub_created)
5963 {
5964 const struct elf_backend_data *bed;
5965 Elf_Internal_Shdr *symtab_hdr;
5966 unsigned i, j, sym_count, ext_start;
5967 Elf_Internal_Sym *cmse_sym, *local_syms;
5968 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5969 enum arm_st_branch_type branch_type;
5970 char *sym_name, *lsym_name;
5971 bfd_vma sym_value;
5972 asection *section;
5973 struct elf32_arm_stub_hash_entry *stub_entry;
5974 bool is_v8m, new_stub, cmse_invalid, ret = true;
5975
5976 bed = get_elf_backend_data (input_bfd);
5977 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5978 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5979 ext_start = symtab_hdr->sh_info;
5980 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5981 && out_attr[Tag_CPU_arch_profile].i == 'M');
5982
5983 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5984 if (local_syms == NULL)
5985 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5986 symtab_hdr->sh_info, 0, NULL, NULL,
5987 NULL);
5988 if (symtab_hdr->sh_info && local_syms == NULL)
5989 return false;
5990
5991 /* Scan symbols. */
5992 for (i = 0; i < sym_count; i++)
5993 {
5994 cmse_invalid = false;
5995
5996 if (i < ext_start)
5997 {
5998 cmse_sym = &local_syms[i];
5999 sym_name = bfd_elf_string_from_elf_section (input_bfd,
6000 symtab_hdr->sh_link,
6001 cmse_sym->st_name);
6002 if (!sym_name || !startswith (sym_name, CMSE_PREFIX))
6003 continue;
6004
6005 /* Special symbol with local binding. */
6006 cmse_invalid = true;
6007 }
6008 else
6009 {
6010 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
6011 sym_name = (char *) cmse_hash->root.root.root.string;
6012 if (!startswith (sym_name, CMSE_PREFIX))
6013 continue;
6014
6015 /* Special symbol has incorrect binding or type. */
6016 if ((cmse_hash->root.root.type != bfd_link_hash_defined
6017 && cmse_hash->root.root.type != bfd_link_hash_defweak)
6018 || cmse_hash->root.type != STT_FUNC)
6019 cmse_invalid = true;
6020 }
6021
6022 if (!is_v8m)
6023 {
6024 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
6025 "ARMv8-M architecture or later"),
6026 input_bfd, sym_name);
6027 is_v8m = true; /* Avoid multiple warning. */
6028 ret = false;
6029 }
6030
6031 if (cmse_invalid)
6032 {
6033 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
6034 " a global or weak function symbol"),
6035 input_bfd, sym_name);
6036 ret = false;
6037 if (i < ext_start)
6038 continue;
6039 }
6040
6041 sym_name += strlen (CMSE_PREFIX);
6042 hash = (struct elf32_arm_link_hash_entry *)
6043 elf_link_hash_lookup (&(htab)->root, sym_name, false, false, true);
6044
6045 /* No associated normal symbol or it is neither global nor weak. */
6046 if (!hash
6047 || (hash->root.root.type != bfd_link_hash_defined
6048 && hash->root.root.type != bfd_link_hash_defweak)
6049 || hash->root.type != STT_FUNC)
6050 {
6051 /* Initialize here to avoid warning about use of possibly
6052 uninitialized variable. */
6053 j = 0;
6054
6055 if (!hash)
6056 {
6057 /* Searching for a normal symbol with local binding. */
6058 for (; j < ext_start; j++)
6059 {
6060 lsym_name =
6061 bfd_elf_string_from_elf_section (input_bfd,
6062 symtab_hdr->sh_link,
6063 local_syms[j].st_name);
6064 if (!strcmp (sym_name, lsym_name))
6065 break;
6066 }
6067 }
6068
6069 if (hash || j < ext_start)
6070 {
6071 _bfd_error_handler
6072 (_("%pB: invalid standard symbol `%s'; it must be "
6073 "a global or weak function symbol"),
6074 input_bfd, sym_name);
6075 }
6076 else
6077 _bfd_error_handler
6078 (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
6079 ret = false;
6080 if (!hash)
6081 continue;
6082 }
6083
6084 sym_value = hash->root.root.u.def.value;
6085 section = hash->root.root.u.def.section;
6086
6087 if (cmse_hash->root.root.u.def.section != section)
6088 {
6089 _bfd_error_handler
6090 (_("%pB: `%s' and its special symbol are in different sections"),
6091 input_bfd, sym_name);
6092 ret = false;
6093 }
6094 if (cmse_hash->root.root.u.def.value != sym_value)
6095 continue; /* Ignore: could be an entry function starting with SG. */
6096
6097 /* If this section is a link-once section that will be discarded, then
6098 don't create any stubs. */
6099 if (section->output_section == NULL)
6100 {
6101 _bfd_error_handler
6102 (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
6103 continue;
6104 }
6105
6106 if (hash->root.size == 0)
6107 {
6108 _bfd_error_handler
6109 (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
6110 ret = false;
6111 }
6112
6113 if (!ret)
6114 continue;
6115 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6116 stub_entry
6117 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6118 NULL, NULL, section, hash, sym_name,
6119 sym_value, branch_type, &new_stub);
6120
6121 if (stub_entry == NULL)
6122 ret = false;
6123 else
6124 {
6125 BFD_ASSERT (new_stub);
6126 (*cmse_stub_created)++;
6127 }
6128 }
6129
6130 if (!symtab_hdr->contents)
6131 free (local_syms);
6132 return ret;
6133 }
6134
6135 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6136 code entry function, ie can be called from non secure code without using a
6137 veneer. */
6138
6139 static bool
6140 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
6141 {
6142 bfd_byte contents[4];
6143 uint32_t first_insn;
6144 asection *section;
6145 file_ptr offset;
6146 bfd *abfd;
6147
6148 /* Defined symbol of function type. */
6149 if (hash->root.root.type != bfd_link_hash_defined
6150 && hash->root.root.type != bfd_link_hash_defweak)
6151 return false;
6152 if (hash->root.type != STT_FUNC)
6153 return false;
6154
6155 /* Read first instruction. */
6156 section = hash->root.root.u.def.section;
6157 abfd = section->owner;
6158 offset = hash->root.root.u.def.value - section->vma;
6159 if (!bfd_get_section_contents (abfd, section, contents, offset,
6160 sizeof (contents)))
6161 return false;
6162
6163 first_insn = bfd_get_32 (abfd, contents);
6164
6165 /* Starts by SG instruction. */
6166 return first_insn == 0xe97fe97f;
6167 }
6168
6169 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6170 secure gateway veneers (ie. the veneers was not in the input import library)
6171 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6172
6173 static bool
6174 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
6175 {
6176 struct elf32_arm_stub_hash_entry *stub_entry;
6177 struct bfd_link_info *info;
6178
6179 /* Massage our args to the form they really have. */
6180 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
6181 info = (struct bfd_link_info *) gen_info;
6182
6183 if (info->out_implib_bfd)
6184 return true;
6185
6186 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
6187 return true;
6188
6189 if (stub_entry->stub_offset == (bfd_vma) -1)
6190 _bfd_error_handler (" %s", stub_entry->output_name);
6191
6192 return true;
6193 }
6194
6195 /* Set offset of each secure gateway veneers so that its address remain
6196 identical to the one in the input import library referred by
6197 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6198 (present in input import library but absent from the executable being
6199 linked) or if new veneers appeared and there is no output import library
6200 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6201 number of secure gateway veneers found in the input import library.
6202
6203 The function returns whether an error occurred. If no error occurred,
6204 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6205 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6206 veneer observed set for new veneers to be layed out after. */
6207
6208 static bool
6209 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
6210 struct elf32_arm_link_hash_table *htab,
6211 int *cmse_stub_created)
6212 {
6213 long symsize;
6214 char *sym_name;
6215 flagword flags;
6216 long i, symcount;
6217 bfd *in_implib_bfd;
6218 asection *stub_out_sec;
6219 bool ret = true;
6220 Elf_Internal_Sym *intsym;
6221 const char *out_sec_name;
6222 bfd_size_type cmse_stub_size;
6223 asymbol **sympp = NULL, *sym;
6224 struct elf32_arm_link_hash_entry *hash;
6225 const insn_sequence *cmse_stub_template;
6226 struct elf32_arm_stub_hash_entry *stub_entry;
6227 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
6228 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
6229 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
6230
6231 /* No input secure gateway import library. */
6232 if (!htab->in_implib_bfd)
6233 return true;
6234
6235 in_implib_bfd = htab->in_implib_bfd;
6236 if (!htab->cmse_implib)
6237 {
6238 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6239 "Gateway import libraries"), in_implib_bfd);
6240 return false;
6241 }
6242
6243 /* Get symbol table size. */
6244 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
6245 if (symsize < 0)
6246 return false;
6247
6248 /* Read in the input secure gateway import library's symbol table. */
6249 sympp = (asymbol **) bfd_malloc (symsize);
6250 if (sympp == NULL)
6251 return false;
6252
6253 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
6254 if (symcount < 0)
6255 {
6256 ret = false;
6257 goto free_sym_buf;
6258 }
6259
6260 htab->new_cmse_stub_offset = 0;
6261 cmse_stub_size =
6262 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
6263 &cmse_stub_template,
6264 &cmse_stub_template_size);
6265 out_sec_name =
6266 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
6267 stub_out_sec =
6268 bfd_get_section_by_name (htab->obfd, out_sec_name);
6269 if (stub_out_sec != NULL)
6270 cmse_stub_sec_vma = stub_out_sec->vma;
6271
6272 /* Set addresses of veneers mentionned in input secure gateway import
6273 library's symbol table. */
6274 for (i = 0; i < symcount; i++)
6275 {
6276 sym = sympp[i];
6277 flags = sym->flags;
6278 sym_name = (char *) bfd_asymbol_name (sym);
6279 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
6280
6281 if (sym->section != bfd_abs_section_ptr
6282 || !(flags & (BSF_GLOBAL | BSF_WEAK))
6283 || (flags & BSF_FUNCTION) != BSF_FUNCTION
6284 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
6285 != ST_BRANCH_TO_THUMB))
6286 {
6287 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6288 "symbol should be absolute, global and "
6289 "refer to Thumb functions"),
6290 in_implib_bfd, sym_name);
6291 ret = false;
6292 continue;
6293 }
6294
6295 veneer_value = bfd_asymbol_value (sym);
6296 stub_offset = veneer_value - cmse_stub_sec_vma;
6297 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
6298 false, false);
6299 hash = (struct elf32_arm_link_hash_entry *)
6300 elf_link_hash_lookup (&(htab)->root, sym_name, false, false, true);
6301
6302 /* Stub entry should have been created by cmse_scan or the symbol be of
6303 a secure function callable from non secure code. */
6304 if (!stub_entry && !hash)
6305 {
6306 bool new_stub;
6307
6308 _bfd_error_handler
6309 (_("entry function `%s' disappeared from secure code"), sym_name);
6310 hash = (struct elf32_arm_link_hash_entry *)
6311 elf_link_hash_lookup (&(htab)->root, sym_name, true, true, true);
6312 stub_entry
6313 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6314 NULL, NULL, bfd_abs_section_ptr, hash,
6315 sym_name, veneer_value,
6316 ST_BRANCH_TO_THUMB, &new_stub);
6317 if (stub_entry == NULL)
6318 ret = false;
6319 else
6320 {
6321 BFD_ASSERT (new_stub);
6322 new_cmse_stubs_created++;
6323 (*cmse_stub_created)++;
6324 }
6325 stub_entry->stub_template_size = stub_entry->stub_size = 0;
6326 stub_entry->stub_offset = stub_offset;
6327 }
6328 /* Symbol found is not callable from non secure code. */
6329 else if (!stub_entry)
6330 {
6331 if (!cmse_entry_fct_p (hash))
6332 {
6333 _bfd_error_handler (_("`%s' refers to a non entry function"),
6334 sym_name);
6335 ret = false;
6336 }
6337 continue;
6338 }
6339 else
6340 {
6341 /* Only stubs for SG veneers should have been created. */
6342 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6343
6344 /* Check visibility hasn't changed. */
6345 if (!!(flags & BSF_GLOBAL)
6346 != (hash->root.root.type == bfd_link_hash_defined))
6347 _bfd_error_handler
6348 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
6349 sym_name);
6350
6351 stub_entry->stub_offset = stub_offset;
6352 }
6353
6354 /* Size should match that of a SG veneer. */
6355 if (intsym->st_size != cmse_stub_size)
6356 {
6357 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6358 in_implib_bfd, sym_name);
6359 ret = false;
6360 }
6361
6362 /* Previous veneer address is before current SG veneer section. */
6363 if (veneer_value < cmse_stub_sec_vma)
6364 {
6365 /* Avoid offset underflow. */
6366 if (stub_entry)
6367 stub_entry->stub_offset = 0;
6368 stub_offset = 0;
6369 ret = false;
6370 }
6371
6372 /* Complain if stub offset not a multiple of stub size. */
6373 if (stub_offset % cmse_stub_size)
6374 {
6375 _bfd_error_handler
6376 (_("offset of veneer for entry function `%s' not a multiple of "
6377 "its size"), sym_name);
6378 ret = false;
6379 }
6380
6381 if (!ret)
6382 continue;
6383
6384 new_cmse_stubs_created--;
6385 if (veneer_value < cmse_stub_array_start)
6386 cmse_stub_array_start = veneer_value;
6387 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6388 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6389 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6390 }
6391
6392 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6393 {
6394 BFD_ASSERT (new_cmse_stubs_created > 0);
6395 _bfd_error_handler
6396 (_("new entry function(s) introduced but no output import library "
6397 "specified:"));
6398 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6399 }
6400
6401 if (cmse_stub_array_start != cmse_stub_sec_vma)
6402 {
6403 _bfd_error_handler
6404 (_("start address of `%s' is different from previous link"),
6405 out_sec_name);
6406 ret = false;
6407 }
6408
6409 free_sym_buf:
6410 free (sympp);
6411 return ret;
6412 }
6413
6414 /* Determine and set the size of the stub section for a final link.
6415
6416 The basic idea here is to examine all the relocations looking for
6417 PC-relative calls to a target that is unreachable with a "bl"
6418 instruction. */
6419
6420 bool
6421 elf32_arm_size_stubs (bfd *output_bfd,
6422 bfd *stub_bfd,
6423 struct bfd_link_info *info,
6424 bfd_signed_vma group_size,
6425 asection * (*add_stub_section) (const char *, asection *,
6426 asection *,
6427 unsigned int),
6428 void (*layout_sections_again) (void))
6429 {
6430 bool ret = true;
6431 obj_attribute *out_attr;
6432 int cmse_stub_created = 0;
6433 bfd_size_type stub_group_size;
6434 bool m_profile, stubs_always_after_branch, first_veneer_scan = true;
6435 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6436 struct a8_erratum_fix *a8_fixes = NULL;
6437 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6438 struct a8_erratum_reloc *a8_relocs = NULL;
6439 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6440
6441 if (htab == NULL)
6442 return false;
6443
6444 if (htab->fix_cortex_a8)
6445 {
6446 a8_fixes = (struct a8_erratum_fix *)
6447 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6448 a8_relocs = (struct a8_erratum_reloc *)
6449 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6450 }
6451
6452 /* Propagate mach to stub bfd, because it may not have been
6453 finalized when we created stub_bfd. */
6454 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6455 bfd_get_mach (output_bfd));
6456
6457 /* Stash our params away. */
6458 htab->stub_bfd = stub_bfd;
6459 htab->add_stub_section = add_stub_section;
6460 htab->layout_sections_again = layout_sections_again;
6461 stubs_always_after_branch = group_size < 0;
6462
6463 out_attr = elf_known_obj_attributes_proc (output_bfd);
6464 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6465
6466 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6467 as the first half of a 32-bit branch straddling two 4K pages. This is a
6468 crude way of enforcing that. */
6469 if (htab->fix_cortex_a8)
6470 stubs_always_after_branch = 1;
6471
6472 if (group_size < 0)
6473 stub_group_size = -group_size;
6474 else
6475 stub_group_size = group_size;
6476
6477 if (stub_group_size == 1)
6478 {
6479 /* Default values. */
6480 /* Thumb branch range is +-4MB has to be used as the default
6481 maximum size (a given section can contain both ARM and Thumb
6482 code, so the worst case has to be taken into account).
6483
6484 This value is 24K less than that, which allows for 2025
6485 12-byte stubs. If we exceed that, then we will fail to link.
6486 The user will have to relink with an explicit group size
6487 option. */
6488 stub_group_size = 4170000;
6489 }
6490
6491 group_sections (htab, stub_group_size, stubs_always_after_branch);
6492
6493 /* If we're applying the cortex A8 fix, we need to determine the
6494 program header size now, because we cannot change it later --
6495 that could alter section placements. Notice the A8 erratum fix
6496 ends up requiring the section addresses to remain unchanged
6497 modulo the page size. That's something we cannot represent
6498 inside BFD, and we don't want to force the section alignment to
6499 be the page size. */
6500 if (htab->fix_cortex_a8)
6501 (*htab->layout_sections_again) ();
6502
6503 while (1)
6504 {
6505 bfd *input_bfd;
6506 unsigned int bfd_indx;
6507 asection *stub_sec;
6508 enum elf32_arm_stub_type stub_type;
6509 bool stub_changed = false;
6510 unsigned prev_num_a8_fixes = num_a8_fixes;
6511
6512 num_a8_fixes = 0;
6513 for (input_bfd = info->input_bfds, bfd_indx = 0;
6514 input_bfd != NULL;
6515 input_bfd = input_bfd->link.next, bfd_indx++)
6516 {
6517 Elf_Internal_Shdr *symtab_hdr;
6518 asection *section;
6519 Elf_Internal_Sym *local_syms = NULL;
6520
6521 if (!is_arm_elf (input_bfd))
6522 continue;
6523 if ((input_bfd->flags & DYNAMIC) != 0
6524 && (elf_sym_hashes (input_bfd) == NULL
6525 || (elf_dyn_lib_class (input_bfd) & DYN_AS_NEEDED) != 0))
6526 continue;
6527
6528 num_a8_relocs = 0;
6529
6530 /* We'll need the symbol table in a second. */
6531 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6532 if (symtab_hdr->sh_info == 0)
6533 continue;
6534
6535 /* Limit scan of symbols to object file whose profile is
6536 Microcontroller to not hinder performance in the general case. */
6537 if (m_profile && first_veneer_scan)
6538 {
6539 struct elf_link_hash_entry **sym_hashes;
6540
6541 sym_hashes = elf_sym_hashes (input_bfd);
6542 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6543 &cmse_stub_created))
6544 goto error_ret_free_local;
6545
6546 if (cmse_stub_created != 0)
6547 stub_changed = true;
6548 }
6549
6550 /* Walk over each section attached to the input bfd. */
6551 for (section = input_bfd->sections;
6552 section != NULL;
6553 section = section->next)
6554 {
6555 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6556
6557 /* If there aren't any relocs, then there's nothing more
6558 to do. */
6559 if ((section->flags & SEC_RELOC) == 0
6560 || section->reloc_count == 0
6561 || (section->flags & SEC_CODE) == 0)
6562 continue;
6563
6564 /* If this section is a link-once section that will be
6565 discarded, then don't create any stubs. */
6566 if (section->output_section == NULL
6567 || section->output_section->owner != output_bfd)
6568 continue;
6569
6570 /* Get the relocs. */
6571 internal_relocs
6572 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6573 NULL, info->keep_memory);
6574 if (internal_relocs == NULL)
6575 goto error_ret_free_local;
6576
6577 /* Now examine each relocation. */
6578 irela = internal_relocs;
6579 irelaend = irela + section->reloc_count;
6580 for (; irela < irelaend; irela++)
6581 {
6582 unsigned int r_type, r_indx;
6583 asection *sym_sec;
6584 bfd_vma sym_value;
6585 bfd_vma destination;
6586 struct elf32_arm_link_hash_entry *hash;
6587 const char *sym_name;
6588 unsigned char st_type;
6589 enum arm_st_branch_type branch_type;
6590 bool created_stub = false;
6591
6592 r_type = ELF32_R_TYPE (irela->r_info);
6593 r_indx = ELF32_R_SYM (irela->r_info);
6594
6595 if (r_type >= (unsigned int) R_ARM_max)
6596 {
6597 bfd_set_error (bfd_error_bad_value);
6598 error_ret_free_internal:
6599 if (elf_section_data (section)->relocs == NULL)
6600 free (internal_relocs);
6601 /* Fall through. */
6602 error_ret_free_local:
6603 if (symtab_hdr->contents != (unsigned char *) local_syms)
6604 free (local_syms);
6605 return false;
6606 }
6607
6608 hash = NULL;
6609 if (r_indx >= symtab_hdr->sh_info)
6610 hash = elf32_arm_hash_entry
6611 (elf_sym_hashes (input_bfd)
6612 [r_indx - symtab_hdr->sh_info]);
6613
6614 /* Only look for stubs on branch instructions, or
6615 non-relaxed TLSCALL */
6616 if ((r_type != (unsigned int) R_ARM_CALL)
6617 && (r_type != (unsigned int) R_ARM_THM_CALL)
6618 && (r_type != (unsigned int) R_ARM_JUMP24)
6619 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6620 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6621 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6622 && (r_type != (unsigned int) R_ARM_PLT32)
6623 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6624 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6625 && r_type == (elf32_arm_tls_transition
6626 (info, r_type,
6627 (struct elf_link_hash_entry *) hash))
6628 && ((hash ? hash->tls_type
6629 : (elf32_arm_local_got_tls_type
6630 (input_bfd)[r_indx]))
6631 & GOT_TLS_GDESC) != 0))
6632 continue;
6633
6634 /* Now determine the call target, its name, value,
6635 section. */
6636 sym_sec = NULL;
6637 sym_value = 0;
6638 destination = 0;
6639 sym_name = NULL;
6640
6641 if (r_type == (unsigned int) R_ARM_TLS_CALL
6642 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6643 {
6644 /* A non-relaxed TLS call. The target is the
6645 plt-resident trampoline and nothing to do
6646 with the symbol. */
6647 BFD_ASSERT (htab->tls_trampoline > 0);
6648 sym_sec = htab->root.splt;
6649 sym_value = htab->tls_trampoline;
6650 hash = 0;
6651 st_type = STT_FUNC;
6652 branch_type = ST_BRANCH_TO_ARM;
6653 }
6654 else if (!hash)
6655 {
6656 /* It's a local symbol. */
6657 Elf_Internal_Sym *sym;
6658
6659 if (local_syms == NULL)
6660 {
6661 local_syms
6662 = (Elf_Internal_Sym *) symtab_hdr->contents;
6663 if (local_syms == NULL)
6664 local_syms
6665 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6666 symtab_hdr->sh_info, 0,
6667 NULL, NULL, NULL);
6668 if (local_syms == NULL)
6669 goto error_ret_free_internal;
6670 }
6671
6672 sym = local_syms + r_indx;
6673 if (sym->st_shndx == SHN_UNDEF)
6674 sym_sec = bfd_und_section_ptr;
6675 else if (sym->st_shndx == SHN_ABS)
6676 sym_sec = bfd_abs_section_ptr;
6677 else if (sym->st_shndx == SHN_COMMON)
6678 sym_sec = bfd_com_section_ptr;
6679 else
6680 sym_sec =
6681 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6682
6683 if (!sym_sec)
6684 /* This is an undefined symbol. It can never
6685 be resolved. */
6686 continue;
6687
6688 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6689 sym_value = sym->st_value;
6690 destination = (sym_value + irela->r_addend
6691 + sym_sec->output_offset
6692 + sym_sec->output_section->vma);
6693 st_type = ELF_ST_TYPE (sym->st_info);
6694 branch_type =
6695 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6696 sym_name
6697 = bfd_elf_string_from_elf_section (input_bfd,
6698 symtab_hdr->sh_link,
6699 sym->st_name);
6700 }
6701 else
6702 {
6703 /* It's an external symbol. */
6704 while (hash->root.root.type == bfd_link_hash_indirect
6705 || hash->root.root.type == bfd_link_hash_warning)
6706 hash = ((struct elf32_arm_link_hash_entry *)
6707 hash->root.root.u.i.link);
6708
6709 if (hash->root.root.type == bfd_link_hash_defined
6710 || hash->root.root.type == bfd_link_hash_defweak)
6711 {
6712 sym_sec = hash->root.root.u.def.section;
6713 sym_value = hash->root.root.u.def.value;
6714
6715 struct elf32_arm_link_hash_table *globals =
6716 elf32_arm_hash_table (info);
6717
6718 /* For a destination in a shared library,
6719 use the PLT stub as target address to
6720 decide whether a branch stub is
6721 needed. */
6722 if (globals != NULL
6723 && globals->root.splt != NULL
6724 && hash != NULL
6725 && hash->root.plt.offset != (bfd_vma) -1)
6726 {
6727 sym_sec = globals->root.splt;
6728 sym_value = hash->root.plt.offset;
6729 if (sym_sec->output_section != NULL)
6730 destination = (sym_value
6731 + sym_sec->output_offset
6732 + sym_sec->output_section->vma);
6733 }
6734 else if (sym_sec->output_section != NULL)
6735 destination = (sym_value + irela->r_addend
6736 + sym_sec->output_offset
6737 + sym_sec->output_section->vma);
6738 }
6739 else if ((hash->root.root.type == bfd_link_hash_undefined)
6740 || (hash->root.root.type == bfd_link_hash_undefweak))
6741 {
6742 /* For a shared library, use the PLT stub as
6743 target address to decide whether a long
6744 branch stub is needed.
6745 For absolute code, they cannot be handled. */
6746 struct elf32_arm_link_hash_table *globals =
6747 elf32_arm_hash_table (info);
6748
6749 if (globals != NULL
6750 && globals->root.splt != NULL
6751 && hash != NULL
6752 && hash->root.plt.offset != (bfd_vma) -1)
6753 {
6754 sym_sec = globals->root.splt;
6755 sym_value = hash->root.plt.offset;
6756 if (sym_sec->output_section != NULL)
6757 destination = (sym_value
6758 + sym_sec->output_offset
6759 + sym_sec->output_section->vma);
6760 }
6761 else
6762 continue;
6763 }
6764 else
6765 {
6766 bfd_set_error (bfd_error_bad_value);
6767 goto error_ret_free_internal;
6768 }
6769 st_type = hash->root.type;
6770 branch_type =
6771 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6772 sym_name = hash->root.root.root.string;
6773 }
6774
6775 do
6776 {
6777 bool new_stub;
6778 struct elf32_arm_stub_hash_entry *stub_entry;
6779
6780 /* Determine what (if any) linker stub is needed. */
6781 stub_type = arm_type_of_stub (info, section, irela,
6782 st_type, &branch_type,
6783 hash, destination, sym_sec,
6784 input_bfd, sym_name);
6785 if (stub_type == arm_stub_none)
6786 break;
6787
6788 /* We've either created a stub for this reloc already,
6789 or we are about to. */
6790 stub_entry =
6791 elf32_arm_create_stub (htab, stub_type, section, irela,
6792 sym_sec, hash,
6793 (char *) sym_name, sym_value,
6794 branch_type, &new_stub);
6795
6796 created_stub = stub_entry != NULL;
6797 if (!created_stub)
6798 goto error_ret_free_internal;
6799 else if (!new_stub)
6800 break;
6801 else
6802 stub_changed = true;
6803 }
6804 while (0);
6805
6806 /* Look for relocations which might trigger Cortex-A8
6807 erratum. */
6808 if (htab->fix_cortex_a8
6809 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6810 || r_type == (unsigned int) R_ARM_THM_JUMP19
6811 || r_type == (unsigned int) R_ARM_THM_CALL
6812 || r_type == (unsigned int) R_ARM_THM_XPC22))
6813 {
6814 bfd_vma from = section->output_section->vma
6815 + section->output_offset
6816 + irela->r_offset;
6817
6818 if ((from & 0xfff) == 0xffe)
6819 {
6820 /* Found a candidate. Note we haven't checked the
6821 destination is within 4K here: if we do so (and
6822 don't create an entry in a8_relocs) we can't tell
6823 that a branch should have been relocated when
6824 scanning later. */
6825 if (num_a8_relocs == a8_reloc_table_size)
6826 {
6827 a8_reloc_table_size *= 2;
6828 a8_relocs = (struct a8_erratum_reloc *)
6829 bfd_realloc (a8_relocs,
6830 sizeof (struct a8_erratum_reloc)
6831 * a8_reloc_table_size);
6832 }
6833
6834 a8_relocs[num_a8_relocs].from = from;
6835 a8_relocs[num_a8_relocs].destination = destination;
6836 a8_relocs[num_a8_relocs].r_type = r_type;
6837 a8_relocs[num_a8_relocs].branch_type = branch_type;
6838 a8_relocs[num_a8_relocs].sym_name = sym_name;
6839 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6840 a8_relocs[num_a8_relocs].hash = hash;
6841
6842 num_a8_relocs++;
6843 }
6844 }
6845 }
6846
6847 /* We're done with the internal relocs, free them. */
6848 if (elf_section_data (section)->relocs == NULL)
6849 free (internal_relocs);
6850 }
6851
6852 if (htab->fix_cortex_a8)
6853 {
6854 /* Sort relocs which might apply to Cortex-A8 erratum. */
6855 qsort (a8_relocs, num_a8_relocs,
6856 sizeof (struct a8_erratum_reloc),
6857 &a8_reloc_compare);
6858
6859 /* Scan for branches which might trigger Cortex-A8 erratum. */
6860 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6861 &num_a8_fixes, &a8_fix_table_size,
6862 a8_relocs, num_a8_relocs,
6863 prev_num_a8_fixes, &stub_changed)
6864 != 0)
6865 goto error_ret_free_local;
6866 }
6867
6868 if (local_syms != NULL
6869 && symtab_hdr->contents != (unsigned char *) local_syms)
6870 {
6871 if (!info->keep_memory)
6872 free (local_syms);
6873 else
6874 symtab_hdr->contents = (unsigned char *) local_syms;
6875 }
6876 }
6877
6878 if (first_veneer_scan
6879 && !set_cmse_veneer_addr_from_implib (info, htab,
6880 &cmse_stub_created))
6881 ret = false;
6882
6883 if (prev_num_a8_fixes != num_a8_fixes)
6884 stub_changed = true;
6885
6886 if (!stub_changed)
6887 break;
6888
6889 /* OK, we've added some stubs. Find out the new size of the
6890 stub sections. */
6891 for (stub_sec = htab->stub_bfd->sections;
6892 stub_sec != NULL;
6893 stub_sec = stub_sec->next)
6894 {
6895 /* Ignore non-stub sections. */
6896 if (!strstr (stub_sec->name, STUB_SUFFIX))
6897 continue;
6898
6899 stub_sec->size = 0;
6900 }
6901
6902 /* Add new SG veneers after those already in the input import
6903 library. */
6904 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6905 stub_type++)
6906 {
6907 bfd_vma *start_offset_p;
6908 asection **stub_sec_p;
6909
6910 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6911 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6912 if (start_offset_p == NULL)
6913 continue;
6914
6915 BFD_ASSERT (stub_sec_p != NULL);
6916 if (*stub_sec_p != NULL)
6917 (*stub_sec_p)->size = *start_offset_p;
6918 }
6919
6920 /* Compute stub section size, considering padding. */
6921 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6922 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6923 stub_type++)
6924 {
6925 int size, padding;
6926 asection **stub_sec_p;
6927
6928 padding = arm_dedicated_stub_section_padding (stub_type);
6929 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6930 /* Skip if no stub input section or no stub section padding
6931 required. */
6932 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6933 continue;
6934 /* Stub section padding required but no dedicated section. */
6935 BFD_ASSERT (stub_sec_p);
6936
6937 size = (*stub_sec_p)->size;
6938 size = (size + padding - 1) & ~(padding - 1);
6939 (*stub_sec_p)->size = size;
6940 }
6941
6942 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6943 if (htab->fix_cortex_a8)
6944 for (i = 0; i < num_a8_fixes; i++)
6945 {
6946 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6947 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6948
6949 if (stub_sec == NULL)
6950 return false;
6951
6952 stub_sec->size
6953 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6954 NULL);
6955 }
6956
6957
6958 /* Ask the linker to do its stuff. */
6959 (*htab->layout_sections_again) ();
6960 first_veneer_scan = false;
6961 }
6962
6963 /* Add stubs for Cortex-A8 erratum fixes now. */
6964 if (htab->fix_cortex_a8)
6965 {
6966 for (i = 0; i < num_a8_fixes; i++)
6967 {
6968 struct elf32_arm_stub_hash_entry *stub_entry;
6969 char *stub_name = a8_fixes[i].stub_name;
6970 asection *section = a8_fixes[i].section;
6971 unsigned int section_id = a8_fixes[i].section->id;
6972 asection *link_sec = htab->stub_group[section_id].link_sec;
6973 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6974 const insn_sequence *template_sequence;
6975 int template_size, size = 0;
6976
6977 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6978 true, false);
6979 if (stub_entry == NULL)
6980 {
6981 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6982 section->owner, stub_name);
6983 return false;
6984 }
6985
6986 stub_entry->stub_sec = stub_sec;
6987 stub_entry->stub_offset = (bfd_vma) -1;
6988 stub_entry->id_sec = link_sec;
6989 stub_entry->stub_type = a8_fixes[i].stub_type;
6990 stub_entry->source_value = a8_fixes[i].offset;
6991 stub_entry->target_section = a8_fixes[i].section;
6992 stub_entry->target_value = a8_fixes[i].target_offset;
6993 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6994 stub_entry->branch_type = a8_fixes[i].branch_type;
6995
6996 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6997 &template_sequence,
6998 &template_size);
6999
7000 stub_entry->stub_size = size;
7001 stub_entry->stub_template = template_sequence;
7002 stub_entry->stub_template_size = template_size;
7003 }
7004
7005 /* Stash the Cortex-A8 erratum fix array for use later in
7006 elf32_arm_write_section(). */
7007 htab->a8_erratum_fixes = a8_fixes;
7008 htab->num_a8_erratum_fixes = num_a8_fixes;
7009 }
7010 else
7011 {
7012 htab->a8_erratum_fixes = NULL;
7013 htab->num_a8_erratum_fixes = 0;
7014 }
7015 return ret;
7016 }
7017
7018 /* Build all the stubs associated with the current output file. The
7019 stubs are kept in a hash table attached to the main linker hash
7020 table. We also set up the .plt entries for statically linked PIC
7021 functions here. This function is called via arm_elf_finish in the
7022 linker. */
7023
7024 bool
7025 elf32_arm_build_stubs (struct bfd_link_info *info)
7026 {
7027 asection *stub_sec;
7028 struct bfd_hash_table *table;
7029 enum elf32_arm_stub_type stub_type;
7030 struct elf32_arm_link_hash_table *htab;
7031
7032 htab = elf32_arm_hash_table (info);
7033 if (htab == NULL)
7034 return false;
7035
7036 for (stub_sec = htab->stub_bfd->sections;
7037 stub_sec != NULL;
7038 stub_sec = stub_sec->next)
7039 {
7040 bfd_size_type size;
7041
7042 /* Ignore non-stub sections. */
7043 if (!strstr (stub_sec->name, STUB_SUFFIX))
7044 continue;
7045
7046 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
7047 must at least be done for stub section requiring padding and for SG
7048 veneers to ensure that a non secure code branching to a removed SG
7049 veneer causes an error. */
7050 size = stub_sec->size;
7051 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
7052 if (stub_sec->contents == NULL && size != 0)
7053 return false;
7054
7055 stub_sec->size = 0;
7056 }
7057
7058 /* Add new SG veneers after those already in the input import library. */
7059 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7060 {
7061 bfd_vma *start_offset_p;
7062 asection **stub_sec_p;
7063
7064 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
7065 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
7066 if (start_offset_p == NULL)
7067 continue;
7068
7069 BFD_ASSERT (stub_sec_p != NULL);
7070 if (*stub_sec_p != NULL)
7071 (*stub_sec_p)->size = *start_offset_p;
7072 }
7073
7074 /* Build the stubs as directed by the stub hash table. */
7075 table = &htab->stub_hash_table;
7076 bfd_hash_traverse (table, arm_build_one_stub, info);
7077 if (htab->fix_cortex_a8)
7078 {
7079 /* Place the cortex a8 stubs last. */
7080 htab->fix_cortex_a8 = -1;
7081 bfd_hash_traverse (table, arm_build_one_stub, info);
7082 }
7083
7084 return true;
7085 }
7086
7087 /* Locate the Thumb encoded calling stub for NAME. */
7088
7089 static struct elf_link_hash_entry *
7090 find_thumb_glue (struct bfd_link_info *link_info,
7091 const char *name,
7092 char **error_message)
7093 {
7094 char *tmp_name;
7095 struct elf_link_hash_entry *hash;
7096 struct elf32_arm_link_hash_table *hash_table;
7097
7098 /* We need a pointer to the armelf specific hash table. */
7099 hash_table = elf32_arm_hash_table (link_info);
7100 if (hash_table == NULL)
7101 return NULL;
7102
7103 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7104 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
7105
7106 BFD_ASSERT (tmp_name);
7107
7108 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
7109
7110 hash = elf_link_hash_lookup
7111 (&(hash_table)->root, tmp_name, false, false, true);
7112
7113 if (hash == NULL
7114 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7115 "Thumb", tmp_name, name) == -1)
7116 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7117
7118 free (tmp_name);
7119
7120 return hash;
7121 }
7122
7123 /* Locate the ARM encoded calling stub for NAME. */
7124
7125 static struct elf_link_hash_entry *
7126 find_arm_glue (struct bfd_link_info *link_info,
7127 const char *name,
7128 char **error_message)
7129 {
7130 char *tmp_name;
7131 struct elf_link_hash_entry *myh;
7132 struct elf32_arm_link_hash_table *hash_table;
7133
7134 /* We need a pointer to the elfarm specific hash table. */
7135 hash_table = elf32_arm_hash_table (link_info);
7136 if (hash_table == NULL)
7137 return NULL;
7138
7139 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7140 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7141 BFD_ASSERT (tmp_name);
7142
7143 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7144
7145 myh = elf_link_hash_lookup
7146 (&(hash_table)->root, tmp_name, false, false, true);
7147
7148 if (myh == NULL
7149 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7150 "ARM", tmp_name, name) == -1)
7151 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7152
7153 free (tmp_name);
7154
7155 return myh;
7156 }
7157
7158 /* ARM->Thumb glue (static images):
7159
7160 .arm
7161 __func_from_arm:
7162 ldr r12, __func_addr
7163 bx r12
7164 __func_addr:
7165 .word func @ behave as if you saw a ARM_32 reloc.
7166
7167 (v5t static images)
7168 .arm
7169 __func_from_arm:
7170 ldr pc, __func_addr
7171 __func_addr:
7172 .word func @ behave as if you saw a ARM_32 reloc.
7173
7174 (relocatable images)
7175 .arm
7176 __func_from_arm:
7177 ldr r12, __func_offset
7178 add r12, r12, pc
7179 bx r12
7180 __func_offset:
7181 .word func - . */
7182
7183 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7184 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7185 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7186 static const insn32 a2t3_func_addr_insn = 0x00000001;
7187
7188 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7189 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7190 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7191
7192 #define ARM2THUMB_PIC_GLUE_SIZE 16
7193 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7194 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7195 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7196
7197 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7198
7199 .thumb .thumb
7200 .align 2 .align 2
7201 __func_from_thumb: __func_from_thumb:
7202 bx pc push {r6, lr}
7203 nop ldr r6, __func_addr
7204 .arm mov lr, pc
7205 b func bx r6
7206 .arm
7207 ;; back_to_thumb
7208 ldmia r13! {r6, lr}
7209 bx lr
7210 __func_addr:
7211 .word func */
7212
7213 #define THUMB2ARM_GLUE_SIZE 8
7214 static const insn16 t2a1_bx_pc_insn = 0x4778;
7215 static const insn16 t2a2_noop_insn = 0x46c0;
7216 static const insn32 t2a3_b_insn = 0xea000000;
7217
7218 #define VFP11_ERRATUM_VENEER_SIZE 8
7219 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7220 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7221
7222 #define ARM_BX_VENEER_SIZE 12
7223 static const insn32 armbx1_tst_insn = 0xe3100001;
7224 static const insn32 armbx2_moveq_insn = 0x01a0f000;
7225 static const insn32 armbx3_bx_insn = 0xe12fff10;
7226
7227 #ifndef ELFARM_NABI_C_INCLUDED
7228 static void
7229 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
7230 {
7231 asection * s;
7232 bfd_byte * contents;
7233
7234 if (size == 0)
7235 {
7236 /* Do not include empty glue sections in the output. */
7237 if (abfd != NULL)
7238 {
7239 s = bfd_get_linker_section (abfd, name);
7240 if (s != NULL)
7241 s->flags |= SEC_EXCLUDE;
7242 }
7243 return;
7244 }
7245
7246 BFD_ASSERT (abfd != NULL);
7247
7248 s = bfd_get_linker_section (abfd, name);
7249 BFD_ASSERT (s != NULL);
7250
7251 contents = (bfd_byte *) bfd_zalloc (abfd, size);
7252
7253 BFD_ASSERT (s->size == size);
7254 s->contents = contents;
7255 }
7256
7257 bool
7258 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
7259 {
7260 struct elf32_arm_link_hash_table * globals;
7261
7262 globals = elf32_arm_hash_table (info);
7263 BFD_ASSERT (globals != NULL);
7264
7265 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7266 globals->arm_glue_size,
7267 ARM2THUMB_GLUE_SECTION_NAME);
7268
7269 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7270 globals->thumb_glue_size,
7271 THUMB2ARM_GLUE_SECTION_NAME);
7272
7273 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7274 globals->vfp11_erratum_glue_size,
7275 VFP11_ERRATUM_VENEER_SECTION_NAME);
7276
7277 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7278 globals->stm32l4xx_erratum_glue_size,
7279 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7280
7281 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7282 globals->bx_glue_size,
7283 ARM_BX_GLUE_SECTION_NAME);
7284
7285 return true;
7286 }
7287
7288 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7289 returns the symbol identifying the stub. */
7290
7291 static struct elf_link_hash_entry *
7292 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
7293 struct elf_link_hash_entry * h)
7294 {
7295 const char * name = h->root.root.string;
7296 asection * s;
7297 char * tmp_name;
7298 struct elf_link_hash_entry * myh;
7299 struct bfd_link_hash_entry * bh;
7300 struct elf32_arm_link_hash_table * globals;
7301 bfd_vma val;
7302 bfd_size_type size;
7303
7304 globals = elf32_arm_hash_table (link_info);
7305 BFD_ASSERT (globals != NULL);
7306 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7307
7308 s = bfd_get_linker_section
7309 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
7310
7311 BFD_ASSERT (s != NULL);
7312
7313 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7314 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7315 BFD_ASSERT (tmp_name);
7316
7317 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7318
7319 myh = elf_link_hash_lookup
7320 (&(globals)->root, tmp_name, false, false, true);
7321
7322 if (myh != NULL)
7323 {
7324 /* We've already seen this guy. */
7325 free (tmp_name);
7326 return myh;
7327 }
7328
7329 /* The only trick here is using hash_table->arm_glue_size as the value.
7330 Even though the section isn't allocated yet, this is where we will be
7331 putting it. The +1 on the value marks that the stub has not been
7332 output yet - not that it is a Thumb function. */
7333 bh = NULL;
7334 val = globals->arm_glue_size + 1;
7335 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7336 tmp_name, BSF_GLOBAL, s, val,
7337 NULL, true, false, &bh);
7338
7339 myh = (struct elf_link_hash_entry *) bh;
7340 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7341 myh->forced_local = 1;
7342
7343 free (tmp_name);
7344
7345 if (bfd_link_pic (link_info)
7346 || globals->root.is_relocatable_executable
7347 || globals->pic_veneer)
7348 size = ARM2THUMB_PIC_GLUE_SIZE;
7349 else if (globals->use_blx)
7350 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7351 else
7352 size = ARM2THUMB_STATIC_GLUE_SIZE;
7353
7354 s->size += size;
7355 globals->arm_glue_size += size;
7356
7357 return myh;
7358 }
7359
7360 /* Allocate space for ARMv4 BX veneers. */
7361
7362 static void
7363 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7364 {
7365 asection * s;
7366 struct elf32_arm_link_hash_table *globals;
7367 char *tmp_name;
7368 struct elf_link_hash_entry *myh;
7369 struct bfd_link_hash_entry *bh;
7370 bfd_vma val;
7371
7372 /* BX PC does not need a veneer. */
7373 if (reg == 15)
7374 return;
7375
7376 globals = elf32_arm_hash_table (link_info);
7377 BFD_ASSERT (globals != NULL);
7378 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7379
7380 /* Check if this veneer has already been allocated. */
7381 if (globals->bx_glue_offset[reg])
7382 return;
7383
7384 s = bfd_get_linker_section
7385 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7386
7387 BFD_ASSERT (s != NULL);
7388
7389 /* Add symbol for veneer. */
7390 tmp_name = (char *)
7391 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7392 BFD_ASSERT (tmp_name);
7393
7394 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7395
7396 myh = elf_link_hash_lookup
7397 (&(globals)->root, tmp_name, false, false, false);
7398
7399 BFD_ASSERT (myh == NULL);
7400
7401 bh = NULL;
7402 val = globals->bx_glue_size;
7403 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7404 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7405 NULL, true, false, &bh);
7406
7407 myh = (struct elf_link_hash_entry *) bh;
7408 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7409 myh->forced_local = 1;
7410
7411 s->size += ARM_BX_VENEER_SIZE;
7412 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7413 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7414 }
7415
7416
7417 /* Add an entry to the code/data map for section SEC. */
7418
7419 static void
7420 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7421 {
7422 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7423 unsigned int newidx;
7424
7425 if (sec_data->map == NULL)
7426 {
7427 sec_data->map = (elf32_arm_section_map *)
7428 bfd_malloc (sizeof (elf32_arm_section_map));
7429 sec_data->mapcount = 0;
7430 sec_data->mapsize = 1;
7431 }
7432
7433 newidx = sec_data->mapcount++;
7434
7435 if (sec_data->mapcount > sec_data->mapsize)
7436 {
7437 sec_data->mapsize *= 2;
7438 sec_data->map = (elf32_arm_section_map *)
7439 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7440 * sizeof (elf32_arm_section_map));
7441 }
7442
7443 if (sec_data->map)
7444 {
7445 sec_data->map[newidx].vma = vma;
7446 sec_data->map[newidx].type = type;
7447 }
7448 }
7449
7450
7451 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7452 veneers are handled for now. */
7453
7454 static bfd_vma
7455 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7456 elf32_vfp11_erratum_list *branch,
7457 bfd *branch_bfd,
7458 asection *branch_sec,
7459 unsigned int offset)
7460 {
7461 asection *s;
7462 struct elf32_arm_link_hash_table *hash_table;
7463 char *tmp_name;
7464 struct elf_link_hash_entry *myh;
7465 struct bfd_link_hash_entry *bh;
7466 bfd_vma val;
7467 struct _arm_elf_section_data *sec_data;
7468 elf32_vfp11_erratum_list *newerr;
7469
7470 hash_table = elf32_arm_hash_table (link_info);
7471 BFD_ASSERT (hash_table != NULL);
7472 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7473
7474 s = bfd_get_linker_section
7475 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7476
7477 sec_data = elf32_arm_section_data (s);
7478
7479 BFD_ASSERT (s != NULL);
7480
7481 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7482 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7483 BFD_ASSERT (tmp_name);
7484
7485 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7486 hash_table->num_vfp11_fixes);
7487
7488 myh = elf_link_hash_lookup
7489 (&(hash_table)->root, tmp_name, false, false, false);
7490
7491 BFD_ASSERT (myh == NULL);
7492
7493 bh = NULL;
7494 val = hash_table->vfp11_erratum_glue_size;
7495 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7496 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7497 NULL, true, false, &bh);
7498
7499 myh = (struct elf_link_hash_entry *) bh;
7500 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7501 myh->forced_local = 1;
7502
7503 /* Link veneer back to calling location. */
7504 sec_data->erratumcount += 1;
7505 newerr = (elf32_vfp11_erratum_list *)
7506 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7507
7508 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7509 newerr->vma = -1;
7510 newerr->u.v.branch = branch;
7511 newerr->u.v.id = hash_table->num_vfp11_fixes;
7512 branch->u.b.veneer = newerr;
7513
7514 newerr->next = sec_data->erratumlist;
7515 sec_data->erratumlist = newerr;
7516
7517 /* A symbol for the return from the veneer. */
7518 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7519 hash_table->num_vfp11_fixes);
7520
7521 myh = elf_link_hash_lookup
7522 (&(hash_table)->root, tmp_name, false, false, false);
7523
7524 if (myh != NULL)
7525 abort ();
7526
7527 bh = NULL;
7528 val = offset + 4;
7529 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7530 branch_sec, val, NULL, true, false, &bh);
7531
7532 myh = (struct elf_link_hash_entry *) bh;
7533 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7534 myh->forced_local = 1;
7535
7536 free (tmp_name);
7537
7538 /* Generate a mapping symbol for the veneer section, and explicitly add an
7539 entry for that symbol to the code/data map for the section. */
7540 if (hash_table->vfp11_erratum_glue_size == 0)
7541 {
7542 bh = NULL;
7543 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7544 ever requires this erratum fix. */
7545 _bfd_generic_link_add_one_symbol (link_info,
7546 hash_table->bfd_of_glue_owner, "$a",
7547 BSF_LOCAL, s, 0, NULL,
7548 true, false, &bh);
7549
7550 myh = (struct elf_link_hash_entry *) bh;
7551 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7552 myh->forced_local = 1;
7553
7554 /* The elf32_arm_init_maps function only cares about symbols from input
7555 BFDs. We must make a note of this generated mapping symbol
7556 ourselves so that code byteswapping works properly in
7557 elf32_arm_write_section. */
7558 elf32_arm_section_map_add (s, 'a', 0);
7559 }
7560
7561 s->size += VFP11_ERRATUM_VENEER_SIZE;
7562 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7563 hash_table->num_vfp11_fixes++;
7564
7565 /* The offset of the veneer. */
7566 return val;
7567 }
7568
7569 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7570 veneers need to be handled because used only in Cortex-M. */
7571
7572 static bfd_vma
7573 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7574 elf32_stm32l4xx_erratum_list *branch,
7575 bfd *branch_bfd,
7576 asection *branch_sec,
7577 unsigned int offset,
7578 bfd_size_type veneer_size)
7579 {
7580 asection *s;
7581 struct elf32_arm_link_hash_table *hash_table;
7582 char *tmp_name;
7583 struct elf_link_hash_entry *myh;
7584 struct bfd_link_hash_entry *bh;
7585 bfd_vma val;
7586 struct _arm_elf_section_data *sec_data;
7587 elf32_stm32l4xx_erratum_list *newerr;
7588
7589 hash_table = elf32_arm_hash_table (link_info);
7590 BFD_ASSERT (hash_table != NULL);
7591 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7592
7593 s = bfd_get_linker_section
7594 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7595
7596 BFD_ASSERT (s != NULL);
7597
7598 sec_data = elf32_arm_section_data (s);
7599
7600 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7601 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7602 BFD_ASSERT (tmp_name);
7603
7604 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7605 hash_table->num_stm32l4xx_fixes);
7606
7607 myh = elf_link_hash_lookup
7608 (&(hash_table)->root, tmp_name, false, false, false);
7609
7610 BFD_ASSERT (myh == NULL);
7611
7612 bh = NULL;
7613 val = hash_table->stm32l4xx_erratum_glue_size;
7614 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7615 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7616 NULL, true, false, &bh);
7617
7618 myh = (struct elf_link_hash_entry *) bh;
7619 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7620 myh->forced_local = 1;
7621
7622 /* Link veneer back to calling location. */
7623 sec_data->stm32l4xx_erratumcount += 1;
7624 newerr = (elf32_stm32l4xx_erratum_list *)
7625 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7626
7627 newerr->type = STM32L4XX_ERRATUM_VENEER;
7628 newerr->vma = -1;
7629 newerr->u.v.branch = branch;
7630 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7631 branch->u.b.veneer = newerr;
7632
7633 newerr->next = sec_data->stm32l4xx_erratumlist;
7634 sec_data->stm32l4xx_erratumlist = newerr;
7635
7636 /* A symbol for the return from the veneer. */
7637 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7638 hash_table->num_stm32l4xx_fixes);
7639
7640 myh = elf_link_hash_lookup
7641 (&(hash_table)->root, tmp_name, false, false, false);
7642
7643 if (myh != NULL)
7644 abort ();
7645
7646 bh = NULL;
7647 val = offset + 4;
7648 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7649 branch_sec, val, NULL, true, false, &bh);
7650
7651 myh = (struct elf_link_hash_entry *) bh;
7652 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7653 myh->forced_local = 1;
7654
7655 free (tmp_name);
7656
7657 /* Generate a mapping symbol for the veneer section, and explicitly add an
7658 entry for that symbol to the code/data map for the section. */
7659 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7660 {
7661 bh = NULL;
7662 /* Creates a THUMB symbol since there is no other choice. */
7663 _bfd_generic_link_add_one_symbol (link_info,
7664 hash_table->bfd_of_glue_owner, "$t",
7665 BSF_LOCAL, s, 0, NULL,
7666 true, false, &bh);
7667
7668 myh = (struct elf_link_hash_entry *) bh;
7669 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7670 myh->forced_local = 1;
7671
7672 /* The elf32_arm_init_maps function only cares about symbols from input
7673 BFDs. We must make a note of this generated mapping symbol
7674 ourselves so that code byteswapping works properly in
7675 elf32_arm_write_section. */
7676 elf32_arm_section_map_add (s, 't', 0);
7677 }
7678
7679 s->size += veneer_size;
7680 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7681 hash_table->num_stm32l4xx_fixes++;
7682
7683 /* The offset of the veneer. */
7684 return val;
7685 }
7686
7687 #define ARM_GLUE_SECTION_FLAGS \
7688 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7689 | SEC_READONLY | SEC_LINKER_CREATED)
7690
7691 /* Create a fake section for use by the ARM backend of the linker. */
7692
7693 static bool
7694 arm_make_glue_section (bfd * abfd, const char * name)
7695 {
7696 asection * sec;
7697
7698 sec = bfd_get_linker_section (abfd, name);
7699 if (sec != NULL)
7700 /* Already made. */
7701 return true;
7702
7703 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7704
7705 if (sec == NULL
7706 || !bfd_set_section_alignment (sec, 2))
7707 return false;
7708
7709 /* Set the gc mark to prevent the section from being removed by garbage
7710 collection, despite the fact that no relocs refer to this section. */
7711 sec->gc_mark = 1;
7712
7713 return true;
7714 }
7715
7716 /* Set size of .plt entries. This function is called from the
7717 linker scripts in ld/emultempl/{armelf}.em. */
7718
7719 void
7720 bfd_elf32_arm_use_long_plt (void)
7721 {
7722 elf32_arm_use_long_plt_entry = true;
7723 }
7724
7725 /* Add the glue sections to ABFD. This function is called from the
7726 linker scripts in ld/emultempl/{armelf}.em. */
7727
7728 bool
7729 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7730 struct bfd_link_info *info)
7731 {
7732 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7733 bool dostm32l4xx = globals
7734 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7735 bool addglue;
7736
7737 /* If we are only performing a partial
7738 link do not bother adding the glue. */
7739 if (bfd_link_relocatable (info))
7740 return true;
7741
7742 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7743 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7744 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7745 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7746
7747 if (!dostm32l4xx)
7748 return addglue;
7749
7750 return addglue
7751 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7752 }
7753
7754 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7755 ensures they are not marked for deletion by
7756 strip_excluded_output_sections () when veneers are going to be created
7757 later. Not doing so would trigger assert on empty section size in
7758 lang_size_sections_1 (). */
7759
7760 void
7761 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7762 {
7763 enum elf32_arm_stub_type stub_type;
7764
7765 /* If we are only performing a partial
7766 link do not bother adding the glue. */
7767 if (bfd_link_relocatable (info))
7768 return;
7769
7770 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7771 {
7772 asection *out_sec;
7773 const char *out_sec_name;
7774
7775 if (!arm_dedicated_stub_output_section_required (stub_type))
7776 continue;
7777
7778 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7779 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7780 if (out_sec != NULL)
7781 out_sec->flags |= SEC_KEEP;
7782 }
7783 }
7784
7785 /* Select a BFD to be used to hold the sections used by the glue code.
7786 This function is called from the linker scripts in ld/emultempl/
7787 {armelf/pe}.em. */
7788
7789 bool
7790 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7791 {
7792 struct elf32_arm_link_hash_table *globals;
7793
7794 /* If we are only performing a partial link
7795 do not bother getting a bfd to hold the glue. */
7796 if (bfd_link_relocatable (info))
7797 return true;
7798
7799 /* Make sure we don't attach the glue sections to a dynamic object. */
7800 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7801
7802 globals = elf32_arm_hash_table (info);
7803 BFD_ASSERT (globals != NULL);
7804
7805 if (globals->bfd_of_glue_owner != NULL)
7806 return true;
7807
7808 /* Save the bfd for later use. */
7809 globals->bfd_of_glue_owner = abfd;
7810
7811 return true;
7812 }
7813
7814 static void
7815 check_use_blx (struct elf32_arm_link_hash_table *globals)
7816 {
7817 int cpu_arch;
7818
7819 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7820 Tag_CPU_arch);
7821
7822 if (globals->fix_arm1176)
7823 {
7824 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7825 globals->use_blx = 1;
7826 }
7827 else
7828 {
7829 if (cpu_arch > TAG_CPU_ARCH_V4T)
7830 globals->use_blx = 1;
7831 }
7832 }
7833
7834 bool
7835 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7836 struct bfd_link_info *link_info)
7837 {
7838 Elf_Internal_Shdr *symtab_hdr;
7839 Elf_Internal_Rela *internal_relocs = NULL;
7840 Elf_Internal_Rela *irel, *irelend;
7841 bfd_byte *contents = NULL;
7842
7843 asection *sec;
7844 struct elf32_arm_link_hash_table *globals;
7845
7846 /* If we are only performing a partial link do not bother
7847 to construct any glue. */
7848 if (bfd_link_relocatable (link_info))
7849 return true;
7850
7851 /* Here we have a bfd that is to be included on the link. We have a
7852 hook to do reloc rummaging, before section sizes are nailed down. */
7853 globals = elf32_arm_hash_table (link_info);
7854 BFD_ASSERT (globals != NULL);
7855
7856 check_use_blx (globals);
7857
7858 if (globals->byteswap_code && !bfd_big_endian (abfd))
7859 {
7860 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7861 abfd);
7862 return false;
7863 }
7864
7865 /* PR 5398: If we have not decided to include any loadable sections in
7866 the output then we will not have a glue owner bfd. This is OK, it
7867 just means that there is nothing else for us to do here. */
7868 if (globals->bfd_of_glue_owner == NULL)
7869 return true;
7870
7871 /* Rummage around all the relocs and map the glue vectors. */
7872 sec = abfd->sections;
7873
7874 if (sec == NULL)
7875 return true;
7876
7877 for (; sec != NULL; sec = sec->next)
7878 {
7879 if (sec->reloc_count == 0)
7880 continue;
7881
7882 if ((sec->flags & SEC_EXCLUDE) != 0)
7883 continue;
7884
7885 symtab_hdr = & elf_symtab_hdr (abfd);
7886
7887 /* Load the relocs. */
7888 internal_relocs
7889 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, false);
7890
7891 if (internal_relocs == NULL)
7892 goto error_return;
7893
7894 irelend = internal_relocs + sec->reloc_count;
7895 for (irel = internal_relocs; irel < irelend; irel++)
7896 {
7897 long r_type;
7898 unsigned long r_index;
7899
7900 struct elf_link_hash_entry *h;
7901
7902 r_type = ELF32_R_TYPE (irel->r_info);
7903 r_index = ELF32_R_SYM (irel->r_info);
7904
7905 /* These are the only relocation types we care about. */
7906 if ( r_type != R_ARM_PC24
7907 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7908 continue;
7909
7910 /* Get the section contents if we haven't done so already. */
7911 if (contents == NULL)
7912 {
7913 /* Get cached copy if it exists. */
7914 if (elf_section_data (sec)->this_hdr.contents != NULL)
7915 contents = elf_section_data (sec)->this_hdr.contents;
7916 else
7917 {
7918 /* Go get them off disk. */
7919 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7920 goto error_return;
7921 }
7922 }
7923
7924 if (r_type == R_ARM_V4BX)
7925 {
7926 int reg;
7927
7928 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7929 record_arm_bx_glue (link_info, reg);
7930 continue;
7931 }
7932
7933 /* If the relocation is not against a symbol it cannot concern us. */
7934 h = NULL;
7935
7936 /* We don't care about local symbols. */
7937 if (r_index < symtab_hdr->sh_info)
7938 continue;
7939
7940 /* This is an external symbol. */
7941 r_index -= symtab_hdr->sh_info;
7942 h = (struct elf_link_hash_entry *)
7943 elf_sym_hashes (abfd)[r_index];
7944
7945 /* If the relocation is against a static symbol it must be within
7946 the current section and so cannot be a cross ARM/Thumb relocation. */
7947 if (h == NULL)
7948 continue;
7949
7950 /* If the call will go through a PLT entry then we do not need
7951 glue. */
7952 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7953 continue;
7954
7955 switch (r_type)
7956 {
7957 case R_ARM_PC24:
7958 /* This one is a call from arm code. We need to look up
7959 the target of the call. If it is a thumb target, we
7960 insert glue. */
7961 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7962 == ST_BRANCH_TO_THUMB)
7963 record_arm_to_thumb_glue (link_info, h);
7964 break;
7965
7966 default:
7967 abort ();
7968 }
7969 }
7970
7971 if (elf_section_data (sec)->this_hdr.contents != contents)
7972 free (contents);
7973 contents = NULL;
7974
7975 if (elf_section_data (sec)->relocs != internal_relocs)
7976 free (internal_relocs);
7977 internal_relocs = NULL;
7978 }
7979
7980 return true;
7981
7982 error_return:
7983 if (elf_section_data (sec)->this_hdr.contents != contents)
7984 free (contents);
7985 if (elf_section_data (sec)->relocs != internal_relocs)
7986 free (internal_relocs);
7987
7988 return false;
7989 }
7990 #endif
7991
7992
7993 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7994
7995 void
7996 bfd_elf32_arm_init_maps (bfd *abfd)
7997 {
7998 Elf_Internal_Sym *isymbuf;
7999 Elf_Internal_Shdr *hdr;
8000 unsigned int i, localsyms;
8001
8002 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
8003 if (! is_arm_elf (abfd))
8004 return;
8005
8006 if ((abfd->flags & DYNAMIC) != 0)
8007 return;
8008
8009 hdr = & elf_symtab_hdr (abfd);
8010 localsyms = hdr->sh_info;
8011
8012 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
8013 should contain the number of local symbols, which should come before any
8014 global symbols. Mapping symbols are always local. */
8015 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
8016 NULL);
8017
8018 /* No internal symbols read? Skip this BFD. */
8019 if (isymbuf == NULL)
8020 return;
8021
8022 for (i = 0; i < localsyms; i++)
8023 {
8024 Elf_Internal_Sym *isym = &isymbuf[i];
8025 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8026 const char *name;
8027
8028 if (sec != NULL
8029 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
8030 {
8031 name = bfd_elf_string_from_elf_section (abfd,
8032 hdr->sh_link, isym->st_name);
8033
8034 if (bfd_is_arm_special_symbol_name (name,
8035 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
8036 elf32_arm_section_map_add (sec, name[1], isym->st_value);
8037 }
8038 }
8039 }
8040
8041
8042 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
8043 say what they wanted. */
8044
8045 void
8046 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
8047 {
8048 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8049 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8050
8051 if (globals == NULL)
8052 return;
8053
8054 if (globals->fix_cortex_a8 == -1)
8055 {
8056 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
8057 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
8058 && (out_attr[Tag_CPU_arch_profile].i == 'A'
8059 || out_attr[Tag_CPU_arch_profile].i == 0))
8060 globals->fix_cortex_a8 = 1;
8061 else
8062 globals->fix_cortex_a8 = 0;
8063 }
8064 }
8065
8066
8067 void
8068 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
8069 {
8070 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8071 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8072
8073 if (globals == NULL)
8074 return;
8075 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
8076 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
8077 {
8078 switch (globals->vfp11_fix)
8079 {
8080 case BFD_ARM_VFP11_FIX_DEFAULT:
8081 case BFD_ARM_VFP11_FIX_NONE:
8082 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8083 break;
8084
8085 default:
8086 /* Give a warning, but do as the user requests anyway. */
8087 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
8088 "workaround is not necessary for target architecture"), obfd);
8089 }
8090 }
8091 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
8092 /* For earlier architectures, we might need the workaround, but do not
8093 enable it by default. If users is running with broken hardware, they
8094 must enable the erratum fix explicitly. */
8095 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8096 }
8097
8098 void
8099 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
8100 {
8101 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8102 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8103
8104 if (globals == NULL)
8105 return;
8106
8107 /* We assume only Cortex-M4 may require the fix. */
8108 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
8109 || out_attr[Tag_CPU_arch_profile].i != 'M')
8110 {
8111 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
8112 /* Give a warning, but do as the user requests anyway. */
8113 _bfd_error_handler
8114 (_("%pB: warning: selected STM32L4XX erratum "
8115 "workaround is not necessary for target architecture"), obfd);
8116 }
8117 }
8118
8119 enum bfd_arm_vfp11_pipe
8120 {
8121 VFP11_FMAC,
8122 VFP11_LS,
8123 VFP11_DS,
8124 VFP11_BAD
8125 };
8126
8127 /* Return a VFP register number. This is encoded as RX:X for single-precision
8128 registers, or X:RX for double-precision registers, where RX is the group of
8129 four bits in the instruction encoding and X is the single extension bit.
8130 RX and X fields are specified using their lowest (starting) bit. The return
8131 value is:
8132
8133 0...31: single-precision registers s0...s31
8134 32...63: double-precision registers d0...d31.
8135
8136 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8137 encounter VFP3 instructions, so we allow the full range for DP registers. */
8138
8139 static unsigned int
8140 bfd_arm_vfp11_regno (unsigned int insn, bool is_double, unsigned int rx,
8141 unsigned int x)
8142 {
8143 if (is_double)
8144 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
8145 else
8146 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
8147 }
8148
8149 /* Set bits in *WMASK according to a register number REG as encoded by
8150 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8151
8152 static void
8153 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
8154 {
8155 if (reg < 32)
8156 *wmask |= 1 << reg;
8157 else if (reg < 48)
8158 *wmask |= 3 << ((reg - 32) * 2);
8159 }
8160
8161 /* Return TRUE if WMASK overwrites anything in REGS. */
8162
8163 static bool
8164 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
8165 {
8166 int i;
8167
8168 for (i = 0; i < numregs; i++)
8169 {
8170 unsigned int reg = regs[i];
8171
8172 if (reg < 32 && (wmask & (1 << reg)) != 0)
8173 return true;
8174
8175 reg -= 32;
8176
8177 if (reg >= 16)
8178 continue;
8179
8180 if ((wmask & (3 << (reg * 2))) != 0)
8181 return true;
8182 }
8183
8184 return false;
8185 }
8186
8187 /* In this function, we're interested in two things: finding input registers
8188 for VFP data-processing instructions, and finding the set of registers which
8189 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8190 hold the written set, so FLDM etc. are easy to deal with (we're only
8191 interested in 32 SP registers or 16 dp registers, due to the VFP version
8192 implemented by the chip in question). DP registers are marked by setting
8193 both SP registers in the write mask). */
8194
8195 static enum bfd_arm_vfp11_pipe
8196 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
8197 int *numregs)
8198 {
8199 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
8200 bool is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
8201
8202 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8203 {
8204 unsigned int pqrs;
8205 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8206 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8207
8208 pqrs = ((insn & 0x00800000) >> 20)
8209 | ((insn & 0x00300000) >> 19)
8210 | ((insn & 0x00000040) >> 6);
8211
8212 switch (pqrs)
8213 {
8214 case 0: /* fmac[sd]. */
8215 case 1: /* fnmac[sd]. */
8216 case 2: /* fmsc[sd]. */
8217 case 3: /* fnmsc[sd]. */
8218 vpipe = VFP11_FMAC;
8219 bfd_arm_vfp11_write_mask (destmask, fd);
8220 regs[0] = fd;
8221 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8222 regs[2] = fm;
8223 *numregs = 3;
8224 break;
8225
8226 case 4: /* fmul[sd]. */
8227 case 5: /* fnmul[sd]. */
8228 case 6: /* fadd[sd]. */
8229 case 7: /* fsub[sd]. */
8230 vpipe = VFP11_FMAC;
8231 goto vfp_binop;
8232
8233 case 8: /* fdiv[sd]. */
8234 vpipe = VFP11_DS;
8235 vfp_binop:
8236 bfd_arm_vfp11_write_mask (destmask, fd);
8237 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8238 regs[1] = fm;
8239 *numregs = 2;
8240 break;
8241
8242 case 15: /* extended opcode. */
8243 {
8244 unsigned int extn = ((insn >> 15) & 0x1e)
8245 | ((insn >> 7) & 1);
8246
8247 switch (extn)
8248 {
8249 case 0: /* fcpy[sd]. */
8250 case 1: /* fabs[sd]. */
8251 case 2: /* fneg[sd]. */
8252 case 8: /* fcmp[sd]. */
8253 case 9: /* fcmpe[sd]. */
8254 case 10: /* fcmpz[sd]. */
8255 case 11: /* fcmpez[sd]. */
8256 case 16: /* fuito[sd]. */
8257 case 17: /* fsito[sd]. */
8258 case 24: /* ftoui[sd]. */
8259 case 25: /* ftouiz[sd]. */
8260 case 26: /* ftosi[sd]. */
8261 case 27: /* ftosiz[sd]. */
8262 /* These instructions will not bounce due to underflow. */
8263 *numregs = 0;
8264 vpipe = VFP11_FMAC;
8265 break;
8266
8267 case 3: /* fsqrt[sd]. */
8268 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8269 registers to cause the erratum in previous instructions. */
8270 bfd_arm_vfp11_write_mask (destmask, fd);
8271 vpipe = VFP11_DS;
8272 break;
8273
8274 case 15: /* fcvt{ds,sd}. */
8275 {
8276 int rnum = 0;
8277
8278 bfd_arm_vfp11_write_mask (destmask, fd);
8279
8280 /* Only FCVTSD can underflow. */
8281 if ((insn & 0x100) != 0)
8282 regs[rnum++] = fm;
8283
8284 *numregs = rnum;
8285
8286 vpipe = VFP11_FMAC;
8287 }
8288 break;
8289
8290 default:
8291 return VFP11_BAD;
8292 }
8293 }
8294 break;
8295
8296 default:
8297 return VFP11_BAD;
8298 }
8299 }
8300 /* Two-register transfer. */
8301 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
8302 {
8303 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8304
8305 if ((insn & 0x100000) == 0)
8306 {
8307 if (is_double)
8308 bfd_arm_vfp11_write_mask (destmask, fm);
8309 else
8310 {
8311 bfd_arm_vfp11_write_mask (destmask, fm);
8312 bfd_arm_vfp11_write_mask (destmask, fm + 1);
8313 }
8314 }
8315
8316 vpipe = VFP11_LS;
8317 }
8318 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
8319 {
8320 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8321 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
8322
8323 switch (puw)
8324 {
8325 case 0: /* Two-reg transfer. We should catch these above. */
8326 abort ();
8327
8328 case 2: /* fldm[sdx]. */
8329 case 3:
8330 case 5:
8331 {
8332 unsigned int i, offset = insn & 0xff;
8333
8334 if (is_double)
8335 offset >>= 1;
8336
8337 for (i = fd; i < fd + offset; i++)
8338 bfd_arm_vfp11_write_mask (destmask, i);
8339 }
8340 break;
8341
8342 case 4: /* fld[sd]. */
8343 case 6:
8344 bfd_arm_vfp11_write_mask (destmask, fd);
8345 break;
8346
8347 default:
8348 return VFP11_BAD;
8349 }
8350
8351 vpipe = VFP11_LS;
8352 }
8353 /* Single-register transfer. Note L==0. */
8354 else if ((insn & 0x0f100e10) == 0x0e000a10)
8355 {
8356 unsigned int opcode = (insn >> 21) & 7;
8357 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8358
8359 switch (opcode)
8360 {
8361 case 0: /* fmsr/fmdlr. */
8362 case 1: /* fmdhr. */
8363 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8364 destination register. I don't know if this is exactly right,
8365 but it is the conservative choice. */
8366 bfd_arm_vfp11_write_mask (destmask, fn);
8367 break;
8368
8369 case 7: /* fmxr. */
8370 break;
8371 }
8372
8373 vpipe = VFP11_LS;
8374 }
8375
8376 return vpipe;
8377 }
8378
8379
8380 static int elf32_arm_compare_mapping (const void * a, const void * b);
8381
8382
8383 /* Look for potentially-troublesome code sequences which might trigger the
8384 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8385 (available from ARM) for details of the erratum. A short version is
8386 described in ld.texinfo. */
8387
8388 bool
8389 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8390 {
8391 asection *sec;
8392 bfd_byte *contents = NULL;
8393 int state = 0;
8394 int regs[3], numregs = 0;
8395 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8396 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8397
8398 if (globals == NULL)
8399 return false;
8400
8401 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8402 The states transition as follows:
8403
8404 0 -> 1 (vector) or 0 -> 2 (scalar)
8405 A VFP FMAC-pipeline instruction has been seen. Fill
8406 regs[0]..regs[numregs-1] with its input operands. Remember this
8407 instruction in 'first_fmac'.
8408
8409 1 -> 2
8410 Any instruction, except for a VFP instruction which overwrites
8411 regs[*].
8412
8413 1 -> 3 [ -> 0 ] or
8414 2 -> 3 [ -> 0 ]
8415 A VFP instruction has been seen which overwrites any of regs[*].
8416 We must make a veneer! Reset state to 0 before examining next
8417 instruction.
8418
8419 2 -> 0
8420 If we fail to match anything in state 2, reset to state 0 and reset
8421 the instruction pointer to the instruction after 'first_fmac'.
8422
8423 If the VFP11 vector mode is in use, there must be at least two unrelated
8424 instructions between anti-dependent VFP11 instructions to properly avoid
8425 triggering the erratum, hence the use of the extra state 1. */
8426
8427 /* If we are only performing a partial link do not bother
8428 to construct any glue. */
8429 if (bfd_link_relocatable (link_info))
8430 return true;
8431
8432 /* Skip if this bfd does not correspond to an ELF image. */
8433 if (! is_arm_elf (abfd))
8434 return true;
8435
8436 /* We should have chosen a fix type by the time we get here. */
8437 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8438
8439 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8440 return true;
8441
8442 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8443 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8444 return true;
8445
8446 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8447 {
8448 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8449 struct _arm_elf_section_data *sec_data;
8450
8451 /* If we don't have executable progbits, we're not interested in this
8452 section. Also skip if section is to be excluded. */
8453 if (elf_section_type (sec) != SHT_PROGBITS
8454 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8455 || (sec->flags & SEC_EXCLUDE) != 0
8456 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8457 || sec->output_section == bfd_abs_section_ptr
8458 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8459 continue;
8460
8461 sec_data = elf32_arm_section_data (sec);
8462
8463 if (sec_data->mapcount == 0)
8464 continue;
8465
8466 if (elf_section_data (sec)->this_hdr.contents != NULL)
8467 contents = elf_section_data (sec)->this_hdr.contents;
8468 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8469 goto error_return;
8470
8471 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8472 elf32_arm_compare_mapping);
8473
8474 for (span = 0; span < sec_data->mapcount; span++)
8475 {
8476 unsigned int span_start = sec_data->map[span].vma;
8477 unsigned int span_end = (span == sec_data->mapcount - 1)
8478 ? sec->size : sec_data->map[span + 1].vma;
8479 char span_type = sec_data->map[span].type;
8480
8481 /* FIXME: Only ARM mode is supported at present. We may need to
8482 support Thumb-2 mode also at some point. */
8483 if (span_type != 'a')
8484 continue;
8485
8486 for (i = span_start; i < span_end;)
8487 {
8488 unsigned int next_i = i + 4;
8489 unsigned int insn = bfd_big_endian (abfd)
8490 ? (((unsigned) contents[i] << 24)
8491 | (contents[i + 1] << 16)
8492 | (contents[i + 2] << 8)
8493 | contents[i + 3])
8494 : (((unsigned) contents[i + 3] << 24)
8495 | (contents[i + 2] << 16)
8496 | (contents[i + 1] << 8)
8497 | contents[i]);
8498 unsigned int writemask = 0;
8499 enum bfd_arm_vfp11_pipe vpipe;
8500
8501 switch (state)
8502 {
8503 case 0:
8504 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8505 &numregs);
8506 /* I'm assuming the VFP11 erratum can trigger with denorm
8507 operands on either the FMAC or the DS pipeline. This might
8508 lead to slightly overenthusiastic veneer insertion. */
8509 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8510 {
8511 state = use_vector ? 1 : 2;
8512 first_fmac = i;
8513 veneer_of_insn = insn;
8514 }
8515 break;
8516
8517 case 1:
8518 {
8519 int other_regs[3], other_numregs;
8520 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8521 other_regs,
8522 &other_numregs);
8523 if (vpipe != VFP11_BAD
8524 && bfd_arm_vfp11_antidependency (writemask, regs,
8525 numregs))
8526 state = 3;
8527 else
8528 state = 2;
8529 }
8530 break;
8531
8532 case 2:
8533 {
8534 int other_regs[3], other_numregs;
8535 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8536 other_regs,
8537 &other_numregs);
8538 if (vpipe != VFP11_BAD
8539 && bfd_arm_vfp11_antidependency (writemask, regs,
8540 numregs))
8541 state = 3;
8542 else
8543 {
8544 state = 0;
8545 next_i = first_fmac + 4;
8546 }
8547 }
8548 break;
8549
8550 case 3:
8551 abort (); /* Should be unreachable. */
8552 }
8553
8554 if (state == 3)
8555 {
8556 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8557 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8558
8559 elf32_arm_section_data (sec)->erratumcount += 1;
8560
8561 newerr->u.b.vfp_insn = veneer_of_insn;
8562
8563 switch (span_type)
8564 {
8565 case 'a':
8566 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8567 break;
8568
8569 default:
8570 abort ();
8571 }
8572
8573 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8574 first_fmac);
8575
8576 newerr->vma = -1;
8577
8578 newerr->next = sec_data->erratumlist;
8579 sec_data->erratumlist = newerr;
8580
8581 state = 0;
8582 }
8583
8584 i = next_i;
8585 }
8586 }
8587
8588 if (elf_section_data (sec)->this_hdr.contents != contents)
8589 free (contents);
8590 contents = NULL;
8591 }
8592
8593 return true;
8594
8595 error_return:
8596 if (elf_section_data (sec)->this_hdr.contents != contents)
8597 free (contents);
8598
8599 return false;
8600 }
8601
8602 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8603 after sections have been laid out, using specially-named symbols. */
8604
8605 void
8606 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8607 struct bfd_link_info *link_info)
8608 {
8609 asection *sec;
8610 struct elf32_arm_link_hash_table *globals;
8611 char *tmp_name;
8612
8613 if (bfd_link_relocatable (link_info))
8614 return;
8615
8616 /* Skip if this bfd does not correspond to an ELF image. */
8617 if (! is_arm_elf (abfd))
8618 return;
8619
8620 globals = elf32_arm_hash_table (link_info);
8621 if (globals == NULL)
8622 return;
8623
8624 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8625 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8626 BFD_ASSERT (tmp_name);
8627
8628 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8629 {
8630 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8631 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8632
8633 for (; errnode != NULL; errnode = errnode->next)
8634 {
8635 struct elf_link_hash_entry *myh;
8636 bfd_vma vma;
8637
8638 switch (errnode->type)
8639 {
8640 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8641 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8642 /* Find veneer symbol. */
8643 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8644 errnode->u.b.veneer->u.v.id);
8645
8646 myh = elf_link_hash_lookup
8647 (&(globals)->root, tmp_name, false, false, true);
8648
8649 if (myh == NULL)
8650 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8651 abfd, "VFP11", tmp_name);
8652
8653 vma = myh->root.u.def.section->output_section->vma
8654 + myh->root.u.def.section->output_offset
8655 + myh->root.u.def.value;
8656
8657 errnode->u.b.veneer->vma = vma;
8658 break;
8659
8660 case VFP11_ERRATUM_ARM_VENEER:
8661 case VFP11_ERRATUM_THUMB_VENEER:
8662 /* Find return location. */
8663 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8664 errnode->u.v.id);
8665
8666 myh = elf_link_hash_lookup
8667 (&(globals)->root, tmp_name, false, false, true);
8668
8669 if (myh == NULL)
8670 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8671 abfd, "VFP11", tmp_name);
8672
8673 vma = myh->root.u.def.section->output_section->vma
8674 + myh->root.u.def.section->output_offset
8675 + myh->root.u.def.value;
8676
8677 errnode->u.v.branch->vma = vma;
8678 break;
8679
8680 default:
8681 abort ();
8682 }
8683 }
8684 }
8685
8686 free (tmp_name);
8687 }
8688
8689 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8690 return locations after sections have been laid out, using
8691 specially-named symbols. */
8692
8693 void
8694 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8695 struct bfd_link_info *link_info)
8696 {
8697 asection *sec;
8698 struct elf32_arm_link_hash_table *globals;
8699 char *tmp_name;
8700
8701 if (bfd_link_relocatable (link_info))
8702 return;
8703
8704 /* Skip if this bfd does not correspond to an ELF image. */
8705 if (! is_arm_elf (abfd))
8706 return;
8707
8708 globals = elf32_arm_hash_table (link_info);
8709 if (globals == NULL)
8710 return;
8711
8712 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8713 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8714 BFD_ASSERT (tmp_name);
8715
8716 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8717 {
8718 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8719 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8720
8721 for (; errnode != NULL; errnode = errnode->next)
8722 {
8723 struct elf_link_hash_entry *myh;
8724 bfd_vma vma;
8725
8726 switch (errnode->type)
8727 {
8728 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8729 /* Find veneer symbol. */
8730 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8731 errnode->u.b.veneer->u.v.id);
8732
8733 myh = elf_link_hash_lookup
8734 (&(globals)->root, tmp_name, false, false, true);
8735
8736 if (myh == NULL)
8737 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8738 abfd, "STM32L4XX", tmp_name);
8739
8740 vma = myh->root.u.def.section->output_section->vma
8741 + myh->root.u.def.section->output_offset
8742 + myh->root.u.def.value;
8743
8744 errnode->u.b.veneer->vma = vma;
8745 break;
8746
8747 case STM32L4XX_ERRATUM_VENEER:
8748 /* Find return location. */
8749 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8750 errnode->u.v.id);
8751
8752 myh = elf_link_hash_lookup
8753 (&(globals)->root, tmp_name, false, false, true);
8754
8755 if (myh == NULL)
8756 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8757 abfd, "STM32L4XX", tmp_name);
8758
8759 vma = myh->root.u.def.section->output_section->vma
8760 + myh->root.u.def.section->output_offset
8761 + myh->root.u.def.value;
8762
8763 errnode->u.v.branch->vma = vma;
8764 break;
8765
8766 default:
8767 abort ();
8768 }
8769 }
8770 }
8771
8772 free (tmp_name);
8773 }
8774
8775 static inline bool
8776 is_thumb2_ldmia (const insn32 insn)
8777 {
8778 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8779 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8780 return (insn & 0xffd02000) == 0xe8900000;
8781 }
8782
8783 static inline bool
8784 is_thumb2_ldmdb (const insn32 insn)
8785 {
8786 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8787 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8788 return (insn & 0xffd02000) == 0xe9100000;
8789 }
8790
8791 static inline bool
8792 is_thumb2_vldm (const insn32 insn)
8793 {
8794 /* A6.5 Extension register load or store instruction
8795 A7.7.229
8796 We look for SP 32-bit and DP 64-bit registers.
8797 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8798 <list> is consecutive 64-bit registers
8799 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8800 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8801 <list> is consecutive 32-bit registers
8802 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8803 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8804 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8805 return
8806 (((insn & 0xfe100f00) == 0xec100b00) ||
8807 ((insn & 0xfe100f00) == 0xec100a00))
8808 && /* (IA without !). */
8809 (((((insn << 7) >> 28) & 0xd) == 0x4)
8810 /* (IA with !), includes VPOP (when reg number is SP). */
8811 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8812 /* (DB with !). */
8813 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8814 }
8815
8816 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8817 VLDM opcode and:
8818 - computes the number and the mode of memory accesses
8819 - decides if the replacement should be done:
8820 . replaces only if > 8-word accesses
8821 . or (testing purposes only) replaces all accesses. */
8822
8823 static bool
8824 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8825 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8826 {
8827 int nb_words = 0;
8828
8829 /* The field encoding the register list is the same for both LDMIA
8830 and LDMDB encodings. */
8831 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8832 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8833 else if (is_thumb2_vldm (insn))
8834 nb_words = (insn & 0xff);
8835
8836 /* DEFAULT mode accounts for the real bug condition situation,
8837 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8838 return (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT
8839 ? nb_words > 8
8840 : stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL);
8841 }
8842
8843 /* Look for potentially-troublesome code sequences which might trigger
8844 the STM STM32L4XX erratum. */
8845
8846 bool
8847 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8848 struct bfd_link_info *link_info)
8849 {
8850 asection *sec;
8851 bfd_byte *contents = NULL;
8852 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8853
8854 if (globals == NULL)
8855 return false;
8856
8857 /* If we are only performing a partial link do not bother
8858 to construct any glue. */
8859 if (bfd_link_relocatable (link_info))
8860 return true;
8861
8862 /* Skip if this bfd does not correspond to an ELF image. */
8863 if (! is_arm_elf (abfd))
8864 return true;
8865
8866 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8867 return true;
8868
8869 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8870 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8871 return true;
8872
8873 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8874 {
8875 unsigned int i, span;
8876 struct _arm_elf_section_data *sec_data;
8877
8878 /* If we don't have executable progbits, we're not interested in this
8879 section. Also skip if section is to be excluded. */
8880 if (elf_section_type (sec) != SHT_PROGBITS
8881 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8882 || (sec->flags & SEC_EXCLUDE) != 0
8883 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8884 || sec->output_section == bfd_abs_section_ptr
8885 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8886 continue;
8887
8888 sec_data = elf32_arm_section_data (sec);
8889
8890 if (sec_data->mapcount == 0)
8891 continue;
8892
8893 if (elf_section_data (sec)->this_hdr.contents != NULL)
8894 contents = elf_section_data (sec)->this_hdr.contents;
8895 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8896 goto error_return;
8897
8898 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8899 elf32_arm_compare_mapping);
8900
8901 for (span = 0; span < sec_data->mapcount; span++)
8902 {
8903 unsigned int span_start = sec_data->map[span].vma;
8904 unsigned int span_end = (span == sec_data->mapcount - 1)
8905 ? sec->size : sec_data->map[span + 1].vma;
8906 char span_type = sec_data->map[span].type;
8907 int itblock_current_pos = 0;
8908
8909 /* Only Thumb2 mode need be supported with this CM4 specific
8910 code, we should not encounter any arm mode eg span_type
8911 != 'a'. */
8912 if (span_type != 't')
8913 continue;
8914
8915 for (i = span_start; i < span_end;)
8916 {
8917 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8918 bool insn_32bit = false;
8919 bool is_ldm = false;
8920 bool is_vldm = false;
8921 bool is_not_last_in_it_block = false;
8922
8923 /* The first 16-bits of all 32-bit thumb2 instructions start
8924 with opcode[15..13]=0b111 and the encoded op1 can be anything
8925 except opcode[12..11]!=0b00.
8926 See 32-bit Thumb instruction encoding. */
8927 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8928 insn_32bit = true;
8929
8930 /* Compute the predicate that tells if the instruction
8931 is concerned by the IT block
8932 - Creates an error if there is a ldm that is not
8933 last in the IT block thus cannot be replaced
8934 - Otherwise we can create a branch at the end of the
8935 IT block, it will be controlled naturally by IT
8936 with the proper pseudo-predicate
8937 - So the only interesting predicate is the one that
8938 tells that we are not on the last item of an IT
8939 block. */
8940 if (itblock_current_pos != 0)
8941 is_not_last_in_it_block = !!--itblock_current_pos;
8942
8943 if (insn_32bit)
8944 {
8945 /* Load the rest of the insn (in manual-friendly order). */
8946 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8947 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8948 is_vldm = is_thumb2_vldm (insn);
8949
8950 /* Veneers are created for (v)ldm depending on
8951 option flags and memory accesses conditions; but
8952 if the instruction is not the last instruction of
8953 an IT block, we cannot create a jump there, so we
8954 bail out. */
8955 if ((is_ldm || is_vldm)
8956 && stm32l4xx_need_create_replacing_stub
8957 (insn, globals->stm32l4xx_fix))
8958 {
8959 if (is_not_last_in_it_block)
8960 {
8961 _bfd_error_handler
8962 /* xgettext:c-format */
8963 (_("%pB(%pA+%#x): error: multiple load detected"
8964 " in non-last IT block instruction:"
8965 " STM32L4XX veneer cannot be generated; "
8966 "use gcc option -mrestrict-it to generate"
8967 " only one instruction per IT block"),
8968 abfd, sec, i);
8969 }
8970 else
8971 {
8972 elf32_stm32l4xx_erratum_list *newerr =
8973 (elf32_stm32l4xx_erratum_list *)
8974 bfd_zmalloc
8975 (sizeof (elf32_stm32l4xx_erratum_list));
8976
8977 elf32_arm_section_data (sec)
8978 ->stm32l4xx_erratumcount += 1;
8979 newerr->u.b.insn = insn;
8980 /* We create only thumb branches. */
8981 newerr->type =
8982 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8983 record_stm32l4xx_erratum_veneer
8984 (link_info, newerr, abfd, sec,
8985 i,
8986 is_ldm ?
8987 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8988 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8989 newerr->vma = -1;
8990 newerr->next = sec_data->stm32l4xx_erratumlist;
8991 sec_data->stm32l4xx_erratumlist = newerr;
8992 }
8993 }
8994 }
8995 else
8996 {
8997 /* A7.7.37 IT p208
8998 IT blocks are only encoded in T1
8999 Encoding T1: IT{x{y{z}}} <firstcond>
9000 1 0 1 1 - 1 1 1 1 - firstcond - mask
9001 if mask = '0000' then see 'related encodings'
9002 We don't deal with UNPREDICTABLE, just ignore these.
9003 There can be no nested IT blocks so an IT block
9004 is naturally a new one for which it is worth
9005 computing its size. */
9006 bool is_newitblock = ((insn & 0xff00) == 0xbf00)
9007 && ((insn & 0x000f) != 0x0000);
9008 /* If we have a new IT block we compute its size. */
9009 if (is_newitblock)
9010 {
9011 /* Compute the number of instructions controlled
9012 by the IT block, it will be used to decide
9013 whether we are inside an IT block or not. */
9014 unsigned int mask = insn & 0x000f;
9015 itblock_current_pos = 4 - ctz (mask);
9016 }
9017 }
9018
9019 i += insn_32bit ? 4 : 2;
9020 }
9021 }
9022
9023 if (elf_section_data (sec)->this_hdr.contents != contents)
9024 free (contents);
9025 contents = NULL;
9026 }
9027
9028 return true;
9029
9030 error_return:
9031 if (elf_section_data (sec)->this_hdr.contents != contents)
9032 free (contents);
9033
9034 return false;
9035 }
9036
9037 /* Set target relocation values needed during linking. */
9038
9039 void
9040 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
9041 struct bfd_link_info *link_info,
9042 struct elf32_arm_params *params)
9043 {
9044 struct elf32_arm_link_hash_table *globals;
9045
9046 globals = elf32_arm_hash_table (link_info);
9047 if (globals == NULL)
9048 return;
9049
9050 globals->target1_is_rel = params->target1_is_rel;
9051 if (globals->fdpic_p)
9052 globals->target2_reloc = R_ARM_GOT32;
9053 else if (strcmp (params->target2_type, "rel") == 0)
9054 globals->target2_reloc = R_ARM_REL32;
9055 else if (strcmp (params->target2_type, "abs") == 0)
9056 globals->target2_reloc = R_ARM_ABS32;
9057 else if (strcmp (params->target2_type, "got-rel") == 0)
9058 globals->target2_reloc = R_ARM_GOT_PREL;
9059 else
9060 {
9061 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
9062 params->target2_type);
9063 }
9064 globals->fix_v4bx = params->fix_v4bx;
9065 globals->use_blx |= params->use_blx;
9066 globals->vfp11_fix = params->vfp11_denorm_fix;
9067 globals->stm32l4xx_fix = params->stm32l4xx_fix;
9068 if (globals->fdpic_p)
9069 globals->pic_veneer = 1;
9070 else
9071 globals->pic_veneer = params->pic_veneer;
9072 globals->fix_cortex_a8 = params->fix_cortex_a8;
9073 globals->fix_arm1176 = params->fix_arm1176;
9074 globals->cmse_implib = params->cmse_implib;
9075 globals->in_implib_bfd = params->in_implib_bfd;
9076
9077 BFD_ASSERT (is_arm_elf (output_bfd));
9078 elf_arm_tdata (output_bfd)->no_enum_size_warning
9079 = params->no_enum_size_warning;
9080 elf_arm_tdata (output_bfd)->no_wchar_size_warning
9081 = params->no_wchar_size_warning;
9082 }
9083
9084 /* Replace the target offset of a Thumb bl or b.w instruction. */
9085
9086 static void
9087 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
9088 {
9089 bfd_vma upper;
9090 bfd_vma lower;
9091 int reloc_sign;
9092
9093 BFD_ASSERT ((offset & 1) == 0);
9094
9095 upper = bfd_get_16 (abfd, insn);
9096 lower = bfd_get_16 (abfd, insn + 2);
9097 reloc_sign = (offset < 0) ? 1 : 0;
9098 upper = (upper & ~(bfd_vma) 0x7ff)
9099 | ((offset >> 12) & 0x3ff)
9100 | (reloc_sign << 10);
9101 lower = (lower & ~(bfd_vma) 0x2fff)
9102 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
9103 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
9104 | ((offset >> 1) & 0x7ff);
9105 bfd_put_16 (abfd, upper, insn);
9106 bfd_put_16 (abfd, lower, insn + 2);
9107 }
9108
9109 /* Thumb code calling an ARM function. */
9110
9111 static int
9112 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
9113 const char * name,
9114 bfd * input_bfd,
9115 bfd * output_bfd,
9116 asection * input_section,
9117 bfd_byte * hit_data,
9118 asection * sym_sec,
9119 bfd_vma offset,
9120 bfd_signed_vma addend,
9121 bfd_vma val,
9122 char **error_message)
9123 {
9124 asection * s = 0;
9125 bfd_vma my_offset;
9126 long int ret_offset;
9127 struct elf_link_hash_entry * myh;
9128 struct elf32_arm_link_hash_table * globals;
9129
9130 myh = find_thumb_glue (info, name, error_message);
9131 if (myh == NULL)
9132 return false;
9133
9134 globals = elf32_arm_hash_table (info);
9135 BFD_ASSERT (globals != NULL);
9136 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9137
9138 my_offset = myh->root.u.def.value;
9139
9140 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9141 THUMB2ARM_GLUE_SECTION_NAME);
9142
9143 BFD_ASSERT (s != NULL);
9144 BFD_ASSERT (s->contents != NULL);
9145 BFD_ASSERT (s->output_section != NULL);
9146
9147 if ((my_offset & 0x01) == 0x01)
9148 {
9149 if (sym_sec != NULL
9150 && sym_sec->owner != NULL
9151 && !INTERWORK_FLAG (sym_sec->owner))
9152 {
9153 _bfd_error_handler
9154 (_("%pB(%s): warning: interworking not enabled;"
9155 " first occurrence: %pB: %s call to %s"),
9156 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
9157
9158 return false;
9159 }
9160
9161 --my_offset;
9162 myh->root.u.def.value = my_offset;
9163
9164 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
9165 s->contents + my_offset);
9166
9167 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
9168 s->contents + my_offset + 2);
9169
9170 ret_offset =
9171 /* Address of destination of the stub. */
9172 ((bfd_signed_vma) val)
9173 - ((bfd_signed_vma)
9174 /* Offset from the start of the current section
9175 to the start of the stubs. */
9176 (s->output_offset
9177 /* Offset of the start of this stub from the start of the stubs. */
9178 + my_offset
9179 /* Address of the start of the current section. */
9180 + s->output_section->vma)
9181 /* The branch instruction is 4 bytes into the stub. */
9182 + 4
9183 /* ARM branches work from the pc of the instruction + 8. */
9184 + 8);
9185
9186 put_arm_insn (globals, output_bfd,
9187 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
9188 s->contents + my_offset + 4);
9189 }
9190
9191 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
9192
9193 /* Now go back and fix up the original BL insn to point to here. */
9194 ret_offset =
9195 /* Address of where the stub is located. */
9196 (s->output_section->vma + s->output_offset + my_offset)
9197 /* Address of where the BL is located. */
9198 - (input_section->output_section->vma + input_section->output_offset
9199 + offset)
9200 /* Addend in the relocation. */
9201 - addend
9202 /* Biassing for PC-relative addressing. */
9203 - 8;
9204
9205 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
9206
9207 return true;
9208 }
9209
9210 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9211
9212 static struct elf_link_hash_entry *
9213 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
9214 const char * name,
9215 bfd * input_bfd,
9216 bfd * output_bfd,
9217 asection * sym_sec,
9218 bfd_vma val,
9219 asection * s,
9220 char ** error_message)
9221 {
9222 bfd_vma my_offset;
9223 long int ret_offset;
9224 struct elf_link_hash_entry * myh;
9225 struct elf32_arm_link_hash_table * globals;
9226
9227 myh = find_arm_glue (info, name, error_message);
9228 if (myh == NULL)
9229 return NULL;
9230
9231 globals = elf32_arm_hash_table (info);
9232 BFD_ASSERT (globals != NULL);
9233 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9234
9235 my_offset = myh->root.u.def.value;
9236
9237 if ((my_offset & 0x01) == 0x01)
9238 {
9239 if (sym_sec != NULL
9240 && sym_sec->owner != NULL
9241 && !INTERWORK_FLAG (sym_sec->owner))
9242 {
9243 _bfd_error_handler
9244 (_("%pB(%s): warning: interworking not enabled;"
9245 " first occurrence: %pB: %s call to %s"),
9246 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
9247 }
9248
9249 --my_offset;
9250 myh->root.u.def.value = my_offset;
9251
9252 if (bfd_link_pic (info)
9253 || globals->root.is_relocatable_executable
9254 || globals->pic_veneer)
9255 {
9256 /* For relocatable objects we can't use absolute addresses,
9257 so construct the address from a relative offset. */
9258 /* TODO: If the offset is small it's probably worth
9259 constructing the address with adds. */
9260 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
9261 s->contents + my_offset);
9262 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
9263 s->contents + my_offset + 4);
9264 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
9265 s->contents + my_offset + 8);
9266 /* Adjust the offset by 4 for the position of the add,
9267 and 8 for the pipeline offset. */
9268 ret_offset = (val - (s->output_offset
9269 + s->output_section->vma
9270 + my_offset + 12))
9271 | 1;
9272 bfd_put_32 (output_bfd, ret_offset,
9273 s->contents + my_offset + 12);
9274 }
9275 else if (globals->use_blx)
9276 {
9277 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
9278 s->contents + my_offset);
9279
9280 /* It's a thumb address. Add the low order bit. */
9281 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
9282 s->contents + my_offset + 4);
9283 }
9284 else
9285 {
9286 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
9287 s->contents + my_offset);
9288
9289 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
9290 s->contents + my_offset + 4);
9291
9292 /* It's a thumb address. Add the low order bit. */
9293 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
9294 s->contents + my_offset + 8);
9295
9296 my_offset += 12;
9297 }
9298 }
9299
9300 BFD_ASSERT (my_offset <= globals->arm_glue_size);
9301
9302 return myh;
9303 }
9304
9305 /* Arm code calling a Thumb function. */
9306
9307 static int
9308 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
9309 const char * name,
9310 bfd * input_bfd,
9311 bfd * output_bfd,
9312 asection * input_section,
9313 bfd_byte * hit_data,
9314 asection * sym_sec,
9315 bfd_vma offset,
9316 bfd_signed_vma addend,
9317 bfd_vma val,
9318 char **error_message)
9319 {
9320 unsigned long int tmp;
9321 bfd_vma my_offset;
9322 asection * s;
9323 long int ret_offset;
9324 struct elf_link_hash_entry * myh;
9325 struct elf32_arm_link_hash_table * globals;
9326
9327 globals = elf32_arm_hash_table (info);
9328 BFD_ASSERT (globals != NULL);
9329 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9330
9331 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9332 ARM2THUMB_GLUE_SECTION_NAME);
9333 BFD_ASSERT (s != NULL);
9334 BFD_ASSERT (s->contents != NULL);
9335 BFD_ASSERT (s->output_section != NULL);
9336
9337 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9338 sym_sec, val, s, error_message);
9339 if (!myh)
9340 return false;
9341
9342 my_offset = myh->root.u.def.value;
9343 tmp = bfd_get_32 (input_bfd, hit_data);
9344 tmp = tmp & 0xFF000000;
9345
9346 /* Somehow these are both 4 too far, so subtract 8. */
9347 ret_offset = (s->output_offset
9348 + my_offset
9349 + s->output_section->vma
9350 - (input_section->output_offset
9351 + input_section->output_section->vma
9352 + offset + addend)
9353 - 8);
9354
9355 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9356
9357 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9358
9359 return true;
9360 }
9361
9362 /* Populate Arm stub for an exported Thumb function. */
9363
9364 static bool
9365 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9366 {
9367 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9368 asection * s;
9369 struct elf_link_hash_entry * myh;
9370 struct elf32_arm_link_hash_entry *eh;
9371 struct elf32_arm_link_hash_table * globals;
9372 asection *sec;
9373 bfd_vma val;
9374 char *error_message;
9375
9376 eh = elf32_arm_hash_entry (h);
9377 /* Allocate stubs for exported Thumb functions on v4t. */
9378 if (eh->export_glue == NULL)
9379 return true;
9380
9381 globals = elf32_arm_hash_table (info);
9382 BFD_ASSERT (globals != NULL);
9383 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9384
9385 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9386 ARM2THUMB_GLUE_SECTION_NAME);
9387 BFD_ASSERT (s != NULL);
9388 BFD_ASSERT (s->contents != NULL);
9389 BFD_ASSERT (s->output_section != NULL);
9390
9391 sec = eh->export_glue->root.u.def.section;
9392
9393 BFD_ASSERT (sec->output_section != NULL);
9394
9395 val = eh->export_glue->root.u.def.value + sec->output_offset
9396 + sec->output_section->vma;
9397
9398 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9399 h->root.u.def.section->owner,
9400 globals->obfd, sec, val, s,
9401 &error_message);
9402 BFD_ASSERT (myh);
9403 return true;
9404 }
9405
9406 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9407
9408 static bfd_vma
9409 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9410 {
9411 bfd_byte *p;
9412 bfd_vma glue_addr;
9413 asection *s;
9414 struct elf32_arm_link_hash_table *globals;
9415
9416 globals = elf32_arm_hash_table (info);
9417 BFD_ASSERT (globals != NULL);
9418 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9419
9420 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9421 ARM_BX_GLUE_SECTION_NAME);
9422 BFD_ASSERT (s != NULL);
9423 BFD_ASSERT (s->contents != NULL);
9424 BFD_ASSERT (s->output_section != NULL);
9425
9426 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9427
9428 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9429
9430 if ((globals->bx_glue_offset[reg] & 1) == 0)
9431 {
9432 p = s->contents + glue_addr;
9433 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9434 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9435 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9436 globals->bx_glue_offset[reg] |= 1;
9437 }
9438
9439 return glue_addr + s->output_section->vma + s->output_offset;
9440 }
9441
9442 /* Generate Arm stubs for exported Thumb symbols. */
9443 static void
9444 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9445 struct bfd_link_info *link_info)
9446 {
9447 struct elf32_arm_link_hash_table * globals;
9448
9449 if (link_info == NULL)
9450 /* Ignore this if we are not called by the ELF backend linker. */
9451 return;
9452
9453 globals = elf32_arm_hash_table (link_info);
9454 if (globals == NULL)
9455 return;
9456
9457 /* If blx is available then exported Thumb symbols are OK and there is
9458 nothing to do. */
9459 if (globals->use_blx)
9460 return;
9461
9462 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9463 link_info);
9464 }
9465
9466 /* Reserve space for COUNT dynamic relocations in relocation selection
9467 SRELOC. */
9468
9469 static void
9470 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9471 bfd_size_type count)
9472 {
9473 struct elf32_arm_link_hash_table *htab;
9474
9475 htab = elf32_arm_hash_table (info);
9476 BFD_ASSERT (htab->root.dynamic_sections_created);
9477 if (sreloc == NULL)
9478 abort ();
9479 sreloc->size += RELOC_SIZE (htab) * count;
9480 }
9481
9482 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9483 dynamic, the relocations should go in SRELOC, otherwise they should
9484 go in the special .rel.iplt section. */
9485
9486 static void
9487 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9488 bfd_size_type count)
9489 {
9490 struct elf32_arm_link_hash_table *htab;
9491
9492 htab = elf32_arm_hash_table (info);
9493 if (!htab->root.dynamic_sections_created)
9494 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9495 else
9496 {
9497 BFD_ASSERT (sreloc != NULL);
9498 sreloc->size += RELOC_SIZE (htab) * count;
9499 }
9500 }
9501
9502 /* Add relocation REL to the end of relocation section SRELOC. */
9503
9504 static void
9505 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9506 asection *sreloc, Elf_Internal_Rela *rel)
9507 {
9508 bfd_byte *loc;
9509 struct elf32_arm_link_hash_table *htab;
9510
9511 htab = elf32_arm_hash_table (info);
9512 if (!htab->root.dynamic_sections_created
9513 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9514 sreloc = htab->root.irelplt;
9515 if (sreloc == NULL)
9516 abort ();
9517 loc = sreloc->contents;
9518 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9519 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9520 abort ();
9521 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9522 }
9523
9524 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9525 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9526 to .plt. */
9527
9528 static void
9529 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9530 bool is_iplt_entry,
9531 union gotplt_union *root_plt,
9532 struct arm_plt_info *arm_plt)
9533 {
9534 struct elf32_arm_link_hash_table *htab;
9535 asection *splt;
9536 asection *sgotplt;
9537
9538 htab = elf32_arm_hash_table (info);
9539
9540 if (is_iplt_entry)
9541 {
9542 splt = htab->root.iplt;
9543 sgotplt = htab->root.igotplt;
9544
9545 /* NaCl uses a special first entry in .iplt too. */
9546 if (htab->root.target_os == is_nacl && splt->size == 0)
9547 splt->size += htab->plt_header_size;
9548
9549 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9550 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9551 }
9552 else
9553 {
9554 splt = htab->root.splt;
9555 sgotplt = htab->root.sgotplt;
9556
9557 if (htab->fdpic_p)
9558 {
9559 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9560 /* For lazy binding, relocations will be put into .rel.plt, in
9561 .rel.got otherwise. */
9562 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9563 if (info->flags & DF_BIND_NOW)
9564 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
9565 else
9566 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9567 }
9568 else
9569 {
9570 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9571 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9572 }
9573
9574 /* If this is the first .plt entry, make room for the special
9575 first entry. */
9576 if (splt->size == 0)
9577 splt->size += htab->plt_header_size;
9578
9579 htab->next_tls_desc_index++;
9580 }
9581
9582 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9583 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9584 splt->size += PLT_THUMB_STUB_SIZE;
9585 root_plt->offset = splt->size;
9586 splt->size += htab->plt_entry_size;
9587
9588 /* We also need to make an entry in the .got.plt section, which
9589 will be placed in the .got section by the linker script. */
9590 if (is_iplt_entry)
9591 arm_plt->got_offset = sgotplt->size;
9592 else
9593 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9594 if (htab->fdpic_p)
9595 /* Function descriptor takes 64 bits in GOT. */
9596 sgotplt->size += 8;
9597 else
9598 sgotplt->size += 4;
9599 }
9600
9601 static bfd_vma
9602 arm_movw_immediate (bfd_vma value)
9603 {
9604 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9605 }
9606
9607 static bfd_vma
9608 arm_movt_immediate (bfd_vma value)
9609 {
9610 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9611 }
9612
9613 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9614 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9615 Otherwise, DYNINDX is the index of the symbol in the dynamic
9616 symbol table and SYM_VALUE is undefined.
9617
9618 ROOT_PLT points to the offset of the PLT entry from the start of its
9619 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9620 bookkeeping information.
9621
9622 Returns FALSE if there was a problem. */
9623
9624 static bool
9625 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9626 union gotplt_union *root_plt,
9627 struct arm_plt_info *arm_plt,
9628 int dynindx, bfd_vma sym_value)
9629 {
9630 struct elf32_arm_link_hash_table *htab;
9631 asection *sgot;
9632 asection *splt;
9633 asection *srel;
9634 bfd_byte *loc;
9635 bfd_vma plt_index;
9636 Elf_Internal_Rela rel;
9637 bfd_vma got_header_size;
9638
9639 htab = elf32_arm_hash_table (info);
9640
9641 /* Pick the appropriate sections and sizes. */
9642 if (dynindx == -1)
9643 {
9644 splt = htab->root.iplt;
9645 sgot = htab->root.igotplt;
9646 srel = htab->root.irelplt;
9647
9648 /* There are no reserved entries in .igot.plt, and no special
9649 first entry in .iplt. */
9650 got_header_size = 0;
9651 }
9652 else
9653 {
9654 splt = htab->root.splt;
9655 sgot = htab->root.sgotplt;
9656 srel = htab->root.srelplt;
9657
9658 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9659 }
9660 BFD_ASSERT (splt != NULL && srel != NULL);
9661
9662 bfd_vma got_offset, got_address, plt_address;
9663 bfd_vma got_displacement, initial_got_entry;
9664 bfd_byte * ptr;
9665
9666 BFD_ASSERT (sgot != NULL);
9667
9668 /* Get the offset into the .(i)got.plt table of the entry that
9669 corresponds to this function. */
9670 got_offset = (arm_plt->got_offset & -2);
9671
9672 /* Get the index in the procedure linkage table which
9673 corresponds to this symbol. This is the index of this symbol
9674 in all the symbols for which we are making plt entries.
9675 After the reserved .got.plt entries, all symbols appear in
9676 the same order as in .plt. */
9677 if (htab->fdpic_p)
9678 /* Function descriptor takes 8 bytes. */
9679 plt_index = (got_offset - got_header_size) / 8;
9680 else
9681 plt_index = (got_offset - got_header_size) / 4;
9682
9683 /* Calculate the address of the GOT entry. */
9684 got_address = (sgot->output_section->vma
9685 + sgot->output_offset
9686 + got_offset);
9687
9688 /* ...and the address of the PLT entry. */
9689 plt_address = (splt->output_section->vma
9690 + splt->output_offset
9691 + root_plt->offset);
9692
9693 ptr = splt->contents + root_plt->offset;
9694 if (htab->root.target_os == is_vxworks && bfd_link_pic (info))
9695 {
9696 unsigned int i;
9697 bfd_vma val;
9698
9699 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9700 {
9701 val = elf32_arm_vxworks_shared_plt_entry[i];
9702 if (i == 2)
9703 val |= got_address - sgot->output_section->vma;
9704 if (i == 5)
9705 val |= plt_index * RELOC_SIZE (htab);
9706 if (i == 2 || i == 5)
9707 bfd_put_32 (output_bfd, val, ptr);
9708 else
9709 put_arm_insn (htab, output_bfd, val, ptr);
9710 }
9711 }
9712 else if (htab->root.target_os == is_vxworks)
9713 {
9714 unsigned int i;
9715 bfd_vma val;
9716
9717 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9718 {
9719 val = elf32_arm_vxworks_exec_plt_entry[i];
9720 if (i == 2)
9721 val |= got_address;
9722 if (i == 4)
9723 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9724 if (i == 5)
9725 val |= plt_index * RELOC_SIZE (htab);
9726 if (i == 2 || i == 5)
9727 bfd_put_32 (output_bfd, val, ptr);
9728 else
9729 put_arm_insn (htab, output_bfd, val, ptr);
9730 }
9731
9732 loc = (htab->srelplt2->contents
9733 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9734
9735 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9736 referencing the GOT for this PLT entry. */
9737 rel.r_offset = plt_address + 8;
9738 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9739 rel.r_addend = got_offset;
9740 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9741 loc += RELOC_SIZE (htab);
9742
9743 /* Create the R_ARM_ABS32 relocation referencing the
9744 beginning of the PLT for this GOT entry. */
9745 rel.r_offset = got_address;
9746 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9747 rel.r_addend = 0;
9748 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9749 }
9750 else if (htab->root.target_os == is_nacl)
9751 {
9752 /* Calculate the displacement between the PLT slot and the
9753 common tail that's part of the special initial PLT slot. */
9754 int32_t tail_displacement
9755 = ((splt->output_section->vma + splt->output_offset
9756 + ARM_NACL_PLT_TAIL_OFFSET)
9757 - (plt_address + htab->plt_entry_size + 4));
9758 BFD_ASSERT ((tail_displacement & 3) == 0);
9759 tail_displacement >>= 2;
9760
9761 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9762 || (-tail_displacement & 0xff000000) == 0);
9763
9764 /* Calculate the displacement between the PLT slot and the entry
9765 in the GOT. The offset accounts for the value produced by
9766 adding to pc in the penultimate instruction of the PLT stub. */
9767 got_displacement = (got_address
9768 - (plt_address + htab->plt_entry_size));
9769
9770 /* NaCl does not support interworking at all. */
9771 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9772
9773 put_arm_insn (htab, output_bfd,
9774 elf32_arm_nacl_plt_entry[0]
9775 | arm_movw_immediate (got_displacement),
9776 ptr + 0);
9777 put_arm_insn (htab, output_bfd,
9778 elf32_arm_nacl_plt_entry[1]
9779 | arm_movt_immediate (got_displacement),
9780 ptr + 4);
9781 put_arm_insn (htab, output_bfd,
9782 elf32_arm_nacl_plt_entry[2],
9783 ptr + 8);
9784 put_arm_insn (htab, output_bfd,
9785 elf32_arm_nacl_plt_entry[3]
9786 | (tail_displacement & 0x00ffffff),
9787 ptr + 12);
9788 }
9789 else if (htab->fdpic_p)
9790 {
9791 const bfd_vma *plt_entry = using_thumb_only (htab)
9792 ? elf32_arm_fdpic_thumb_plt_entry
9793 : elf32_arm_fdpic_plt_entry;
9794
9795 /* Fill-up Thumb stub if needed. */
9796 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9797 {
9798 put_thumb_insn (htab, output_bfd,
9799 elf32_arm_plt_thumb_stub[0], ptr - 4);
9800 put_thumb_insn (htab, output_bfd,
9801 elf32_arm_plt_thumb_stub[1], ptr - 2);
9802 }
9803 /* As we are using 32 bit instructions even for the Thumb
9804 version, we have to use 'put_arm_insn' instead of
9805 'put_thumb_insn'. */
9806 put_arm_insn (htab, output_bfd, plt_entry[0], ptr + 0);
9807 put_arm_insn (htab, output_bfd, plt_entry[1], ptr + 4);
9808 put_arm_insn (htab, output_bfd, plt_entry[2], ptr + 8);
9809 put_arm_insn (htab, output_bfd, plt_entry[3], ptr + 12);
9810 bfd_put_32 (output_bfd, got_offset, ptr + 16);
9811
9812 if (!(info->flags & DF_BIND_NOW))
9813 {
9814 /* funcdesc_value_reloc_offset. */
9815 bfd_put_32 (output_bfd,
9816 htab->root.srelplt->reloc_count * RELOC_SIZE (htab),
9817 ptr + 20);
9818 put_arm_insn (htab, output_bfd, plt_entry[6], ptr + 24);
9819 put_arm_insn (htab, output_bfd, plt_entry[7], ptr + 28);
9820 put_arm_insn (htab, output_bfd, plt_entry[8], ptr + 32);
9821 put_arm_insn (htab, output_bfd, plt_entry[9], ptr + 36);
9822 }
9823 }
9824 else if (using_thumb_only (htab))
9825 {
9826 /* PR ld/16017: Generate thumb only PLT entries. */
9827 if (!using_thumb2 (htab))
9828 {
9829 /* FIXME: We ought to be able to generate thumb-1 PLT
9830 instructions... */
9831 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9832 output_bfd);
9833 return false;
9834 }
9835
9836 /* Calculate the displacement between the PLT slot and the entry in
9837 the GOT. The 12-byte offset accounts for the value produced by
9838 adding to pc in the 3rd instruction of the PLT stub. */
9839 got_displacement = got_address - (plt_address + 12);
9840
9841 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9842 instead of 'put_thumb_insn'. */
9843 put_arm_insn (htab, output_bfd,
9844 elf32_thumb2_plt_entry[0]
9845 | ((got_displacement & 0x000000ff) << 16)
9846 | ((got_displacement & 0x00000700) << 20)
9847 | ((got_displacement & 0x00000800) >> 1)
9848 | ((got_displacement & 0x0000f000) >> 12),
9849 ptr + 0);
9850 put_arm_insn (htab, output_bfd,
9851 elf32_thumb2_plt_entry[1]
9852 | ((got_displacement & 0x00ff0000) )
9853 | ((got_displacement & 0x07000000) << 4)
9854 | ((got_displacement & 0x08000000) >> 17)
9855 | ((got_displacement & 0xf0000000) >> 28),
9856 ptr + 4);
9857 put_arm_insn (htab, output_bfd,
9858 elf32_thumb2_plt_entry[2],
9859 ptr + 8);
9860 put_arm_insn (htab, output_bfd,
9861 elf32_thumb2_plt_entry[3],
9862 ptr + 12);
9863 }
9864 else
9865 {
9866 /* Calculate the displacement between the PLT slot and the
9867 entry in the GOT. The eight-byte offset accounts for the
9868 value produced by adding to pc in the first instruction
9869 of the PLT stub. */
9870 got_displacement = got_address - (plt_address + 8);
9871
9872 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9873 {
9874 put_thumb_insn (htab, output_bfd,
9875 elf32_arm_plt_thumb_stub[0], ptr - 4);
9876 put_thumb_insn (htab, output_bfd,
9877 elf32_arm_plt_thumb_stub[1], ptr - 2);
9878 }
9879
9880 if (!elf32_arm_use_long_plt_entry)
9881 {
9882 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9883
9884 put_arm_insn (htab, output_bfd,
9885 elf32_arm_plt_entry_short[0]
9886 | ((got_displacement & 0x0ff00000) >> 20),
9887 ptr + 0);
9888 put_arm_insn (htab, output_bfd,
9889 elf32_arm_plt_entry_short[1]
9890 | ((got_displacement & 0x000ff000) >> 12),
9891 ptr+ 4);
9892 put_arm_insn (htab, output_bfd,
9893 elf32_arm_plt_entry_short[2]
9894 | (got_displacement & 0x00000fff),
9895 ptr + 8);
9896 #ifdef FOUR_WORD_PLT
9897 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9898 #endif
9899 }
9900 else
9901 {
9902 put_arm_insn (htab, output_bfd,
9903 elf32_arm_plt_entry_long[0]
9904 | ((got_displacement & 0xf0000000) >> 28),
9905 ptr + 0);
9906 put_arm_insn (htab, output_bfd,
9907 elf32_arm_plt_entry_long[1]
9908 | ((got_displacement & 0x0ff00000) >> 20),
9909 ptr + 4);
9910 put_arm_insn (htab, output_bfd,
9911 elf32_arm_plt_entry_long[2]
9912 | ((got_displacement & 0x000ff000) >> 12),
9913 ptr+ 8);
9914 put_arm_insn (htab, output_bfd,
9915 elf32_arm_plt_entry_long[3]
9916 | (got_displacement & 0x00000fff),
9917 ptr + 12);
9918 }
9919 }
9920
9921 /* Fill in the entry in the .rel(a).(i)plt section. */
9922 rel.r_offset = got_address;
9923 rel.r_addend = 0;
9924 if (dynindx == -1)
9925 {
9926 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9927 The dynamic linker or static executable then calls SYM_VALUE
9928 to determine the correct run-time value of the .igot.plt entry. */
9929 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9930 initial_got_entry = sym_value;
9931 }
9932 else
9933 {
9934 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9935 used by PLT entry. */
9936 if (htab->fdpic_p)
9937 {
9938 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
9939 initial_got_entry = 0;
9940 }
9941 else
9942 {
9943 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9944 initial_got_entry = (splt->output_section->vma
9945 + splt->output_offset);
9946
9947 /* PR ld/16017
9948 When thumb only we need to set the LSB for any address that
9949 will be used with an interworking branch instruction. */
9950 if (using_thumb_only (htab))
9951 initial_got_entry |= 1;
9952 }
9953 }
9954
9955 /* Fill in the entry in the global offset table. */
9956 bfd_put_32 (output_bfd, initial_got_entry,
9957 sgot->contents + got_offset);
9958
9959 if (htab->fdpic_p && !(info->flags & DF_BIND_NOW))
9960 {
9961 /* Setup initial funcdesc value. */
9962 /* FIXME: we don't support lazy binding because there is a
9963 race condition between both words getting written and
9964 some other thread attempting to read them. The ARM
9965 architecture does not have an atomic 64 bit load/store
9966 instruction that could be used to prevent it; it is
9967 recommended that threaded FDPIC applications run with the
9968 LD_BIND_NOW environment variable set. */
9969 bfd_put_32 (output_bfd, plt_address + 0x18,
9970 sgot->contents + got_offset);
9971 bfd_put_32 (output_bfd, -1 /*TODO*/,
9972 sgot->contents + got_offset + 4);
9973 }
9974
9975 if (dynindx == -1)
9976 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9977 else
9978 {
9979 if (htab->fdpic_p)
9980 {
9981 /* For FDPIC we put PLT relocationss into .rel.got when not
9982 lazy binding otherwise we put them in .rel.plt. For now,
9983 we don't support lazy binding so put it in .rel.got. */
9984 if (info->flags & DF_BIND_NOW)
9985 elf32_arm_add_dynreloc (output_bfd, info, htab->root.srelgot, &rel);
9986 else
9987 elf32_arm_add_dynreloc (output_bfd, info, htab->root.srelplt, &rel);
9988 }
9989 else
9990 {
9991 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9992 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9993 }
9994 }
9995
9996 return true;
9997 }
9998
9999 /* Some relocations map to different relocations depending on the
10000 target. Return the real relocation. */
10001
10002 static int
10003 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
10004 int r_type)
10005 {
10006 switch (r_type)
10007 {
10008 case R_ARM_TARGET1:
10009 if (globals->target1_is_rel)
10010 return R_ARM_REL32;
10011 else
10012 return R_ARM_ABS32;
10013
10014 case R_ARM_TARGET2:
10015 return globals->target2_reloc;
10016
10017 default:
10018 return r_type;
10019 }
10020 }
10021
10022 /* Return the base VMA address which should be subtracted from real addresses
10023 when resolving @dtpoff relocation.
10024 This is PT_TLS segment p_vaddr. */
10025
10026 static bfd_vma
10027 dtpoff_base (struct bfd_link_info *info)
10028 {
10029 /* If tls_sec is NULL, we should have signalled an error already. */
10030 if (elf_hash_table (info)->tls_sec == NULL)
10031 return 0;
10032 return elf_hash_table (info)->tls_sec->vma;
10033 }
10034
10035 /* Return the relocation value for @tpoff relocation
10036 if STT_TLS virtual address is ADDRESS. */
10037
10038 static bfd_vma
10039 tpoff (struct bfd_link_info *info, bfd_vma address)
10040 {
10041 struct elf_link_hash_table *htab = elf_hash_table (info);
10042 bfd_vma base;
10043
10044 /* If tls_sec is NULL, we should have signalled an error already. */
10045 if (htab->tls_sec == NULL)
10046 return 0;
10047 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
10048 return address - htab->tls_sec->vma + base;
10049 }
10050
10051 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
10052 VALUE is the relocation value. */
10053
10054 static bfd_reloc_status_type
10055 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
10056 {
10057 if (value > 0xfff)
10058 return bfd_reloc_overflow;
10059
10060 value |= bfd_get_32 (abfd, data) & 0xfffff000;
10061 bfd_put_32 (abfd, value, data);
10062 return bfd_reloc_ok;
10063 }
10064
10065 /* Handle TLS relaxations. Relaxing is possible for symbols that use
10066 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10067 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10068
10069 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10070 is to then call final_link_relocate. Return other values in the
10071 case of error.
10072
10073 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10074 the pre-relaxed code. It would be nice if the relocs were updated
10075 to match the optimization. */
10076
10077 static bfd_reloc_status_type
10078 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
10079 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
10080 Elf_Internal_Rela *rel, unsigned long is_local)
10081 {
10082 unsigned long insn;
10083
10084 switch (ELF32_R_TYPE (rel->r_info))
10085 {
10086 default:
10087 return bfd_reloc_notsupported;
10088
10089 case R_ARM_TLS_GOTDESC:
10090 if (is_local)
10091 insn = 0;
10092 else
10093 {
10094 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10095 if (insn & 1)
10096 insn -= 5; /* THUMB */
10097 else
10098 insn -= 8; /* ARM */
10099 }
10100 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10101 return bfd_reloc_continue;
10102
10103 case R_ARM_THM_TLS_DESCSEQ:
10104 /* Thumb insn. */
10105 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
10106 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
10107 {
10108 if (is_local)
10109 /* nop */
10110 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10111 }
10112 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10113 {
10114 if (is_local)
10115 /* nop */
10116 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10117 else
10118 /* ldr rx,[ry] */
10119 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
10120 }
10121 else if ((insn & 0xff87) == 0x4780) /* blx rx */
10122 {
10123 if (is_local)
10124 /* nop */
10125 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10126 else
10127 /* mov r0, rx */
10128 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
10129 contents + rel->r_offset);
10130 }
10131 else
10132 {
10133 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10134 /* It's a 32 bit instruction, fetch the rest of it for
10135 error generation. */
10136 insn = (insn << 16)
10137 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
10138 _bfd_error_handler
10139 /* xgettext:c-format */
10140 (_("%pB(%pA+%#" PRIx64 "): "
10141 "unexpected %s instruction '%#lx' in TLS trampoline"),
10142 input_bfd, input_sec, (uint64_t) rel->r_offset,
10143 "Thumb", insn);
10144 return bfd_reloc_notsupported;
10145 }
10146 break;
10147
10148 case R_ARM_TLS_DESCSEQ:
10149 /* arm insn. */
10150 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10151 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10152 {
10153 if (is_local)
10154 /* mov rx, ry */
10155 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
10156 contents + rel->r_offset);
10157 }
10158 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10159 {
10160 if (is_local)
10161 /* nop */
10162 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10163 else
10164 /* ldr rx,[ry] */
10165 bfd_put_32 (input_bfd, insn & 0xfffff000,
10166 contents + rel->r_offset);
10167 }
10168 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
10169 {
10170 if (is_local)
10171 /* nop */
10172 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10173 else
10174 /* mov r0, rx */
10175 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
10176 contents + rel->r_offset);
10177 }
10178 else
10179 {
10180 _bfd_error_handler
10181 /* xgettext:c-format */
10182 (_("%pB(%pA+%#" PRIx64 "): "
10183 "unexpected %s instruction '%#lx' in TLS trampoline"),
10184 input_bfd, input_sec, (uint64_t) rel->r_offset,
10185 "ARM", insn);
10186 return bfd_reloc_notsupported;
10187 }
10188 break;
10189
10190 case R_ARM_TLS_CALL:
10191 /* GD->IE relaxation, turn the instruction into 'nop' or
10192 'ldr r0, [pc,r0]' */
10193 insn = is_local ? 0xe1a00000 : 0xe79f0000;
10194 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10195 break;
10196
10197 case R_ARM_THM_TLS_CALL:
10198 /* GD->IE relaxation. */
10199 if (!is_local)
10200 /* add r0,pc; ldr r0, [r0] */
10201 insn = 0x44786800;
10202 else if (using_thumb2 (globals))
10203 /* nop.w */
10204 insn = 0xf3af8000;
10205 else
10206 /* nop; nop */
10207 insn = 0xbf00bf00;
10208
10209 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
10210 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
10211 break;
10212 }
10213 return bfd_reloc_ok;
10214 }
10215
10216 /* For a given value of n, calculate the value of G_n as required to
10217 deal with group relocations. We return it in the form of an
10218 encoded constant-and-rotation, together with the final residual. If n is
10219 specified as less than zero, then final_residual is filled with the
10220 input value and no further action is performed. */
10221
10222 static bfd_vma
10223 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
10224 {
10225 int current_n;
10226 bfd_vma g_n;
10227 bfd_vma encoded_g_n = 0;
10228 bfd_vma residual = value; /* Also known as Y_n. */
10229
10230 for (current_n = 0; current_n <= n; current_n++)
10231 {
10232 int shift;
10233
10234 /* Calculate which part of the value to mask. */
10235 if (residual == 0)
10236 shift = 0;
10237 else
10238 {
10239 int msb;
10240
10241 /* Determine the most significant bit in the residual and
10242 align the resulting value to a 2-bit boundary. */
10243 for (msb = 30; msb >= 0; msb -= 2)
10244 if (residual & (3u << msb))
10245 break;
10246
10247 /* The desired shift is now (msb - 6), or zero, whichever
10248 is the greater. */
10249 shift = msb - 6;
10250 if (shift < 0)
10251 shift = 0;
10252 }
10253
10254 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10255 g_n = residual & (0xff << shift);
10256 encoded_g_n = (g_n >> shift)
10257 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
10258
10259 /* Calculate the residual for the next time around. */
10260 residual &= ~g_n;
10261 }
10262
10263 *final_residual = residual;
10264
10265 return encoded_g_n;
10266 }
10267
10268 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10269 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10270
10271 static int
10272 identify_add_or_sub (bfd_vma insn)
10273 {
10274 int opcode = insn & 0x1e00000;
10275
10276 if (opcode == 1 << 23) /* ADD */
10277 return 1;
10278
10279 if (opcode == 1 << 22) /* SUB */
10280 return -1;
10281
10282 return 0;
10283 }
10284
10285 /* Perform a relocation as part of a final link. */
10286
10287 static bfd_reloc_status_type
10288 elf32_arm_final_link_relocate (reloc_howto_type * howto,
10289 bfd * input_bfd,
10290 bfd * output_bfd,
10291 asection * input_section,
10292 bfd_byte * contents,
10293 Elf_Internal_Rela * rel,
10294 bfd_vma value,
10295 struct bfd_link_info * info,
10296 asection * sym_sec,
10297 const char * sym_name,
10298 unsigned char st_type,
10299 enum arm_st_branch_type branch_type,
10300 struct elf_link_hash_entry * h,
10301 bool * unresolved_reloc_p,
10302 char ** error_message)
10303 {
10304 unsigned long r_type = howto->type;
10305 unsigned long r_symndx;
10306 bfd_byte * hit_data = contents + rel->r_offset;
10307 bfd_vma * local_got_offsets;
10308 bfd_vma * local_tlsdesc_gotents;
10309 asection * sgot;
10310 asection * splt;
10311 asection * sreloc = NULL;
10312 asection * srelgot;
10313 bfd_vma addend;
10314 bfd_signed_vma signed_addend;
10315 unsigned char dynreloc_st_type;
10316 bfd_vma dynreloc_value;
10317 struct elf32_arm_link_hash_table * globals;
10318 struct elf32_arm_link_hash_entry *eh;
10319 union gotplt_union *root_plt;
10320 struct arm_plt_info *arm_plt;
10321 bfd_vma plt_offset;
10322 bfd_vma gotplt_offset;
10323 bool has_iplt_entry;
10324 bool resolved_to_zero;
10325
10326 globals = elf32_arm_hash_table (info);
10327 if (globals == NULL)
10328 return bfd_reloc_notsupported;
10329
10330 BFD_ASSERT (is_arm_elf (input_bfd));
10331 BFD_ASSERT (howto != NULL);
10332
10333 /* Some relocation types map to different relocations depending on the
10334 target. We pick the right one here. */
10335 r_type = arm_real_reloc_type (globals, r_type);
10336
10337 /* It is possible to have linker relaxations on some TLS access
10338 models. Update our information here. */
10339 r_type = elf32_arm_tls_transition (info, r_type, h);
10340
10341 if (r_type != howto->type)
10342 howto = elf32_arm_howto_from_type (r_type);
10343
10344 eh = (struct elf32_arm_link_hash_entry *) h;
10345 sgot = globals->root.sgot;
10346 local_got_offsets = elf_local_got_offsets (input_bfd);
10347 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
10348
10349 if (globals->root.dynamic_sections_created)
10350 srelgot = globals->root.srelgot;
10351 else
10352 srelgot = NULL;
10353
10354 r_symndx = ELF32_R_SYM (rel->r_info);
10355
10356 if (globals->use_rel)
10357 {
10358 bfd_vma sign;
10359
10360 switch (howto->size)
10361 {
10362 case 0: addend = bfd_get_8 (input_bfd, hit_data); break;
10363 case 1: addend = bfd_get_16 (input_bfd, hit_data); break;
10364 case 2: addend = bfd_get_32 (input_bfd, hit_data); break;
10365 default: addend = 0; break;
10366 }
10367 /* Note: the addend and signed_addend calculated here are
10368 incorrect for any split field. */
10369 addend &= howto->src_mask;
10370 sign = howto->src_mask & ~(howto->src_mask >> 1);
10371 signed_addend = (addend ^ sign) - sign;
10372 signed_addend = (bfd_vma) signed_addend << howto->rightshift;
10373 addend <<= howto->rightshift;
10374 }
10375 else
10376 addend = signed_addend = rel->r_addend;
10377
10378 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10379 are resolving a function call relocation. */
10380 if (using_thumb_only (globals)
10381 && (r_type == R_ARM_THM_CALL
10382 || r_type == R_ARM_THM_JUMP24)
10383 && branch_type == ST_BRANCH_TO_ARM)
10384 branch_type = ST_BRANCH_TO_THUMB;
10385
10386 /* Record the symbol information that should be used in dynamic
10387 relocations. */
10388 dynreloc_st_type = st_type;
10389 dynreloc_value = value;
10390 if (branch_type == ST_BRANCH_TO_THUMB)
10391 dynreloc_value |= 1;
10392
10393 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10394 VALUE appropriately for relocations that we resolve at link time. */
10395 has_iplt_entry = false;
10396 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
10397 &arm_plt)
10398 && root_plt->offset != (bfd_vma) -1)
10399 {
10400 plt_offset = root_plt->offset;
10401 gotplt_offset = arm_plt->got_offset;
10402
10403 if (h == NULL || eh->is_iplt)
10404 {
10405 has_iplt_entry = true;
10406 splt = globals->root.iplt;
10407
10408 /* Populate .iplt entries here, because not all of them will
10409 be seen by finish_dynamic_symbol. The lower bit is set if
10410 we have already populated the entry. */
10411 if (plt_offset & 1)
10412 plt_offset--;
10413 else
10414 {
10415 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10416 -1, dynreloc_value))
10417 root_plt->offset |= 1;
10418 else
10419 return bfd_reloc_notsupported;
10420 }
10421
10422 /* Static relocations always resolve to the .iplt entry. */
10423 st_type = STT_FUNC;
10424 value = (splt->output_section->vma
10425 + splt->output_offset
10426 + plt_offset);
10427 branch_type = ST_BRANCH_TO_ARM;
10428
10429 /* If there are non-call relocations that resolve to the .iplt
10430 entry, then all dynamic ones must too. */
10431 if (arm_plt->noncall_refcount != 0)
10432 {
10433 dynreloc_st_type = st_type;
10434 dynreloc_value = value;
10435 }
10436 }
10437 else
10438 /* We populate the .plt entry in finish_dynamic_symbol. */
10439 splt = globals->root.splt;
10440 }
10441 else
10442 {
10443 splt = NULL;
10444 plt_offset = (bfd_vma) -1;
10445 gotplt_offset = (bfd_vma) -1;
10446 }
10447
10448 resolved_to_zero = (h != NULL
10449 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
10450
10451 switch (r_type)
10452 {
10453 case R_ARM_NONE:
10454 /* We don't need to find a value for this symbol. It's just a
10455 marker. */
10456 *unresolved_reloc_p = false;
10457 return bfd_reloc_ok;
10458
10459 case R_ARM_ABS12:
10460 if (globals->root.target_os != is_vxworks)
10461 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10462 /* Fall through. */
10463
10464 case R_ARM_PC24:
10465 case R_ARM_ABS32:
10466 case R_ARM_ABS32_NOI:
10467 case R_ARM_REL32:
10468 case R_ARM_REL32_NOI:
10469 case R_ARM_CALL:
10470 case R_ARM_JUMP24:
10471 case R_ARM_XPC25:
10472 case R_ARM_PREL31:
10473 case R_ARM_PLT32:
10474 /* Handle relocations which should use the PLT entry. ABS32/REL32
10475 will use the symbol's value, which may point to a PLT entry, but we
10476 don't need to handle that here. If we created a PLT entry, all
10477 branches in this object should go to it, except if the PLT is too
10478 far away, in which case a long branch stub should be inserted. */
10479 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10480 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10481 && r_type != R_ARM_CALL
10482 && r_type != R_ARM_JUMP24
10483 && r_type != R_ARM_PLT32)
10484 && plt_offset != (bfd_vma) -1)
10485 {
10486 /* If we've created a .plt section, and assigned a PLT entry
10487 to this function, it must either be a STT_GNU_IFUNC reference
10488 or not be known to bind locally. In other cases, we should
10489 have cleared the PLT entry by now. */
10490 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10491
10492 value = (splt->output_section->vma
10493 + splt->output_offset
10494 + plt_offset);
10495 *unresolved_reloc_p = false;
10496 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10497 contents, rel->r_offset, value,
10498 rel->r_addend);
10499 }
10500
10501 /* When generating a shared object or relocatable executable, these
10502 relocations are copied into the output file to be resolved at
10503 run time. */
10504 if ((bfd_link_pic (info)
10505 || globals->root.is_relocatable_executable
10506 || globals->fdpic_p)
10507 && (input_section->flags & SEC_ALLOC)
10508 && !(globals->root.target_os == is_vxworks
10509 && strcmp (input_section->output_section->name,
10510 ".tls_vars") == 0)
10511 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10512 || !SYMBOL_CALLS_LOCAL (info, h))
10513 && !(input_bfd == globals->stub_bfd
10514 && strstr (input_section->name, STUB_SUFFIX))
10515 && (h == NULL
10516 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10517 && !resolved_to_zero)
10518 || h->root.type != bfd_link_hash_undefweak)
10519 && r_type != R_ARM_PC24
10520 && r_type != R_ARM_CALL
10521 && r_type != R_ARM_JUMP24
10522 && r_type != R_ARM_PREL31
10523 && r_type != R_ARM_PLT32)
10524 {
10525 Elf_Internal_Rela outrel;
10526 bool skip, relocate;
10527 int isrofixup = 0;
10528
10529 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10530 && !h->def_regular)
10531 {
10532 char *v = _("shared object");
10533
10534 if (bfd_link_executable (info))
10535 v = _("PIE executable");
10536
10537 _bfd_error_handler
10538 (_("%pB: relocation %s against external or undefined symbol `%s'"
10539 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10540 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10541 return bfd_reloc_notsupported;
10542 }
10543
10544 *unresolved_reloc_p = false;
10545
10546 if (sreloc == NULL && globals->root.dynamic_sections_created)
10547 {
10548 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10549 ! globals->use_rel);
10550
10551 if (sreloc == NULL)
10552 return bfd_reloc_notsupported;
10553 }
10554
10555 skip = false;
10556 relocate = false;
10557
10558 outrel.r_addend = addend;
10559 outrel.r_offset =
10560 _bfd_elf_section_offset (output_bfd, info, input_section,
10561 rel->r_offset);
10562 if (outrel.r_offset == (bfd_vma) -1)
10563 skip = true;
10564 else if (outrel.r_offset == (bfd_vma) -2)
10565 skip = true, relocate = true;
10566 outrel.r_offset += (input_section->output_section->vma
10567 + input_section->output_offset);
10568
10569 if (skip)
10570 memset (&outrel, 0, sizeof outrel);
10571 else if (h != NULL
10572 && h->dynindx != -1
10573 && (!bfd_link_pic (info)
10574 || !(bfd_link_pie (info)
10575 || SYMBOLIC_BIND (info, h))
10576 || !h->def_regular))
10577 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10578 else
10579 {
10580 int symbol;
10581
10582 /* This symbol is local, or marked to become local. */
10583 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI
10584 || (globals->fdpic_p && !bfd_link_pic (info)));
10585 /* On SVR4-ish systems, the dynamic loader cannot
10586 relocate the text and data segments independently,
10587 so the symbol does not matter. */
10588 symbol = 0;
10589 if (dynreloc_st_type == STT_GNU_IFUNC)
10590 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10591 to the .iplt entry. Instead, every non-call reference
10592 must use an R_ARM_IRELATIVE relocation to obtain the
10593 correct run-time address. */
10594 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10595 else if (globals->fdpic_p && !bfd_link_pic (info))
10596 isrofixup = 1;
10597 else
10598 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10599 if (globals->use_rel)
10600 relocate = true;
10601 else
10602 outrel.r_addend += dynreloc_value;
10603 }
10604
10605 if (isrofixup)
10606 arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset);
10607 else
10608 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10609
10610 /* If this reloc is against an external symbol, we do not want to
10611 fiddle with the addend. Otherwise, we need to include the symbol
10612 value so that it becomes an addend for the dynamic reloc. */
10613 if (! relocate)
10614 return bfd_reloc_ok;
10615
10616 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10617 contents, rel->r_offset,
10618 dynreloc_value, (bfd_vma) 0);
10619 }
10620 else switch (r_type)
10621 {
10622 case R_ARM_ABS12:
10623 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10624
10625 case R_ARM_XPC25: /* Arm BLX instruction. */
10626 case R_ARM_CALL:
10627 case R_ARM_JUMP24:
10628 case R_ARM_PC24: /* Arm B/BL instruction. */
10629 case R_ARM_PLT32:
10630 {
10631 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10632
10633 if (r_type == R_ARM_XPC25)
10634 {
10635 /* Check for Arm calling Arm function. */
10636 /* FIXME: Should we translate the instruction into a BL
10637 instruction instead ? */
10638 if (branch_type != ST_BRANCH_TO_THUMB)
10639 _bfd_error_handler
10640 (_("\%pB: warning: %s BLX instruction targets"
10641 " %s function '%s'"),
10642 input_bfd, "ARM",
10643 "ARM", h ? h->root.root.string : "(local)");
10644 }
10645 else if (r_type == R_ARM_PC24)
10646 {
10647 /* Check for Arm calling Thumb function. */
10648 if (branch_type == ST_BRANCH_TO_THUMB)
10649 {
10650 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10651 output_bfd, input_section,
10652 hit_data, sym_sec, rel->r_offset,
10653 signed_addend, value,
10654 error_message))
10655 return bfd_reloc_ok;
10656 else
10657 return bfd_reloc_dangerous;
10658 }
10659 }
10660
10661 /* Check if a stub has to be inserted because the
10662 destination is too far or we are changing mode. */
10663 if ( r_type == R_ARM_CALL
10664 || r_type == R_ARM_JUMP24
10665 || r_type == R_ARM_PLT32)
10666 {
10667 enum elf32_arm_stub_type stub_type = arm_stub_none;
10668 struct elf32_arm_link_hash_entry *hash;
10669
10670 hash = (struct elf32_arm_link_hash_entry *) h;
10671 stub_type = arm_type_of_stub (info, input_section, rel,
10672 st_type, &branch_type,
10673 hash, value, sym_sec,
10674 input_bfd, sym_name);
10675
10676 if (stub_type != arm_stub_none)
10677 {
10678 /* The target is out of reach, so redirect the
10679 branch to the local stub for this function. */
10680 stub_entry = elf32_arm_get_stub_entry (input_section,
10681 sym_sec, h,
10682 rel, globals,
10683 stub_type);
10684 {
10685 if (stub_entry != NULL)
10686 value = (stub_entry->stub_offset
10687 + stub_entry->stub_sec->output_offset
10688 + stub_entry->stub_sec->output_section->vma);
10689
10690 if (plt_offset != (bfd_vma) -1)
10691 *unresolved_reloc_p = false;
10692 }
10693 }
10694 else
10695 {
10696 /* If the call goes through a PLT entry, make sure to
10697 check distance to the right destination address. */
10698 if (plt_offset != (bfd_vma) -1)
10699 {
10700 value = (splt->output_section->vma
10701 + splt->output_offset
10702 + plt_offset);
10703 *unresolved_reloc_p = false;
10704 /* The PLT entry is in ARM mode, regardless of the
10705 target function. */
10706 branch_type = ST_BRANCH_TO_ARM;
10707 }
10708 }
10709 }
10710
10711 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10712 where:
10713 S is the address of the symbol in the relocation.
10714 P is address of the instruction being relocated.
10715 A is the addend (extracted from the instruction) in bytes.
10716
10717 S is held in 'value'.
10718 P is the base address of the section containing the
10719 instruction plus the offset of the reloc into that
10720 section, ie:
10721 (input_section->output_section->vma +
10722 input_section->output_offset +
10723 rel->r_offset).
10724 A is the addend, converted into bytes, ie:
10725 (signed_addend * 4)
10726
10727 Note: None of these operations have knowledge of the pipeline
10728 size of the processor, thus it is up to the assembler to
10729 encode this information into the addend. */
10730 value -= (input_section->output_section->vma
10731 + input_section->output_offset);
10732 value -= rel->r_offset;
10733 value += signed_addend;
10734
10735 signed_addend = value;
10736 signed_addend >>= howto->rightshift;
10737
10738 /* A branch to an undefined weak symbol is turned into a jump to
10739 the next instruction unless a PLT entry will be created.
10740 Do the same for local undefined symbols (but not for STN_UNDEF).
10741 The jump to the next instruction is optimized as a NOP depending
10742 on the architecture. */
10743 if (h ? (h->root.type == bfd_link_hash_undefweak
10744 && plt_offset == (bfd_vma) -1)
10745 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10746 {
10747 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10748
10749 if (arch_has_arm_nop (globals))
10750 value |= 0x0320f000;
10751 else
10752 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10753 }
10754 else
10755 {
10756 /* Perform a signed range check. */
10757 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10758 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10759 return bfd_reloc_overflow;
10760
10761 addend = (value & 2);
10762
10763 value = (signed_addend & howto->dst_mask)
10764 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10765
10766 if (r_type == R_ARM_CALL)
10767 {
10768 /* Set the H bit in the BLX instruction. */
10769 if (branch_type == ST_BRANCH_TO_THUMB)
10770 {
10771 if (addend)
10772 value |= (1 << 24);
10773 else
10774 value &= ~(bfd_vma)(1 << 24);
10775 }
10776
10777 /* Select the correct instruction (BL or BLX). */
10778 /* Only if we are not handling a BL to a stub. In this
10779 case, mode switching is performed by the stub. */
10780 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10781 value |= (1 << 28);
10782 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10783 {
10784 value &= ~(bfd_vma)(1 << 28);
10785 value |= (1 << 24);
10786 }
10787 }
10788 }
10789 }
10790 break;
10791
10792 case R_ARM_ABS32:
10793 value += addend;
10794 if (branch_type == ST_BRANCH_TO_THUMB)
10795 value |= 1;
10796 break;
10797
10798 case R_ARM_ABS32_NOI:
10799 value += addend;
10800 break;
10801
10802 case R_ARM_REL32:
10803 value += addend;
10804 if (branch_type == ST_BRANCH_TO_THUMB)
10805 value |= 1;
10806 value -= (input_section->output_section->vma
10807 + input_section->output_offset + rel->r_offset);
10808 break;
10809
10810 case R_ARM_REL32_NOI:
10811 value += addend;
10812 value -= (input_section->output_section->vma
10813 + input_section->output_offset + rel->r_offset);
10814 break;
10815
10816 case R_ARM_PREL31:
10817 value -= (input_section->output_section->vma
10818 + input_section->output_offset + rel->r_offset);
10819 value += signed_addend;
10820 if (! h || h->root.type != bfd_link_hash_undefweak)
10821 {
10822 /* Check for overflow. */
10823 if ((value ^ (value >> 1)) & (1 << 30))
10824 return bfd_reloc_overflow;
10825 }
10826 value &= 0x7fffffff;
10827 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10828 if (branch_type == ST_BRANCH_TO_THUMB)
10829 value |= 1;
10830 break;
10831 }
10832
10833 bfd_put_32 (input_bfd, value, hit_data);
10834 return bfd_reloc_ok;
10835
10836 case R_ARM_ABS8:
10837 value += addend;
10838
10839 /* There is no way to tell whether the user intended to use a signed or
10840 unsigned addend. When checking for overflow we accept either,
10841 as specified by the AAELF. */
10842 if ((long) value > 0xff || (long) value < -0x80)
10843 return bfd_reloc_overflow;
10844
10845 bfd_put_8 (input_bfd, value, hit_data);
10846 return bfd_reloc_ok;
10847
10848 case R_ARM_ABS16:
10849 value += addend;
10850
10851 /* See comment for R_ARM_ABS8. */
10852 if ((long) value > 0xffff || (long) value < -0x8000)
10853 return bfd_reloc_overflow;
10854
10855 bfd_put_16 (input_bfd, value, hit_data);
10856 return bfd_reloc_ok;
10857
10858 case R_ARM_THM_ABS5:
10859 /* Support ldr and str instructions for the thumb. */
10860 if (globals->use_rel)
10861 {
10862 /* Need to refetch addend. */
10863 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10864 /* ??? Need to determine shift amount from operand size. */
10865 addend >>= howto->rightshift;
10866 }
10867 value += addend;
10868
10869 /* ??? Isn't value unsigned? */
10870 if ((long) value > 0x1f || (long) value < -0x10)
10871 return bfd_reloc_overflow;
10872
10873 /* ??? Value needs to be properly shifted into place first. */
10874 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10875 bfd_put_16 (input_bfd, value, hit_data);
10876 return bfd_reloc_ok;
10877
10878 case R_ARM_THM_ALU_PREL_11_0:
10879 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10880 {
10881 bfd_vma insn;
10882 bfd_signed_vma relocation;
10883
10884 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10885 | bfd_get_16 (input_bfd, hit_data + 2);
10886
10887 if (globals->use_rel)
10888 {
10889 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10890 | ((insn & (1 << 26)) >> 15);
10891 if (insn & 0xf00000)
10892 signed_addend = -signed_addend;
10893 }
10894
10895 relocation = value + signed_addend;
10896 relocation -= Pa (input_section->output_section->vma
10897 + input_section->output_offset
10898 + rel->r_offset);
10899
10900 /* PR 21523: Use an absolute value. The user of this reloc will
10901 have already selected an ADD or SUB insn appropriately. */
10902 value = llabs (relocation);
10903
10904 if (value >= 0x1000)
10905 return bfd_reloc_overflow;
10906
10907 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10908 if (branch_type == ST_BRANCH_TO_THUMB)
10909 value |= 1;
10910
10911 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10912 | ((value & 0x700) << 4)
10913 | ((value & 0x800) << 15);
10914 if (relocation < 0)
10915 insn |= 0xa00000;
10916
10917 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10918 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10919
10920 return bfd_reloc_ok;
10921 }
10922
10923 case R_ARM_THM_PC8:
10924 /* PR 10073: This reloc is not generated by the GNU toolchain,
10925 but it is supported for compatibility with third party libraries
10926 generated by other compilers, specifically the ARM/IAR. */
10927 {
10928 bfd_vma insn;
10929 bfd_signed_vma relocation;
10930
10931 insn = bfd_get_16 (input_bfd, hit_data);
10932
10933 if (globals->use_rel)
10934 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10935
10936 relocation = value + addend;
10937 relocation -= Pa (input_section->output_section->vma
10938 + input_section->output_offset
10939 + rel->r_offset);
10940
10941 value = relocation;
10942
10943 /* We do not check for overflow of this reloc. Although strictly
10944 speaking this is incorrect, it appears to be necessary in order
10945 to work with IAR generated relocs. Since GCC and GAS do not
10946 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10947 a problem for them. */
10948 value &= 0x3fc;
10949
10950 insn = (insn & 0xff00) | (value >> 2);
10951
10952 bfd_put_16 (input_bfd, insn, hit_data);
10953
10954 return bfd_reloc_ok;
10955 }
10956
10957 case R_ARM_THM_PC12:
10958 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10959 {
10960 bfd_vma insn;
10961 bfd_signed_vma relocation;
10962
10963 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10964 | bfd_get_16 (input_bfd, hit_data + 2);
10965
10966 if (globals->use_rel)
10967 {
10968 signed_addend = insn & 0xfff;
10969 if (!(insn & (1 << 23)))
10970 signed_addend = -signed_addend;
10971 }
10972
10973 relocation = value + signed_addend;
10974 relocation -= Pa (input_section->output_section->vma
10975 + input_section->output_offset
10976 + rel->r_offset);
10977
10978 value = relocation;
10979
10980 if (value >= 0x1000)
10981 return bfd_reloc_overflow;
10982
10983 insn = (insn & 0xff7ff000) | value;
10984 if (relocation >= 0)
10985 insn |= (1 << 23);
10986
10987 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10988 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10989
10990 return bfd_reloc_ok;
10991 }
10992
10993 case R_ARM_THM_XPC22:
10994 case R_ARM_THM_CALL:
10995 case R_ARM_THM_JUMP24:
10996 /* Thumb BL (branch long instruction). */
10997 {
10998 bfd_vma relocation;
10999 bfd_vma reloc_sign;
11000 bool overflow = false;
11001 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11002 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11003 bfd_signed_vma reloc_signed_max;
11004 bfd_signed_vma reloc_signed_min;
11005 bfd_vma check;
11006 bfd_signed_vma signed_check;
11007 int bitsize;
11008 const int thumb2 = using_thumb2 (globals);
11009 const int thumb2_bl = using_thumb2_bl (globals);
11010
11011 /* A branch to an undefined weak symbol is turned into a jump to
11012 the next instruction unless a PLT entry will be created.
11013 The jump to the next instruction is optimized as a NOP.W for
11014 Thumb-2 enabled architectures. */
11015 if (h && h->root.type == bfd_link_hash_undefweak
11016 && plt_offset == (bfd_vma) -1)
11017 {
11018 if (thumb2)
11019 {
11020 bfd_put_16 (input_bfd, 0xf3af, hit_data);
11021 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
11022 }
11023 else
11024 {
11025 bfd_put_16 (input_bfd, 0xe000, hit_data);
11026 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
11027 }
11028 return bfd_reloc_ok;
11029 }
11030
11031 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
11032 with Thumb-1) involving the J1 and J2 bits. */
11033 if (globals->use_rel)
11034 {
11035 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
11036 bfd_vma upper = upper_insn & 0x3ff;
11037 bfd_vma lower = lower_insn & 0x7ff;
11038 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
11039 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
11040 bfd_vma i1 = j1 ^ s ? 0 : 1;
11041 bfd_vma i2 = j2 ^ s ? 0 : 1;
11042
11043 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
11044 /* Sign extend. */
11045 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
11046
11047 signed_addend = addend;
11048 }
11049
11050 if (r_type == R_ARM_THM_XPC22)
11051 {
11052 /* Check for Thumb to Thumb call. */
11053 /* FIXME: Should we translate the instruction into a BL
11054 instruction instead ? */
11055 if (branch_type == ST_BRANCH_TO_THUMB)
11056 _bfd_error_handler
11057 (_("%pB: warning: %s BLX instruction targets"
11058 " %s function '%s'"),
11059 input_bfd, "Thumb",
11060 "Thumb", h ? h->root.root.string : "(local)");
11061 }
11062 else
11063 {
11064 /* If it is not a call to Thumb, assume call to Arm.
11065 If it is a call relative to a section name, then it is not a
11066 function call at all, but rather a long jump. Calls through
11067 the PLT do not require stubs. */
11068 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
11069 {
11070 if (globals->use_blx && r_type == R_ARM_THM_CALL)
11071 {
11072 /* Convert BL to BLX. */
11073 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11074 }
11075 else if (( r_type != R_ARM_THM_CALL)
11076 && (r_type != R_ARM_THM_JUMP24))
11077 {
11078 if (elf32_thumb_to_arm_stub
11079 (info, sym_name, input_bfd, output_bfd, input_section,
11080 hit_data, sym_sec, rel->r_offset, signed_addend, value,
11081 error_message))
11082 return bfd_reloc_ok;
11083 else
11084 return bfd_reloc_dangerous;
11085 }
11086 }
11087 else if (branch_type == ST_BRANCH_TO_THUMB
11088 && globals->use_blx
11089 && r_type == R_ARM_THM_CALL)
11090 {
11091 /* Make sure this is a BL. */
11092 lower_insn |= 0x1800;
11093 }
11094 }
11095
11096 enum elf32_arm_stub_type stub_type = arm_stub_none;
11097 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
11098 {
11099 /* Check if a stub has to be inserted because the destination
11100 is too far. */
11101 struct elf32_arm_stub_hash_entry *stub_entry;
11102 struct elf32_arm_link_hash_entry *hash;
11103
11104 hash = (struct elf32_arm_link_hash_entry *) h;
11105
11106 stub_type = arm_type_of_stub (info, input_section, rel,
11107 st_type, &branch_type,
11108 hash, value, sym_sec,
11109 input_bfd, sym_name);
11110
11111 if (stub_type != arm_stub_none)
11112 {
11113 /* The target is out of reach or we are changing modes, so
11114 redirect the branch to the local stub for this
11115 function. */
11116 stub_entry = elf32_arm_get_stub_entry (input_section,
11117 sym_sec, h,
11118 rel, globals,
11119 stub_type);
11120 if (stub_entry != NULL)
11121 {
11122 value = (stub_entry->stub_offset
11123 + stub_entry->stub_sec->output_offset
11124 + stub_entry->stub_sec->output_section->vma);
11125
11126 if (plt_offset != (bfd_vma) -1)
11127 *unresolved_reloc_p = false;
11128 }
11129
11130 /* If this call becomes a call to Arm, force BLX. */
11131 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
11132 {
11133 if ((stub_entry
11134 && !arm_stub_is_thumb (stub_entry->stub_type))
11135 || branch_type != ST_BRANCH_TO_THUMB)
11136 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11137 }
11138 }
11139 }
11140
11141 /* Handle calls via the PLT. */
11142 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
11143 {
11144 value = (splt->output_section->vma
11145 + splt->output_offset
11146 + plt_offset);
11147
11148 if (globals->use_blx
11149 && r_type == R_ARM_THM_CALL
11150 && ! using_thumb_only (globals))
11151 {
11152 /* If the Thumb BLX instruction is available, convert
11153 the BL to a BLX instruction to call the ARM-mode
11154 PLT entry. */
11155 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11156 branch_type = ST_BRANCH_TO_ARM;
11157 }
11158 else
11159 {
11160 if (! using_thumb_only (globals))
11161 /* Target the Thumb stub before the ARM PLT entry. */
11162 value -= PLT_THUMB_STUB_SIZE;
11163 branch_type = ST_BRANCH_TO_THUMB;
11164 }
11165 *unresolved_reloc_p = false;
11166 }
11167
11168 relocation = value + signed_addend;
11169
11170 relocation -= (input_section->output_section->vma
11171 + input_section->output_offset
11172 + rel->r_offset);
11173
11174 check = relocation >> howto->rightshift;
11175
11176 /* If this is a signed value, the rightshift just dropped
11177 leading 1 bits (assuming twos complement). */
11178 if ((bfd_signed_vma) relocation >= 0)
11179 signed_check = check;
11180 else
11181 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
11182
11183 /* Calculate the permissable maximum and minimum values for
11184 this relocation according to whether we're relocating for
11185 Thumb-2 or not. */
11186 bitsize = howto->bitsize;
11187 if (!thumb2_bl)
11188 bitsize -= 2;
11189 reloc_signed_max = (1 << (bitsize - 1)) - 1;
11190 reloc_signed_min = ~reloc_signed_max;
11191
11192 /* Assumes two's complement. */
11193 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11194 overflow = true;
11195
11196 if ((lower_insn & 0x5000) == 0x4000)
11197 /* For a BLX instruction, make sure that the relocation is rounded up
11198 to a word boundary. This follows the semantics of the instruction
11199 which specifies that bit 1 of the target address will come from bit
11200 1 of the base address. */
11201 relocation = (relocation + 2) & ~ 3;
11202
11203 /* Put RELOCATION back into the insn. Assumes two's complement.
11204 We use the Thumb-2 encoding, which is safe even if dealing with
11205 a Thumb-1 instruction by virtue of our overflow check above. */
11206 reloc_sign = (signed_check < 0) ? 1 : 0;
11207 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
11208 | ((relocation >> 12) & 0x3ff)
11209 | (reloc_sign << 10);
11210 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
11211 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
11212 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
11213 | ((relocation >> 1) & 0x7ff);
11214
11215 /* Put the relocated value back in the object file: */
11216 bfd_put_16 (input_bfd, upper_insn, hit_data);
11217 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11218
11219 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11220 }
11221 break;
11222
11223 case R_ARM_THM_JUMP19:
11224 /* Thumb32 conditional branch instruction. */
11225 {
11226 bfd_vma relocation;
11227 bool overflow = false;
11228 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11229 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11230 bfd_signed_vma reloc_signed_max = 0xffffe;
11231 bfd_signed_vma reloc_signed_min = -0x100000;
11232 bfd_signed_vma signed_check;
11233 enum elf32_arm_stub_type stub_type = arm_stub_none;
11234 struct elf32_arm_stub_hash_entry *stub_entry;
11235 struct elf32_arm_link_hash_entry *hash;
11236
11237 /* Need to refetch the addend, reconstruct the top three bits,
11238 and squish the two 11 bit pieces together. */
11239 if (globals->use_rel)
11240 {
11241 bfd_vma S = (upper_insn & 0x0400) >> 10;
11242 bfd_vma upper = (upper_insn & 0x003f);
11243 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
11244 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
11245 bfd_vma lower = (lower_insn & 0x07ff);
11246
11247 upper |= J1 << 6;
11248 upper |= J2 << 7;
11249 upper |= (!S) << 8;
11250 upper -= 0x0100; /* Sign extend. */
11251
11252 addend = (upper << 12) | (lower << 1);
11253 signed_addend = addend;
11254 }
11255
11256 /* Handle calls via the PLT. */
11257 if (plt_offset != (bfd_vma) -1)
11258 {
11259 value = (splt->output_section->vma
11260 + splt->output_offset
11261 + plt_offset);
11262 /* Target the Thumb stub before the ARM PLT entry. */
11263 value -= PLT_THUMB_STUB_SIZE;
11264 *unresolved_reloc_p = false;
11265 }
11266
11267 hash = (struct elf32_arm_link_hash_entry *)h;
11268
11269 stub_type = arm_type_of_stub (info, input_section, rel,
11270 st_type, &branch_type,
11271 hash, value, sym_sec,
11272 input_bfd, sym_name);
11273 if (stub_type != arm_stub_none)
11274 {
11275 stub_entry = elf32_arm_get_stub_entry (input_section,
11276 sym_sec, h,
11277 rel, globals,
11278 stub_type);
11279 if (stub_entry != NULL)
11280 {
11281 value = (stub_entry->stub_offset
11282 + stub_entry->stub_sec->output_offset
11283 + stub_entry->stub_sec->output_section->vma);
11284 }
11285 }
11286
11287 relocation = value + signed_addend;
11288 relocation -= (input_section->output_section->vma
11289 + input_section->output_offset
11290 + rel->r_offset);
11291 signed_check = (bfd_signed_vma) relocation;
11292
11293 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11294 overflow = true;
11295
11296 /* Put RELOCATION back into the insn. */
11297 {
11298 bfd_vma S = (relocation & 0x00100000) >> 20;
11299 bfd_vma J2 = (relocation & 0x00080000) >> 19;
11300 bfd_vma J1 = (relocation & 0x00040000) >> 18;
11301 bfd_vma hi = (relocation & 0x0003f000) >> 12;
11302 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
11303
11304 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
11305 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
11306 }
11307
11308 /* Put the relocated value back in the object file: */
11309 bfd_put_16 (input_bfd, upper_insn, hit_data);
11310 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11311
11312 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11313 }
11314
11315 case R_ARM_THM_JUMP11:
11316 case R_ARM_THM_JUMP8:
11317 case R_ARM_THM_JUMP6:
11318 /* Thumb B (branch) instruction). */
11319 {
11320 bfd_signed_vma relocation;
11321 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
11322 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
11323 bfd_signed_vma signed_check;
11324
11325 /* CZB cannot jump backward. */
11326 if (r_type == R_ARM_THM_JUMP6)
11327 {
11328 reloc_signed_min = 0;
11329 if (globals->use_rel)
11330 signed_addend = ((addend & 0x200) >> 3) | ((addend & 0xf8) >> 2);
11331 }
11332
11333 relocation = value + signed_addend;
11334
11335 relocation -= (input_section->output_section->vma
11336 + input_section->output_offset
11337 + rel->r_offset);
11338
11339 relocation >>= howto->rightshift;
11340 signed_check = relocation;
11341
11342 if (r_type == R_ARM_THM_JUMP6)
11343 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
11344 else
11345 relocation &= howto->dst_mask;
11346 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
11347
11348 bfd_put_16 (input_bfd, relocation, hit_data);
11349
11350 /* Assumes two's complement. */
11351 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11352 return bfd_reloc_overflow;
11353
11354 return bfd_reloc_ok;
11355 }
11356
11357 case R_ARM_ALU_PCREL7_0:
11358 case R_ARM_ALU_PCREL15_8:
11359 case R_ARM_ALU_PCREL23_15:
11360 {
11361 bfd_vma insn;
11362 bfd_vma relocation;
11363
11364 insn = bfd_get_32 (input_bfd, hit_data);
11365 if (globals->use_rel)
11366 {
11367 /* Extract the addend. */
11368 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
11369 signed_addend = addend;
11370 }
11371 relocation = value + signed_addend;
11372
11373 relocation -= (input_section->output_section->vma
11374 + input_section->output_offset
11375 + rel->r_offset);
11376 insn = (insn & ~0xfff)
11377 | ((howto->bitpos << 7) & 0xf00)
11378 | ((relocation >> howto->bitpos) & 0xff);
11379 bfd_put_32 (input_bfd, value, hit_data);
11380 }
11381 return bfd_reloc_ok;
11382
11383 case R_ARM_GNU_VTINHERIT:
11384 case R_ARM_GNU_VTENTRY:
11385 return bfd_reloc_ok;
11386
11387 case R_ARM_GOTOFF32:
11388 /* Relocation is relative to the start of the
11389 global offset table. */
11390
11391 BFD_ASSERT (sgot != NULL);
11392 if (sgot == NULL)
11393 return bfd_reloc_notsupported;
11394
11395 /* If we are addressing a Thumb function, we need to adjust the
11396 address by one, so that attempts to call the function pointer will
11397 correctly interpret it as Thumb code. */
11398 if (branch_type == ST_BRANCH_TO_THUMB)
11399 value += 1;
11400
11401 /* Note that sgot->output_offset is not involved in this
11402 calculation. We always want the start of .got. If we
11403 define _GLOBAL_OFFSET_TABLE in a different way, as is
11404 permitted by the ABI, we might have to change this
11405 calculation. */
11406 value -= sgot->output_section->vma;
11407 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11408 contents, rel->r_offset, value,
11409 rel->r_addend);
11410
11411 case R_ARM_GOTPC:
11412 /* Use global offset table as symbol value. */
11413 BFD_ASSERT (sgot != NULL);
11414
11415 if (sgot == NULL)
11416 return bfd_reloc_notsupported;
11417
11418 *unresolved_reloc_p = false;
11419 value = sgot->output_section->vma;
11420 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11421 contents, rel->r_offset, value,
11422 rel->r_addend);
11423
11424 case R_ARM_GOT32:
11425 case R_ARM_GOT_PREL:
11426 /* Relocation is to the entry for this symbol in the
11427 global offset table. */
11428 if (sgot == NULL)
11429 return bfd_reloc_notsupported;
11430
11431 if (dynreloc_st_type == STT_GNU_IFUNC
11432 && plt_offset != (bfd_vma) -1
11433 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11434 {
11435 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11436 symbol, and the relocation resolves directly to the runtime
11437 target rather than to the .iplt entry. This means that any
11438 .got entry would be the same value as the .igot.plt entry,
11439 so there's no point creating both. */
11440 sgot = globals->root.igotplt;
11441 value = sgot->output_offset + gotplt_offset;
11442 }
11443 else if (h != NULL)
11444 {
11445 bfd_vma off;
11446
11447 off = h->got.offset;
11448 BFD_ASSERT (off != (bfd_vma) -1);
11449 if ((off & 1) != 0)
11450 {
11451 /* We have already processsed one GOT relocation against
11452 this symbol. */
11453 off &= ~1;
11454 if (globals->root.dynamic_sections_created
11455 && !SYMBOL_REFERENCES_LOCAL (info, h))
11456 *unresolved_reloc_p = false;
11457 }
11458 else
11459 {
11460 Elf_Internal_Rela outrel;
11461 int isrofixup = 0;
11462
11463 if (((h->dynindx != -1) || globals->fdpic_p)
11464 && !SYMBOL_REFERENCES_LOCAL (info, h))
11465 {
11466 /* If the symbol doesn't resolve locally in a static
11467 object, we have an undefined reference. If the
11468 symbol doesn't resolve locally in a dynamic object,
11469 it should be resolved by the dynamic linker. */
11470 if (globals->root.dynamic_sections_created)
11471 {
11472 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11473 *unresolved_reloc_p = false;
11474 }
11475 else
11476 outrel.r_info = 0;
11477 outrel.r_addend = 0;
11478 }
11479 else
11480 {
11481 if (dynreloc_st_type == STT_GNU_IFUNC)
11482 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11483 else if (bfd_link_pic (info)
11484 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
11485 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11486 else
11487 {
11488 outrel.r_info = 0;
11489 if (globals->fdpic_p)
11490 isrofixup = 1;
11491 }
11492 outrel.r_addend = dynreloc_value;
11493 }
11494
11495 /* The GOT entry is initialized to zero by default.
11496 See if we should install a different value. */
11497 if (outrel.r_addend != 0
11498 && (globals->use_rel || outrel.r_info == 0))
11499 {
11500 bfd_put_32 (output_bfd, outrel.r_addend,
11501 sgot->contents + off);
11502 outrel.r_addend = 0;
11503 }
11504
11505 if (isrofixup)
11506 arm_elf_add_rofixup (output_bfd,
11507 elf32_arm_hash_table (info)->srofixup,
11508 sgot->output_section->vma
11509 + sgot->output_offset + off);
11510
11511 else if (outrel.r_info != 0)
11512 {
11513 outrel.r_offset = (sgot->output_section->vma
11514 + sgot->output_offset
11515 + off);
11516 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11517 }
11518
11519 h->got.offset |= 1;
11520 }
11521 value = sgot->output_offset + off;
11522 }
11523 else
11524 {
11525 bfd_vma off;
11526
11527 BFD_ASSERT (local_got_offsets != NULL
11528 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11529
11530 off = local_got_offsets[r_symndx];
11531
11532 /* The offset must always be a multiple of 4. We use the
11533 least significant bit to record whether we have already
11534 generated the necessary reloc. */
11535 if ((off & 1) != 0)
11536 off &= ~1;
11537 else
11538 {
11539 Elf_Internal_Rela outrel;
11540 int isrofixup = 0;
11541
11542 if (dynreloc_st_type == STT_GNU_IFUNC)
11543 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11544 else if (bfd_link_pic (info))
11545 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11546 else
11547 {
11548 outrel.r_info = 0;
11549 if (globals->fdpic_p)
11550 isrofixup = 1;
11551 }
11552
11553 /* The GOT entry is initialized to zero by default.
11554 See if we should install a different value. */
11555 if (globals->use_rel || outrel.r_info == 0)
11556 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11557
11558 if (isrofixup)
11559 arm_elf_add_rofixup (output_bfd,
11560 globals->srofixup,
11561 sgot->output_section->vma
11562 + sgot->output_offset + off);
11563
11564 else if (outrel.r_info != 0)
11565 {
11566 outrel.r_addend = addend + dynreloc_value;
11567 outrel.r_offset = (sgot->output_section->vma
11568 + sgot->output_offset
11569 + off);
11570 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11571 }
11572
11573 local_got_offsets[r_symndx] |= 1;
11574 }
11575
11576 value = sgot->output_offset + off;
11577 }
11578 if (r_type != R_ARM_GOT32)
11579 value += sgot->output_section->vma;
11580
11581 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11582 contents, rel->r_offset, value,
11583 rel->r_addend);
11584
11585 case R_ARM_TLS_LDO32:
11586 value = value - dtpoff_base (info);
11587
11588 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11589 contents, rel->r_offset, value,
11590 rel->r_addend);
11591
11592 case R_ARM_TLS_LDM32:
11593 case R_ARM_TLS_LDM32_FDPIC:
11594 {
11595 bfd_vma off;
11596
11597 if (sgot == NULL)
11598 abort ();
11599
11600 off = globals->tls_ldm_got.offset;
11601
11602 if ((off & 1) != 0)
11603 off &= ~1;
11604 else
11605 {
11606 /* If we don't know the module number, create a relocation
11607 for it. */
11608 if (bfd_link_dll (info))
11609 {
11610 Elf_Internal_Rela outrel;
11611
11612 if (srelgot == NULL)
11613 abort ();
11614
11615 outrel.r_addend = 0;
11616 outrel.r_offset = (sgot->output_section->vma
11617 + sgot->output_offset + off);
11618 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11619
11620 if (globals->use_rel)
11621 bfd_put_32 (output_bfd, outrel.r_addend,
11622 sgot->contents + off);
11623
11624 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11625 }
11626 else
11627 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11628
11629 globals->tls_ldm_got.offset |= 1;
11630 }
11631
11632 if (r_type == R_ARM_TLS_LDM32_FDPIC)
11633 {
11634 bfd_put_32 (output_bfd,
11635 globals->root.sgot->output_offset + off,
11636 contents + rel->r_offset);
11637
11638 return bfd_reloc_ok;
11639 }
11640 else
11641 {
11642 value = sgot->output_section->vma + sgot->output_offset + off
11643 - (input_section->output_section->vma
11644 + input_section->output_offset + rel->r_offset);
11645
11646 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11647 contents, rel->r_offset, value,
11648 rel->r_addend);
11649 }
11650 }
11651
11652 case R_ARM_TLS_CALL:
11653 case R_ARM_THM_TLS_CALL:
11654 case R_ARM_TLS_GD32:
11655 case R_ARM_TLS_GD32_FDPIC:
11656 case R_ARM_TLS_IE32:
11657 case R_ARM_TLS_IE32_FDPIC:
11658 case R_ARM_TLS_GOTDESC:
11659 case R_ARM_TLS_DESCSEQ:
11660 case R_ARM_THM_TLS_DESCSEQ:
11661 {
11662 bfd_vma off, offplt;
11663 int indx = 0;
11664 char tls_type;
11665
11666 BFD_ASSERT (sgot != NULL);
11667
11668 if (h != NULL)
11669 {
11670 bool dyn;
11671 dyn = globals->root.dynamic_sections_created;
11672 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11673 bfd_link_pic (info),
11674 h)
11675 && (!bfd_link_pic (info)
11676 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11677 {
11678 *unresolved_reloc_p = false;
11679 indx = h->dynindx;
11680 }
11681 off = h->got.offset;
11682 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11683 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11684 }
11685 else
11686 {
11687 BFD_ASSERT (local_got_offsets != NULL);
11688
11689 if (r_symndx >= elf32_arm_num_entries (input_bfd))
11690 {
11691 _bfd_error_handler (_("\
11692 %pB: expected symbol index in range 0..%lu but found local symbol with index %lu"),
11693 input_bfd,
11694 (unsigned long) elf32_arm_num_entries (input_bfd),
11695 r_symndx);
11696 return false;
11697 }
11698 off = local_got_offsets[r_symndx];
11699 offplt = local_tlsdesc_gotents[r_symndx];
11700 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11701 }
11702
11703 /* Linker relaxations happens from one of the
11704 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11705 if (ELF32_R_TYPE (rel->r_info) != r_type)
11706 tls_type = GOT_TLS_IE;
11707
11708 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11709
11710 if ((off & 1) != 0)
11711 off &= ~1;
11712 else
11713 {
11714 bool need_relocs = false;
11715 Elf_Internal_Rela outrel;
11716 int cur_off = off;
11717
11718 /* The GOT entries have not been initialized yet. Do it
11719 now, and emit any relocations. If both an IE GOT and a
11720 GD GOT are necessary, we emit the GD first. */
11721
11722 if ((bfd_link_dll (info) || indx != 0)
11723 && (h == NULL
11724 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11725 && !resolved_to_zero)
11726 || h->root.type != bfd_link_hash_undefweak))
11727 {
11728 need_relocs = true;
11729 BFD_ASSERT (srelgot != NULL);
11730 }
11731
11732 if (tls_type & GOT_TLS_GDESC)
11733 {
11734 bfd_byte *loc;
11735
11736 /* We should have relaxed, unless this is an undefined
11737 weak symbol. */
11738 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11739 || bfd_link_dll (info));
11740 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11741 <= globals->root.sgotplt->size);
11742
11743 outrel.r_addend = 0;
11744 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11745 + globals->root.sgotplt->output_offset
11746 + offplt
11747 + globals->sgotplt_jump_table_size);
11748
11749 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11750 sreloc = globals->root.srelplt;
11751 loc = sreloc->contents;
11752 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11753 BFD_ASSERT (loc + RELOC_SIZE (globals)
11754 <= sreloc->contents + sreloc->size);
11755
11756 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11757
11758 /* For globals, the first word in the relocation gets
11759 the relocation index and the top bit set, or zero,
11760 if we're binding now. For locals, it gets the
11761 symbol's offset in the tls section. */
11762 bfd_put_32 (output_bfd,
11763 !h ? value - elf_hash_table (info)->tls_sec->vma
11764 : info->flags & DF_BIND_NOW ? 0
11765 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11766 globals->root.sgotplt->contents + offplt
11767 + globals->sgotplt_jump_table_size);
11768
11769 /* Second word in the relocation is always zero. */
11770 bfd_put_32 (output_bfd, 0,
11771 globals->root.sgotplt->contents + offplt
11772 + globals->sgotplt_jump_table_size + 4);
11773 }
11774 if (tls_type & GOT_TLS_GD)
11775 {
11776 if (need_relocs)
11777 {
11778 outrel.r_addend = 0;
11779 outrel.r_offset = (sgot->output_section->vma
11780 + sgot->output_offset
11781 + cur_off);
11782 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11783
11784 if (globals->use_rel)
11785 bfd_put_32 (output_bfd, outrel.r_addend,
11786 sgot->contents + cur_off);
11787
11788 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11789
11790 if (indx == 0)
11791 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11792 sgot->contents + cur_off + 4);
11793 else
11794 {
11795 outrel.r_addend = 0;
11796 outrel.r_info = ELF32_R_INFO (indx,
11797 R_ARM_TLS_DTPOFF32);
11798 outrel.r_offset += 4;
11799
11800 if (globals->use_rel)
11801 bfd_put_32 (output_bfd, outrel.r_addend,
11802 sgot->contents + cur_off + 4);
11803
11804 elf32_arm_add_dynreloc (output_bfd, info,
11805 srelgot, &outrel);
11806 }
11807 }
11808 else
11809 {
11810 /* If we are not emitting relocations for a
11811 general dynamic reference, then we must be in a
11812 static link or an executable link with the
11813 symbol binding locally. Mark it as belonging
11814 to module 1, the executable. */
11815 bfd_put_32 (output_bfd, 1,
11816 sgot->contents + cur_off);
11817 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11818 sgot->contents + cur_off + 4);
11819 }
11820
11821 cur_off += 8;
11822 }
11823
11824 if (tls_type & GOT_TLS_IE)
11825 {
11826 if (need_relocs)
11827 {
11828 if (indx == 0)
11829 outrel.r_addend = value - dtpoff_base (info);
11830 else
11831 outrel.r_addend = 0;
11832 outrel.r_offset = (sgot->output_section->vma
11833 + sgot->output_offset
11834 + cur_off);
11835 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11836
11837 if (globals->use_rel)
11838 bfd_put_32 (output_bfd, outrel.r_addend,
11839 sgot->contents + cur_off);
11840
11841 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11842 }
11843 else
11844 bfd_put_32 (output_bfd, tpoff (info, value),
11845 sgot->contents + cur_off);
11846 cur_off += 4;
11847 }
11848
11849 if (h != NULL)
11850 h->got.offset |= 1;
11851 else
11852 local_got_offsets[r_symndx] |= 1;
11853 }
11854
11855 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC)
11856 off += 8;
11857 else if (tls_type & GOT_TLS_GDESC)
11858 off = offplt;
11859
11860 if (ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
11861 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL)
11862 {
11863 bfd_signed_vma offset;
11864 /* TLS stubs are arm mode. The original symbol is a
11865 data object, so branch_type is bogus. */
11866 branch_type = ST_BRANCH_TO_ARM;
11867 enum elf32_arm_stub_type stub_type
11868 = arm_type_of_stub (info, input_section, rel,
11869 st_type, &branch_type,
11870 (struct elf32_arm_link_hash_entry *)h,
11871 globals->tls_trampoline, globals->root.splt,
11872 input_bfd, sym_name);
11873
11874 if (stub_type != arm_stub_none)
11875 {
11876 struct elf32_arm_stub_hash_entry *stub_entry
11877 = elf32_arm_get_stub_entry
11878 (input_section, globals->root.splt, 0, rel,
11879 globals, stub_type);
11880 offset = (stub_entry->stub_offset
11881 + stub_entry->stub_sec->output_offset
11882 + stub_entry->stub_sec->output_section->vma);
11883 }
11884 else
11885 offset = (globals->root.splt->output_section->vma
11886 + globals->root.splt->output_offset
11887 + globals->tls_trampoline);
11888
11889 if (ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL)
11890 {
11891 unsigned long inst;
11892
11893 offset -= (input_section->output_section->vma
11894 + input_section->output_offset
11895 + rel->r_offset + 8);
11896
11897 inst = offset >> 2;
11898 inst &= 0x00ffffff;
11899 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11900 }
11901 else
11902 {
11903 /* Thumb blx encodes the offset in a complicated
11904 fashion. */
11905 unsigned upper_insn, lower_insn;
11906 unsigned neg;
11907
11908 offset -= (input_section->output_section->vma
11909 + input_section->output_offset
11910 + rel->r_offset + 4);
11911
11912 if (stub_type != arm_stub_none
11913 && arm_stub_is_thumb (stub_type))
11914 {
11915 lower_insn = 0xd000;
11916 }
11917 else
11918 {
11919 lower_insn = 0xc000;
11920 /* Round up the offset to a word boundary. */
11921 offset = (offset + 2) & ~2;
11922 }
11923
11924 neg = offset < 0;
11925 upper_insn = (0xf000
11926 | ((offset >> 12) & 0x3ff)
11927 | (neg << 10));
11928 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11929 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11930 | ((offset >> 1) & 0x7ff);
11931 bfd_put_16 (input_bfd, upper_insn, hit_data);
11932 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11933 return bfd_reloc_ok;
11934 }
11935 }
11936 /* These relocations needs special care, as besides the fact
11937 they point somewhere in .gotplt, the addend must be
11938 adjusted accordingly depending on the type of instruction
11939 we refer to. */
11940 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11941 {
11942 unsigned long data, insn;
11943 unsigned thumb;
11944
11945 data = bfd_get_signed_32 (input_bfd, hit_data);
11946 thumb = data & 1;
11947 data &= ~1ul;
11948
11949 if (thumb)
11950 {
11951 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11952 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11953 insn = (insn << 16)
11954 | bfd_get_16 (input_bfd,
11955 contents + rel->r_offset - data + 2);
11956 if ((insn & 0xf800c000) == 0xf000c000)
11957 /* bl/blx */
11958 value = -6;
11959 else if ((insn & 0xffffff00) == 0x4400)
11960 /* add */
11961 value = -5;
11962 else
11963 {
11964 _bfd_error_handler
11965 /* xgettext:c-format */
11966 (_("%pB(%pA+%#" PRIx64 "): "
11967 "unexpected %s instruction '%#lx' "
11968 "referenced by TLS_GOTDESC"),
11969 input_bfd, input_section, (uint64_t) rel->r_offset,
11970 "Thumb", insn);
11971 return bfd_reloc_notsupported;
11972 }
11973 }
11974 else
11975 {
11976 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11977
11978 switch (insn >> 24)
11979 {
11980 case 0xeb: /* bl */
11981 case 0xfa: /* blx */
11982 value = -4;
11983 break;
11984
11985 case 0xe0: /* add */
11986 value = -8;
11987 break;
11988
11989 default:
11990 _bfd_error_handler
11991 /* xgettext:c-format */
11992 (_("%pB(%pA+%#" PRIx64 "): "
11993 "unexpected %s instruction '%#lx' "
11994 "referenced by TLS_GOTDESC"),
11995 input_bfd, input_section, (uint64_t) rel->r_offset,
11996 "ARM", insn);
11997 return bfd_reloc_notsupported;
11998 }
11999 }
12000
12001 value += ((globals->root.sgotplt->output_section->vma
12002 + globals->root.sgotplt->output_offset + off)
12003 - (input_section->output_section->vma
12004 + input_section->output_offset
12005 + rel->r_offset)
12006 + globals->sgotplt_jump_table_size);
12007 }
12008 else
12009 value = ((globals->root.sgot->output_section->vma
12010 + globals->root.sgot->output_offset + off)
12011 - (input_section->output_section->vma
12012 + input_section->output_offset + rel->r_offset));
12013
12014 if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC ||
12015 r_type == R_ARM_TLS_IE32_FDPIC))
12016 {
12017 /* For FDPIC relocations, resolve to the offset of the GOT
12018 entry from the start of GOT. */
12019 bfd_put_32 (output_bfd,
12020 globals->root.sgot->output_offset + off,
12021 contents + rel->r_offset);
12022
12023 return bfd_reloc_ok;
12024 }
12025 else
12026 {
12027 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12028 contents, rel->r_offset, value,
12029 rel->r_addend);
12030 }
12031 }
12032
12033 case R_ARM_TLS_LE32:
12034 if (bfd_link_dll (info))
12035 {
12036 _bfd_error_handler
12037 /* xgettext:c-format */
12038 (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
12039 "in shared object"),
12040 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
12041 return bfd_reloc_notsupported;
12042 }
12043 else
12044 value = tpoff (info, value);
12045
12046 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12047 contents, rel->r_offset, value,
12048 rel->r_addend);
12049
12050 case R_ARM_V4BX:
12051 if (globals->fix_v4bx)
12052 {
12053 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12054
12055 /* Ensure that we have a BX instruction. */
12056 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
12057
12058 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
12059 {
12060 /* Branch to veneer. */
12061 bfd_vma glue_addr;
12062 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
12063 glue_addr -= input_section->output_section->vma
12064 + input_section->output_offset
12065 + rel->r_offset + 8;
12066 insn = (insn & 0xf0000000) | 0x0a000000
12067 | ((glue_addr >> 2) & 0x00ffffff);
12068 }
12069 else
12070 {
12071 /* Preserve Rm (lowest four bits) and the condition code
12072 (highest four bits). Other bits encode MOV PC,Rm. */
12073 insn = (insn & 0xf000000f) | 0x01a0f000;
12074 }
12075
12076 bfd_put_32 (input_bfd, insn, hit_data);
12077 }
12078 return bfd_reloc_ok;
12079
12080 case R_ARM_MOVW_ABS_NC:
12081 case R_ARM_MOVT_ABS:
12082 case R_ARM_MOVW_PREL_NC:
12083 case R_ARM_MOVT_PREL:
12084 /* Until we properly support segment-base-relative addressing then
12085 we assume the segment base to be zero, as for the group relocations.
12086 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12087 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12088 case R_ARM_MOVW_BREL_NC:
12089 case R_ARM_MOVW_BREL:
12090 case R_ARM_MOVT_BREL:
12091 {
12092 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12093
12094 if (globals->use_rel)
12095 {
12096 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
12097 signed_addend = (addend ^ 0x8000) - 0x8000;
12098 }
12099
12100 value += signed_addend;
12101
12102 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
12103 value -= (input_section->output_section->vma
12104 + input_section->output_offset + rel->r_offset);
12105
12106 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
12107 return bfd_reloc_overflow;
12108
12109 if (branch_type == ST_BRANCH_TO_THUMB)
12110 value |= 1;
12111
12112 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
12113 || r_type == R_ARM_MOVT_BREL)
12114 value >>= 16;
12115
12116 insn &= 0xfff0f000;
12117 insn |= value & 0xfff;
12118 insn |= (value & 0xf000) << 4;
12119 bfd_put_32 (input_bfd, insn, hit_data);
12120 }
12121 return bfd_reloc_ok;
12122
12123 case R_ARM_THM_MOVW_ABS_NC:
12124 case R_ARM_THM_MOVT_ABS:
12125 case R_ARM_THM_MOVW_PREL_NC:
12126 case R_ARM_THM_MOVT_PREL:
12127 /* Until we properly support segment-base-relative addressing then
12128 we assume the segment base to be zero, as for the above relocations.
12129 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12130 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12131 as R_ARM_THM_MOVT_ABS. */
12132 case R_ARM_THM_MOVW_BREL_NC:
12133 case R_ARM_THM_MOVW_BREL:
12134 case R_ARM_THM_MOVT_BREL:
12135 {
12136 bfd_vma insn;
12137
12138 insn = bfd_get_16 (input_bfd, hit_data) << 16;
12139 insn |= bfd_get_16 (input_bfd, hit_data + 2);
12140
12141 if (globals->use_rel)
12142 {
12143 addend = ((insn >> 4) & 0xf000)
12144 | ((insn >> 15) & 0x0800)
12145 | ((insn >> 4) & 0x0700)
12146 | (insn & 0x00ff);
12147 signed_addend = (addend ^ 0x8000) - 0x8000;
12148 }
12149
12150 value += signed_addend;
12151
12152 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
12153 value -= (input_section->output_section->vma
12154 + input_section->output_offset + rel->r_offset);
12155
12156 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
12157 return bfd_reloc_overflow;
12158
12159 if (branch_type == ST_BRANCH_TO_THUMB)
12160 value |= 1;
12161
12162 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
12163 || r_type == R_ARM_THM_MOVT_BREL)
12164 value >>= 16;
12165
12166 insn &= 0xfbf08f00;
12167 insn |= (value & 0xf000) << 4;
12168 insn |= (value & 0x0800) << 15;
12169 insn |= (value & 0x0700) << 4;
12170 insn |= (value & 0x00ff);
12171
12172 bfd_put_16 (input_bfd, insn >> 16, hit_data);
12173 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
12174 }
12175 return bfd_reloc_ok;
12176
12177 case R_ARM_ALU_PC_G0_NC:
12178 case R_ARM_ALU_PC_G1_NC:
12179 case R_ARM_ALU_PC_G0:
12180 case R_ARM_ALU_PC_G1:
12181 case R_ARM_ALU_PC_G2:
12182 case R_ARM_ALU_SB_G0_NC:
12183 case R_ARM_ALU_SB_G1_NC:
12184 case R_ARM_ALU_SB_G0:
12185 case R_ARM_ALU_SB_G1:
12186 case R_ARM_ALU_SB_G2:
12187 {
12188 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12189 bfd_vma pc = input_section->output_section->vma
12190 + input_section->output_offset + rel->r_offset;
12191 /* sb is the origin of the *segment* containing the symbol. */
12192 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12193 bfd_vma residual;
12194 bfd_vma g_n;
12195 bfd_signed_vma signed_value;
12196 int group = 0;
12197
12198 /* Determine which group of bits to select. */
12199 switch (r_type)
12200 {
12201 case R_ARM_ALU_PC_G0_NC:
12202 case R_ARM_ALU_PC_G0:
12203 case R_ARM_ALU_SB_G0_NC:
12204 case R_ARM_ALU_SB_G0:
12205 group = 0;
12206 break;
12207
12208 case R_ARM_ALU_PC_G1_NC:
12209 case R_ARM_ALU_PC_G1:
12210 case R_ARM_ALU_SB_G1_NC:
12211 case R_ARM_ALU_SB_G1:
12212 group = 1;
12213 break;
12214
12215 case R_ARM_ALU_PC_G2:
12216 case R_ARM_ALU_SB_G2:
12217 group = 2;
12218 break;
12219
12220 default:
12221 abort ();
12222 }
12223
12224 /* If REL, extract the addend from the insn. If RELA, it will
12225 have already been fetched for us. */
12226 if (globals->use_rel)
12227 {
12228 int negative;
12229 bfd_vma constant = insn & 0xff;
12230 bfd_vma rotation = (insn & 0xf00) >> 8;
12231
12232 if (rotation == 0)
12233 signed_addend = constant;
12234 else
12235 {
12236 /* Compensate for the fact that in the instruction, the
12237 rotation is stored in multiples of 2 bits. */
12238 rotation *= 2;
12239
12240 /* Rotate "constant" right by "rotation" bits. */
12241 signed_addend = (constant >> rotation) |
12242 (constant << (8 * sizeof (bfd_vma) - rotation));
12243 }
12244
12245 /* Determine if the instruction is an ADD or a SUB.
12246 (For REL, this determines the sign of the addend.) */
12247 negative = identify_add_or_sub (insn);
12248 if (negative == 0)
12249 {
12250 _bfd_error_handler
12251 /* xgettext:c-format */
12252 (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
12253 "are allowed for ALU group relocations"),
12254 input_bfd, input_section, (uint64_t) rel->r_offset);
12255 return bfd_reloc_overflow;
12256 }
12257
12258 signed_addend *= negative;
12259 }
12260
12261 /* Compute the value (X) to go in the place. */
12262 if (r_type == R_ARM_ALU_PC_G0_NC
12263 || r_type == R_ARM_ALU_PC_G1_NC
12264 || r_type == R_ARM_ALU_PC_G0
12265 || r_type == R_ARM_ALU_PC_G1
12266 || r_type == R_ARM_ALU_PC_G2)
12267 /* PC relative. */
12268 signed_value = value - pc + signed_addend;
12269 else
12270 /* Section base relative. */
12271 signed_value = value - sb + signed_addend;
12272
12273 /* If the target symbol is a Thumb function, then set the
12274 Thumb bit in the address. */
12275 if (branch_type == ST_BRANCH_TO_THUMB)
12276 signed_value |= 1;
12277
12278 /* Calculate the value of the relevant G_n, in encoded
12279 constant-with-rotation format. */
12280 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12281 group, &residual);
12282
12283 /* Check for overflow if required. */
12284 if ((r_type == R_ARM_ALU_PC_G0
12285 || r_type == R_ARM_ALU_PC_G1
12286 || r_type == R_ARM_ALU_PC_G2
12287 || r_type == R_ARM_ALU_SB_G0
12288 || r_type == R_ARM_ALU_SB_G1
12289 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
12290 {
12291 _bfd_error_handler
12292 /* xgettext:c-format */
12293 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12294 "splitting %#" PRIx64 " for group relocation %s"),
12295 input_bfd, input_section, (uint64_t) rel->r_offset,
12296 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12297 howto->name);
12298 return bfd_reloc_overflow;
12299 }
12300
12301 /* Mask out the value and the ADD/SUB part of the opcode; take care
12302 not to destroy the S bit. */
12303 insn &= 0xff1ff000;
12304
12305 /* Set the opcode according to whether the value to go in the
12306 place is negative. */
12307 if (signed_value < 0)
12308 insn |= 1 << 22;
12309 else
12310 insn |= 1 << 23;
12311
12312 /* Encode the offset. */
12313 insn |= g_n;
12314
12315 bfd_put_32 (input_bfd, insn, hit_data);
12316 }
12317 return bfd_reloc_ok;
12318
12319 case R_ARM_LDR_PC_G0:
12320 case R_ARM_LDR_PC_G1:
12321 case R_ARM_LDR_PC_G2:
12322 case R_ARM_LDR_SB_G0:
12323 case R_ARM_LDR_SB_G1:
12324 case R_ARM_LDR_SB_G2:
12325 {
12326 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12327 bfd_vma pc = input_section->output_section->vma
12328 + input_section->output_offset + rel->r_offset;
12329 /* sb is the origin of the *segment* containing the symbol. */
12330 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12331 bfd_vma residual;
12332 bfd_signed_vma signed_value;
12333 int group = 0;
12334
12335 /* Determine which groups of bits to calculate. */
12336 switch (r_type)
12337 {
12338 case R_ARM_LDR_PC_G0:
12339 case R_ARM_LDR_SB_G0:
12340 group = 0;
12341 break;
12342
12343 case R_ARM_LDR_PC_G1:
12344 case R_ARM_LDR_SB_G1:
12345 group = 1;
12346 break;
12347
12348 case R_ARM_LDR_PC_G2:
12349 case R_ARM_LDR_SB_G2:
12350 group = 2;
12351 break;
12352
12353 default:
12354 abort ();
12355 }
12356
12357 /* If REL, extract the addend from the insn. If RELA, it will
12358 have already been fetched for us. */
12359 if (globals->use_rel)
12360 {
12361 int negative = (insn & (1 << 23)) ? 1 : -1;
12362 signed_addend = negative * (insn & 0xfff);
12363 }
12364
12365 /* Compute the value (X) to go in the place. */
12366 if (r_type == R_ARM_LDR_PC_G0
12367 || r_type == R_ARM_LDR_PC_G1
12368 || r_type == R_ARM_LDR_PC_G2)
12369 /* PC relative. */
12370 signed_value = value - pc + signed_addend;
12371 else
12372 /* Section base relative. */
12373 signed_value = value - sb + signed_addend;
12374
12375 /* Calculate the value of the relevant G_{n-1} to obtain
12376 the residual at that stage. */
12377 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12378 group - 1, &residual);
12379
12380 /* Check for overflow. */
12381 if (residual >= 0x1000)
12382 {
12383 _bfd_error_handler
12384 /* xgettext:c-format */
12385 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12386 "splitting %#" PRIx64 " for group relocation %s"),
12387 input_bfd, input_section, (uint64_t) rel->r_offset,
12388 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12389 howto->name);
12390 return bfd_reloc_overflow;
12391 }
12392
12393 /* Mask out the value and U bit. */
12394 insn &= 0xff7ff000;
12395
12396 /* Set the U bit if the value to go in the place is non-negative. */
12397 if (signed_value >= 0)
12398 insn |= 1 << 23;
12399
12400 /* Encode the offset. */
12401 insn |= residual;
12402
12403 bfd_put_32 (input_bfd, insn, hit_data);
12404 }
12405 return bfd_reloc_ok;
12406
12407 case R_ARM_LDRS_PC_G0:
12408 case R_ARM_LDRS_PC_G1:
12409 case R_ARM_LDRS_PC_G2:
12410 case R_ARM_LDRS_SB_G0:
12411 case R_ARM_LDRS_SB_G1:
12412 case R_ARM_LDRS_SB_G2:
12413 {
12414 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12415 bfd_vma pc = input_section->output_section->vma
12416 + input_section->output_offset + rel->r_offset;
12417 /* sb is the origin of the *segment* containing the symbol. */
12418 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12419 bfd_vma residual;
12420 bfd_signed_vma signed_value;
12421 int group = 0;
12422
12423 /* Determine which groups of bits to calculate. */
12424 switch (r_type)
12425 {
12426 case R_ARM_LDRS_PC_G0:
12427 case R_ARM_LDRS_SB_G0:
12428 group = 0;
12429 break;
12430
12431 case R_ARM_LDRS_PC_G1:
12432 case R_ARM_LDRS_SB_G1:
12433 group = 1;
12434 break;
12435
12436 case R_ARM_LDRS_PC_G2:
12437 case R_ARM_LDRS_SB_G2:
12438 group = 2;
12439 break;
12440
12441 default:
12442 abort ();
12443 }
12444
12445 /* If REL, extract the addend from the insn. If RELA, it will
12446 have already been fetched for us. */
12447 if (globals->use_rel)
12448 {
12449 int negative = (insn & (1 << 23)) ? 1 : -1;
12450 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
12451 }
12452
12453 /* Compute the value (X) to go in the place. */
12454 if (r_type == R_ARM_LDRS_PC_G0
12455 || r_type == R_ARM_LDRS_PC_G1
12456 || r_type == R_ARM_LDRS_PC_G2)
12457 /* PC relative. */
12458 signed_value = value - pc + signed_addend;
12459 else
12460 /* Section base relative. */
12461 signed_value = value - sb + signed_addend;
12462
12463 /* Calculate the value of the relevant G_{n-1} to obtain
12464 the residual at that stage. */
12465 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12466 group - 1, &residual);
12467
12468 /* Check for overflow. */
12469 if (residual >= 0x100)
12470 {
12471 _bfd_error_handler
12472 /* xgettext:c-format */
12473 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12474 "splitting %#" PRIx64 " for group relocation %s"),
12475 input_bfd, input_section, (uint64_t) rel->r_offset,
12476 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12477 howto->name);
12478 return bfd_reloc_overflow;
12479 }
12480
12481 /* Mask out the value and U bit. */
12482 insn &= 0xff7ff0f0;
12483
12484 /* Set the U bit if the value to go in the place is non-negative. */
12485 if (signed_value >= 0)
12486 insn |= 1 << 23;
12487
12488 /* Encode the offset. */
12489 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12490
12491 bfd_put_32 (input_bfd, insn, hit_data);
12492 }
12493 return bfd_reloc_ok;
12494
12495 case R_ARM_LDC_PC_G0:
12496 case R_ARM_LDC_PC_G1:
12497 case R_ARM_LDC_PC_G2:
12498 case R_ARM_LDC_SB_G0:
12499 case R_ARM_LDC_SB_G1:
12500 case R_ARM_LDC_SB_G2:
12501 {
12502 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12503 bfd_vma pc = input_section->output_section->vma
12504 + input_section->output_offset + rel->r_offset;
12505 /* sb is the origin of the *segment* containing the symbol. */
12506 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12507 bfd_vma residual;
12508 bfd_signed_vma signed_value;
12509 int group = 0;
12510
12511 /* Determine which groups of bits to calculate. */
12512 switch (r_type)
12513 {
12514 case R_ARM_LDC_PC_G0:
12515 case R_ARM_LDC_SB_G0:
12516 group = 0;
12517 break;
12518
12519 case R_ARM_LDC_PC_G1:
12520 case R_ARM_LDC_SB_G1:
12521 group = 1;
12522 break;
12523
12524 case R_ARM_LDC_PC_G2:
12525 case R_ARM_LDC_SB_G2:
12526 group = 2;
12527 break;
12528
12529 default:
12530 abort ();
12531 }
12532
12533 /* If REL, extract the addend from the insn. If RELA, it will
12534 have already been fetched for us. */
12535 if (globals->use_rel)
12536 {
12537 int negative = (insn & (1 << 23)) ? 1 : -1;
12538 signed_addend = negative * ((insn & 0xff) << 2);
12539 }
12540
12541 /* Compute the value (X) to go in the place. */
12542 if (r_type == R_ARM_LDC_PC_G0
12543 || r_type == R_ARM_LDC_PC_G1
12544 || r_type == R_ARM_LDC_PC_G2)
12545 /* PC relative. */
12546 signed_value = value - pc + signed_addend;
12547 else
12548 /* Section base relative. */
12549 signed_value = value - sb + signed_addend;
12550
12551 /* Calculate the value of the relevant G_{n-1} to obtain
12552 the residual at that stage. */
12553 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12554 group - 1, &residual);
12555
12556 /* Check for overflow. (The absolute value to go in the place must be
12557 divisible by four and, after having been divided by four, must
12558 fit in eight bits.) */
12559 if ((residual & 0x3) != 0 || residual >= 0x400)
12560 {
12561 _bfd_error_handler
12562 /* xgettext:c-format */
12563 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12564 "splitting %#" PRIx64 " for group relocation %s"),
12565 input_bfd, input_section, (uint64_t) rel->r_offset,
12566 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12567 howto->name);
12568 return bfd_reloc_overflow;
12569 }
12570
12571 /* Mask out the value and U bit. */
12572 insn &= 0xff7fff00;
12573
12574 /* Set the U bit if the value to go in the place is non-negative. */
12575 if (signed_value >= 0)
12576 insn |= 1 << 23;
12577
12578 /* Encode the offset. */
12579 insn |= residual >> 2;
12580
12581 bfd_put_32 (input_bfd, insn, hit_data);
12582 }
12583 return bfd_reloc_ok;
12584
12585 case R_ARM_THM_ALU_ABS_G0_NC:
12586 case R_ARM_THM_ALU_ABS_G1_NC:
12587 case R_ARM_THM_ALU_ABS_G2_NC:
12588 case R_ARM_THM_ALU_ABS_G3_NC:
12589 {
12590 const int shift_array[4] = {0, 8, 16, 24};
12591 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12592 bfd_vma addr = value;
12593 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12594
12595 /* Compute address. */
12596 if (globals->use_rel)
12597 signed_addend = insn & 0xff;
12598 addr += signed_addend;
12599 if (branch_type == ST_BRANCH_TO_THUMB)
12600 addr |= 1;
12601 /* Clean imm8 insn. */
12602 insn &= 0xff00;
12603 /* And update with correct part of address. */
12604 insn |= (addr >> shift) & 0xff;
12605 /* Update insn. */
12606 bfd_put_16 (input_bfd, insn, hit_data);
12607 }
12608
12609 *unresolved_reloc_p = false;
12610 return bfd_reloc_ok;
12611
12612 case R_ARM_GOTOFFFUNCDESC:
12613 {
12614 if (h == NULL)
12615 {
12616 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts (input_bfd);
12617 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12618
12619 if (r_symndx >= elf32_arm_num_entries (input_bfd))
12620 {
12621 * error_message = _("local symbol index too big");
12622 return bfd_reloc_dangerous;
12623 }
12624
12625 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12626 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12627 bfd_vma seg = -1;
12628
12629 if (bfd_link_pic (info) && dynindx == 0)
12630 {
12631 * error_message = _("no dynamic index information available");
12632 return bfd_reloc_dangerous;
12633 }
12634
12635 /* Resolve relocation. */
12636 bfd_put_32 (output_bfd, (offset + sgot->output_offset)
12637 , contents + rel->r_offset);
12638 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12639 not done yet. */
12640 arm_elf_fill_funcdesc (output_bfd, info,
12641 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12642 dynindx, offset, addr, dynreloc_value, seg);
12643 }
12644 else
12645 {
12646 int dynindx;
12647 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12648 bfd_vma addr;
12649 bfd_vma seg = -1;
12650
12651 /* For static binaries, sym_sec can be null. */
12652 if (sym_sec)
12653 {
12654 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12655 addr = dynreloc_value - sym_sec->output_section->vma;
12656 }
12657 else
12658 {
12659 dynindx = 0;
12660 addr = 0;
12661 }
12662
12663 if (bfd_link_pic (info) && dynindx == 0)
12664 {
12665 * error_message = _("no dynamic index information available");
12666 return bfd_reloc_dangerous;
12667 }
12668
12669 /* This case cannot occur since funcdesc is allocated by
12670 the dynamic loader so we cannot resolve the relocation. */
12671 if (h->dynindx != -1)
12672 {
12673 * error_message = _("invalid dynamic index");
12674 return bfd_reloc_dangerous;
12675 }
12676
12677 /* Resolve relocation. */
12678 bfd_put_32 (output_bfd, (offset + sgot->output_offset),
12679 contents + rel->r_offset);
12680 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12681 arm_elf_fill_funcdesc (output_bfd, info,
12682 &eh->fdpic_cnts.funcdesc_offset,
12683 dynindx, offset, addr, dynreloc_value, seg);
12684 }
12685 }
12686 *unresolved_reloc_p = false;
12687 return bfd_reloc_ok;
12688
12689 case R_ARM_GOTFUNCDESC:
12690 {
12691 if (h != NULL)
12692 {
12693 Elf_Internal_Rela outrel;
12694
12695 /* Resolve relocation. */
12696 bfd_put_32 (output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1)
12697 + sgot->output_offset),
12698 contents + rel->r_offset);
12699 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12700 if (h->dynindx == -1)
12701 {
12702 int dynindx;
12703 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12704 bfd_vma addr;
12705 bfd_vma seg = -1;
12706
12707 /* For static binaries sym_sec can be null. */
12708 if (sym_sec)
12709 {
12710 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12711 addr = dynreloc_value - sym_sec->output_section->vma;
12712 }
12713 else
12714 {
12715 dynindx = 0;
12716 addr = 0;
12717 }
12718
12719 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12720 arm_elf_fill_funcdesc (output_bfd, info,
12721 &eh->fdpic_cnts.funcdesc_offset,
12722 dynindx, offset, addr, dynreloc_value, seg);
12723 }
12724
12725 /* Add a dynamic relocation on GOT entry if not already done. */
12726 if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0)
12727 {
12728 if (h->dynindx == -1)
12729 {
12730 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12731 if (h->root.type == bfd_link_hash_undefweak)
12732 bfd_put_32 (output_bfd, 0, sgot->contents
12733 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12734 else
12735 bfd_put_32 (output_bfd, sgot->output_section->vma
12736 + sgot->output_offset
12737 + (eh->fdpic_cnts.funcdesc_offset & ~1),
12738 sgot->contents
12739 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12740 }
12741 else
12742 {
12743 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12744 }
12745 outrel.r_offset = sgot->output_section->vma
12746 + sgot->output_offset
12747 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1);
12748 outrel.r_addend = 0;
12749 if (h->dynindx == -1 && !bfd_link_pic (info))
12750 if (h->root.type == bfd_link_hash_undefweak)
12751 arm_elf_add_rofixup (output_bfd, globals->srofixup, -1);
12752 else
12753 arm_elf_add_rofixup (output_bfd, globals->srofixup,
12754 outrel.r_offset);
12755 else
12756 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12757 eh->fdpic_cnts.gotfuncdesc_offset |= 1;
12758 }
12759 }
12760 else
12761 {
12762 /* Such relocation on static function should not have been
12763 emitted by the compiler. */
12764 return bfd_reloc_notsupported;
12765 }
12766 }
12767 *unresolved_reloc_p = false;
12768 return bfd_reloc_ok;
12769
12770 case R_ARM_FUNCDESC:
12771 {
12772 if (h == NULL)
12773 {
12774 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts (input_bfd);
12775 Elf_Internal_Rela outrel;
12776 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12777
12778 if (r_symndx >= elf32_arm_num_entries (input_bfd))
12779 {
12780 * error_message = _("local symbol index too big");
12781 return bfd_reloc_dangerous;
12782 }
12783
12784 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12785 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12786 bfd_vma seg = -1;
12787
12788 if (bfd_link_pic (info) && dynindx == 0)
12789 {
12790 * error_message = _("dynamic index information not available");
12791 return bfd_reloc_dangerous;
12792 }
12793
12794 /* Replace static FUNCDESC relocation with a
12795 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12796 executable. */
12797 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12798 outrel.r_offset = input_section->output_section->vma
12799 + input_section->output_offset + rel->r_offset;
12800 outrel.r_addend = 0;
12801 if (bfd_link_pic (info))
12802 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12803 else
12804 arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset);
12805
12806 bfd_put_32 (input_bfd, sgot->output_section->vma
12807 + sgot->output_offset + offset, hit_data);
12808
12809 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12810 arm_elf_fill_funcdesc (output_bfd, info,
12811 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12812 dynindx, offset, addr, dynreloc_value, seg);
12813 }
12814 else
12815 {
12816 if (h->dynindx == -1)
12817 {
12818 int dynindx;
12819 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12820 bfd_vma addr;
12821 bfd_vma seg = -1;
12822 Elf_Internal_Rela outrel;
12823
12824 /* For static binaries sym_sec can be null. */
12825 if (sym_sec)
12826 {
12827 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12828 addr = dynreloc_value - sym_sec->output_section->vma;
12829 }
12830 else
12831 {
12832 dynindx = 0;
12833 addr = 0;
12834 }
12835
12836 if (bfd_link_pic (info) && dynindx == 0)
12837 abort ();
12838
12839 /* Replace static FUNCDESC relocation with a
12840 R_ARM_RELATIVE dynamic relocation. */
12841 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12842 outrel.r_offset = input_section->output_section->vma
12843 + input_section->output_offset + rel->r_offset;
12844 outrel.r_addend = 0;
12845 if (bfd_link_pic (info))
12846 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12847 else
12848 arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset);
12849
12850 bfd_put_32 (input_bfd, sgot->output_section->vma
12851 + sgot->output_offset + offset, hit_data);
12852
12853 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12854 arm_elf_fill_funcdesc (output_bfd, info,
12855 &eh->fdpic_cnts.funcdesc_offset,
12856 dynindx, offset, addr, dynreloc_value, seg);
12857 }
12858 else
12859 {
12860 Elf_Internal_Rela outrel;
12861
12862 /* Add a dynamic relocation. */
12863 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12864 outrel.r_offset = input_section->output_section->vma
12865 + input_section->output_offset + rel->r_offset;
12866 outrel.r_addend = 0;
12867 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12868 }
12869 }
12870 }
12871 *unresolved_reloc_p = false;
12872 return bfd_reloc_ok;
12873
12874 case R_ARM_THM_BF16:
12875 {
12876 bfd_vma relocation;
12877 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12878 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12879
12880 if (globals->use_rel)
12881 {
12882 bfd_vma immA = (upper_insn & 0x001f);
12883 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12884 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12885 addend = (immA << 12);
12886 addend |= (immB << 2);
12887 addend |= (immC << 1);
12888 addend |= 1;
12889 /* Sign extend. */
12890 signed_addend = (addend & 0x10000) ? addend - (1 << 17) : addend;
12891 }
12892
12893 relocation = value + signed_addend;
12894 relocation -= (input_section->output_section->vma
12895 + input_section->output_offset
12896 + rel->r_offset);
12897
12898 /* Put RELOCATION back into the insn. */
12899 {
12900 bfd_vma immA = (relocation & 0x0001f000) >> 12;
12901 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12902 bfd_vma immC = (relocation & 0x00000002) >> 1;
12903
12904 upper_insn = (upper_insn & 0xffe0) | immA;
12905 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12906 }
12907
12908 /* Put the relocated value back in the object file: */
12909 bfd_put_16 (input_bfd, upper_insn, hit_data);
12910 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12911
12912 return bfd_reloc_ok;
12913 }
12914
12915 case R_ARM_THM_BF12:
12916 {
12917 bfd_vma relocation;
12918 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12919 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12920
12921 if (globals->use_rel)
12922 {
12923 bfd_vma immA = (upper_insn & 0x0001);
12924 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12925 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12926 addend = (immA << 12);
12927 addend |= (immB << 2);
12928 addend |= (immC << 1);
12929 addend |= 1;
12930 /* Sign extend. */
12931 addend = (addend & 0x1000) ? addend - (1 << 13) : addend;
12932 signed_addend = addend;
12933 }
12934
12935 relocation = value + signed_addend;
12936 relocation -= (input_section->output_section->vma
12937 + input_section->output_offset
12938 + rel->r_offset);
12939
12940 /* Put RELOCATION back into the insn. */
12941 {
12942 bfd_vma immA = (relocation & 0x00001000) >> 12;
12943 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12944 bfd_vma immC = (relocation & 0x00000002) >> 1;
12945
12946 upper_insn = (upper_insn & 0xfffe) | immA;
12947 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12948 }
12949
12950 /* Put the relocated value back in the object file: */
12951 bfd_put_16 (input_bfd, upper_insn, hit_data);
12952 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12953
12954 return bfd_reloc_ok;
12955 }
12956
12957 case R_ARM_THM_BF18:
12958 {
12959 bfd_vma relocation;
12960 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12961 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12962
12963 if (globals->use_rel)
12964 {
12965 bfd_vma immA = (upper_insn & 0x007f);
12966 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12967 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12968 addend = (immA << 12);
12969 addend |= (immB << 2);
12970 addend |= (immC << 1);
12971 addend |= 1;
12972 /* Sign extend. */
12973 addend = (addend & 0x40000) ? addend - (1 << 19) : addend;
12974 signed_addend = addend;
12975 }
12976
12977 relocation = value + signed_addend;
12978 relocation -= (input_section->output_section->vma
12979 + input_section->output_offset
12980 + rel->r_offset);
12981
12982 /* Put RELOCATION back into the insn. */
12983 {
12984 bfd_vma immA = (relocation & 0x0007f000) >> 12;
12985 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12986 bfd_vma immC = (relocation & 0x00000002) >> 1;
12987
12988 upper_insn = (upper_insn & 0xff80) | immA;
12989 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12990 }
12991
12992 /* Put the relocated value back in the object file: */
12993 bfd_put_16 (input_bfd, upper_insn, hit_data);
12994 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12995
12996 return bfd_reloc_ok;
12997 }
12998
12999 default:
13000 return bfd_reloc_notsupported;
13001 }
13002 }
13003
13004 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
13005 static void
13006 arm_add_to_rel (bfd * abfd,
13007 bfd_byte * address,
13008 reloc_howto_type * howto,
13009 bfd_signed_vma increment)
13010 {
13011 bfd_signed_vma addend;
13012
13013 if (howto->type == R_ARM_THM_CALL
13014 || howto->type == R_ARM_THM_JUMP24)
13015 {
13016 int upper_insn, lower_insn;
13017 int upper, lower;
13018
13019 upper_insn = bfd_get_16 (abfd, address);
13020 lower_insn = bfd_get_16 (abfd, address + 2);
13021 upper = upper_insn & 0x7ff;
13022 lower = lower_insn & 0x7ff;
13023
13024 addend = (upper << 12) | (lower << 1);
13025 addend += increment;
13026 addend >>= 1;
13027
13028 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
13029 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
13030
13031 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
13032 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
13033 }
13034 else
13035 {
13036 bfd_vma contents;
13037
13038 contents = bfd_get_32 (abfd, address);
13039
13040 /* Get the (signed) value from the instruction. */
13041 addend = contents & howto->src_mask;
13042 if (addend & ((howto->src_mask + 1) >> 1))
13043 {
13044 bfd_signed_vma mask;
13045
13046 mask = -1;
13047 mask &= ~ howto->src_mask;
13048 addend |= mask;
13049 }
13050
13051 /* Add in the increment, (which is a byte value). */
13052 switch (howto->type)
13053 {
13054 default:
13055 addend += increment;
13056 break;
13057
13058 case R_ARM_PC24:
13059 case R_ARM_PLT32:
13060 case R_ARM_CALL:
13061 case R_ARM_JUMP24:
13062 addend <<= howto->size;
13063 addend += increment;
13064
13065 /* Should we check for overflow here ? */
13066
13067 /* Drop any undesired bits. */
13068 addend >>= howto->rightshift;
13069 break;
13070 }
13071
13072 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
13073
13074 bfd_put_32 (abfd, contents, address);
13075 }
13076 }
13077
13078 #define IS_ARM_TLS_RELOC(R_TYPE) \
13079 ((R_TYPE) == R_ARM_TLS_GD32 \
13080 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
13081 || (R_TYPE) == R_ARM_TLS_LDO32 \
13082 || (R_TYPE) == R_ARM_TLS_LDM32 \
13083 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
13084 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
13085 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
13086 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
13087 || (R_TYPE) == R_ARM_TLS_LE32 \
13088 || (R_TYPE) == R_ARM_TLS_IE32 \
13089 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
13090 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
13091
13092 /* Specific set of relocations for the gnu tls dialect. */
13093 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
13094 ((R_TYPE) == R_ARM_TLS_GOTDESC \
13095 || (R_TYPE) == R_ARM_TLS_CALL \
13096 || (R_TYPE) == R_ARM_THM_TLS_CALL \
13097 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
13098 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
13099
13100 /* Relocate an ARM ELF section. */
13101
13102 static int
13103 elf32_arm_relocate_section (bfd * output_bfd,
13104 struct bfd_link_info * info,
13105 bfd * input_bfd,
13106 asection * input_section,
13107 bfd_byte * contents,
13108 Elf_Internal_Rela * relocs,
13109 Elf_Internal_Sym * local_syms,
13110 asection ** local_sections)
13111 {
13112 Elf_Internal_Shdr *symtab_hdr;
13113 struct elf_link_hash_entry **sym_hashes;
13114 Elf_Internal_Rela *rel;
13115 Elf_Internal_Rela *relend;
13116 const char *name;
13117 struct elf32_arm_link_hash_table * globals;
13118
13119 globals = elf32_arm_hash_table (info);
13120 if (globals == NULL)
13121 return false;
13122
13123 symtab_hdr = & elf_symtab_hdr (input_bfd);
13124 sym_hashes = elf_sym_hashes (input_bfd);
13125
13126 rel = relocs;
13127 relend = relocs + input_section->reloc_count;
13128 for (; rel < relend; rel++)
13129 {
13130 int r_type;
13131 reloc_howto_type * howto;
13132 unsigned long r_symndx;
13133 Elf_Internal_Sym * sym;
13134 asection * sec;
13135 struct elf_link_hash_entry * h;
13136 bfd_vma relocation;
13137 bfd_reloc_status_type r;
13138 arelent bfd_reloc;
13139 char sym_type;
13140 bool unresolved_reloc = false;
13141 char *error_message = NULL;
13142
13143 r_symndx = ELF32_R_SYM (rel->r_info);
13144 r_type = ELF32_R_TYPE (rel->r_info);
13145 r_type = arm_real_reloc_type (globals, r_type);
13146
13147 if ( r_type == R_ARM_GNU_VTENTRY
13148 || r_type == R_ARM_GNU_VTINHERIT)
13149 continue;
13150
13151 howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
13152
13153 if (howto == NULL)
13154 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
13155
13156 h = NULL;
13157 sym = NULL;
13158 sec = NULL;
13159
13160 if (r_symndx < symtab_hdr->sh_info)
13161 {
13162 sym = local_syms + r_symndx;
13163 sym_type = ELF32_ST_TYPE (sym->st_info);
13164 sec = local_sections[r_symndx];
13165
13166 /* An object file might have a reference to a local
13167 undefined symbol. This is a daft object file, but we
13168 should at least do something about it. V4BX & NONE
13169 relocations do not use the symbol and are explicitly
13170 allowed to use the undefined symbol, so allow those.
13171 Likewise for relocations against STN_UNDEF. */
13172 if (r_type != R_ARM_V4BX
13173 && r_type != R_ARM_NONE
13174 && r_symndx != STN_UNDEF
13175 && bfd_is_und_section (sec)
13176 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
13177 (*info->callbacks->undefined_symbol)
13178 (info, bfd_elf_string_from_elf_section
13179 (input_bfd, symtab_hdr->sh_link, sym->st_name),
13180 input_bfd, input_section,
13181 rel->r_offset, true);
13182
13183 if (globals->use_rel)
13184 {
13185 relocation = (sec->output_section->vma
13186 + sec->output_offset
13187 + sym->st_value);
13188 if (!bfd_link_relocatable (info)
13189 && (sec->flags & SEC_MERGE)
13190 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13191 {
13192 asection *msec;
13193 bfd_vma addend, value;
13194
13195 switch (r_type)
13196 {
13197 case R_ARM_MOVW_ABS_NC:
13198 case R_ARM_MOVT_ABS:
13199 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13200 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
13201 addend = (addend ^ 0x8000) - 0x8000;
13202 break;
13203
13204 case R_ARM_THM_MOVW_ABS_NC:
13205 case R_ARM_THM_MOVT_ABS:
13206 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
13207 << 16;
13208 value |= bfd_get_16 (input_bfd,
13209 contents + rel->r_offset + 2);
13210 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
13211 | ((value & 0x04000000) >> 15);
13212 addend = (addend ^ 0x8000) - 0x8000;
13213 break;
13214
13215 default:
13216 if (howto->rightshift
13217 || (howto->src_mask & (howto->src_mask + 1)))
13218 {
13219 _bfd_error_handler
13220 /* xgettext:c-format */
13221 (_("%pB(%pA+%#" PRIx64 "): "
13222 "%s relocation against SEC_MERGE section"),
13223 input_bfd, input_section,
13224 (uint64_t) rel->r_offset, howto->name);
13225 return false;
13226 }
13227
13228 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13229
13230 /* Get the (signed) value from the instruction. */
13231 addend = value & howto->src_mask;
13232 if (addend & ((howto->src_mask + 1) >> 1))
13233 {
13234 bfd_signed_vma mask;
13235
13236 mask = -1;
13237 mask &= ~ howto->src_mask;
13238 addend |= mask;
13239 }
13240 break;
13241 }
13242
13243 msec = sec;
13244 addend =
13245 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
13246 - relocation;
13247 addend += msec->output_section->vma + msec->output_offset;
13248
13249 /* Cases here must match those in the preceding
13250 switch statement. */
13251 switch (r_type)
13252 {
13253 case R_ARM_MOVW_ABS_NC:
13254 case R_ARM_MOVT_ABS:
13255 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
13256 | (addend & 0xfff);
13257 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13258 break;
13259
13260 case R_ARM_THM_MOVW_ABS_NC:
13261 case R_ARM_THM_MOVT_ABS:
13262 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
13263 | (addend & 0xff) | ((addend & 0x0800) << 15);
13264 bfd_put_16 (input_bfd, value >> 16,
13265 contents + rel->r_offset);
13266 bfd_put_16 (input_bfd, value,
13267 contents + rel->r_offset + 2);
13268 break;
13269
13270 default:
13271 value = (value & ~ howto->dst_mask)
13272 | (addend & howto->dst_mask);
13273 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13274 break;
13275 }
13276 }
13277 }
13278 else
13279 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
13280 }
13281 else
13282 {
13283 bool warned, ignored;
13284
13285 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
13286 r_symndx, symtab_hdr, sym_hashes,
13287 h, sec, relocation,
13288 unresolved_reloc, warned, ignored);
13289
13290 sym_type = h->type;
13291 }
13292
13293 if (sec != NULL && discarded_section (sec))
13294 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
13295 rel, 1, relend, howto, 0, contents);
13296
13297 if (bfd_link_relocatable (info))
13298 {
13299 /* This is a relocatable link. We don't have to change
13300 anything, unless the reloc is against a section symbol,
13301 in which case we have to adjust according to where the
13302 section symbol winds up in the output section. */
13303 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13304 {
13305 if (globals->use_rel)
13306 arm_add_to_rel (input_bfd, contents + rel->r_offset,
13307 howto, (bfd_signed_vma) sec->output_offset);
13308 else
13309 rel->r_addend += sec->output_offset;
13310 }
13311 continue;
13312 }
13313
13314 if (h != NULL)
13315 name = h->root.root.string;
13316 else
13317 {
13318 name = (bfd_elf_string_from_elf_section
13319 (input_bfd, symtab_hdr->sh_link, sym->st_name));
13320 if (name == NULL || *name == '\0')
13321 name = bfd_section_name (sec);
13322 }
13323
13324 if (r_symndx != STN_UNDEF
13325 && r_type != R_ARM_NONE
13326 && (h == NULL
13327 || h->root.type == bfd_link_hash_defined
13328 || h->root.type == bfd_link_hash_defweak)
13329 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
13330 {
13331 _bfd_error_handler
13332 ((sym_type == STT_TLS
13333 /* xgettext:c-format */
13334 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
13335 /* xgettext:c-format */
13336 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
13337 input_bfd,
13338 input_section,
13339 (uint64_t) rel->r_offset,
13340 howto->name,
13341 name);
13342 }
13343
13344 /* We call elf32_arm_final_link_relocate unless we're completely
13345 done, i.e., the relaxation produced the final output we want,
13346 and we won't let anybody mess with it. Also, we have to do
13347 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13348 both in relaxed and non-relaxed cases. */
13349 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
13350 || (IS_ARM_TLS_GNU_RELOC (r_type)
13351 && !((h ? elf32_arm_hash_entry (h)->tls_type :
13352 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
13353 & GOT_TLS_GDESC)))
13354 {
13355 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
13356 contents, rel, h == NULL);
13357 /* This may have been marked unresolved because it came from
13358 a shared library. But we've just dealt with that. */
13359 unresolved_reloc = 0;
13360 }
13361 else
13362 r = bfd_reloc_continue;
13363
13364 if (r == bfd_reloc_continue)
13365 {
13366 unsigned char branch_type =
13367 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
13368 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
13369
13370 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
13371 input_section, contents, rel,
13372 relocation, info, sec, name,
13373 sym_type, branch_type, h,
13374 &unresolved_reloc,
13375 &error_message);
13376 }
13377
13378 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13379 because such sections are not SEC_ALLOC and thus ld.so will
13380 not process them. */
13381 if (unresolved_reloc
13382 && !((input_section->flags & SEC_DEBUGGING) != 0
13383 && h->def_dynamic)
13384 && _bfd_elf_section_offset (output_bfd, info, input_section,
13385 rel->r_offset) != (bfd_vma) -1)
13386 {
13387 _bfd_error_handler
13388 /* xgettext:c-format */
13389 (_("%pB(%pA+%#" PRIx64 "): "
13390 "unresolvable %s relocation against symbol `%s'"),
13391 input_bfd,
13392 input_section,
13393 (uint64_t) rel->r_offset,
13394 howto->name,
13395 h->root.root.string);
13396 return false;
13397 }
13398
13399 if (r != bfd_reloc_ok)
13400 {
13401 switch (r)
13402 {
13403 case bfd_reloc_overflow:
13404 /* If the overflowing reloc was to an undefined symbol,
13405 we have already printed one error message and there
13406 is no point complaining again. */
13407 if (!h || h->root.type != bfd_link_hash_undefined)
13408 (*info->callbacks->reloc_overflow)
13409 (info, (h ? &h->root : NULL), name, howto->name,
13410 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
13411 break;
13412
13413 case bfd_reloc_undefined:
13414 (*info->callbacks->undefined_symbol)
13415 (info, name, input_bfd, input_section, rel->r_offset, true);
13416 break;
13417
13418 case bfd_reloc_outofrange:
13419 error_message = _("out of range");
13420 goto common_error;
13421
13422 case bfd_reloc_notsupported:
13423 error_message = _("unsupported relocation");
13424 goto common_error;
13425
13426 case bfd_reloc_dangerous:
13427 /* error_message should already be set. */
13428 goto common_error;
13429
13430 default:
13431 error_message = _("unknown error");
13432 /* Fall through. */
13433
13434 common_error:
13435 BFD_ASSERT (error_message != NULL);
13436 (*info->callbacks->reloc_dangerous)
13437 (info, error_message, input_bfd, input_section, rel->r_offset);
13438 break;
13439 }
13440 }
13441 }
13442
13443 return true;
13444 }
13445
13446 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13447 adds the edit to the start of the list. (The list must be built in order of
13448 ascending TINDEX: the function's callers are primarily responsible for
13449 maintaining that condition). */
13450
13451 static void
13452 add_unwind_table_edit (arm_unwind_table_edit **head,
13453 arm_unwind_table_edit **tail,
13454 arm_unwind_edit_type type,
13455 asection *linked_section,
13456 unsigned int tindex)
13457 {
13458 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
13459 xmalloc (sizeof (arm_unwind_table_edit));
13460
13461 new_edit->type = type;
13462 new_edit->linked_section = linked_section;
13463 new_edit->index = tindex;
13464
13465 if (tindex > 0)
13466 {
13467 new_edit->next = NULL;
13468
13469 if (*tail)
13470 (*tail)->next = new_edit;
13471
13472 (*tail) = new_edit;
13473
13474 if (!*head)
13475 (*head) = new_edit;
13476 }
13477 else
13478 {
13479 new_edit->next = *head;
13480
13481 if (!*tail)
13482 *tail = new_edit;
13483
13484 *head = new_edit;
13485 }
13486 }
13487
13488 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
13489
13490 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13491
13492 static void
13493 adjust_exidx_size (asection *exidx_sec, int adjust)
13494 {
13495 asection *out_sec;
13496
13497 if (!exidx_sec->rawsize)
13498 exidx_sec->rawsize = exidx_sec->size;
13499
13500 bfd_set_section_size (exidx_sec, exidx_sec->size + adjust);
13501 out_sec = exidx_sec->output_section;
13502 /* Adjust size of output section. */
13503 bfd_set_section_size (out_sec, out_sec->size + adjust);
13504 }
13505
13506 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13507
13508 static void
13509 insert_cantunwind_after (asection *text_sec, asection *exidx_sec)
13510 {
13511 struct _arm_elf_section_data *exidx_arm_data;
13512
13513 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13514 add_unwind_table_edit
13515 (&exidx_arm_data->u.exidx.unwind_edit_list,
13516 &exidx_arm_data->u.exidx.unwind_edit_tail,
13517 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
13518
13519 exidx_arm_data->additional_reloc_count++;
13520
13521 adjust_exidx_size (exidx_sec, 8);
13522 }
13523
13524 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13525 made to those tables, such that:
13526
13527 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13528 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13529 codes which have been inlined into the index).
13530
13531 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13532
13533 The edits are applied when the tables are written
13534 (in elf32_arm_write_section). */
13535
13536 bool
13537 elf32_arm_fix_exidx_coverage (asection **text_section_order,
13538 unsigned int num_text_sections,
13539 struct bfd_link_info *info,
13540 bool merge_exidx_entries)
13541 {
13542 bfd *inp;
13543 unsigned int last_second_word = 0, i;
13544 asection *last_exidx_sec = NULL;
13545 asection *last_text_sec = NULL;
13546 int last_unwind_type = -1;
13547
13548 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13549 text sections. */
13550 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
13551 {
13552 asection *sec;
13553
13554 for (sec = inp->sections; sec != NULL; sec = sec->next)
13555 {
13556 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
13557 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
13558
13559 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
13560 continue;
13561
13562 if (elf_sec->linked_to)
13563 {
13564 Elf_Internal_Shdr *linked_hdr
13565 = &elf_section_data (elf_sec->linked_to)->this_hdr;
13566 struct _arm_elf_section_data *linked_sec_arm_data
13567 = get_arm_elf_section_data (linked_hdr->bfd_section);
13568
13569 if (linked_sec_arm_data == NULL)
13570 continue;
13571
13572 /* Link this .ARM.exidx section back from the text section it
13573 describes. */
13574 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
13575 }
13576 }
13577 }
13578
13579 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13580 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13581 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13582
13583 for (i = 0; i < num_text_sections; i++)
13584 {
13585 asection *sec = text_section_order[i];
13586 asection *exidx_sec;
13587 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
13588 struct _arm_elf_section_data *exidx_arm_data;
13589 bfd_byte *contents = NULL;
13590 int deleted_exidx_bytes = 0;
13591 bfd_vma j;
13592 arm_unwind_table_edit *unwind_edit_head = NULL;
13593 arm_unwind_table_edit *unwind_edit_tail = NULL;
13594 Elf_Internal_Shdr *hdr;
13595 bfd *ibfd;
13596
13597 if (arm_data == NULL)
13598 continue;
13599
13600 exidx_sec = arm_data->u.text.arm_exidx_sec;
13601 if (exidx_sec == NULL)
13602 {
13603 /* Section has no unwind data. */
13604 if (last_unwind_type == 0 || !last_exidx_sec)
13605 continue;
13606
13607 /* Ignore zero sized sections. */
13608 if (sec->size == 0)
13609 continue;
13610
13611 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13612 last_unwind_type = 0;
13613 continue;
13614 }
13615
13616 /* Skip /DISCARD/ sections. */
13617 if (bfd_is_abs_section (exidx_sec->output_section))
13618 continue;
13619
13620 hdr = &elf_section_data (exidx_sec)->this_hdr;
13621 if (hdr->sh_type != SHT_ARM_EXIDX)
13622 continue;
13623
13624 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13625 if (exidx_arm_data == NULL)
13626 continue;
13627
13628 ibfd = exidx_sec->owner;
13629
13630 if (hdr->contents != NULL)
13631 contents = hdr->contents;
13632 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
13633 /* An error? */
13634 continue;
13635
13636 if (last_unwind_type > 0)
13637 {
13638 unsigned int first_word = bfd_get_32 (ibfd, contents);
13639 /* Add cantunwind if first unwind item does not match section
13640 start. */
13641 if (first_word != sec->vma)
13642 {
13643 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13644 last_unwind_type = 0;
13645 }
13646 }
13647
13648 for (j = 0; j < hdr->sh_size; j += 8)
13649 {
13650 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
13651 int unwind_type;
13652 int elide = 0;
13653
13654 /* An EXIDX_CANTUNWIND entry. */
13655 if (second_word == 1)
13656 {
13657 if (last_unwind_type == 0)
13658 elide = 1;
13659 unwind_type = 0;
13660 }
13661 /* Inlined unwinding data. Merge if equal to previous. */
13662 else if ((second_word & 0x80000000) != 0)
13663 {
13664 if (merge_exidx_entries
13665 && last_second_word == second_word && last_unwind_type == 1)
13666 elide = 1;
13667 unwind_type = 1;
13668 last_second_word = second_word;
13669 }
13670 /* Normal table entry. In theory we could merge these too,
13671 but duplicate entries are likely to be much less common. */
13672 else
13673 unwind_type = 2;
13674
13675 if (elide && !bfd_link_relocatable (info))
13676 {
13677 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
13678 DELETE_EXIDX_ENTRY, NULL, j / 8);
13679
13680 deleted_exidx_bytes += 8;
13681 }
13682
13683 last_unwind_type = unwind_type;
13684 }
13685
13686 /* Free contents if we allocated it ourselves. */
13687 if (contents != hdr->contents)
13688 free (contents);
13689
13690 /* Record edits to be applied later (in elf32_arm_write_section). */
13691 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
13692 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
13693
13694 if (deleted_exidx_bytes > 0)
13695 adjust_exidx_size (exidx_sec, - deleted_exidx_bytes);
13696
13697 last_exidx_sec = exidx_sec;
13698 last_text_sec = sec;
13699 }
13700
13701 /* Add terminating CANTUNWIND entry. */
13702 if (!bfd_link_relocatable (info) && last_exidx_sec
13703 && last_unwind_type != 0)
13704 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13705
13706 return true;
13707 }
13708
13709 static bool
13710 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
13711 bfd *ibfd, const char *name)
13712 {
13713 asection *sec, *osec;
13714
13715 sec = bfd_get_linker_section (ibfd, name);
13716 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
13717 return true;
13718
13719 osec = sec->output_section;
13720 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
13721 return true;
13722
13723 if (! bfd_set_section_contents (obfd, osec, sec->contents,
13724 sec->output_offset, sec->size))
13725 return false;
13726
13727 return true;
13728 }
13729
13730 static bool
13731 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
13732 {
13733 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
13734 asection *sec, *osec;
13735
13736 if (globals == NULL)
13737 return false;
13738
13739 /* Invoke the regular ELF backend linker to do all the work. */
13740 if (!bfd_elf_final_link (abfd, info))
13741 return false;
13742
13743 /* Process stub sections (eg BE8 encoding, ...). */
13744 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
13745 unsigned int i;
13746 for (i=0; i<htab->top_id; i++)
13747 {
13748 sec = htab->stub_group[i].stub_sec;
13749 /* Only process it once, in its link_sec slot. */
13750 if (sec && i == htab->stub_group[i].link_sec->id)
13751 {
13752 osec = sec->output_section;
13753 elf32_arm_write_section (abfd, info, sec, sec->contents);
13754 if (! bfd_set_section_contents (abfd, osec, sec->contents,
13755 sec->output_offset, sec->size))
13756 return false;
13757 }
13758 }
13759
13760 /* Write out any glue sections now that we have created all the
13761 stubs. */
13762 if (globals->bfd_of_glue_owner != NULL)
13763 {
13764 if (! elf32_arm_output_glue_section (info, abfd,
13765 globals->bfd_of_glue_owner,
13766 ARM2THUMB_GLUE_SECTION_NAME))
13767 return false;
13768
13769 if (! elf32_arm_output_glue_section (info, abfd,
13770 globals->bfd_of_glue_owner,
13771 THUMB2ARM_GLUE_SECTION_NAME))
13772 return false;
13773
13774 if (! elf32_arm_output_glue_section (info, abfd,
13775 globals->bfd_of_glue_owner,
13776 VFP11_ERRATUM_VENEER_SECTION_NAME))
13777 return false;
13778
13779 if (! elf32_arm_output_glue_section (info, abfd,
13780 globals->bfd_of_glue_owner,
13781 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
13782 return false;
13783
13784 if (! elf32_arm_output_glue_section (info, abfd,
13785 globals->bfd_of_glue_owner,
13786 ARM_BX_GLUE_SECTION_NAME))
13787 return false;
13788 }
13789
13790 return true;
13791 }
13792
13793 /* Return a best guess for the machine number based on the attributes. */
13794
13795 static unsigned int
13796 bfd_arm_get_mach_from_attributes (bfd * abfd)
13797 {
13798 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
13799
13800 switch (arch)
13801 {
13802 case TAG_CPU_ARCH_PRE_V4: return bfd_mach_arm_3M;
13803 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
13804 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
13805 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
13806
13807 case TAG_CPU_ARCH_V5TE:
13808 {
13809 char * name;
13810
13811 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
13812 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
13813
13814 if (name)
13815 {
13816 if (strcmp (name, "IWMMXT2") == 0)
13817 return bfd_mach_arm_iWMMXt2;
13818
13819 if (strcmp (name, "IWMMXT") == 0)
13820 return bfd_mach_arm_iWMMXt;
13821
13822 if (strcmp (name, "XSCALE") == 0)
13823 {
13824 int wmmx;
13825
13826 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
13827 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
13828 switch (wmmx)
13829 {
13830 case 1: return bfd_mach_arm_iWMMXt;
13831 case 2: return bfd_mach_arm_iWMMXt2;
13832 default: return bfd_mach_arm_XScale;
13833 }
13834 }
13835 }
13836
13837 return bfd_mach_arm_5TE;
13838 }
13839
13840 case TAG_CPU_ARCH_V5TEJ:
13841 return bfd_mach_arm_5TEJ;
13842 case TAG_CPU_ARCH_V6:
13843 return bfd_mach_arm_6;
13844 case TAG_CPU_ARCH_V6KZ:
13845 return bfd_mach_arm_6KZ;
13846 case TAG_CPU_ARCH_V6T2:
13847 return bfd_mach_arm_6T2;
13848 case TAG_CPU_ARCH_V6K:
13849 return bfd_mach_arm_6K;
13850 case TAG_CPU_ARCH_V7:
13851 return bfd_mach_arm_7;
13852 case TAG_CPU_ARCH_V6_M:
13853 return bfd_mach_arm_6M;
13854 case TAG_CPU_ARCH_V6S_M:
13855 return bfd_mach_arm_6SM;
13856 case TAG_CPU_ARCH_V7E_M:
13857 return bfd_mach_arm_7EM;
13858 case TAG_CPU_ARCH_V8:
13859 return bfd_mach_arm_8;
13860 case TAG_CPU_ARCH_V8R:
13861 return bfd_mach_arm_8R;
13862 case TAG_CPU_ARCH_V8M_BASE:
13863 return bfd_mach_arm_8M_BASE;
13864 case TAG_CPU_ARCH_V8M_MAIN:
13865 return bfd_mach_arm_8M_MAIN;
13866 case TAG_CPU_ARCH_V8_1M_MAIN:
13867 return bfd_mach_arm_8_1M_MAIN;
13868 case TAG_CPU_ARCH_V9:
13869 return bfd_mach_arm_9;
13870
13871 default:
13872 /* Force entry to be added for any new known Tag_CPU_arch value. */
13873 BFD_ASSERT (arch > MAX_TAG_CPU_ARCH);
13874
13875 /* Unknown Tag_CPU_arch value. */
13876 return bfd_mach_arm_unknown;
13877 }
13878 }
13879
13880 /* Set the right machine number. */
13881
13882 static bool
13883 elf32_arm_object_p (bfd *abfd)
13884 {
13885 unsigned int mach;
13886
13887 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
13888
13889 if (mach == bfd_mach_arm_unknown)
13890 {
13891 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13892 mach = bfd_mach_arm_ep9312;
13893 else
13894 mach = bfd_arm_get_mach_from_attributes (abfd);
13895 }
13896
13897 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13898 return true;
13899 }
13900
13901 /* Function to keep ARM specific flags in the ELF header. */
13902
13903 static bool
13904 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13905 {
13906 if (elf_flags_init (abfd)
13907 && elf_elfheader (abfd)->e_flags != flags)
13908 {
13909 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13910 {
13911 if (flags & EF_ARM_INTERWORK)
13912 _bfd_error_handler
13913 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13914 abfd);
13915 else
13916 _bfd_error_handler
13917 (_("warning: clearing the interworking flag of %pB due to outside request"),
13918 abfd);
13919 }
13920 }
13921 else
13922 {
13923 elf_elfheader (abfd)->e_flags = flags;
13924 elf_flags_init (abfd) = true;
13925 }
13926
13927 return true;
13928 }
13929
13930 /* Copy backend specific data from one object module to another. */
13931
13932 static bool
13933 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13934 {
13935 flagword in_flags;
13936 flagword out_flags;
13937
13938 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13939 return true;
13940
13941 in_flags = elf_elfheader (ibfd)->e_flags;
13942 out_flags = elf_elfheader (obfd)->e_flags;
13943
13944 if (elf_flags_init (obfd)
13945 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13946 && in_flags != out_flags)
13947 {
13948 /* Cannot mix APCS26 and APCS32 code. */
13949 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13950 return false;
13951
13952 /* Cannot mix float APCS and non-float APCS code. */
13953 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13954 return false;
13955
13956 /* If the src and dest have different interworking flags
13957 then turn off the interworking bit. */
13958 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13959 {
13960 if (out_flags & EF_ARM_INTERWORK)
13961 _bfd_error_handler
13962 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13963 obfd, ibfd);
13964
13965 in_flags &= ~EF_ARM_INTERWORK;
13966 }
13967
13968 /* Likewise for PIC, though don't warn for this case. */
13969 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13970 in_flags &= ~EF_ARM_PIC;
13971 }
13972
13973 elf_elfheader (obfd)->e_flags = in_flags;
13974 elf_flags_init (obfd) = true;
13975
13976 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13977 }
13978
13979 /* Values for Tag_ABI_PCS_R9_use. */
13980 enum
13981 {
13982 AEABI_R9_V6,
13983 AEABI_R9_SB,
13984 AEABI_R9_TLS,
13985 AEABI_R9_unused
13986 };
13987
13988 /* Values for Tag_ABI_PCS_RW_data. */
13989 enum
13990 {
13991 AEABI_PCS_RW_data_absolute,
13992 AEABI_PCS_RW_data_PCrel,
13993 AEABI_PCS_RW_data_SBrel,
13994 AEABI_PCS_RW_data_unused
13995 };
13996
13997 /* Values for Tag_ABI_enum_size. */
13998 enum
13999 {
14000 AEABI_enum_unused,
14001 AEABI_enum_short,
14002 AEABI_enum_wide,
14003 AEABI_enum_forced_wide
14004 };
14005
14006 /* Determine whether an object attribute tag takes an integer, a
14007 string or both. */
14008
14009 static int
14010 elf32_arm_obj_attrs_arg_type (int tag)
14011 {
14012 if (tag == Tag_compatibility)
14013 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
14014 else if (tag == Tag_nodefaults)
14015 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
14016 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
14017 return ATTR_TYPE_FLAG_STR_VAL;
14018 else if (tag < 32)
14019 return ATTR_TYPE_FLAG_INT_VAL;
14020 else
14021 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
14022 }
14023
14024 /* The ABI defines that Tag_conformance should be emitted first, and that
14025 Tag_nodefaults should be second (if either is defined). This sets those
14026 two positions, and bumps up the position of all the remaining tags to
14027 compensate. */
14028 static int
14029 elf32_arm_obj_attrs_order (int num)
14030 {
14031 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
14032 return Tag_conformance;
14033 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
14034 return Tag_nodefaults;
14035 if ((num - 2) < Tag_nodefaults)
14036 return num - 2;
14037 if ((num - 1) < Tag_conformance)
14038 return num - 1;
14039 return num;
14040 }
14041
14042 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
14043 static bool
14044 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
14045 {
14046 if ((tag & 127) < 64)
14047 {
14048 _bfd_error_handler
14049 (_("%pB: unknown mandatory EABI object attribute %d"),
14050 abfd, tag);
14051 bfd_set_error (bfd_error_bad_value);
14052 return false;
14053 }
14054 else
14055 {
14056 _bfd_error_handler
14057 (_("warning: %pB: unknown EABI object attribute %d"),
14058 abfd, tag);
14059 return true;
14060 }
14061 }
14062
14063 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
14064 Returns -1 if no architecture could be read. */
14065
14066 static int
14067 get_secondary_compatible_arch (bfd *abfd)
14068 {
14069 obj_attribute *attr =
14070 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14071
14072 /* Note: the tag and its argument below are uleb128 values, though
14073 currently-defined values fit in one byte for each. */
14074 if (attr->s
14075 && attr->s[0] == Tag_CPU_arch
14076 && (attr->s[1] & 128) != 128
14077 && attr->s[2] == 0)
14078 return attr->s[1];
14079
14080 /* This tag is "safely ignorable", so don't complain if it looks funny. */
14081 return -1;
14082 }
14083
14084 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
14085 The tag is removed if ARCH is -1. */
14086
14087 static void
14088 set_secondary_compatible_arch (bfd *abfd, int arch)
14089 {
14090 obj_attribute *attr =
14091 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14092
14093 if (arch == -1)
14094 {
14095 attr->s = NULL;
14096 return;
14097 }
14098
14099 /* Note: the tag and its argument below are uleb128 values, though
14100 currently-defined values fit in one byte for each. */
14101 if (!attr->s)
14102 attr->s = (char *) bfd_alloc (abfd, 3);
14103 attr->s[0] = Tag_CPU_arch;
14104 attr->s[1] = arch;
14105 attr->s[2] = '\0';
14106 }
14107
14108 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
14109 into account. */
14110
14111 static int
14112 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
14113 int newtag, int secondary_compat)
14114 {
14115 #define T(X) TAG_CPU_ARCH_##X
14116 int tagl, tagh, result;
14117 const int v6t2[] =
14118 {
14119 T(V6T2), /* PRE_V4. */
14120 T(V6T2), /* V4. */
14121 T(V6T2), /* V4T. */
14122 T(V6T2), /* V5T. */
14123 T(V6T2), /* V5TE. */
14124 T(V6T2), /* V5TEJ. */
14125 T(V6T2), /* V6. */
14126 T(V7), /* V6KZ. */
14127 T(V6T2) /* V6T2. */
14128 };
14129 const int v6k[] =
14130 {
14131 T(V6K), /* PRE_V4. */
14132 T(V6K), /* V4. */
14133 T(V6K), /* V4T. */
14134 T(V6K), /* V5T. */
14135 T(V6K), /* V5TE. */
14136 T(V6K), /* V5TEJ. */
14137 T(V6K), /* V6. */
14138 T(V6KZ), /* V6KZ. */
14139 T(V7), /* V6T2. */
14140 T(V6K) /* V6K. */
14141 };
14142 const int v7[] =
14143 {
14144 T(V7), /* PRE_V4. */
14145 T(V7), /* V4. */
14146 T(V7), /* V4T. */
14147 T(V7), /* V5T. */
14148 T(V7), /* V5TE. */
14149 T(V7), /* V5TEJ. */
14150 T(V7), /* V6. */
14151 T(V7), /* V6KZ. */
14152 T(V7), /* V6T2. */
14153 T(V7), /* V6K. */
14154 T(V7) /* V7. */
14155 };
14156 const int v6_m[] =
14157 {
14158 -1, /* PRE_V4. */
14159 -1, /* V4. */
14160 T(V6K), /* V4T. */
14161 T(V6K), /* V5T. */
14162 T(V6K), /* V5TE. */
14163 T(V6K), /* V5TEJ. */
14164 T(V6K), /* V6. */
14165 T(V6KZ), /* V6KZ. */
14166 T(V7), /* V6T2. */
14167 T(V6K), /* V6K. */
14168 T(V7), /* V7. */
14169 T(V6_M) /* V6_M. */
14170 };
14171 const int v6s_m[] =
14172 {
14173 -1, /* PRE_V4. */
14174 -1, /* V4. */
14175 T(V6K), /* V4T. */
14176 T(V6K), /* V5T. */
14177 T(V6K), /* V5TE. */
14178 T(V6K), /* V5TEJ. */
14179 T(V6K), /* V6. */
14180 T(V6KZ), /* V6KZ. */
14181 T(V7), /* V6T2. */
14182 T(V6K), /* V6K. */
14183 T(V7), /* V7. */
14184 T(V6S_M), /* V6_M. */
14185 T(V6S_M) /* V6S_M. */
14186 };
14187 const int v7e_m[] =
14188 {
14189 -1, /* PRE_V4. */
14190 -1, /* V4. */
14191 T(V7E_M), /* V4T. */
14192 T(V7E_M), /* V5T. */
14193 T(V7E_M), /* V5TE. */
14194 T(V7E_M), /* V5TEJ. */
14195 T(V7E_M), /* V6. */
14196 T(V7E_M), /* V6KZ. */
14197 T(V7E_M), /* V6T2. */
14198 T(V7E_M), /* V6K. */
14199 T(V7E_M), /* V7. */
14200 T(V7E_M), /* V6_M. */
14201 T(V7E_M), /* V6S_M. */
14202 T(V7E_M) /* V7E_M. */
14203 };
14204 const int v8[] =
14205 {
14206 T(V8), /* PRE_V4. */
14207 T(V8), /* V4. */
14208 T(V8), /* V4T. */
14209 T(V8), /* V5T. */
14210 T(V8), /* V5TE. */
14211 T(V8), /* V5TEJ. */
14212 T(V8), /* V6. */
14213 T(V8), /* V6KZ. */
14214 T(V8), /* V6T2. */
14215 T(V8), /* V6K. */
14216 T(V8), /* V7. */
14217 T(V8), /* V6_M. */
14218 T(V8), /* V6S_M. */
14219 T(V8), /* V7E_M. */
14220 T(V8), /* V8. */
14221 T(V8), /* V8-R. */
14222 T(V8), /* V8-M.BASE. */
14223 T(V8), /* V8-M.MAIN. */
14224 T(V8), /* V8.1. */
14225 T(V8), /* V8.2. */
14226 T(V8), /* V8.3. */
14227 T(V8), /* V8.1-M.MAIN. */
14228 };
14229 const int v8r[] =
14230 {
14231 T(V8R), /* PRE_V4. */
14232 T(V8R), /* V4. */
14233 T(V8R), /* V4T. */
14234 T(V8R), /* V5T. */
14235 T(V8R), /* V5TE. */
14236 T(V8R), /* V5TEJ. */
14237 T(V8R), /* V6. */
14238 T(V8R), /* V6KZ. */
14239 T(V8R), /* V6T2. */
14240 T(V8R), /* V6K. */
14241 T(V8R), /* V7. */
14242 T(V8R), /* V6_M. */
14243 T(V8R), /* V6S_M. */
14244 T(V8R), /* V7E_M. */
14245 T(V8), /* V8. */
14246 T(V8R), /* V8R. */
14247 };
14248 const int v8m_baseline[] =
14249 {
14250 -1, /* PRE_V4. */
14251 -1, /* V4. */
14252 -1, /* V4T. */
14253 -1, /* V5T. */
14254 -1, /* V5TE. */
14255 -1, /* V5TEJ. */
14256 -1, /* V6. */
14257 -1, /* V6KZ. */
14258 -1, /* V6T2. */
14259 -1, /* V6K. */
14260 -1, /* V7. */
14261 T(V8M_BASE), /* V6_M. */
14262 T(V8M_BASE), /* V6S_M. */
14263 -1, /* V7E_M. */
14264 -1, /* V8. */
14265 -1, /* V8R. */
14266 T(V8M_BASE) /* V8-M BASELINE. */
14267 };
14268 const int v8m_mainline[] =
14269 {
14270 -1, /* PRE_V4. */
14271 -1, /* V4. */
14272 -1, /* V4T. */
14273 -1, /* V5T. */
14274 -1, /* V5TE. */
14275 -1, /* V5TEJ. */
14276 -1, /* V6. */
14277 -1, /* V6KZ. */
14278 -1, /* V6T2. */
14279 -1, /* V6K. */
14280 T(V8M_MAIN), /* V7. */
14281 T(V8M_MAIN), /* V6_M. */
14282 T(V8M_MAIN), /* V6S_M. */
14283 T(V8M_MAIN), /* V7E_M. */
14284 -1, /* V8. */
14285 -1, /* V8R. */
14286 T(V8M_MAIN), /* V8-M BASELINE. */
14287 T(V8M_MAIN) /* V8-M MAINLINE. */
14288 };
14289 const int v8_1m_mainline[] =
14290 {
14291 -1, /* PRE_V4. */
14292 -1, /* V4. */
14293 -1, /* V4T. */
14294 -1, /* V5T. */
14295 -1, /* V5TE. */
14296 -1, /* V5TEJ. */
14297 -1, /* V6. */
14298 -1, /* V6KZ. */
14299 -1, /* V6T2. */
14300 -1, /* V6K. */
14301 T(V8_1M_MAIN), /* V7. */
14302 T(V8_1M_MAIN), /* V6_M. */
14303 T(V8_1M_MAIN), /* V6S_M. */
14304 T(V8_1M_MAIN), /* V7E_M. */
14305 -1, /* V8. */
14306 -1, /* V8R. */
14307 T(V8_1M_MAIN), /* V8-M BASELINE. */
14308 T(V8_1M_MAIN), /* V8-M MAINLINE. */
14309 -1, /* Unused (18). */
14310 -1, /* Unused (19). */
14311 -1, /* Unused (20). */
14312 T(V8_1M_MAIN) /* V8.1-M MAINLINE. */
14313 };
14314 const int v9[] =
14315 {
14316 T(V9), /* PRE_V4. */
14317 T(V9), /* V4. */
14318 T(V9), /* V4T. */
14319 T(V9), /* V5T. */
14320 T(V9), /* V5TE. */
14321 T(V9), /* V5TEJ. */
14322 T(V9), /* V6. */
14323 T(V9), /* V6KZ. */
14324 T(V9), /* V6T2. */
14325 T(V9), /* V6K. */
14326 T(V9), /* V7. */
14327 T(V9), /* V6_M. */
14328 T(V9), /* V6S_M. */
14329 T(V9), /* V7E_M. */
14330 T(V9), /* V8. */
14331 T(V9), /* V8-R. */
14332 T(V9), /* V8-M.BASE. */
14333 T(V9), /* V8-M.MAIN. */
14334 T(V9), /* V8.1. */
14335 T(V9), /* V8.2. */
14336 T(V9), /* V8.3. */
14337 T(V9), /* V8.1-M.MAIN. */
14338 T(V9), /* V9. */
14339 };
14340 const int v4t_plus_v6_m[] =
14341 {
14342 -1, /* PRE_V4. */
14343 -1, /* V4. */
14344 T(V4T), /* V4T. */
14345 T(V5T), /* V5T. */
14346 T(V5TE), /* V5TE. */
14347 T(V5TEJ), /* V5TEJ. */
14348 T(V6), /* V6. */
14349 T(V6KZ), /* V6KZ. */
14350 T(V6T2), /* V6T2. */
14351 T(V6K), /* V6K. */
14352 T(V7), /* V7. */
14353 T(V6_M), /* V6_M. */
14354 T(V6S_M), /* V6S_M. */
14355 T(V7E_M), /* V7E_M. */
14356 T(V8), /* V8. */
14357 -1, /* V8R. */
14358 T(V8M_BASE), /* V8-M BASELINE. */
14359 T(V8M_MAIN), /* V8-M MAINLINE. */
14360 -1, /* Unused (18). */
14361 -1, /* Unused (19). */
14362 -1, /* Unused (20). */
14363 T(V8_1M_MAIN), /* V8.1-M MAINLINE. */
14364 T(V9), /* V9. */
14365 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
14366 };
14367 const int *comb[] =
14368 {
14369 v6t2,
14370 v6k,
14371 v7,
14372 v6_m,
14373 v6s_m,
14374 v7e_m,
14375 v8,
14376 v8r,
14377 v8m_baseline,
14378 v8m_mainline,
14379 NULL,
14380 NULL,
14381 NULL,
14382 v8_1m_mainline,
14383 v9,
14384 /* Pseudo-architecture. */
14385 v4t_plus_v6_m
14386 };
14387
14388 /* Check we've not got a higher architecture than we know about. */
14389
14390 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
14391 {
14392 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
14393 return -1;
14394 }
14395
14396 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14397
14398 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
14399 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
14400 oldtag = T(V4T_PLUS_V6_M);
14401
14402 /* And override the new tag if we have a Tag_also_compatible_with on the
14403 input. */
14404
14405 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
14406 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
14407 newtag = T(V4T_PLUS_V6_M);
14408
14409 tagl = (oldtag < newtag) ? oldtag : newtag;
14410 result = tagh = (oldtag > newtag) ? oldtag : newtag;
14411
14412 /* Architectures before V6KZ add features monotonically. */
14413 if (tagh <= TAG_CPU_ARCH_V6KZ)
14414 return result;
14415
14416 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
14417
14418 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14419 as the canonical version. */
14420 if (result == T(V4T_PLUS_V6_M))
14421 {
14422 result = T(V4T);
14423 *secondary_compat_out = T(V6_M);
14424 }
14425 else
14426 *secondary_compat_out = -1;
14427
14428 if (result == -1)
14429 {
14430 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14431 ibfd, oldtag, newtag);
14432 return -1;
14433 }
14434
14435 return result;
14436 #undef T
14437 }
14438
14439 /* Query attributes object to see if integer divide instructions may be
14440 present in an object. */
14441 static bool
14442 elf32_arm_attributes_accept_div (const obj_attribute *attr)
14443 {
14444 int arch = attr[Tag_CPU_arch].i;
14445 int profile = attr[Tag_CPU_arch_profile].i;
14446
14447 switch (attr[Tag_DIV_use].i)
14448 {
14449 case 0:
14450 /* Integer divide allowed if instruction contained in archetecture. */
14451 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
14452 return true;
14453 else if (arch >= TAG_CPU_ARCH_V7E_M)
14454 return true;
14455 else
14456 return false;
14457
14458 case 1:
14459 /* Integer divide explicitly prohibited. */
14460 return false;
14461
14462 default:
14463 /* Unrecognised case - treat as allowing divide everywhere. */
14464 case 2:
14465 /* Integer divide allowed in ARM state. */
14466 return true;
14467 }
14468 }
14469
14470 /* Query attributes object to see if integer divide instructions are
14471 forbidden to be in the object. This is not the inverse of
14472 elf32_arm_attributes_accept_div. */
14473 static bool
14474 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
14475 {
14476 return attr[Tag_DIV_use].i == 1;
14477 }
14478
14479 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14480 are conflicting attributes. */
14481
14482 static bool
14483 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
14484 {
14485 bfd *obfd = info->output_bfd;
14486 obj_attribute *in_attr;
14487 obj_attribute *out_attr;
14488 /* Some tags have 0 = don't care, 1 = strong requirement,
14489 2 = weak requirement. */
14490 static const int order_021[3] = {0, 2, 1};
14491 int i;
14492 bool result = true;
14493 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
14494
14495 /* Skip the linker stubs file. This preserves previous behavior
14496 of accepting unknown attributes in the first input file - but
14497 is that a bug? */
14498 if (ibfd->flags & BFD_LINKER_CREATED)
14499 return true;
14500
14501 /* Skip any input that hasn't attribute section.
14502 This enables to link object files without attribute section with
14503 any others. */
14504 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
14505 return true;
14506
14507 if (!elf_known_obj_attributes_proc (obfd)[0].i)
14508 {
14509 /* This is the first object. Copy the attributes. */
14510 _bfd_elf_copy_obj_attributes (ibfd, obfd);
14511
14512 out_attr = elf_known_obj_attributes_proc (obfd);
14513
14514 /* Use the Tag_null value to indicate the attributes have been
14515 initialized. */
14516 out_attr[0].i = 1;
14517
14518 /* We do not output objects with Tag_MPextension_use_legacy - we move
14519 the attribute's value to Tag_MPextension_use. */
14520 if (out_attr[Tag_MPextension_use_legacy].i != 0)
14521 {
14522 if (out_attr[Tag_MPextension_use].i != 0
14523 && out_attr[Tag_MPextension_use_legacy].i
14524 != out_attr[Tag_MPextension_use].i)
14525 {
14526 _bfd_error_handler
14527 (_("Error: %pB has both the current and legacy "
14528 "Tag_MPextension_use attributes"), ibfd);
14529 result = false;
14530 }
14531
14532 out_attr[Tag_MPextension_use] =
14533 out_attr[Tag_MPextension_use_legacy];
14534 out_attr[Tag_MPextension_use_legacy].type = 0;
14535 out_attr[Tag_MPextension_use_legacy].i = 0;
14536 }
14537
14538 /* PR 28859 and 28848: Handle the case where the first input file,
14539 eg crti.o, has a Tag_ABI_HardFP_use of 3 but no Tag_FP_arch set.
14540 Using Tag_ABI_HardFP_use in this way is deprecated, so reset the
14541 attribute to zero.
14542 FIXME: Should we handle other non-zero values of Tag_ABI_HardFO_use ? */
14543 if (out_attr[Tag_ABI_HardFP_use].i == 3 && out_attr[Tag_FP_arch].i == 0)
14544 out_attr[Tag_ABI_HardFP_use].i = 0;
14545
14546 return result;
14547 }
14548
14549 in_attr = elf_known_obj_attributes_proc (ibfd);
14550 out_attr = elf_known_obj_attributes_proc (obfd);
14551 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14552 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
14553 {
14554 /* Ignore mismatches if the object doesn't use floating point or is
14555 floating point ABI independent. */
14556 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
14557 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14558 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
14559 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
14560 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14561 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
14562 {
14563 _bfd_error_handler
14564 (_("error: %pB uses VFP register arguments, %pB does not"),
14565 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
14566 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
14567 result = false;
14568 }
14569 }
14570
14571 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
14572 {
14573 /* Merge this attribute with existing attributes. */
14574 switch (i)
14575 {
14576 case Tag_CPU_raw_name:
14577 case Tag_CPU_name:
14578 /* These are merged after Tag_CPU_arch. */
14579 break;
14580
14581 case Tag_ABI_optimization_goals:
14582 case Tag_ABI_FP_optimization_goals:
14583 /* Use the first value seen. */
14584 break;
14585
14586 case Tag_CPU_arch:
14587 {
14588 int secondary_compat = -1, secondary_compat_out = -1;
14589 unsigned int saved_out_attr = out_attr[i].i;
14590 int arch_attr;
14591 static const char *name_table[] =
14592 {
14593 /* These aren't real CPU names, but we can't guess
14594 that from the architecture version alone. */
14595 "Pre v4",
14596 "ARM v4",
14597 "ARM v4T",
14598 "ARM v5T",
14599 "ARM v5TE",
14600 "ARM v5TEJ",
14601 "ARM v6",
14602 "ARM v6KZ",
14603 "ARM v6T2",
14604 "ARM v6K",
14605 "ARM v7",
14606 "ARM v6-M",
14607 "ARM v6S-M",
14608 "ARM v7E-M",
14609 "ARM v8",
14610 "ARM v8-R",
14611 "ARM v8-M.baseline",
14612 "ARM v8-M.mainline",
14613 "ARM v8.1-A",
14614 "ARM v8.2-A",
14615 "ARM v8.3-A",
14616 "ARM v8.1-M.mainline",
14617 "ARM v9",
14618 };
14619
14620 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14621 secondary_compat = get_secondary_compatible_arch (ibfd);
14622 secondary_compat_out = get_secondary_compatible_arch (obfd);
14623 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
14624 &secondary_compat_out,
14625 in_attr[i].i,
14626 secondary_compat);
14627
14628 /* Return with error if failed to merge. */
14629 if (arch_attr == -1)
14630 return false;
14631
14632 out_attr[i].i = arch_attr;
14633
14634 set_secondary_compatible_arch (obfd, secondary_compat_out);
14635
14636 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14637 if (out_attr[i].i == saved_out_attr)
14638 ; /* Leave the names alone. */
14639 else if (out_attr[i].i == in_attr[i].i)
14640 {
14641 /* The output architecture has been changed to match the
14642 input architecture. Use the input names. */
14643 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
14644 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
14645 : NULL;
14646 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
14647 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
14648 : NULL;
14649 }
14650 else
14651 {
14652 out_attr[Tag_CPU_name].s = NULL;
14653 out_attr[Tag_CPU_raw_name].s = NULL;
14654 }
14655
14656 /* If we still don't have a value for Tag_CPU_name,
14657 make one up now. Tag_CPU_raw_name remains blank. */
14658 if (out_attr[Tag_CPU_name].s == NULL
14659 && out_attr[i].i < ARRAY_SIZE (name_table))
14660 out_attr[Tag_CPU_name].s =
14661 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
14662 }
14663 break;
14664
14665 case Tag_ARM_ISA_use:
14666 case Tag_THUMB_ISA_use:
14667 case Tag_WMMX_arch:
14668 case Tag_Advanced_SIMD_arch:
14669 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14670 case Tag_ABI_FP_rounding:
14671 case Tag_ABI_FP_exceptions:
14672 case Tag_ABI_FP_user_exceptions:
14673 case Tag_ABI_FP_number_model:
14674 case Tag_FP_HP_extension:
14675 case Tag_CPU_unaligned_access:
14676 case Tag_T2EE_use:
14677 case Tag_MPextension_use:
14678 case Tag_MVE_arch:
14679 case Tag_PAC_extension:
14680 case Tag_BTI_extension:
14681 case Tag_BTI_use:
14682 case Tag_PACRET_use:
14683 /* Use the largest value specified. */
14684 if (in_attr[i].i > out_attr[i].i)
14685 out_attr[i].i = in_attr[i].i;
14686 break;
14687
14688 case Tag_ABI_align_preserved:
14689 case Tag_ABI_PCS_RO_data:
14690 /* Use the smallest value specified. */
14691 if (in_attr[i].i < out_attr[i].i)
14692 out_attr[i].i = in_attr[i].i;
14693 break;
14694
14695 case Tag_ABI_align_needed:
14696 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
14697 && (in_attr[Tag_ABI_align_preserved].i == 0
14698 || out_attr[Tag_ABI_align_preserved].i == 0))
14699 {
14700 /* This error message should be enabled once all non-conformant
14701 binaries in the toolchain have had the attributes set
14702 properly.
14703 _bfd_error_handler
14704 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14705 obfd, ibfd);
14706 result = false; */
14707 }
14708 /* Fall through. */
14709 case Tag_ABI_FP_denormal:
14710 case Tag_ABI_PCS_GOT_use:
14711 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14712 value if greater than 2 (for future-proofing). */
14713 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
14714 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
14715 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
14716 out_attr[i].i = in_attr[i].i;
14717 break;
14718
14719 case Tag_Virtualization_use:
14720 /* The virtualization tag effectively stores two bits of
14721 information: the intended use of TrustZone (in bit 0), and the
14722 intended use of Virtualization (in bit 1). */
14723 if (out_attr[i].i == 0)
14724 out_attr[i].i = in_attr[i].i;
14725 else if (in_attr[i].i != 0
14726 && in_attr[i].i != out_attr[i].i)
14727 {
14728 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
14729 out_attr[i].i = 3;
14730 else
14731 {
14732 _bfd_error_handler
14733 (_("error: %pB: unable to merge virtualization attributes "
14734 "with %pB"),
14735 obfd, ibfd);
14736 result = false;
14737 }
14738 }
14739 break;
14740
14741 case Tag_CPU_arch_profile:
14742 if (out_attr[i].i != in_attr[i].i)
14743 {
14744 /* 0 will merge with anything.
14745 'A' and 'S' merge to 'A'.
14746 'R' and 'S' merge to 'R'.
14747 'M' and 'A|R|S' is an error. */
14748 if (out_attr[i].i == 0
14749 || (out_attr[i].i == 'S'
14750 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
14751 out_attr[i].i = in_attr[i].i;
14752 else if (in_attr[i].i == 0
14753 || (in_attr[i].i == 'S'
14754 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
14755 ; /* Do nothing. */
14756 else
14757 {
14758 _bfd_error_handler
14759 (_("error: %pB: conflicting architecture profiles %c/%c"),
14760 ibfd,
14761 in_attr[i].i ? in_attr[i].i : '0',
14762 out_attr[i].i ? out_attr[i].i : '0');
14763 result = false;
14764 }
14765 }
14766 break;
14767
14768 case Tag_DSP_extension:
14769 /* No need to change output value if any of:
14770 - pre (<=) ARMv5T input architecture (do not have DSP)
14771 - M input profile not ARMv7E-M and do not have DSP. */
14772 if (in_attr[Tag_CPU_arch].i <= 3
14773 || (in_attr[Tag_CPU_arch_profile].i == 'M'
14774 && in_attr[Tag_CPU_arch].i != 13
14775 && in_attr[i].i == 0))
14776 ; /* Do nothing. */
14777 /* Output value should be 0 if DSP part of architecture, ie.
14778 - post (>=) ARMv5te architecture output
14779 - A, R or S profile output or ARMv7E-M output architecture. */
14780 else if (out_attr[Tag_CPU_arch].i >= 4
14781 && (out_attr[Tag_CPU_arch_profile].i == 'A'
14782 || out_attr[Tag_CPU_arch_profile].i == 'R'
14783 || out_attr[Tag_CPU_arch_profile].i == 'S'
14784 || out_attr[Tag_CPU_arch].i == 13))
14785 out_attr[i].i = 0;
14786 /* Otherwise, DSP instructions are added and not part of output
14787 architecture. */
14788 else
14789 out_attr[i].i = 1;
14790 break;
14791
14792 case Tag_FP_arch:
14793 {
14794 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14795 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14796 when it's 0. It might mean absence of FP hardware if
14797 Tag_FP_arch is zero. */
14798
14799 #define VFP_VERSION_COUNT 9
14800 static const struct
14801 {
14802 int ver;
14803 int regs;
14804 } vfp_versions[VFP_VERSION_COUNT] =
14805 {
14806 {0, 0},
14807 {1, 16},
14808 {2, 16},
14809 {3, 32},
14810 {3, 16},
14811 {4, 32},
14812 {4, 16},
14813 {8, 32},
14814 {8, 16}
14815 };
14816 int ver;
14817 int regs;
14818 int newval;
14819
14820 /* If the output has no requirement about FP hardware,
14821 follow the requirement of the input. */
14822 if (out_attr[i].i == 0)
14823 {
14824 /* This assert is still reasonable, we shouldn't
14825 produce the suspicious build attribute
14826 combination (See below for in_attr). */
14827 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
14828 out_attr[i].i = in_attr[i].i;
14829 out_attr[Tag_ABI_HardFP_use].i
14830 = in_attr[Tag_ABI_HardFP_use].i;
14831 break;
14832 }
14833 /* If the input has no requirement about FP hardware, do
14834 nothing. */
14835 else if (in_attr[i].i == 0)
14836 {
14837 /* We used to assert that Tag_ABI_HardFP_use was
14838 zero here, but we should never assert when
14839 consuming an object file that has suspicious
14840 build attributes. The single precision variant
14841 of 'no FP architecture' is still 'no FP
14842 architecture', so we just ignore the tag in this
14843 case. */
14844 break;
14845 }
14846
14847 /* Both the input and the output have nonzero Tag_FP_arch.
14848 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14849
14850 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14851 do nothing. */
14852 if (in_attr[Tag_ABI_HardFP_use].i == 0
14853 && out_attr[Tag_ABI_HardFP_use].i == 0)
14854 ;
14855 /* If the input and the output have different Tag_ABI_HardFP_use,
14856 the combination of them is 0 (implied by Tag_FP_arch). */
14857 else if (in_attr[Tag_ABI_HardFP_use].i
14858 != out_attr[Tag_ABI_HardFP_use].i)
14859 out_attr[Tag_ABI_HardFP_use].i = 0;
14860
14861 /* Now we can handle Tag_FP_arch. */
14862
14863 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14864 pick the biggest. */
14865 if (in_attr[i].i >= VFP_VERSION_COUNT
14866 && in_attr[i].i > out_attr[i].i)
14867 {
14868 out_attr[i] = in_attr[i];
14869 break;
14870 }
14871 /* The output uses the superset of input features
14872 (ISA version) and registers. */
14873 ver = vfp_versions[in_attr[i].i].ver;
14874 if (ver < vfp_versions[out_attr[i].i].ver)
14875 ver = vfp_versions[out_attr[i].i].ver;
14876 regs = vfp_versions[in_attr[i].i].regs;
14877 if (regs < vfp_versions[out_attr[i].i].regs)
14878 regs = vfp_versions[out_attr[i].i].regs;
14879 /* This assumes all possible supersets are also a valid
14880 options. */
14881 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
14882 {
14883 if (regs == vfp_versions[newval].regs
14884 && ver == vfp_versions[newval].ver)
14885 break;
14886 }
14887 out_attr[i].i = newval;
14888 }
14889 break;
14890 case Tag_PCS_config:
14891 if (out_attr[i].i == 0)
14892 out_attr[i].i = in_attr[i].i;
14893 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
14894 {
14895 /* It's sometimes ok to mix different configs, so this is only
14896 a warning. */
14897 _bfd_error_handler
14898 (_("warning: %pB: conflicting platform configuration"), ibfd);
14899 }
14900 break;
14901 case Tag_ABI_PCS_R9_use:
14902 if (in_attr[i].i != out_attr[i].i
14903 && out_attr[i].i != AEABI_R9_unused
14904 && in_attr[i].i != AEABI_R9_unused)
14905 {
14906 _bfd_error_handler
14907 (_("error: %pB: conflicting use of R9"), ibfd);
14908 result = false;
14909 }
14910 if (out_attr[i].i == AEABI_R9_unused)
14911 out_attr[i].i = in_attr[i].i;
14912 break;
14913 case Tag_ABI_PCS_RW_data:
14914 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
14915 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
14916 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
14917 {
14918 _bfd_error_handler
14919 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14920 ibfd);
14921 result = false;
14922 }
14923 /* Use the smallest value specified. */
14924 if (in_attr[i].i < out_attr[i].i)
14925 out_attr[i].i = in_attr[i].i;
14926 break;
14927 case Tag_ABI_PCS_wchar_t:
14928 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
14929 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
14930 {
14931 _bfd_error_handler
14932 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14933 ibfd, in_attr[i].i, out_attr[i].i);
14934 }
14935 else if (in_attr[i].i && !out_attr[i].i)
14936 out_attr[i].i = in_attr[i].i;
14937 break;
14938 case Tag_ABI_enum_size:
14939 if (in_attr[i].i != AEABI_enum_unused)
14940 {
14941 if (out_attr[i].i == AEABI_enum_unused
14942 || out_attr[i].i == AEABI_enum_forced_wide)
14943 {
14944 /* The existing object is compatible with anything.
14945 Use whatever requirements the new object has. */
14946 out_attr[i].i = in_attr[i].i;
14947 }
14948 else if (in_attr[i].i != AEABI_enum_forced_wide
14949 && out_attr[i].i != in_attr[i].i
14950 && !elf_arm_tdata (obfd)->no_enum_size_warning)
14951 {
14952 static const char *aeabi_enum_names[] =
14953 { "", "variable-size", "32-bit", "" };
14954 const char *in_name =
14955 in_attr[i].i < ARRAY_SIZE (aeabi_enum_names)
14956 ? aeabi_enum_names[in_attr[i].i]
14957 : "<unknown>";
14958 const char *out_name =
14959 out_attr[i].i < ARRAY_SIZE (aeabi_enum_names)
14960 ? aeabi_enum_names[out_attr[i].i]
14961 : "<unknown>";
14962 _bfd_error_handler
14963 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14964 ibfd, in_name, out_name);
14965 }
14966 }
14967 break;
14968 case Tag_ABI_VFP_args:
14969 /* Aready done. */
14970 break;
14971 case Tag_ABI_WMMX_args:
14972 if (in_attr[i].i != out_attr[i].i)
14973 {
14974 _bfd_error_handler
14975 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14976 ibfd, obfd);
14977 result = false;
14978 }
14979 break;
14980 case Tag_compatibility:
14981 /* Merged in target-independent code. */
14982 break;
14983 case Tag_ABI_HardFP_use:
14984 /* This is handled along with Tag_FP_arch. */
14985 break;
14986 case Tag_ABI_FP_16bit_format:
14987 if (in_attr[i].i != 0 && out_attr[i].i != 0)
14988 {
14989 if (in_attr[i].i != out_attr[i].i)
14990 {
14991 _bfd_error_handler
14992 (_("error: fp16 format mismatch between %pB and %pB"),
14993 ibfd, obfd);
14994 result = false;
14995 }
14996 }
14997 if (in_attr[i].i != 0)
14998 out_attr[i].i = in_attr[i].i;
14999 break;
15000
15001 case Tag_DIV_use:
15002 /* A value of zero on input means that the divide instruction may
15003 be used if available in the base architecture as specified via
15004 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
15005 the user did not want divide instructions. A value of 2
15006 explicitly means that divide instructions were allowed in ARM
15007 and Thumb state. */
15008 if (in_attr[i].i == out_attr[i].i)
15009 /* Do nothing. */ ;
15010 else if (elf32_arm_attributes_forbid_div (in_attr)
15011 && !elf32_arm_attributes_accept_div (out_attr))
15012 out_attr[i].i = 1;
15013 else if (elf32_arm_attributes_forbid_div (out_attr)
15014 && elf32_arm_attributes_accept_div (in_attr))
15015 out_attr[i].i = in_attr[i].i;
15016 else if (in_attr[i].i == 2)
15017 out_attr[i].i = in_attr[i].i;
15018 break;
15019
15020 case Tag_MPextension_use_legacy:
15021 /* We don't output objects with Tag_MPextension_use_legacy - we
15022 move the value to Tag_MPextension_use. */
15023 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
15024 {
15025 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
15026 {
15027 _bfd_error_handler
15028 (_("%pB has both the current and legacy "
15029 "Tag_MPextension_use attributes"),
15030 ibfd);
15031 result = false;
15032 }
15033 }
15034
15035 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
15036 out_attr[Tag_MPextension_use] = in_attr[i];
15037
15038 break;
15039
15040 case Tag_nodefaults:
15041 /* This tag is set if it exists, but the value is unused (and is
15042 typically zero). We don't actually need to do anything here -
15043 the merge happens automatically when the type flags are merged
15044 below. */
15045 break;
15046 case Tag_also_compatible_with:
15047 /* Already done in Tag_CPU_arch. */
15048 break;
15049 case Tag_conformance:
15050 /* Keep the attribute if it matches. Throw it away otherwise.
15051 No attribute means no claim to conform. */
15052 if (!in_attr[i].s || !out_attr[i].s
15053 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
15054 out_attr[i].s = NULL;
15055 break;
15056
15057 default:
15058 result
15059 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
15060 }
15061
15062 /* If out_attr was copied from in_attr then it won't have a type yet. */
15063 if (in_attr[i].type && !out_attr[i].type)
15064 out_attr[i].type = in_attr[i].type;
15065 }
15066
15067 /* Merge Tag_compatibility attributes and any common GNU ones. */
15068 if (!_bfd_elf_merge_object_attributes (ibfd, info))
15069 return false;
15070
15071 /* Check for any attributes not known on ARM. */
15072 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
15073
15074 return result;
15075 }
15076
15077
15078 /* Return TRUE if the two EABI versions are incompatible. */
15079
15080 static bool
15081 elf32_arm_versions_compatible (unsigned iver, unsigned over)
15082 {
15083 /* v4 and v5 are the same spec before and after it was released,
15084 so allow mixing them. */
15085 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
15086 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
15087 return true;
15088
15089 return (iver == over);
15090 }
15091
15092 /* Merge backend specific data from an object file to the output
15093 object file when linking. */
15094
15095 static bool
15096 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
15097
15098 /* Display the flags field. */
15099
15100 static bool
15101 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
15102 {
15103 FILE * file = (FILE *) ptr;
15104 unsigned long flags;
15105
15106 BFD_ASSERT (abfd != NULL && ptr != NULL);
15107
15108 /* Print normal ELF private data. */
15109 _bfd_elf_print_private_bfd_data (abfd, ptr);
15110
15111 flags = elf_elfheader (abfd)->e_flags;
15112 /* Ignore init flag - it may not be set, despite the flags field
15113 containing valid data. */
15114
15115 fprintf (file, _("private flags = 0x%lx:"), elf_elfheader (abfd)->e_flags);
15116
15117 switch (EF_ARM_EABI_VERSION (flags))
15118 {
15119 case EF_ARM_EABI_UNKNOWN:
15120 /* The following flag bits are GNU extensions and not part of the
15121 official ARM ELF extended ABI. Hence they are only decoded if
15122 the EABI version is not set. */
15123 if (flags & EF_ARM_INTERWORK)
15124 fprintf (file, _(" [interworking enabled]"));
15125
15126 if (flags & EF_ARM_APCS_26)
15127 fprintf (file, " [APCS-26]");
15128 else
15129 fprintf (file, " [APCS-32]");
15130
15131 if (flags & EF_ARM_VFP_FLOAT)
15132 fprintf (file, _(" [VFP float format]"));
15133 else if (flags & EF_ARM_MAVERICK_FLOAT)
15134 fprintf (file, _(" [Maverick float format]"));
15135 else
15136 fprintf (file, _(" [FPA float format]"));
15137
15138 if (flags & EF_ARM_APCS_FLOAT)
15139 fprintf (file, _(" [floats passed in float registers]"));
15140
15141 if (flags & EF_ARM_PIC)
15142 fprintf (file, _(" [position independent]"));
15143
15144 if (flags & EF_ARM_NEW_ABI)
15145 fprintf (file, _(" [new ABI]"));
15146
15147 if (flags & EF_ARM_OLD_ABI)
15148 fprintf (file, _(" [old ABI]"));
15149
15150 if (flags & EF_ARM_SOFT_FLOAT)
15151 fprintf (file, _(" [software FP]"));
15152
15153 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
15154 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
15155 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
15156 | EF_ARM_MAVERICK_FLOAT);
15157 break;
15158
15159 case EF_ARM_EABI_VER1:
15160 fprintf (file, _(" [Version1 EABI]"));
15161
15162 if (flags & EF_ARM_SYMSARESORTED)
15163 fprintf (file, _(" [sorted symbol table]"));
15164 else
15165 fprintf (file, _(" [unsorted symbol table]"));
15166
15167 flags &= ~ EF_ARM_SYMSARESORTED;
15168 break;
15169
15170 case EF_ARM_EABI_VER2:
15171 fprintf (file, _(" [Version2 EABI]"));
15172
15173 if (flags & EF_ARM_SYMSARESORTED)
15174 fprintf (file, _(" [sorted symbol table]"));
15175 else
15176 fprintf (file, _(" [unsorted symbol table]"));
15177
15178 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
15179 fprintf (file, _(" [dynamic symbols use segment index]"));
15180
15181 if (flags & EF_ARM_MAPSYMSFIRST)
15182 fprintf (file, _(" [mapping symbols precede others]"));
15183
15184 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
15185 | EF_ARM_MAPSYMSFIRST);
15186 break;
15187
15188 case EF_ARM_EABI_VER3:
15189 fprintf (file, _(" [Version3 EABI]"));
15190 break;
15191
15192 case EF_ARM_EABI_VER4:
15193 fprintf (file, _(" [Version4 EABI]"));
15194 goto eabi;
15195
15196 case EF_ARM_EABI_VER5:
15197 fprintf (file, _(" [Version5 EABI]"));
15198
15199 if (flags & EF_ARM_ABI_FLOAT_SOFT)
15200 fprintf (file, _(" [soft-float ABI]"));
15201
15202 if (flags & EF_ARM_ABI_FLOAT_HARD)
15203 fprintf (file, _(" [hard-float ABI]"));
15204
15205 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
15206
15207 eabi:
15208 if (flags & EF_ARM_BE8)
15209 fprintf (file, _(" [BE8]"));
15210
15211 if (flags & EF_ARM_LE8)
15212 fprintf (file, _(" [LE8]"));
15213
15214 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
15215 break;
15216
15217 default:
15218 fprintf (file, _(" <EABI version unrecognised>"));
15219 break;
15220 }
15221
15222 flags &= ~ EF_ARM_EABIMASK;
15223
15224 if (flags & EF_ARM_RELEXEC)
15225 fprintf (file, _(" [relocatable executable]"));
15226
15227 if (flags & EF_ARM_PIC)
15228 fprintf (file, _(" [position independent]"));
15229
15230 if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC)
15231 fprintf (file, _(" [FDPIC ABI supplement]"));
15232
15233 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC);
15234
15235 if (flags)
15236 fprintf (file, _(" <Unrecognised flag bits set>"));
15237
15238 fputc ('\n', file);
15239
15240 return true;
15241 }
15242
15243 static int
15244 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
15245 {
15246 switch (ELF_ST_TYPE (elf_sym->st_info))
15247 {
15248 case STT_ARM_TFUNC:
15249 return ELF_ST_TYPE (elf_sym->st_info);
15250
15251 case STT_ARM_16BIT:
15252 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
15253 This allows us to distinguish between data used by Thumb instructions
15254 and non-data (which is probably code) inside Thumb regions of an
15255 executable. */
15256 if (type != STT_OBJECT && type != STT_TLS)
15257 return ELF_ST_TYPE (elf_sym->st_info);
15258 break;
15259
15260 default:
15261 break;
15262 }
15263
15264 return type;
15265 }
15266
15267 static asection *
15268 elf32_arm_gc_mark_hook (asection *sec,
15269 struct bfd_link_info *info,
15270 Elf_Internal_Rela *rel,
15271 struct elf_link_hash_entry *h,
15272 Elf_Internal_Sym *sym)
15273 {
15274 if (h != NULL)
15275 switch (ELF32_R_TYPE (rel->r_info))
15276 {
15277 case R_ARM_GNU_VTINHERIT:
15278 case R_ARM_GNU_VTENTRY:
15279 return NULL;
15280 }
15281
15282 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
15283 }
15284
15285 /* Look through the relocs for a section during the first phase. */
15286
15287 static bool
15288 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
15289 asection *sec, const Elf_Internal_Rela *relocs)
15290 {
15291 Elf_Internal_Shdr *symtab_hdr;
15292 struct elf_link_hash_entry **sym_hashes;
15293 const Elf_Internal_Rela *rel;
15294 const Elf_Internal_Rela *rel_end;
15295 bfd *dynobj;
15296 asection *sreloc;
15297 struct elf32_arm_link_hash_table *htab;
15298 bool call_reloc_p;
15299 bool may_become_dynamic_p;
15300 bool may_need_local_target_p;
15301 unsigned long nsyms;
15302
15303 if (bfd_link_relocatable (info))
15304 return true;
15305
15306 BFD_ASSERT (is_arm_elf (abfd));
15307
15308 htab = elf32_arm_hash_table (info);
15309 if (htab == NULL)
15310 return false;
15311
15312 sreloc = NULL;
15313
15314 /* Create dynamic sections for relocatable executables so that we can
15315 copy relocations. */
15316 if (htab->root.is_relocatable_executable
15317 && ! htab->root.dynamic_sections_created)
15318 {
15319 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
15320 return false;
15321 }
15322
15323 if (htab->root.dynobj == NULL)
15324 htab->root.dynobj = abfd;
15325 if (!create_ifunc_sections (info))
15326 return false;
15327
15328 dynobj = htab->root.dynobj;
15329
15330 symtab_hdr = & elf_symtab_hdr (abfd);
15331 sym_hashes = elf_sym_hashes (abfd);
15332 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
15333
15334 rel_end = relocs + sec->reloc_count;
15335 for (rel = relocs; rel < rel_end; rel++)
15336 {
15337 Elf_Internal_Sym *isym;
15338 struct elf_link_hash_entry *h;
15339 struct elf32_arm_link_hash_entry *eh;
15340 unsigned int r_symndx;
15341 int r_type;
15342
15343 r_symndx = ELF32_R_SYM (rel->r_info);
15344 r_type = ELF32_R_TYPE (rel->r_info);
15345 r_type = arm_real_reloc_type (htab, r_type);
15346
15347 if (r_symndx >= nsyms
15348 /* PR 9934: It is possible to have relocations that do not
15349 refer to symbols, thus it is also possible to have an
15350 object file containing relocations but no symbol table. */
15351 && (r_symndx > STN_UNDEF || nsyms > 0))
15352 {
15353 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15354 r_symndx);
15355 return false;
15356 }
15357
15358 h = NULL;
15359 isym = NULL;
15360 if (nsyms > 0)
15361 {
15362 if (r_symndx < symtab_hdr->sh_info)
15363 {
15364 /* A local symbol. */
15365 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
15366 abfd, r_symndx);
15367 if (isym == NULL)
15368 return false;
15369 }
15370 else
15371 {
15372 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
15373 while (h->root.type == bfd_link_hash_indirect
15374 || h->root.type == bfd_link_hash_warning)
15375 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15376 }
15377 }
15378
15379 eh = (struct elf32_arm_link_hash_entry *) h;
15380
15381 call_reloc_p = false;
15382 may_become_dynamic_p = false;
15383 may_need_local_target_p = false;
15384
15385 /* Could be done earlier, if h were already available. */
15386 r_type = elf32_arm_tls_transition (info, r_type, h);
15387 switch (r_type)
15388 {
15389 case R_ARM_GOTOFFFUNCDESC:
15390 {
15391 if (h == NULL)
15392 {
15393 if (!elf32_arm_allocate_local_sym_info (abfd))
15394 return false;
15395 if (r_symndx >= elf32_arm_num_entries (abfd))
15396 return false;
15397 elf32_arm_local_fdpic_cnts (abfd) [r_symndx].gotofffuncdesc_cnt += 1;
15398 elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_offset = -1;
15399 }
15400 else
15401 {
15402 eh->fdpic_cnts.gotofffuncdesc_cnt++;
15403 }
15404 }
15405 break;
15406
15407 case R_ARM_GOTFUNCDESC:
15408 {
15409 if (h == NULL)
15410 {
15411 /* Such a relocation is not supposed to be generated
15412 by gcc on a static function. */
15413 /* Anyway if needed it could be handled. */
15414 return false;
15415 }
15416 else
15417 {
15418 eh->fdpic_cnts.gotfuncdesc_cnt++;
15419 }
15420 }
15421 break;
15422
15423 case R_ARM_FUNCDESC:
15424 {
15425 if (h == NULL)
15426 {
15427 if (!elf32_arm_allocate_local_sym_info (abfd))
15428 return false;
15429 if (r_symndx >= elf32_arm_num_entries (abfd))
15430 return false;
15431 elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_cnt += 1;
15432 elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_offset = -1;
15433 }
15434 else
15435 {
15436 eh->fdpic_cnts.funcdesc_cnt++;
15437 }
15438 }
15439 break;
15440
15441 case R_ARM_GOT32:
15442 case R_ARM_GOT_PREL:
15443 case R_ARM_TLS_GD32:
15444 case R_ARM_TLS_GD32_FDPIC:
15445 case R_ARM_TLS_IE32:
15446 case R_ARM_TLS_IE32_FDPIC:
15447 case R_ARM_TLS_GOTDESC:
15448 case R_ARM_TLS_DESCSEQ:
15449 case R_ARM_THM_TLS_DESCSEQ:
15450 case R_ARM_TLS_CALL:
15451 case R_ARM_THM_TLS_CALL:
15452 /* This symbol requires a global offset table entry. */
15453 {
15454 int tls_type, old_tls_type;
15455
15456 switch (r_type)
15457 {
15458 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
15459 case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break;
15460
15461 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
15462 case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break;
15463
15464 case R_ARM_TLS_GOTDESC:
15465 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
15466 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
15467 tls_type = GOT_TLS_GDESC; break;
15468
15469 default: tls_type = GOT_NORMAL; break;
15470 }
15471
15472 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
15473 info->flags |= DF_STATIC_TLS;
15474
15475 if (h != NULL)
15476 {
15477 h->got.refcount++;
15478 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
15479 }
15480 else
15481 {
15482 /* This is a global offset table entry for a local symbol. */
15483 if (!elf32_arm_allocate_local_sym_info (abfd))
15484 return false;
15485 if (r_symndx >= elf32_arm_num_entries (abfd))
15486 {
15487 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15488 r_symndx);
15489 return false;
15490 }
15491
15492 elf_local_got_refcounts (abfd)[r_symndx] += 1;
15493 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
15494 }
15495
15496 /* If a variable is accessed with both tls methods, two
15497 slots may be created. */
15498 if (GOT_TLS_GD_ANY_P (old_tls_type)
15499 && GOT_TLS_GD_ANY_P (tls_type))
15500 tls_type |= old_tls_type;
15501
15502 /* We will already have issued an error message if there
15503 is a TLS/non-TLS mismatch, based on the symbol
15504 type. So just combine any TLS types needed. */
15505 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
15506 && tls_type != GOT_NORMAL)
15507 tls_type |= old_tls_type;
15508
15509 /* If the symbol is accessed in both IE and GDESC
15510 method, we're able to relax. Turn off the GDESC flag,
15511 without messing up with any other kind of tls types
15512 that may be involved. */
15513 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
15514 tls_type &= ~GOT_TLS_GDESC;
15515
15516 if (old_tls_type != tls_type)
15517 {
15518 if (h != NULL)
15519 elf32_arm_hash_entry (h)->tls_type = tls_type;
15520 else
15521 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
15522 }
15523 }
15524 /* Fall through. */
15525
15526 case R_ARM_TLS_LDM32:
15527 case R_ARM_TLS_LDM32_FDPIC:
15528 if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC)
15529 htab->tls_ldm_got.refcount++;
15530 /* Fall through. */
15531
15532 case R_ARM_GOTOFF32:
15533 case R_ARM_GOTPC:
15534 if (htab->root.sgot == NULL
15535 && !create_got_section (htab->root.dynobj, info))
15536 return false;
15537 break;
15538
15539 case R_ARM_PC24:
15540 case R_ARM_PLT32:
15541 case R_ARM_CALL:
15542 case R_ARM_JUMP24:
15543 case R_ARM_PREL31:
15544 case R_ARM_THM_CALL:
15545 case R_ARM_THM_JUMP24:
15546 case R_ARM_THM_JUMP19:
15547 call_reloc_p = true;
15548 may_need_local_target_p = true;
15549 break;
15550
15551 case R_ARM_ABS12:
15552 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15553 ldr __GOTT_INDEX__ offsets. */
15554 if (htab->root.target_os != is_vxworks)
15555 {
15556 may_need_local_target_p = true;
15557 break;
15558 }
15559 else goto jump_over;
15560
15561 /* Fall through. */
15562
15563 case R_ARM_MOVW_ABS_NC:
15564 case R_ARM_MOVT_ABS:
15565 case R_ARM_THM_MOVW_ABS_NC:
15566 case R_ARM_THM_MOVT_ABS:
15567 if (bfd_link_pic (info))
15568 {
15569 _bfd_error_handler
15570 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15571 abfd, elf32_arm_howto_table_1[r_type].name,
15572 (h) ? h->root.root.string : "a local symbol");
15573 bfd_set_error (bfd_error_bad_value);
15574 return false;
15575 }
15576
15577 /* Fall through. */
15578 case R_ARM_ABS32:
15579 case R_ARM_ABS32_NOI:
15580 jump_over:
15581 if (h != NULL && bfd_link_executable (info))
15582 {
15583 h->pointer_equality_needed = 1;
15584 }
15585 /* Fall through. */
15586 case R_ARM_REL32:
15587 case R_ARM_REL32_NOI:
15588 case R_ARM_MOVW_PREL_NC:
15589 case R_ARM_MOVT_PREL:
15590 case R_ARM_THM_MOVW_PREL_NC:
15591 case R_ARM_THM_MOVT_PREL:
15592
15593 /* Should the interworking branches be listed here? */
15594 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable
15595 || htab->fdpic_p)
15596 && (sec->flags & SEC_ALLOC) != 0)
15597 {
15598 if (h == NULL
15599 && elf32_arm_howto_from_type (r_type)->pc_relative)
15600 {
15601 /* In shared libraries and relocatable executables,
15602 we treat local relative references as calls;
15603 see the related SYMBOL_CALLS_LOCAL code in
15604 allocate_dynrelocs. */
15605 call_reloc_p = true;
15606 may_need_local_target_p = true;
15607 }
15608 else
15609 /* We are creating a shared library or relocatable
15610 executable, and this is a reloc against a global symbol,
15611 or a non-PC-relative reloc against a local symbol.
15612 We may need to copy the reloc into the output. */
15613 may_become_dynamic_p = true;
15614 }
15615 else
15616 may_need_local_target_p = true;
15617 break;
15618
15619 /* This relocation describes the C++ object vtable hierarchy.
15620 Reconstruct it for later use during GC. */
15621 case R_ARM_GNU_VTINHERIT:
15622 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
15623 return false;
15624 break;
15625
15626 /* This relocation describes which C++ vtable entries are actually
15627 used. Record for later use during GC. */
15628 case R_ARM_GNU_VTENTRY:
15629 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
15630 return false;
15631 break;
15632 }
15633
15634 if (h != NULL)
15635 {
15636 if (call_reloc_p)
15637 /* We may need a .plt entry if the function this reloc
15638 refers to is in a different object, regardless of the
15639 symbol's type. We can't tell for sure yet, because
15640 something later might force the symbol local. */
15641 h->needs_plt = 1;
15642 else if (may_need_local_target_p)
15643 /* If this reloc is in a read-only section, we might
15644 need a copy reloc. We can't check reliably at this
15645 stage whether the section is read-only, as input
15646 sections have not yet been mapped to output sections.
15647 Tentatively set the flag for now, and correct in
15648 adjust_dynamic_symbol. */
15649 h->non_got_ref = 1;
15650 }
15651
15652 if (may_need_local_target_p
15653 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
15654 {
15655 union gotplt_union *root_plt;
15656 struct arm_plt_info *arm_plt;
15657 struct arm_local_iplt_info *local_iplt;
15658
15659 if (h != NULL)
15660 {
15661 root_plt = &h->plt;
15662 arm_plt = &eh->plt;
15663 }
15664 else
15665 {
15666 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
15667 if (local_iplt == NULL)
15668 return false;
15669 root_plt = &local_iplt->root;
15670 arm_plt = &local_iplt->arm;
15671 }
15672
15673 /* If the symbol is a function that doesn't bind locally,
15674 this relocation will need a PLT entry. */
15675 if (root_plt->refcount != -1)
15676 root_plt->refcount += 1;
15677
15678 if (!call_reloc_p)
15679 arm_plt->noncall_refcount++;
15680
15681 /* It's too early to use htab->use_blx here, so we have to
15682 record possible blx references separately from
15683 relocs that definitely need a thumb stub. */
15684
15685 if (r_type == R_ARM_THM_CALL)
15686 arm_plt->maybe_thumb_refcount += 1;
15687
15688 if (r_type == R_ARM_THM_JUMP24
15689 || r_type == R_ARM_THM_JUMP19)
15690 arm_plt->thumb_refcount += 1;
15691 }
15692
15693 if (may_become_dynamic_p)
15694 {
15695 struct elf_dyn_relocs *p, **head;
15696
15697 /* Create a reloc section in dynobj. */
15698 if (sreloc == NULL)
15699 {
15700 sreloc = _bfd_elf_make_dynamic_reloc_section
15701 (sec, dynobj, 2, abfd, ! htab->use_rel);
15702
15703 if (sreloc == NULL)
15704 return false;
15705 }
15706
15707 /* If this is a global symbol, count the number of
15708 relocations we need for this symbol. */
15709 if (h != NULL)
15710 head = &h->dyn_relocs;
15711 else
15712 {
15713 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
15714 if (head == NULL)
15715 return false;
15716 }
15717
15718 p = *head;
15719 if (p == NULL || p->sec != sec)
15720 {
15721 size_t amt = sizeof *p;
15722
15723 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
15724 if (p == NULL)
15725 return false;
15726 p->next = *head;
15727 *head = p;
15728 p->sec = sec;
15729 p->count = 0;
15730 p->pc_count = 0;
15731 }
15732
15733 if (elf32_arm_howto_from_type (r_type)->pc_relative)
15734 p->pc_count += 1;
15735 p->count += 1;
15736 if (h == NULL && htab->fdpic_p && !bfd_link_pic (info)
15737 && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI)
15738 {
15739 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15740 that will become rofixup. */
15741 /* This is due to the fact that we suppose all will become rofixup. */
15742 _bfd_error_handler
15743 (_("FDPIC does not yet support %s relocation"
15744 " to become dynamic for executable"),
15745 elf32_arm_howto_table_1[r_type].name);
15746 abort ();
15747 }
15748 }
15749 }
15750
15751 return true;
15752 }
15753
15754 static void
15755 elf32_arm_update_relocs (asection *o,
15756 struct bfd_elf_section_reloc_data *reldata)
15757 {
15758 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
15759 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
15760 const struct elf_backend_data *bed;
15761 _arm_elf_section_data *eado;
15762 struct bfd_link_order *p;
15763 bfd_byte *erela_head, *erela;
15764 Elf_Internal_Rela *irela_head, *irela;
15765 Elf_Internal_Shdr *rel_hdr;
15766 bfd *abfd;
15767 unsigned int count;
15768
15769 eado = get_arm_elf_section_data (o);
15770
15771 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
15772 return;
15773
15774 abfd = o->owner;
15775 bed = get_elf_backend_data (abfd);
15776 rel_hdr = reldata->hdr;
15777
15778 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
15779 {
15780 swap_in = bed->s->swap_reloc_in;
15781 swap_out = bed->s->swap_reloc_out;
15782 }
15783 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
15784 {
15785 swap_in = bed->s->swap_reloca_in;
15786 swap_out = bed->s->swap_reloca_out;
15787 }
15788 else
15789 abort ();
15790
15791 erela_head = rel_hdr->contents;
15792 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
15793 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
15794
15795 erela = erela_head;
15796 irela = irela_head;
15797 count = 0;
15798
15799 for (p = o->map_head.link_order; p; p = p->next)
15800 {
15801 if (p->type == bfd_section_reloc_link_order
15802 || p->type == bfd_symbol_reloc_link_order)
15803 {
15804 (*swap_in) (abfd, erela, irela);
15805 erela += rel_hdr->sh_entsize;
15806 irela++;
15807 count++;
15808 }
15809 else if (p->type == bfd_indirect_link_order)
15810 {
15811 struct bfd_elf_section_reloc_data *input_reldata;
15812 arm_unwind_table_edit *edit_list, *edit_tail;
15813 _arm_elf_section_data *eadi;
15814 bfd_size_type j;
15815 bfd_vma offset;
15816 asection *i;
15817
15818 i = p->u.indirect.section;
15819
15820 eadi = get_arm_elf_section_data (i);
15821 edit_list = eadi->u.exidx.unwind_edit_list;
15822 edit_tail = eadi->u.exidx.unwind_edit_tail;
15823 offset = i->output_offset;
15824
15825 if (eadi->elf.rel.hdr &&
15826 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
15827 input_reldata = &eadi->elf.rel;
15828 else if (eadi->elf.rela.hdr &&
15829 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
15830 input_reldata = &eadi->elf.rela;
15831 else
15832 abort ();
15833
15834 if (edit_list)
15835 {
15836 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15837 {
15838 arm_unwind_table_edit *edit_node, *edit_next;
15839 bfd_vma bias;
15840 bfd_vma reloc_index;
15841
15842 (*swap_in) (abfd, erela, irela);
15843 reloc_index = (irela->r_offset - offset) / 8;
15844
15845 bias = 0;
15846 edit_node = edit_list;
15847 for (edit_next = edit_list;
15848 edit_next && edit_next->index <= reloc_index;
15849 edit_next = edit_node->next)
15850 {
15851 bias++;
15852 edit_node = edit_next;
15853 }
15854
15855 if (edit_node->type != DELETE_EXIDX_ENTRY
15856 || edit_node->index != reloc_index)
15857 {
15858 irela->r_offset -= bias * 8;
15859 irela++;
15860 count++;
15861 }
15862
15863 erela += rel_hdr->sh_entsize;
15864 }
15865
15866 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
15867 {
15868 /* New relocation entity. */
15869 asection *text_sec = edit_tail->linked_section;
15870 asection *text_out = text_sec->output_section;
15871 bfd_vma exidx_offset = offset + i->size - 8;
15872
15873 irela->r_addend = 0;
15874 irela->r_offset = exidx_offset;
15875 irela->r_info = ELF32_R_INFO
15876 (text_out->target_index, R_ARM_PREL31);
15877 irela++;
15878 count++;
15879 }
15880 }
15881 else
15882 {
15883 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15884 {
15885 (*swap_in) (abfd, erela, irela);
15886 erela += rel_hdr->sh_entsize;
15887 irela++;
15888 }
15889
15890 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15891 }
15892 }
15893 }
15894
15895 reldata->count = count;
15896 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15897
15898 erela = erela_head;
15899 irela = irela_head;
15900 while (count > 0)
15901 {
15902 (*swap_out) (abfd, irela, erela);
15903 erela += rel_hdr->sh_entsize;
15904 irela++;
15905 count--;
15906 }
15907
15908 free (irela_head);
15909
15910 /* Hashes are no longer valid. */
15911 free (reldata->hashes);
15912 reldata->hashes = NULL;
15913 }
15914
15915 /* Unwinding tables are not referenced directly. This pass marks them as
15916 required if the corresponding code section is marked. Similarly, ARMv8-M
15917 secure entry functions can only be referenced by SG veneers which are
15918 created after the GC process. They need to be marked in case they reside in
15919 their own section (as would be the case if code was compiled with
15920 -ffunction-sections). */
15921
15922 static bool
15923 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15924 elf_gc_mark_hook_fn gc_mark_hook)
15925 {
15926 bfd *sub;
15927 Elf_Internal_Shdr **elf_shdrp;
15928 asection *cmse_sec;
15929 obj_attribute *out_attr;
15930 Elf_Internal_Shdr *symtab_hdr;
15931 unsigned i, sym_count, ext_start;
15932 const struct elf_backend_data *bed;
15933 struct elf_link_hash_entry **sym_hashes;
15934 struct elf32_arm_link_hash_entry *cmse_hash;
15935 bool again, is_v8m, first_bfd_browse = true;
15936 bool debug_sec_need_to_be_marked = false;
15937 asection *isec;
15938
15939 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15940
15941 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15942 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15943 && out_attr[Tag_CPU_arch_profile].i == 'M';
15944
15945 /* Marking EH data may cause additional code sections to be marked,
15946 requiring multiple passes. */
15947 again = true;
15948 while (again)
15949 {
15950 again = false;
15951 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15952 {
15953 asection *o;
15954
15955 if (! is_arm_elf (sub))
15956 continue;
15957
15958 elf_shdrp = elf_elfsections (sub);
15959 for (o = sub->sections; o != NULL; o = o->next)
15960 {
15961 Elf_Internal_Shdr *hdr;
15962
15963 hdr = &elf_section_data (o)->this_hdr;
15964 if (hdr->sh_type == SHT_ARM_EXIDX
15965 && hdr->sh_link
15966 && hdr->sh_link < elf_numsections (sub)
15967 && !o->gc_mark
15968 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15969 {
15970 again = true;
15971 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15972 return false;
15973 }
15974 }
15975
15976 /* Mark section holding ARMv8-M secure entry functions. We mark all
15977 of them so no need for a second browsing. */
15978 if (is_v8m && first_bfd_browse)
15979 {
15980 sym_hashes = elf_sym_hashes (sub);
15981 bed = get_elf_backend_data (sub);
15982 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15983 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15984 ext_start = symtab_hdr->sh_info;
15985
15986 /* Scan symbols. */
15987 for (i = ext_start; i < sym_count; i++)
15988 {
15989 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15990
15991 /* Assume it is a special symbol. If not, cmse_scan will
15992 warn about it and user can do something about it. */
15993 if (startswith (cmse_hash->root.root.root.string,
15994 CMSE_PREFIX))
15995 {
15996 cmse_sec = cmse_hash->root.root.u.def.section;
15997 if (!cmse_sec->gc_mark
15998 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15999 return false;
16000 /* The debug sections related to these secure entry
16001 functions are marked on enabling below flag. */
16002 debug_sec_need_to_be_marked = true;
16003 }
16004 }
16005
16006 if (debug_sec_need_to_be_marked)
16007 {
16008 /* Looping over all the sections of the object file containing
16009 Armv8-M secure entry functions and marking all the debug
16010 sections. */
16011 for (isec = sub->sections; isec != NULL; isec = isec->next)
16012 {
16013 /* If not a debug sections, skip it. */
16014 if (!isec->gc_mark && (isec->flags & SEC_DEBUGGING))
16015 isec->gc_mark = 1 ;
16016 }
16017 debug_sec_need_to_be_marked = false;
16018 }
16019 }
16020 }
16021 first_bfd_browse = false;
16022 }
16023
16024 return true;
16025 }
16026
16027 /* Treat mapping symbols as special target symbols. */
16028
16029 static bool
16030 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
16031 {
16032 return bfd_is_arm_special_symbol_name (sym->name,
16033 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
16034 }
16035
16036 /* If the ELF symbol SYM might be a function in SEC, return the
16037 function size and set *CODE_OFF to the function's entry point,
16038 otherwise return zero. */
16039
16040 static bfd_size_type
16041 elf32_arm_maybe_function_sym (const asymbol *sym, asection *sec,
16042 bfd_vma *code_off)
16043 {
16044 bfd_size_type size;
16045 elf_symbol_type * elf_sym = (elf_symbol_type *) sym;
16046
16047 if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
16048 | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0
16049 || sym->section != sec)
16050 return 0;
16051
16052 size = (sym->flags & BSF_SYNTHETIC) ? 0 : elf_sym->internal_elf_sym.st_size;
16053
16054 if (!(sym->flags & BSF_SYNTHETIC))
16055 switch (ELF_ST_TYPE (elf_sym->internal_elf_sym.st_info))
16056 {
16057 case STT_NOTYPE:
16058 /* Ignore symbols created by the annobin plugin for gcc and clang.
16059 These symbols are hidden, local, notype and have a size of 0. */
16060 if (size == 0
16061 && sym->flags & BSF_LOCAL
16062 && ELF_ST_VISIBILITY (elf_sym->internal_elf_sym.st_other) == STV_HIDDEN)
16063 return 0;
16064 /* Fall through. */
16065 case STT_FUNC:
16066 case STT_ARM_TFUNC:
16067 /* FIXME: Allow STT_GNU_IFUNC as well ? */
16068 break;
16069 default:
16070 return 0;
16071 }
16072
16073 if ((sym->flags & BSF_LOCAL)
16074 && bfd_is_arm_special_symbol_name (sym->name,
16075 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
16076 return 0;
16077
16078 *code_off = sym->value;
16079
16080 /* Do not return 0 for the function's size. */
16081 return size ? size : 1;
16082
16083 }
16084
16085 static bool
16086 elf32_arm_find_inliner_info (bfd * abfd,
16087 const char ** filename_ptr,
16088 const char ** functionname_ptr,
16089 unsigned int * line_ptr)
16090 {
16091 bool found;
16092 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
16093 functionname_ptr, line_ptr,
16094 & elf_tdata (abfd)->dwarf2_find_line_info);
16095 return found;
16096 }
16097
16098 /* Adjust a symbol defined by a dynamic object and referenced by a
16099 regular object. The current definition is in some section of the
16100 dynamic object, but we're not including those sections. We have to
16101 change the definition to something the rest of the link can
16102 understand. */
16103
16104 static bool
16105 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
16106 struct elf_link_hash_entry * h)
16107 {
16108 bfd * dynobj;
16109 asection *s, *srel;
16110 struct elf32_arm_link_hash_entry * eh;
16111 struct elf32_arm_link_hash_table *globals;
16112
16113 globals = elf32_arm_hash_table (info);
16114 if (globals == NULL)
16115 return false;
16116
16117 dynobj = elf_hash_table (info)->dynobj;
16118
16119 /* Make sure we know what is going on here. */
16120 BFD_ASSERT (dynobj != NULL
16121 && (h->needs_plt
16122 || h->type == STT_GNU_IFUNC
16123 || h->is_weakalias
16124 || (h->def_dynamic
16125 && h->ref_regular
16126 && !h->def_regular)));
16127
16128 eh = (struct elf32_arm_link_hash_entry *) h;
16129
16130 /* If this is a function, put it in the procedure linkage table. We
16131 will fill in the contents of the procedure linkage table later,
16132 when we know the address of the .got section. */
16133 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
16134 {
16135 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
16136 symbol binds locally. */
16137 if (h->plt.refcount <= 0
16138 || (h->type != STT_GNU_IFUNC
16139 && (SYMBOL_CALLS_LOCAL (info, h)
16140 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16141 && h->root.type == bfd_link_hash_undefweak))))
16142 {
16143 /* This case can occur if we saw a PLT32 reloc in an input
16144 file, but the symbol was never referred to by a dynamic
16145 object, or if all references were garbage collected. In
16146 such a case, we don't actually need to build a procedure
16147 linkage table, and we can just do a PC24 reloc instead. */
16148 h->plt.offset = (bfd_vma) -1;
16149 eh->plt.thumb_refcount = 0;
16150 eh->plt.maybe_thumb_refcount = 0;
16151 eh->plt.noncall_refcount = 0;
16152 h->needs_plt = 0;
16153 }
16154
16155 return true;
16156 }
16157 else
16158 {
16159 /* It's possible that we incorrectly decided a .plt reloc was
16160 needed for an R_ARM_PC24 or similar reloc to a non-function sym
16161 in check_relocs. We can't decide accurately between function
16162 and non-function syms in check-relocs; Objects loaded later in
16163 the link may change h->type. So fix it now. */
16164 h->plt.offset = (bfd_vma) -1;
16165 eh->plt.thumb_refcount = 0;
16166 eh->plt.maybe_thumb_refcount = 0;
16167 eh->plt.noncall_refcount = 0;
16168 }
16169
16170 /* If this is a weak symbol, and there is a real definition, the
16171 processor independent code will have arranged for us to see the
16172 real definition first, and we can just use the same value. */
16173 if (h->is_weakalias)
16174 {
16175 struct elf_link_hash_entry *def = weakdef (h);
16176 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
16177 h->root.u.def.section = def->root.u.def.section;
16178 h->root.u.def.value = def->root.u.def.value;
16179 return true;
16180 }
16181
16182 /* If there are no non-GOT references, we do not need a copy
16183 relocation. */
16184 if (!h->non_got_ref)
16185 return true;
16186
16187 /* This is a reference to a symbol defined by a dynamic object which
16188 is not a function. */
16189
16190 /* If we are creating a shared library, we must presume that the
16191 only references to the symbol are via the global offset table.
16192 For such cases we need not do anything here; the relocations will
16193 be handled correctly by relocate_section. Relocatable executables
16194 can reference data in shared objects directly, so we don't need to
16195 do anything here. */
16196 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
16197 return true;
16198
16199 /* We must allocate the symbol in our .dynbss section, which will
16200 become part of the .bss section of the executable. There will be
16201 an entry for this symbol in the .dynsym section. The dynamic
16202 object will contain position independent code, so all references
16203 from the dynamic object to this symbol will go through the global
16204 offset table. The dynamic linker will use the .dynsym entry to
16205 determine the address it must put in the global offset table, so
16206 both the dynamic object and the regular object will refer to the
16207 same memory location for the variable. */
16208 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
16209 linker to copy the initial value out of the dynamic object and into
16210 the runtime process image. We need to remember the offset into the
16211 .rel(a).bss section we are going to use. */
16212 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
16213 {
16214 s = globals->root.sdynrelro;
16215 srel = globals->root.sreldynrelro;
16216 }
16217 else
16218 {
16219 s = globals->root.sdynbss;
16220 srel = globals->root.srelbss;
16221 }
16222 if (info->nocopyreloc == 0
16223 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
16224 && h->size != 0)
16225 {
16226 elf32_arm_allocate_dynrelocs (info, srel, 1);
16227 h->needs_copy = 1;
16228 }
16229
16230 return _bfd_elf_adjust_dynamic_copy (info, h, s);
16231 }
16232
16233 /* Allocate space in .plt, .got and associated reloc sections for
16234 dynamic relocs. */
16235
16236 static bool
16237 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
16238 {
16239 struct bfd_link_info *info;
16240 struct elf32_arm_link_hash_table *htab;
16241 struct elf32_arm_link_hash_entry *eh;
16242 struct elf_dyn_relocs *p;
16243
16244 if (h->root.type == bfd_link_hash_indirect)
16245 return true;
16246
16247 eh = (struct elf32_arm_link_hash_entry *) h;
16248
16249 info = (struct bfd_link_info *) inf;
16250 htab = elf32_arm_hash_table (info);
16251 if (htab == NULL)
16252 return false;
16253
16254 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
16255 && h->plt.refcount > 0)
16256 {
16257 /* Make sure this symbol is output as a dynamic symbol.
16258 Undefined weak syms won't yet be marked as dynamic. */
16259 if (h->dynindx == -1 && !h->forced_local
16260 && h->root.type == bfd_link_hash_undefweak)
16261 {
16262 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16263 return false;
16264 }
16265
16266 /* If the call in the PLT entry binds locally, the associated
16267 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16268 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16269 than the .plt section. */
16270 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
16271 {
16272 eh->is_iplt = 1;
16273 if (eh->plt.noncall_refcount == 0
16274 && SYMBOL_REFERENCES_LOCAL (info, h))
16275 /* All non-call references can be resolved directly.
16276 This means that they can (and in some cases, must)
16277 resolve directly to the run-time target, rather than
16278 to the PLT. That in turns means that any .got entry
16279 would be equal to the .igot.plt entry, so there's
16280 no point having both. */
16281 h->got.refcount = 0;
16282 }
16283
16284 if (bfd_link_pic (info)
16285 || eh->is_iplt
16286 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
16287 {
16288 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
16289
16290 /* If this symbol is not defined in a regular file, and we are
16291 not generating a shared library, then set the symbol to this
16292 location in the .plt. This is required to make function
16293 pointers compare as equal between the normal executable and
16294 the shared library. */
16295 if (! bfd_link_pic (info)
16296 && !h->def_regular)
16297 {
16298 h->root.u.def.section = htab->root.splt;
16299 h->root.u.def.value = h->plt.offset;
16300
16301 /* Make sure the function is not marked as Thumb, in case
16302 it is the target of an ABS32 relocation, which will
16303 point to the PLT entry. */
16304 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16305 }
16306
16307 /* VxWorks executables have a second set of relocations for
16308 each PLT entry. They go in a separate relocation section,
16309 which is processed by the kernel loader. */
16310 if (htab->root.target_os == is_vxworks && !bfd_link_pic (info))
16311 {
16312 /* There is a relocation for the initial PLT entry:
16313 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16314 if (h->plt.offset == htab->plt_header_size)
16315 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
16316
16317 /* There are two extra relocations for each subsequent
16318 PLT entry: an R_ARM_32 relocation for the GOT entry,
16319 and an R_ARM_32 relocation for the PLT entry. */
16320 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
16321 }
16322 }
16323 else
16324 {
16325 h->plt.offset = (bfd_vma) -1;
16326 h->needs_plt = 0;
16327 }
16328 }
16329 else
16330 {
16331 h->plt.offset = (bfd_vma) -1;
16332 h->needs_plt = 0;
16333 }
16334
16335 eh = (struct elf32_arm_link_hash_entry *) h;
16336 eh->tlsdesc_got = (bfd_vma) -1;
16337
16338 if (h->got.refcount > 0)
16339 {
16340 asection *s;
16341 bool dyn;
16342 int tls_type = elf32_arm_hash_entry (h)->tls_type;
16343 int indx;
16344
16345 /* Make sure this symbol is output as a dynamic symbol.
16346 Undefined weak syms won't yet be marked as dynamic. */
16347 if (htab->root.dynamic_sections_created
16348 && h->dynindx == -1
16349 && !h->forced_local
16350 && h->root.type == bfd_link_hash_undefweak)
16351 {
16352 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16353 return false;
16354 }
16355
16356 s = htab->root.sgot;
16357 h->got.offset = s->size;
16358
16359 if (tls_type == GOT_UNKNOWN)
16360 abort ();
16361
16362 if (tls_type == GOT_NORMAL)
16363 /* Non-TLS symbols need one GOT slot. */
16364 s->size += 4;
16365 else
16366 {
16367 if (tls_type & GOT_TLS_GDESC)
16368 {
16369 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16370 eh->tlsdesc_got
16371 = (htab->root.sgotplt->size
16372 - elf32_arm_compute_jump_table_size (htab));
16373 htab->root.sgotplt->size += 8;
16374 h->got.offset = (bfd_vma) -2;
16375 /* plt.got_offset needs to know there's a TLS_DESC
16376 reloc in the middle of .got.plt. */
16377 htab->num_tls_desc++;
16378 }
16379
16380 if (tls_type & GOT_TLS_GD)
16381 {
16382 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16383 consecutive GOT slots. If the symbol is both GD
16384 and GDESC, got.offset may have been
16385 overwritten. */
16386 h->got.offset = s->size;
16387 s->size += 8;
16388 }
16389
16390 if (tls_type & GOT_TLS_IE)
16391 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16392 slot. */
16393 s->size += 4;
16394 }
16395
16396 dyn = htab->root.dynamic_sections_created;
16397
16398 indx = 0;
16399 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
16400 && (!bfd_link_pic (info)
16401 || !SYMBOL_REFERENCES_LOCAL (info, h)))
16402 indx = h->dynindx;
16403
16404 if (tls_type != GOT_NORMAL
16405 && (bfd_link_dll (info) || indx != 0)
16406 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16407 || h->root.type != bfd_link_hash_undefweak))
16408 {
16409 if (tls_type & GOT_TLS_IE)
16410 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16411
16412 if (tls_type & GOT_TLS_GD)
16413 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16414
16415 if (tls_type & GOT_TLS_GDESC)
16416 {
16417 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
16418 /* GDESC needs a trampoline to jump to. */
16419 htab->tls_trampoline = -1;
16420 }
16421
16422 /* Only GD needs it. GDESC just emits one relocation per
16423 2 entries. */
16424 if ((tls_type & GOT_TLS_GD) && indx != 0)
16425 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16426 }
16427 else if (((indx != -1) || htab->fdpic_p)
16428 && !SYMBOL_REFERENCES_LOCAL (info, h))
16429 {
16430 if (htab->root.dynamic_sections_created)
16431 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16432 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16433 }
16434 else if (h->type == STT_GNU_IFUNC
16435 && eh->plt.noncall_refcount == 0)
16436 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16437 they all resolve dynamically instead. Reserve room for the
16438 GOT entry's R_ARM_IRELATIVE relocation. */
16439 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
16440 else if (bfd_link_pic (info)
16441 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16442 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16443 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16444 else if (htab->fdpic_p && tls_type == GOT_NORMAL)
16445 /* Reserve room for rofixup for FDPIC executable. */
16446 /* TLS relocs do not need space since they are completely
16447 resolved. */
16448 htab->srofixup->size += 4;
16449 }
16450 else
16451 h->got.offset = (bfd_vma) -1;
16452
16453 /* FDPIC support. */
16454 if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0)
16455 {
16456 /* Symbol musn't be exported. */
16457 if (h->dynindx != -1)
16458 abort ();
16459
16460 /* We only allocate one function descriptor with its associated
16461 relocation. */
16462 if (eh->fdpic_cnts.funcdesc_offset == -1)
16463 {
16464 asection *s = htab->root.sgot;
16465
16466 eh->fdpic_cnts.funcdesc_offset = s->size;
16467 s->size += 8;
16468 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16469 if (bfd_link_pic (info))
16470 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16471 else
16472 htab->srofixup->size += 8;
16473 }
16474 }
16475
16476 if (eh->fdpic_cnts.gotfuncdesc_cnt > 0)
16477 {
16478 asection *s = htab->root.sgot;
16479
16480 if (htab->root.dynamic_sections_created && h->dynindx == -1
16481 && !h->forced_local)
16482 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16483 return false;
16484
16485 if (h->dynindx == -1)
16486 {
16487 /* We only allocate one function descriptor with its
16488 associated relocation. */
16489 if (eh->fdpic_cnts.funcdesc_offset == -1)
16490 {
16491
16492 eh->fdpic_cnts.funcdesc_offset = s->size;
16493 s->size += 8;
16494 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two
16495 rofixups. */
16496 if (bfd_link_pic (info))
16497 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16498 else
16499 htab->srofixup->size += 8;
16500 }
16501 }
16502
16503 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16504 R_ARM_RELATIVE/rofixup relocation on it. */
16505 eh->fdpic_cnts.gotfuncdesc_offset = s->size;
16506 s->size += 4;
16507 if (h->dynindx == -1 && !bfd_link_pic (info))
16508 htab->srofixup->size += 4;
16509 else
16510 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16511 }
16512
16513 if (eh->fdpic_cnts.funcdesc_cnt > 0)
16514 {
16515 if (htab->root.dynamic_sections_created && h->dynindx == -1
16516 && !h->forced_local)
16517 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16518 return false;
16519
16520 if (h->dynindx == -1)
16521 {
16522 /* We only allocate one function descriptor with its
16523 associated relocation. */
16524 if (eh->fdpic_cnts.funcdesc_offset == -1)
16525 {
16526 asection *s = htab->root.sgot;
16527
16528 eh->fdpic_cnts.funcdesc_offset = s->size;
16529 s->size += 8;
16530 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two
16531 rofixups. */
16532 if (bfd_link_pic (info))
16533 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16534 else
16535 htab->srofixup->size += 8;
16536 }
16537 }
16538 if (h->dynindx == -1 && !bfd_link_pic (info))
16539 {
16540 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16541 htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt;
16542 }
16543 else
16544 {
16545 /* Will need one dynamic reloc per reference. will be either
16546 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16547 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot,
16548 eh->fdpic_cnts.funcdesc_cnt);
16549 }
16550 }
16551
16552 /* Allocate stubs for exported Thumb functions on v4t. */
16553 if (!htab->use_blx && h->dynindx != -1
16554 && h->def_regular
16555 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
16556 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
16557 {
16558 struct elf_link_hash_entry * th;
16559 struct bfd_link_hash_entry * bh;
16560 struct elf_link_hash_entry * myh;
16561 char name[1024];
16562 asection *s;
16563 bh = NULL;
16564 /* Create a new symbol to regist the real location of the function. */
16565 s = h->root.u.def.section;
16566 sprintf (name, "__real_%s", h->root.root.string);
16567 _bfd_generic_link_add_one_symbol (info, s->owner,
16568 name, BSF_GLOBAL, s,
16569 h->root.u.def.value,
16570 NULL, true, false, &bh);
16571
16572 myh = (struct elf_link_hash_entry *) bh;
16573 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16574 myh->forced_local = 1;
16575 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
16576 eh->export_glue = myh;
16577 th = record_arm_to_thumb_glue (info, h);
16578 /* Point the symbol at the stub. */
16579 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
16580 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16581 h->root.u.def.section = th->root.u.def.section;
16582 h->root.u.def.value = th->root.u.def.value & ~1;
16583 }
16584
16585 if (h->dyn_relocs == NULL)
16586 return true;
16587
16588 /* In the shared -Bsymbolic case, discard space allocated for
16589 dynamic pc-relative relocs against symbols which turn out to be
16590 defined in regular objects. For the normal shared case, discard
16591 space for pc-relative relocs that have become local due to symbol
16592 visibility changes. */
16593
16594 if (bfd_link_pic (info)
16595 || htab->root.is_relocatable_executable
16596 || htab->fdpic_p)
16597 {
16598 /* Relocs that use pc_count are PC-relative forms, which will appear
16599 on something like ".long foo - ." or "movw REG, foo - .". We want
16600 calls to protected symbols to resolve directly to the function
16601 rather than going via the plt. If people want function pointer
16602 comparisons to work as expected then they should avoid writing
16603 assembly like ".long foo - .". */
16604 if (SYMBOL_CALLS_LOCAL (info, h))
16605 {
16606 struct elf_dyn_relocs **pp;
16607
16608 for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
16609 {
16610 p->count -= p->pc_count;
16611 p->pc_count = 0;
16612 if (p->count == 0)
16613 *pp = p->next;
16614 else
16615 pp = &p->next;
16616 }
16617 }
16618
16619 if (htab->root.target_os == is_vxworks)
16620 {
16621 struct elf_dyn_relocs **pp;
16622
16623 for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
16624 {
16625 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
16626 *pp = p->next;
16627 else
16628 pp = &p->next;
16629 }
16630 }
16631
16632 /* Also discard relocs on undefined weak syms with non-default
16633 visibility. */
16634 if (h->dyn_relocs != NULL
16635 && h->root.type == bfd_link_hash_undefweak)
16636 {
16637 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16638 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16639 h->dyn_relocs = NULL;
16640
16641 /* Make sure undefined weak symbols are output as a dynamic
16642 symbol in PIEs. */
16643 else if (htab->root.dynamic_sections_created && h->dynindx == -1
16644 && !h->forced_local)
16645 {
16646 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16647 return false;
16648 }
16649 }
16650
16651 else if (htab->root.is_relocatable_executable && h->dynindx == -1
16652 && h->root.type == bfd_link_hash_new)
16653 {
16654 /* Output absolute symbols so that we can create relocations
16655 against them. For normal symbols we output a relocation
16656 against the section that contains them. */
16657 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16658 return false;
16659 }
16660
16661 }
16662 else
16663 {
16664 /* For the non-shared case, discard space for relocs against
16665 symbols which turn out to need copy relocs or are not
16666 dynamic. */
16667
16668 if (!h->non_got_ref
16669 && ((h->def_dynamic
16670 && !h->def_regular)
16671 || (htab->root.dynamic_sections_created
16672 && (h->root.type == bfd_link_hash_undefweak
16673 || h->root.type == bfd_link_hash_undefined))))
16674 {
16675 /* Make sure this symbol is output as a dynamic symbol.
16676 Undefined weak syms won't yet be marked as dynamic. */
16677 if (h->dynindx == -1 && !h->forced_local
16678 && h->root.type == bfd_link_hash_undefweak)
16679 {
16680 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16681 return false;
16682 }
16683
16684 /* If that succeeded, we know we'll be keeping all the
16685 relocs. */
16686 if (h->dynindx != -1)
16687 goto keep;
16688 }
16689
16690 h->dyn_relocs = NULL;
16691
16692 keep: ;
16693 }
16694
16695 /* Finally, allocate space. */
16696 for (p = h->dyn_relocs; p != NULL; p = p->next)
16697 {
16698 asection *sreloc = elf_section_data (p->sec)->sreloc;
16699
16700 if (h->type == STT_GNU_IFUNC
16701 && eh->plt.noncall_refcount == 0
16702 && SYMBOL_REFERENCES_LOCAL (info, h))
16703 elf32_arm_allocate_irelocs (info, sreloc, p->count);
16704 else if (h->dynindx != -1
16705 && (!bfd_link_pic (info) || !info->symbolic || !h->def_regular))
16706 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16707 else if (htab->fdpic_p && !bfd_link_pic (info))
16708 htab->srofixup->size += 4 * p->count;
16709 else
16710 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16711 }
16712
16713 return true;
16714 }
16715
16716 void
16717 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
16718 int byteswap_code)
16719 {
16720 struct elf32_arm_link_hash_table *globals;
16721
16722 globals = elf32_arm_hash_table (info);
16723 if (globals == NULL)
16724 return;
16725
16726 globals->byteswap_code = byteswap_code;
16727 }
16728
16729 /* Set the sizes of the dynamic sections. */
16730
16731 static bool
16732 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
16733 struct bfd_link_info * info)
16734 {
16735 bfd * dynobj;
16736 asection * s;
16737 bool relocs;
16738 bfd *ibfd;
16739 struct elf32_arm_link_hash_table *htab;
16740
16741 htab = elf32_arm_hash_table (info);
16742 if (htab == NULL)
16743 return false;
16744
16745 dynobj = elf_hash_table (info)->dynobj;
16746 BFD_ASSERT (dynobj != NULL);
16747 check_use_blx (htab);
16748
16749 if (elf_hash_table (info)->dynamic_sections_created)
16750 {
16751 /* Set the contents of the .interp section to the interpreter. */
16752 if (bfd_link_executable (info) && !info->nointerp)
16753 {
16754 s = bfd_get_linker_section (dynobj, ".interp");
16755 BFD_ASSERT (s != NULL);
16756 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
16757 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
16758 }
16759 }
16760
16761 /* Set up .got offsets for local syms, and space for local dynamic
16762 relocs. */
16763 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16764 {
16765 bfd_signed_vma *local_got;
16766 bfd_signed_vma *end_local_got;
16767 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
16768 char *local_tls_type;
16769 bfd_vma *local_tlsdesc_gotent;
16770 bfd_size_type locsymcount;
16771 Elf_Internal_Shdr *symtab_hdr;
16772 asection *srel;
16773 unsigned int symndx;
16774 struct fdpic_local *local_fdpic_cnts;
16775
16776 if (! is_arm_elf (ibfd))
16777 continue;
16778
16779 for (s = ibfd->sections; s != NULL; s = s->next)
16780 {
16781 struct elf_dyn_relocs *p;
16782
16783 for (p = (struct elf_dyn_relocs *)
16784 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
16785 {
16786 if (!bfd_is_abs_section (p->sec)
16787 && bfd_is_abs_section (p->sec->output_section))
16788 {
16789 /* Input section has been discarded, either because
16790 it is a copy of a linkonce section or due to
16791 linker script /DISCARD/, so we'll be discarding
16792 the relocs too. */
16793 }
16794 else if (htab->root.target_os == is_vxworks
16795 && strcmp (p->sec->output_section->name,
16796 ".tls_vars") == 0)
16797 {
16798 /* Relocations in vxworks .tls_vars sections are
16799 handled specially by the loader. */
16800 }
16801 else if (p->count != 0)
16802 {
16803 srel = elf_section_data (p->sec)->sreloc;
16804 if (htab->fdpic_p && !bfd_link_pic (info))
16805 htab->srofixup->size += 4 * p->count;
16806 else
16807 elf32_arm_allocate_dynrelocs (info, srel, p->count);
16808 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
16809 info->flags |= DF_TEXTREL;
16810 }
16811 }
16812 }
16813
16814 local_got = elf_local_got_refcounts (ibfd);
16815 if (local_got == NULL)
16816 continue;
16817
16818 symtab_hdr = & elf_symtab_hdr (ibfd);
16819 locsymcount = symtab_hdr->sh_info;
16820 end_local_got = local_got + locsymcount;
16821 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
16822 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
16823 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
16824 local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd);
16825 symndx = 0;
16826 s = htab->root.sgot;
16827 srel = htab->root.srelgot;
16828 for (; local_got < end_local_got;
16829 ++local_got, ++local_iplt_ptr, ++local_tls_type,
16830 ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts)
16831 {
16832 if (symndx >= elf32_arm_num_entries (ibfd))
16833 return false;
16834
16835 *local_tlsdesc_gotent = (bfd_vma) -1;
16836 local_iplt = *local_iplt_ptr;
16837
16838 /* FDPIC support. */
16839 if (local_fdpic_cnts->gotofffuncdesc_cnt > 0)
16840 {
16841 if (local_fdpic_cnts->funcdesc_offset == -1)
16842 {
16843 local_fdpic_cnts->funcdesc_offset = s->size;
16844 s->size += 8;
16845
16846 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16847 if (bfd_link_pic (info))
16848 elf32_arm_allocate_dynrelocs (info, srel, 1);
16849 else
16850 htab->srofixup->size += 8;
16851 }
16852 }
16853
16854 if (local_fdpic_cnts->funcdesc_cnt > 0)
16855 {
16856 if (local_fdpic_cnts->funcdesc_offset == -1)
16857 {
16858 local_fdpic_cnts->funcdesc_offset = s->size;
16859 s->size += 8;
16860
16861 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16862 if (bfd_link_pic (info))
16863 elf32_arm_allocate_dynrelocs (info, srel, 1);
16864 else
16865 htab->srofixup->size += 8;
16866 }
16867
16868 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16869 if (bfd_link_pic (info))
16870 elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt);
16871 else
16872 htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt;
16873 }
16874
16875 if (local_iplt != NULL)
16876 {
16877 struct elf_dyn_relocs *p;
16878
16879 if (local_iplt->root.refcount > 0)
16880 {
16881 elf32_arm_allocate_plt_entry (info, true,
16882 &local_iplt->root,
16883 &local_iplt->arm);
16884 if (local_iplt->arm.noncall_refcount == 0)
16885 /* All references to the PLT are calls, so all
16886 non-call references can resolve directly to the
16887 run-time target. This means that the .got entry
16888 would be the same as the .igot.plt entry, so there's
16889 no point creating both. */
16890 *local_got = 0;
16891 }
16892 else
16893 {
16894 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
16895 local_iplt->root.offset = (bfd_vma) -1;
16896 }
16897
16898 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
16899 {
16900 asection *psrel;
16901
16902 psrel = elf_section_data (p->sec)->sreloc;
16903 if (local_iplt->arm.noncall_refcount == 0)
16904 elf32_arm_allocate_irelocs (info, psrel, p->count);
16905 else
16906 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
16907 }
16908 }
16909 if (*local_got > 0)
16910 {
16911 Elf_Internal_Sym *isym;
16912
16913 *local_got = s->size;
16914 if (*local_tls_type & GOT_TLS_GD)
16915 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16916 s->size += 8;
16917 if (*local_tls_type & GOT_TLS_GDESC)
16918 {
16919 *local_tlsdesc_gotent = htab->root.sgotplt->size
16920 - elf32_arm_compute_jump_table_size (htab);
16921 htab->root.sgotplt->size += 8;
16922 *local_got = (bfd_vma) -2;
16923 /* plt.got_offset needs to know there's a TLS_DESC
16924 reloc in the middle of .got.plt. */
16925 htab->num_tls_desc++;
16926 }
16927 if (*local_tls_type & GOT_TLS_IE)
16928 s->size += 4;
16929
16930 if (*local_tls_type & GOT_NORMAL)
16931 {
16932 /* If the symbol is both GD and GDESC, *local_got
16933 may have been overwritten. */
16934 *local_got = s->size;
16935 s->size += 4;
16936 }
16937
16938 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, ibfd,
16939 symndx);
16940 if (isym == NULL)
16941 return false;
16942
16943 /* If all references to an STT_GNU_IFUNC PLT are calls,
16944 then all non-call references, including this GOT entry,
16945 resolve directly to the run-time target. */
16946 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
16947 && (local_iplt == NULL
16948 || local_iplt->arm.noncall_refcount == 0))
16949 elf32_arm_allocate_irelocs (info, srel, 1);
16950 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p)
16951 {
16952 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)))
16953 elf32_arm_allocate_dynrelocs (info, srel, 1);
16954 else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL)
16955 htab->srofixup->size += 4;
16956
16957 if ((bfd_link_pic (info) || htab->fdpic_p)
16958 && *local_tls_type & GOT_TLS_GDESC)
16959 {
16960 elf32_arm_allocate_dynrelocs (info,
16961 htab->root.srelplt, 1);
16962 htab->tls_trampoline = -1;
16963 }
16964 }
16965 }
16966 else
16967 *local_got = (bfd_vma) -1;
16968 }
16969 }
16970
16971 if (htab->tls_ldm_got.refcount > 0)
16972 {
16973 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16974 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
16975 htab->tls_ldm_got.offset = htab->root.sgot->size;
16976 htab->root.sgot->size += 8;
16977 if (bfd_link_pic (info))
16978 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16979 }
16980 else
16981 htab->tls_ldm_got.offset = -1;
16982
16983 /* At the very end of the .rofixup section is a pointer to the GOT,
16984 reserve space for it. */
16985 if (htab->fdpic_p && htab->srofixup != NULL)
16986 htab->srofixup->size += 4;
16987
16988 /* Allocate global sym .plt and .got entries, and space for global
16989 sym dynamic relocs. */
16990 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16991
16992 /* Here we rummage through the found bfds to collect glue information. */
16993 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16994 {
16995 if (! is_arm_elf (ibfd))
16996 continue;
16997
16998 /* Initialise mapping tables for code/data. */
16999 bfd_elf32_arm_init_maps (ibfd);
17000
17001 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
17002 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
17003 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
17004 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
17005 }
17006
17007 /* Allocate space for the glue sections now that we've sized them. */
17008 bfd_elf32_arm_allocate_interworking_sections (info);
17009
17010 /* For every jump slot reserved in the sgotplt, reloc_count is
17011 incremented. However, when we reserve space for TLS descriptors,
17012 it's not incremented, so in order to compute the space reserved
17013 for them, it suffices to multiply the reloc count by the jump
17014 slot size. */
17015 if (htab->root.srelplt)
17016 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size (htab);
17017
17018 if (htab->tls_trampoline)
17019 {
17020 if (htab->root.splt->size == 0)
17021 htab->root.splt->size += htab->plt_header_size;
17022
17023 htab->tls_trampoline = htab->root.splt->size;
17024 htab->root.splt->size += htab->plt_entry_size;
17025
17026 /* If we're not using lazy TLS relocations, don't generate the
17027 PLT and GOT entries they require. */
17028 if ((info->flags & DF_BIND_NOW))
17029 htab->root.tlsdesc_plt = 0;
17030 else
17031 {
17032 htab->root.tlsdesc_got = htab->root.sgot->size;
17033 htab->root.sgot->size += 4;
17034
17035 htab->root.tlsdesc_plt = htab->root.splt->size;
17036 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
17037 }
17038 }
17039
17040 /* The check_relocs and adjust_dynamic_symbol entry points have
17041 determined the sizes of the various dynamic sections. Allocate
17042 memory for them. */
17043 relocs = false;
17044 for (s = dynobj->sections; s != NULL; s = s->next)
17045 {
17046 const char * name;
17047
17048 if ((s->flags & SEC_LINKER_CREATED) == 0)
17049 continue;
17050
17051 /* It's OK to base decisions on the section name, because none
17052 of the dynobj section names depend upon the input files. */
17053 name = bfd_section_name (s);
17054
17055 if (s == htab->root.splt)
17056 {
17057 /* Remember whether there is a PLT. */
17058 ;
17059 }
17060 else if (startswith (name, ".rel"))
17061 {
17062 if (s->size != 0)
17063 {
17064 /* Remember whether there are any reloc sections other
17065 than .rel(a).plt and .rela.plt.unloaded. */
17066 if (s != htab->root.srelplt && s != htab->srelplt2)
17067 relocs = true;
17068
17069 /* We use the reloc_count field as a counter if we need
17070 to copy relocs into the output file. */
17071 s->reloc_count = 0;
17072 }
17073 }
17074 else if (s != htab->root.sgot
17075 && s != htab->root.sgotplt
17076 && s != htab->root.iplt
17077 && s != htab->root.igotplt
17078 && s != htab->root.sdynbss
17079 && s != htab->root.sdynrelro
17080 && s != htab->srofixup)
17081 {
17082 /* It's not one of our sections, so don't allocate space. */
17083 continue;
17084 }
17085
17086 if (s->size == 0)
17087 {
17088 /* If we don't need this section, strip it from the
17089 output file. This is mostly to handle .rel(a).bss and
17090 .rel(a).plt. We must create both sections in
17091 create_dynamic_sections, because they must be created
17092 before the linker maps input sections to output
17093 sections. The linker does that before
17094 adjust_dynamic_symbol is called, and it is that
17095 function which decides whether anything needs to go
17096 into these sections. */
17097 s->flags |= SEC_EXCLUDE;
17098 continue;
17099 }
17100
17101 if ((s->flags & SEC_HAS_CONTENTS) == 0)
17102 continue;
17103
17104 /* Allocate memory for the section contents. */
17105 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
17106 if (s->contents == NULL)
17107 return false;
17108 }
17109
17110 return _bfd_elf_maybe_vxworks_add_dynamic_tags (output_bfd, info,
17111 relocs);
17112 }
17113
17114 /* Size sections even though they're not dynamic. We use it to setup
17115 _TLS_MODULE_BASE_, if needed. */
17116
17117 static bool
17118 elf32_arm_always_size_sections (bfd *output_bfd,
17119 struct bfd_link_info *info)
17120 {
17121 asection *tls_sec;
17122 struct elf32_arm_link_hash_table *htab;
17123
17124 htab = elf32_arm_hash_table (info);
17125
17126 if (bfd_link_relocatable (info))
17127 return true;
17128
17129 tls_sec = elf_hash_table (info)->tls_sec;
17130
17131 if (tls_sec)
17132 {
17133 struct elf_link_hash_entry *tlsbase;
17134
17135 tlsbase = elf_link_hash_lookup
17136 (elf_hash_table (info), "_TLS_MODULE_BASE_", true, true, false);
17137
17138 if (tlsbase)
17139 {
17140 struct bfd_link_hash_entry *bh = NULL;
17141 const struct elf_backend_data *bed
17142 = get_elf_backend_data (output_bfd);
17143
17144 if (!(_bfd_generic_link_add_one_symbol
17145 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
17146 tls_sec, 0, NULL, false,
17147 bed->collect, &bh)))
17148 return false;
17149
17150 tlsbase->type = STT_TLS;
17151 tlsbase = (struct elf_link_hash_entry *)bh;
17152 tlsbase->def_regular = 1;
17153 tlsbase->other = STV_HIDDEN;
17154 (*bed->elf_backend_hide_symbol) (info, tlsbase, true);
17155 }
17156 }
17157
17158 if (htab->fdpic_p && !bfd_link_relocatable (info)
17159 && !bfd_elf_stack_segment_size (output_bfd, info,
17160 "__stacksize", DEFAULT_STACK_SIZE))
17161 return false;
17162
17163 return true;
17164 }
17165
17166 /* Finish up dynamic symbol handling. We set the contents of various
17167 dynamic sections here. */
17168
17169 static bool
17170 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
17171 struct bfd_link_info * info,
17172 struct elf_link_hash_entry * h,
17173 Elf_Internal_Sym * sym)
17174 {
17175 struct elf32_arm_link_hash_table *htab;
17176 struct elf32_arm_link_hash_entry *eh;
17177
17178 htab = elf32_arm_hash_table (info);
17179 if (htab == NULL)
17180 return false;
17181
17182 eh = (struct elf32_arm_link_hash_entry *) h;
17183
17184 if (h->plt.offset != (bfd_vma) -1)
17185 {
17186 if (!eh->is_iplt)
17187 {
17188 BFD_ASSERT (h->dynindx != -1);
17189 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
17190 h->dynindx, 0))
17191 return false;
17192 }
17193
17194 if (!h->def_regular)
17195 {
17196 /* Mark the symbol as undefined, rather than as defined in
17197 the .plt section. */
17198 sym->st_shndx = SHN_UNDEF;
17199 /* If the symbol is weak we need to clear the value.
17200 Otherwise, the PLT entry would provide a definition for
17201 the symbol even if the symbol wasn't defined anywhere,
17202 and so the symbol would never be NULL. Leave the value if
17203 there were any relocations where pointer equality matters
17204 (this is a clue for the dynamic linker, to make function
17205 pointer comparisons work between an application and shared
17206 library). */
17207 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
17208 sym->st_value = 0;
17209 }
17210 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
17211 {
17212 /* At least one non-call relocation references this .iplt entry,
17213 so the .iplt entry is the function's canonical address. */
17214 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
17215 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
17216 sym->st_shndx = (_bfd_elf_section_from_bfd_section
17217 (output_bfd, htab->root.iplt->output_section));
17218 sym->st_value = (h->plt.offset
17219 + htab->root.iplt->output_section->vma
17220 + htab->root.iplt->output_offset);
17221 }
17222 }
17223
17224 if (h->needs_copy)
17225 {
17226 asection * s;
17227 Elf_Internal_Rela rel;
17228
17229 /* This symbol needs a copy reloc. Set it up. */
17230 BFD_ASSERT (h->dynindx != -1
17231 && (h->root.type == bfd_link_hash_defined
17232 || h->root.type == bfd_link_hash_defweak));
17233
17234 rel.r_addend = 0;
17235 rel.r_offset = (h->root.u.def.value
17236 + h->root.u.def.section->output_section->vma
17237 + h->root.u.def.section->output_offset);
17238 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
17239 if (h->root.u.def.section == htab->root.sdynrelro)
17240 s = htab->root.sreldynrelro;
17241 else
17242 s = htab->root.srelbss;
17243 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
17244 }
17245
17246 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17247 and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17248 it is relative to the ".got" section. */
17249 if (h == htab->root.hdynamic
17250 || (!htab->fdpic_p
17251 && htab->root.target_os != is_vxworks
17252 && h == htab->root.hgot))
17253 sym->st_shndx = SHN_ABS;
17254
17255 return true;
17256 }
17257
17258 static void
17259 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17260 void *contents,
17261 const unsigned long *template, unsigned count)
17262 {
17263 unsigned ix;
17264
17265 for (ix = 0; ix != count; ix++)
17266 {
17267 unsigned long insn = template[ix];
17268
17269 /* Emit mov pc,rx if bx is not permitted. */
17270 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
17271 insn = (insn & 0xf000000f) | 0x01a0f000;
17272 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
17273 }
17274 }
17275
17276 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17277 other variants, NaCl needs this entry in a static executable's
17278 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17279 zero. For .iplt really only the last bundle is useful, and .iplt
17280 could have a shorter first entry, with each individual PLT entry's
17281 relative branch calculated differently so it targets the last
17282 bundle instead of the instruction before it (labelled .Lplt_tail
17283 above). But it's simpler to keep the size and layout of PLT0
17284 consistent with the dynamic case, at the cost of some dead code at
17285 the start of .iplt and the one dead store to the stack at the start
17286 of .Lplt_tail. */
17287 static void
17288 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17289 asection *plt, bfd_vma got_displacement)
17290 {
17291 unsigned int i;
17292
17293 put_arm_insn (htab, output_bfd,
17294 elf32_arm_nacl_plt0_entry[0]
17295 | arm_movw_immediate (got_displacement),
17296 plt->contents + 0);
17297 put_arm_insn (htab, output_bfd,
17298 elf32_arm_nacl_plt0_entry[1]
17299 | arm_movt_immediate (got_displacement),
17300 plt->contents + 4);
17301
17302 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
17303 put_arm_insn (htab, output_bfd,
17304 elf32_arm_nacl_plt0_entry[i],
17305 plt->contents + (i * 4));
17306 }
17307
17308 /* Finish up the dynamic sections. */
17309
17310 static bool
17311 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
17312 {
17313 bfd * dynobj;
17314 asection * sgot;
17315 asection * sdyn;
17316 struct elf32_arm_link_hash_table *htab;
17317
17318 htab = elf32_arm_hash_table (info);
17319 if (htab == NULL)
17320 return false;
17321
17322 dynobj = elf_hash_table (info)->dynobj;
17323
17324 sgot = htab->root.sgotplt;
17325 /* A broken linker script might have discarded the dynamic sections.
17326 Catch this here so that we do not seg-fault later on. */
17327 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
17328 return false;
17329 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
17330
17331 if (elf_hash_table (info)->dynamic_sections_created)
17332 {
17333 asection *splt;
17334 Elf32_External_Dyn *dyncon, *dynconend;
17335
17336 splt = htab->root.splt;
17337 BFD_ASSERT (splt != NULL && sdyn != NULL);
17338 BFD_ASSERT (sgot != NULL);
17339
17340 dyncon = (Elf32_External_Dyn *) sdyn->contents;
17341 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
17342
17343 for (; dyncon < dynconend; dyncon++)
17344 {
17345 Elf_Internal_Dyn dyn;
17346 const char * name;
17347 asection * s;
17348
17349 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
17350
17351 switch (dyn.d_tag)
17352 {
17353 default:
17354 if (htab->root.target_os == is_vxworks
17355 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
17356 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17357 break;
17358
17359 case DT_HASH:
17360 case DT_STRTAB:
17361 case DT_SYMTAB:
17362 case DT_VERSYM:
17363 case DT_VERDEF:
17364 case DT_VERNEED:
17365 break;
17366
17367 case DT_PLTGOT:
17368 name = ".got.plt";
17369 goto get_vma;
17370 case DT_JMPREL:
17371 name = RELOC_SECTION (htab, ".plt");
17372 get_vma:
17373 s = bfd_get_linker_section (dynobj, name);
17374 if (s == NULL)
17375 {
17376 _bfd_error_handler
17377 (_("could not find section %s"), name);
17378 bfd_set_error (bfd_error_invalid_operation);
17379 return false;
17380 }
17381 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
17382 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17383 break;
17384
17385 case DT_PLTRELSZ:
17386 s = htab->root.srelplt;
17387 BFD_ASSERT (s != NULL);
17388 dyn.d_un.d_val = s->size;
17389 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17390 break;
17391
17392 case DT_RELSZ:
17393 case DT_RELASZ:
17394 case DT_REL:
17395 case DT_RELA:
17396 break;
17397
17398 case DT_TLSDESC_PLT:
17399 s = htab->root.splt;
17400 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17401 + htab->root.tlsdesc_plt);
17402 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17403 break;
17404
17405 case DT_TLSDESC_GOT:
17406 s = htab->root.sgot;
17407 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17408 + htab->root.tlsdesc_got);
17409 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17410 break;
17411
17412 /* Set the bottom bit of DT_INIT/FINI if the
17413 corresponding function is Thumb. */
17414 case DT_INIT:
17415 name = info->init_function;
17416 goto get_sym;
17417 case DT_FINI:
17418 name = info->fini_function;
17419 get_sym:
17420 /* If it wasn't set by elf_bfd_final_link
17421 then there is nothing to adjust. */
17422 if (dyn.d_un.d_val != 0)
17423 {
17424 struct elf_link_hash_entry * eh;
17425
17426 eh = elf_link_hash_lookup (elf_hash_table (info), name,
17427 false, false, true);
17428 if (eh != NULL
17429 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
17430 == ST_BRANCH_TO_THUMB)
17431 {
17432 dyn.d_un.d_val |= 1;
17433 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17434 }
17435 }
17436 break;
17437 }
17438 }
17439
17440 /* Fill in the first entry in the procedure linkage table. */
17441 if (splt->size > 0 && htab->plt_header_size)
17442 {
17443 const bfd_vma *plt0_entry;
17444 bfd_vma got_address, plt_address, got_displacement;
17445
17446 /* Calculate the addresses of the GOT and PLT. */
17447 got_address = sgot->output_section->vma + sgot->output_offset;
17448 plt_address = splt->output_section->vma + splt->output_offset;
17449
17450 if (htab->root.target_os == is_vxworks)
17451 {
17452 /* The VxWorks GOT is relocated by the dynamic linker.
17453 Therefore, we must emit relocations rather than simply
17454 computing the values now. */
17455 Elf_Internal_Rela rel;
17456
17457 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
17458 put_arm_insn (htab, output_bfd, plt0_entry[0],
17459 splt->contents + 0);
17460 put_arm_insn (htab, output_bfd, plt0_entry[1],
17461 splt->contents + 4);
17462 put_arm_insn (htab, output_bfd, plt0_entry[2],
17463 splt->contents + 8);
17464 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
17465
17466 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17467 rel.r_offset = plt_address + 12;
17468 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17469 rel.r_addend = 0;
17470 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
17471 htab->srelplt2->contents);
17472 }
17473 else if (htab->root.target_os == is_nacl)
17474 arm_nacl_put_plt0 (htab, output_bfd, splt,
17475 got_address + 8 - (plt_address + 16));
17476 else if (using_thumb_only (htab))
17477 {
17478 got_displacement = got_address - (plt_address + 12);
17479
17480 plt0_entry = elf32_thumb2_plt0_entry;
17481 put_arm_insn (htab, output_bfd, plt0_entry[0],
17482 splt->contents + 0);
17483 put_arm_insn (htab, output_bfd, plt0_entry[1],
17484 splt->contents + 4);
17485 put_arm_insn (htab, output_bfd, plt0_entry[2],
17486 splt->contents + 8);
17487
17488 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
17489 }
17490 else
17491 {
17492 got_displacement = got_address - (plt_address + 16);
17493
17494 plt0_entry = elf32_arm_plt0_entry;
17495 put_arm_insn (htab, output_bfd, plt0_entry[0],
17496 splt->contents + 0);
17497 put_arm_insn (htab, output_bfd, plt0_entry[1],
17498 splt->contents + 4);
17499 put_arm_insn (htab, output_bfd, plt0_entry[2],
17500 splt->contents + 8);
17501 put_arm_insn (htab, output_bfd, plt0_entry[3],
17502 splt->contents + 12);
17503
17504 #ifdef FOUR_WORD_PLT
17505 /* The displacement value goes in the otherwise-unused
17506 last word of the second entry. */
17507 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
17508 #else
17509 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
17510 #endif
17511 }
17512 }
17513
17514 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17515 really seem like the right value. */
17516 if (splt->output_section->owner == output_bfd)
17517 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
17518
17519 if (htab->root.tlsdesc_plt)
17520 {
17521 bfd_vma got_address
17522 = sgot->output_section->vma + sgot->output_offset;
17523 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
17524 + htab->root.sgot->output_offset);
17525 bfd_vma plt_address
17526 = splt->output_section->vma + splt->output_offset;
17527
17528 arm_put_trampoline (htab, output_bfd,
17529 splt->contents + htab->root.tlsdesc_plt,
17530 dl_tlsdesc_lazy_trampoline, 6);
17531
17532 bfd_put_32 (output_bfd,
17533 gotplt_address + htab->root.tlsdesc_got
17534 - (plt_address + htab->root.tlsdesc_plt)
17535 - dl_tlsdesc_lazy_trampoline[6],
17536 splt->contents + htab->root.tlsdesc_plt + 24);
17537 bfd_put_32 (output_bfd,
17538 got_address - (plt_address + htab->root.tlsdesc_plt)
17539 - dl_tlsdesc_lazy_trampoline[7],
17540 splt->contents + htab->root.tlsdesc_plt + 24 + 4);
17541 }
17542
17543 if (htab->tls_trampoline)
17544 {
17545 arm_put_trampoline (htab, output_bfd,
17546 splt->contents + htab->tls_trampoline,
17547 tls_trampoline, 3);
17548 #ifdef FOUR_WORD_PLT
17549 bfd_put_32 (output_bfd, 0x00000000,
17550 splt->contents + htab->tls_trampoline + 12);
17551 #endif
17552 }
17553
17554 if (htab->root.target_os == is_vxworks
17555 && !bfd_link_pic (info)
17556 && htab->root.splt->size > 0)
17557 {
17558 /* Correct the .rel(a).plt.unloaded relocations. They will have
17559 incorrect symbol indexes. */
17560 int num_plts;
17561 unsigned char *p;
17562
17563 num_plts = ((htab->root.splt->size - htab->plt_header_size)
17564 / htab->plt_entry_size);
17565 p = htab->srelplt2->contents + RELOC_SIZE (htab);
17566
17567 for (; num_plts; num_plts--)
17568 {
17569 Elf_Internal_Rela rel;
17570
17571 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17572 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17573 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17574 p += RELOC_SIZE (htab);
17575
17576 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17577 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
17578 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17579 p += RELOC_SIZE (htab);
17580 }
17581 }
17582 }
17583
17584 if (htab->root.target_os == is_nacl
17585 && htab->root.iplt != NULL
17586 && htab->root.iplt->size > 0)
17587 /* NaCl uses a special first entry in .iplt too. */
17588 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
17589
17590 /* Fill in the first three entries in the global offset table. */
17591 if (sgot)
17592 {
17593 if (sgot->size > 0)
17594 {
17595 if (sdyn == NULL)
17596 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
17597 else
17598 bfd_put_32 (output_bfd,
17599 sdyn->output_section->vma + sdyn->output_offset,
17600 sgot->contents);
17601 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
17602 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
17603 }
17604
17605 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
17606 }
17607
17608 /* At the very end of the .rofixup section is a pointer to the GOT. */
17609 if (htab->fdpic_p && htab->srofixup != NULL)
17610 {
17611 struct elf_link_hash_entry *hgot = htab->root.hgot;
17612
17613 bfd_vma got_value = hgot->root.u.def.value
17614 + hgot->root.u.def.section->output_section->vma
17615 + hgot->root.u.def.section->output_offset;
17616
17617 arm_elf_add_rofixup (output_bfd, htab->srofixup, got_value);
17618
17619 /* Make sure we allocated and generated the same number of fixups. */
17620 BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size);
17621 }
17622
17623 return true;
17624 }
17625
17626 static bool
17627 elf32_arm_init_file_header (bfd *abfd, struct bfd_link_info *link_info)
17628 {
17629 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
17630 struct elf32_arm_link_hash_table *globals;
17631 struct elf_segment_map *m;
17632
17633 if (!_bfd_elf_init_file_header (abfd, link_info))
17634 return false;
17635
17636 i_ehdrp = elf_elfheader (abfd);
17637
17638 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
17639 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
17640 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
17641
17642 if (link_info)
17643 {
17644 globals = elf32_arm_hash_table (link_info);
17645 if (globals != NULL && globals->byteswap_code)
17646 i_ehdrp->e_flags |= EF_ARM_BE8;
17647
17648 if (globals->fdpic_p)
17649 i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC;
17650 }
17651
17652 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
17653 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
17654 {
17655 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
17656 if (abi == AEABI_VFP_args_vfp)
17657 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
17658 else
17659 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
17660 }
17661
17662 /* Scan segment to set p_flags attribute if it contains only sections with
17663 SHF_ARM_PURECODE flag. */
17664 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
17665 {
17666 unsigned int j;
17667
17668 if (m->count == 0)
17669 continue;
17670 for (j = 0; j < m->count; j++)
17671 {
17672 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
17673 break;
17674 }
17675 if (j == m->count)
17676 {
17677 m->p_flags = PF_X;
17678 m->p_flags_valid = 1;
17679 }
17680 }
17681 return true;
17682 }
17683
17684 static enum elf_reloc_type_class
17685 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
17686 const asection *rel_sec ATTRIBUTE_UNUSED,
17687 const Elf_Internal_Rela *rela)
17688 {
17689 switch ((int) ELF32_R_TYPE (rela->r_info))
17690 {
17691 case R_ARM_RELATIVE:
17692 return reloc_class_relative;
17693 case R_ARM_JUMP_SLOT:
17694 return reloc_class_plt;
17695 case R_ARM_COPY:
17696 return reloc_class_copy;
17697 case R_ARM_IRELATIVE:
17698 return reloc_class_ifunc;
17699 default:
17700 return reloc_class_normal;
17701 }
17702 }
17703
17704 static void
17705 arm_final_write_processing (bfd *abfd)
17706 {
17707 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
17708 }
17709
17710 static bool
17711 elf32_arm_final_write_processing (bfd *abfd)
17712 {
17713 arm_final_write_processing (abfd);
17714 return _bfd_elf_final_write_processing (abfd);
17715 }
17716
17717 /* Return TRUE if this is an unwinding table entry. */
17718
17719 static bool
17720 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
17721 {
17722 return (startswith (name, ELF_STRING_ARM_unwind)
17723 || startswith (name, ELF_STRING_ARM_unwind_once));
17724 }
17725
17726
17727 /* Set the type and flags for an ARM section. We do this by
17728 the section name, which is a hack, but ought to work. */
17729
17730 static bool
17731 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
17732 {
17733 const char * name;
17734
17735 name = bfd_section_name (sec);
17736
17737 if (is_arm_elf_unwind_section_name (abfd, name))
17738 {
17739 hdr->sh_type = SHT_ARM_EXIDX;
17740 hdr->sh_flags |= SHF_LINK_ORDER;
17741 }
17742
17743 if (sec->flags & SEC_ELF_PURECODE)
17744 hdr->sh_flags |= SHF_ARM_PURECODE;
17745
17746 return true;
17747 }
17748
17749 /* Handle an ARM specific section when reading an object file. This is
17750 called when bfd_section_from_shdr finds a section with an unknown
17751 type. */
17752
17753 static bool
17754 elf32_arm_section_from_shdr (bfd *abfd,
17755 Elf_Internal_Shdr * hdr,
17756 const char *name,
17757 int shindex)
17758 {
17759 /* There ought to be a place to keep ELF backend specific flags, but
17760 at the moment there isn't one. We just keep track of the
17761 sections by their name, instead. Fortunately, the ABI gives
17762 names for all the ARM specific sections, so we will probably get
17763 away with this. */
17764 switch (hdr->sh_type)
17765 {
17766 case SHT_ARM_EXIDX:
17767 case SHT_ARM_PREEMPTMAP:
17768 case SHT_ARM_ATTRIBUTES:
17769 break;
17770
17771 default:
17772 return false;
17773 }
17774
17775 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
17776 return false;
17777
17778 return true;
17779 }
17780
17781 static _arm_elf_section_data *
17782 get_arm_elf_section_data (asection * sec)
17783 {
17784 if (sec && sec->owner && is_arm_elf (sec->owner))
17785 return elf32_arm_section_data (sec);
17786 else
17787 return NULL;
17788 }
17789
17790 typedef struct
17791 {
17792 void *flaginfo;
17793 struct bfd_link_info *info;
17794 asection *sec;
17795 int sec_shndx;
17796 int (*func) (void *, const char *, Elf_Internal_Sym *,
17797 asection *, struct elf_link_hash_entry *);
17798 } output_arch_syminfo;
17799
17800 enum map_symbol_type
17801 {
17802 ARM_MAP_ARM,
17803 ARM_MAP_THUMB,
17804 ARM_MAP_DATA
17805 };
17806
17807
17808 /* Output a single mapping symbol. */
17809
17810 static bool
17811 elf32_arm_output_map_sym (output_arch_syminfo *osi,
17812 enum map_symbol_type type,
17813 bfd_vma offset)
17814 {
17815 static const char *names[3] = {"$a", "$t", "$d"};
17816 Elf_Internal_Sym sym;
17817
17818 sym.st_value = osi->sec->output_section->vma
17819 + osi->sec->output_offset
17820 + offset;
17821 sym.st_size = 0;
17822 sym.st_other = 0;
17823 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
17824 sym.st_shndx = osi->sec_shndx;
17825 sym.st_target_internal = 0;
17826 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
17827 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
17828 }
17829
17830 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17831 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17832
17833 static bool
17834 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
17835 bool is_iplt_entry_p,
17836 union gotplt_union *root_plt,
17837 struct arm_plt_info *arm_plt)
17838 {
17839 struct elf32_arm_link_hash_table *htab;
17840 bfd_vma addr, plt_header_size;
17841
17842 if (root_plt->offset == (bfd_vma) -1)
17843 return true;
17844
17845 htab = elf32_arm_hash_table (osi->info);
17846 if (htab == NULL)
17847 return false;
17848
17849 if (is_iplt_entry_p)
17850 {
17851 osi->sec = htab->root.iplt;
17852 plt_header_size = 0;
17853 }
17854 else
17855 {
17856 osi->sec = htab->root.splt;
17857 plt_header_size = htab->plt_header_size;
17858 }
17859 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
17860 (osi->info->output_bfd, osi->sec->output_section));
17861
17862 addr = root_plt->offset & -2;
17863 if (htab->root.target_os == is_vxworks)
17864 {
17865 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17866 return false;
17867 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
17868 return false;
17869 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
17870 return false;
17871 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
17872 return false;
17873 }
17874 else if (htab->root.target_os == is_nacl)
17875 {
17876 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17877 return false;
17878 }
17879 else if (htab->fdpic_p)
17880 {
17881 enum map_symbol_type type = using_thumb_only (htab)
17882 ? ARM_MAP_THUMB
17883 : ARM_MAP_ARM;
17884
17885 if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt))
17886 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17887 return false;
17888 if (!elf32_arm_output_map_sym (osi, type, addr))
17889 return false;
17890 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16))
17891 return false;
17892 if (htab->plt_entry_size == 4 * ARRAY_SIZE (elf32_arm_fdpic_plt_entry))
17893 if (!elf32_arm_output_map_sym (osi, type, addr + 24))
17894 return false;
17895 }
17896 else if (using_thumb_only (htab))
17897 {
17898 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
17899 return false;
17900 }
17901 else
17902 {
17903 bool thumb_stub_p;
17904
17905 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17906 if (thumb_stub_p)
17907 {
17908 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17909 return false;
17910 }
17911 #ifdef FOUR_WORD_PLT
17912 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17913 return false;
17914 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17915 return false;
17916 #else
17917 /* A three-word PLT with no Thumb thunk contains only Arm code,
17918 so only need to output a mapping symbol for the first PLT entry and
17919 entries with thumb thunks. */
17920 if (thumb_stub_p || addr == plt_header_size)
17921 {
17922 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17923 return false;
17924 }
17925 #endif
17926 }
17927
17928 return true;
17929 }
17930
17931 /* Output mapping symbols for PLT entries associated with H. */
17932
17933 static bool
17934 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17935 {
17936 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17937 struct elf32_arm_link_hash_entry *eh;
17938
17939 if (h->root.type == bfd_link_hash_indirect)
17940 return true;
17941
17942 if (h->root.type == bfd_link_hash_warning)
17943 /* When warning symbols are created, they **replace** the "real"
17944 entry in the hash table, thus we never get to see the real
17945 symbol in a hash traversal. So look at it now. */
17946 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17947
17948 eh = (struct elf32_arm_link_hash_entry *) h;
17949 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17950 &h->plt, &eh->plt);
17951 }
17952
17953 /* Bind a veneered symbol to its veneer identified by its hash entry
17954 STUB_ENTRY. The veneered location thus loose its symbol. */
17955
17956 static void
17957 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17958 {
17959 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17960
17961 BFD_ASSERT (hash);
17962 hash->root.root.u.def.section = stub_entry->stub_sec;
17963 hash->root.root.u.def.value = stub_entry->stub_offset;
17964 hash->root.size = stub_entry->stub_size;
17965 }
17966
17967 /* Output a single local symbol for a generated stub. */
17968
17969 static bool
17970 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17971 bfd_vma offset, bfd_vma size)
17972 {
17973 Elf_Internal_Sym sym;
17974
17975 sym.st_value = osi->sec->output_section->vma
17976 + osi->sec->output_offset
17977 + offset;
17978 sym.st_size = size;
17979 sym.st_other = 0;
17980 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17981 sym.st_shndx = osi->sec_shndx;
17982 sym.st_target_internal = 0;
17983 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
17984 }
17985
17986 static bool
17987 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
17988 void * in_arg)
17989 {
17990 struct elf32_arm_stub_hash_entry *stub_entry;
17991 asection *stub_sec;
17992 bfd_vma addr;
17993 char *stub_name;
17994 output_arch_syminfo *osi;
17995 const insn_sequence *template_sequence;
17996 enum stub_insn_type prev_type;
17997 int size;
17998 int i;
17999 enum map_symbol_type sym_type;
18000
18001 /* Massage our args to the form they really have. */
18002 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18003 osi = (output_arch_syminfo *) in_arg;
18004
18005 stub_sec = stub_entry->stub_sec;
18006
18007 /* Ensure this stub is attached to the current section being
18008 processed. */
18009 if (stub_sec != osi->sec)
18010 return true;
18011
18012 addr = (bfd_vma) stub_entry->stub_offset;
18013 template_sequence = stub_entry->stub_template;
18014
18015 if (arm_stub_sym_claimed (stub_entry->stub_type))
18016 arm_stub_claim_sym (stub_entry);
18017 else
18018 {
18019 stub_name = stub_entry->output_name;
18020 switch (template_sequence[0].type)
18021 {
18022 case ARM_TYPE:
18023 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
18024 stub_entry->stub_size))
18025 return false;
18026 break;
18027 case THUMB16_TYPE:
18028 case THUMB32_TYPE:
18029 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
18030 stub_entry->stub_size))
18031 return false;
18032 break;
18033 default:
18034 BFD_FAIL ();
18035 return 0;
18036 }
18037 }
18038
18039 prev_type = DATA_TYPE;
18040 size = 0;
18041 for (i = 0; i < stub_entry->stub_template_size; i++)
18042 {
18043 switch (template_sequence[i].type)
18044 {
18045 case ARM_TYPE:
18046 sym_type = ARM_MAP_ARM;
18047 break;
18048
18049 case THUMB16_TYPE:
18050 case THUMB32_TYPE:
18051 sym_type = ARM_MAP_THUMB;
18052 break;
18053
18054 case DATA_TYPE:
18055 sym_type = ARM_MAP_DATA;
18056 break;
18057
18058 default:
18059 BFD_FAIL ();
18060 return false;
18061 }
18062
18063 if (template_sequence[i].type != prev_type)
18064 {
18065 prev_type = template_sequence[i].type;
18066 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
18067 return false;
18068 }
18069
18070 switch (template_sequence[i].type)
18071 {
18072 case ARM_TYPE:
18073 case THUMB32_TYPE:
18074 size += 4;
18075 break;
18076
18077 case THUMB16_TYPE:
18078 size += 2;
18079 break;
18080
18081 case DATA_TYPE:
18082 size += 4;
18083 break;
18084
18085 default:
18086 BFD_FAIL ();
18087 return false;
18088 }
18089 }
18090
18091 return true;
18092 }
18093
18094 /* Output mapping symbols for linker generated sections,
18095 and for those data-only sections that do not have a
18096 $d. */
18097
18098 static bool
18099 elf32_arm_output_arch_local_syms (bfd *output_bfd,
18100 struct bfd_link_info *info,
18101 void *flaginfo,
18102 int (*func) (void *, const char *,
18103 Elf_Internal_Sym *,
18104 asection *,
18105 struct elf_link_hash_entry *))
18106 {
18107 output_arch_syminfo osi;
18108 struct elf32_arm_link_hash_table *htab;
18109 bfd_vma offset;
18110 bfd_size_type size;
18111 bfd *input_bfd;
18112
18113 htab = elf32_arm_hash_table (info);
18114 if (htab == NULL)
18115 return false;
18116
18117 check_use_blx (htab);
18118
18119 osi.flaginfo = flaginfo;
18120 osi.info = info;
18121 osi.func = func;
18122
18123 /* Add a $d mapping symbol to data-only sections that
18124 don't have any mapping symbol. This may result in (harmless) redundant
18125 mapping symbols. */
18126 for (input_bfd = info->input_bfds;
18127 input_bfd != NULL;
18128 input_bfd = input_bfd->link.next)
18129 {
18130 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
18131 for (osi.sec = input_bfd->sections;
18132 osi.sec != NULL;
18133 osi.sec = osi.sec->next)
18134 {
18135 if (osi.sec->output_section != NULL
18136 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
18137 != 0)
18138 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
18139 == SEC_HAS_CONTENTS
18140 && get_arm_elf_section_data (osi.sec) != NULL
18141 && get_arm_elf_section_data (osi.sec)->mapcount == 0
18142 && osi.sec->size > 0
18143 && (osi.sec->flags & SEC_EXCLUDE) == 0)
18144 {
18145 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18146 (output_bfd, osi.sec->output_section);
18147 if (osi.sec_shndx != (int)SHN_BAD)
18148 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
18149 }
18150 }
18151 }
18152
18153 /* ARM->Thumb glue. */
18154 if (htab->arm_glue_size > 0)
18155 {
18156 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18157 ARM2THUMB_GLUE_SECTION_NAME);
18158
18159 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18160 (output_bfd, osi.sec->output_section);
18161 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
18162 || htab->pic_veneer)
18163 size = ARM2THUMB_PIC_GLUE_SIZE;
18164 else if (htab->use_blx)
18165 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
18166 else
18167 size = ARM2THUMB_STATIC_GLUE_SIZE;
18168
18169 for (offset = 0; offset < htab->arm_glue_size; offset += size)
18170 {
18171 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
18172 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
18173 }
18174 }
18175
18176 /* Thumb->ARM glue. */
18177 if (htab->thumb_glue_size > 0)
18178 {
18179 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18180 THUMB2ARM_GLUE_SECTION_NAME);
18181
18182 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18183 (output_bfd, osi.sec->output_section);
18184 size = THUMB2ARM_GLUE_SIZE;
18185
18186 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
18187 {
18188 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
18189 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
18190 }
18191 }
18192
18193 /* ARMv4 BX veneers. */
18194 if (htab->bx_glue_size > 0)
18195 {
18196 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18197 ARM_BX_GLUE_SECTION_NAME);
18198
18199 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18200 (output_bfd, osi.sec->output_section);
18201
18202 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
18203 }
18204
18205 /* Long calls stubs. */
18206 if (htab->stub_bfd && htab->stub_bfd->sections)
18207 {
18208 asection* stub_sec;
18209
18210 for (stub_sec = htab->stub_bfd->sections;
18211 stub_sec != NULL;
18212 stub_sec = stub_sec->next)
18213 {
18214 /* Ignore non-stub sections. */
18215 if (!strstr (stub_sec->name, STUB_SUFFIX))
18216 continue;
18217
18218 osi.sec = stub_sec;
18219
18220 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18221 (output_bfd, osi.sec->output_section);
18222
18223 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
18224 }
18225 }
18226
18227 /* Finally, output mapping symbols for the PLT. */
18228 if (htab->root.splt && htab->root.splt->size > 0)
18229 {
18230 osi.sec = htab->root.splt;
18231 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18232 (output_bfd, osi.sec->output_section));
18233
18234 /* Output mapping symbols for the plt header. */
18235 if (htab->root.target_os == is_vxworks)
18236 {
18237 /* VxWorks shared libraries have no PLT header. */
18238 if (!bfd_link_pic (info))
18239 {
18240 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18241 return false;
18242 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18243 return false;
18244 }
18245 }
18246 else if (htab->root.target_os == is_nacl)
18247 {
18248 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18249 return false;
18250 }
18251 else if (using_thumb_only (htab) && !htab->fdpic_p)
18252 {
18253 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
18254 return false;
18255 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18256 return false;
18257 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
18258 return false;
18259 }
18260 else if (!htab->fdpic_p)
18261 {
18262 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18263 return false;
18264 #ifndef FOUR_WORD_PLT
18265 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
18266 return false;
18267 #endif
18268 }
18269 }
18270 if (htab->root.target_os == is_nacl
18271 && htab->root.iplt
18272 && htab->root.iplt->size > 0)
18273 {
18274 /* NaCl uses a special first entry in .iplt too. */
18275 osi.sec = htab->root.iplt;
18276 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18277 (output_bfd, osi.sec->output_section));
18278 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18279 return false;
18280 }
18281 if ((htab->root.splt && htab->root.splt->size > 0)
18282 || (htab->root.iplt && htab->root.iplt->size > 0))
18283 {
18284 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
18285 for (input_bfd = info->input_bfds;
18286 input_bfd != NULL;
18287 input_bfd = input_bfd->link.next)
18288 {
18289 struct arm_local_iplt_info **local_iplt;
18290 unsigned int i, num_syms;
18291
18292 local_iplt = elf32_arm_local_iplt (input_bfd);
18293 if (local_iplt != NULL)
18294 {
18295 num_syms = elf_symtab_hdr (input_bfd).sh_info;
18296 if (num_syms > elf32_arm_num_entries (input_bfd))
18297 {
18298 _bfd_error_handler (_("\
18299 %pB: Number of symbols in input file has increased from %lu to %u\n"),
18300 input_bfd,
18301 (unsigned long) elf32_arm_num_entries (input_bfd),
18302 num_syms);
18303 return false;
18304 }
18305 for (i = 0; i < num_syms; i++)
18306 if (local_iplt[i] != NULL
18307 && !elf32_arm_output_plt_map_1 (&osi, true,
18308 &local_iplt[i]->root,
18309 &local_iplt[i]->arm))
18310 return false;
18311 }
18312 }
18313 }
18314 if (htab->root.tlsdesc_plt != 0)
18315 {
18316 /* Mapping symbols for the lazy tls trampoline. */
18317 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM,
18318 htab->root.tlsdesc_plt))
18319 return false;
18320
18321 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18322 htab->root.tlsdesc_plt + 24))
18323 return false;
18324 }
18325 if (htab->tls_trampoline != 0)
18326 {
18327 /* Mapping symbols for the tls trampoline. */
18328 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
18329 return false;
18330 #ifdef FOUR_WORD_PLT
18331 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18332 htab->tls_trampoline + 12))
18333 return false;
18334 #endif
18335 }
18336
18337 return true;
18338 }
18339
18340 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18341 the import library. All SYMCOUNT symbols of ABFD can be examined
18342 from their pointers in SYMS. Pointers of symbols to keep should be
18343 stored continuously at the beginning of that array.
18344
18345 Returns the number of symbols to keep. */
18346
18347 static unsigned int
18348 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18349 struct bfd_link_info *info,
18350 asymbol **syms, long symcount)
18351 {
18352 size_t maxnamelen;
18353 char *cmse_name;
18354 long src_count, dst_count = 0;
18355 struct elf32_arm_link_hash_table *htab;
18356
18357 htab = elf32_arm_hash_table (info);
18358 if (!htab->stub_bfd || !htab->stub_bfd->sections)
18359 symcount = 0;
18360
18361 maxnamelen = 128;
18362 cmse_name = (char *) bfd_malloc (maxnamelen);
18363 BFD_ASSERT (cmse_name);
18364
18365 for (src_count = 0; src_count < symcount; src_count++)
18366 {
18367 struct elf32_arm_link_hash_entry *cmse_hash;
18368 asymbol *sym;
18369 flagword flags;
18370 char *name;
18371 size_t namelen;
18372
18373 sym = syms[src_count];
18374 flags = sym->flags;
18375 name = (char *) bfd_asymbol_name (sym);
18376
18377 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
18378 continue;
18379 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
18380 continue;
18381
18382 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
18383 if (namelen > maxnamelen)
18384 {
18385 cmse_name = (char *)
18386 bfd_realloc (cmse_name, namelen);
18387 maxnamelen = namelen;
18388 }
18389 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
18390 cmse_hash = (struct elf32_arm_link_hash_entry *)
18391 elf_link_hash_lookup (&(htab)->root, cmse_name, false, false, true);
18392
18393 if (!cmse_hash
18394 || (cmse_hash->root.root.type != bfd_link_hash_defined
18395 && cmse_hash->root.root.type != bfd_link_hash_defweak)
18396 || cmse_hash->root.type != STT_FUNC)
18397 continue;
18398
18399 syms[dst_count++] = sym;
18400 }
18401 free (cmse_name);
18402
18403 syms[dst_count] = NULL;
18404
18405 return dst_count;
18406 }
18407
18408 /* Filter symbols of ABFD to include in the import library. All
18409 SYMCOUNT symbols of ABFD can be examined from their pointers in
18410 SYMS. Pointers of symbols to keep should be stored continuously at
18411 the beginning of that array.
18412
18413 Returns the number of symbols to keep. */
18414
18415 static unsigned int
18416 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18417 struct bfd_link_info *info,
18418 asymbol **syms, long symcount)
18419 {
18420 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
18421
18422 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18423 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18424 library to be a relocatable object file. */
18425 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
18426 if (globals->cmse_implib)
18427 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
18428 else
18429 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
18430 }
18431
18432 /* Allocate target specific section data. */
18433
18434 static bool
18435 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
18436 {
18437 if (!sec->used_by_bfd)
18438 {
18439 _arm_elf_section_data *sdata;
18440 size_t amt = sizeof (*sdata);
18441
18442 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
18443 if (sdata == NULL)
18444 return false;
18445 sec->used_by_bfd = sdata;
18446 }
18447
18448 return _bfd_elf_new_section_hook (abfd, sec);
18449 }
18450
18451
18452 /* Used to order a list of mapping symbols by address. */
18453
18454 static int
18455 elf32_arm_compare_mapping (const void * a, const void * b)
18456 {
18457 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
18458 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
18459
18460 if (amap->vma > bmap->vma)
18461 return 1;
18462 else if (amap->vma < bmap->vma)
18463 return -1;
18464 else if (amap->type > bmap->type)
18465 /* Ensure results do not depend on the host qsort for objects with
18466 multiple mapping symbols at the same address by sorting on type
18467 after vma. */
18468 return 1;
18469 else if (amap->type < bmap->type)
18470 return -1;
18471 else
18472 return 0;
18473 }
18474
18475 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18476
18477 static unsigned long
18478 offset_prel31 (unsigned long addr, bfd_vma offset)
18479 {
18480 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
18481 }
18482
18483 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18484 relocations. */
18485
18486 static void
18487 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
18488 {
18489 unsigned long first_word = bfd_get_32 (output_bfd, from);
18490 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
18491
18492 /* High bit of first word is supposed to be zero. */
18493 if ((first_word & 0x80000000ul) == 0)
18494 first_word = offset_prel31 (first_word, offset);
18495
18496 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18497 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18498 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
18499 second_word = offset_prel31 (second_word, offset);
18500
18501 bfd_put_32 (output_bfd, first_word, to);
18502 bfd_put_32 (output_bfd, second_word, to + 4);
18503 }
18504
18505 /* Data for make_branch_to_a8_stub(). */
18506
18507 struct a8_branch_to_stub_data
18508 {
18509 asection *writing_section;
18510 bfd_byte *contents;
18511 };
18512
18513
18514 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18515 places for a particular section. */
18516
18517 static bool
18518 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
18519 void *in_arg)
18520 {
18521 struct elf32_arm_stub_hash_entry *stub_entry;
18522 struct a8_branch_to_stub_data *data;
18523 bfd_byte *contents;
18524 unsigned long branch_insn;
18525 bfd_vma veneered_insn_loc, veneer_entry_loc;
18526 bfd_signed_vma branch_offset;
18527 bfd *abfd;
18528 unsigned int loc;
18529
18530 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18531 data = (struct a8_branch_to_stub_data *) in_arg;
18532
18533 if (stub_entry->target_section != data->writing_section
18534 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
18535 return true;
18536
18537 contents = data->contents;
18538
18539 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18540 generated when both source and target are in the same section. */
18541 veneered_insn_loc = stub_entry->target_section->output_section->vma
18542 + stub_entry->target_section->output_offset
18543 + stub_entry->source_value;
18544
18545 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
18546 + stub_entry->stub_sec->output_offset
18547 + stub_entry->stub_offset;
18548
18549 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
18550 veneered_insn_loc &= ~3u;
18551
18552 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
18553
18554 abfd = stub_entry->target_section->owner;
18555 loc = stub_entry->source_value;
18556
18557 /* We attempt to avoid this condition by setting stubs_always_after_branch
18558 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18559 This check is just to be on the safe side... */
18560 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
18561 {
18562 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18563 "allocated in unsafe location"), abfd);
18564 return false;
18565 }
18566
18567 switch (stub_entry->stub_type)
18568 {
18569 case arm_stub_a8_veneer_b:
18570 case arm_stub_a8_veneer_b_cond:
18571 branch_insn = 0xf0009000;
18572 goto jump24;
18573
18574 case arm_stub_a8_veneer_blx:
18575 branch_insn = 0xf000e800;
18576 goto jump24;
18577
18578 case arm_stub_a8_veneer_bl:
18579 {
18580 unsigned int i1, j1, i2, j2, s;
18581
18582 branch_insn = 0xf000d000;
18583
18584 jump24:
18585 if (branch_offset < -16777216 || branch_offset > 16777214)
18586 {
18587 /* There's not much we can do apart from complain if this
18588 happens. */
18589 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18590 "of range (input file too large)"), abfd);
18591 return false;
18592 }
18593
18594 /* i1 = not(j1 eor s), so:
18595 not i1 = j1 eor s
18596 j1 = (not i1) eor s. */
18597
18598 branch_insn |= (branch_offset >> 1) & 0x7ff;
18599 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
18600 i2 = (branch_offset >> 22) & 1;
18601 i1 = (branch_offset >> 23) & 1;
18602 s = (branch_offset >> 24) & 1;
18603 j1 = (!i1) ^ s;
18604 j2 = (!i2) ^ s;
18605 branch_insn |= j2 << 11;
18606 branch_insn |= j1 << 13;
18607 branch_insn |= s << 26;
18608 }
18609 break;
18610
18611 default:
18612 BFD_FAIL ();
18613 return false;
18614 }
18615
18616 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
18617 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
18618
18619 return true;
18620 }
18621
18622 /* Beginning of stm32l4xx work-around. */
18623
18624 /* Functions encoding instructions necessary for the emission of the
18625 fix-stm32l4xx-629360.
18626 Encoding is extracted from the
18627 ARM (C) Architecture Reference Manual
18628 ARMv7-A and ARMv7-R edition
18629 ARM DDI 0406C.b (ID072512). */
18630
18631 static inline bfd_vma
18632 create_instruction_branch_absolute (int branch_offset)
18633 {
18634 /* A8.8.18 B (A8-334)
18635 B target_address (Encoding T4). */
18636 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18637 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18638 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18639
18640 int s = ((branch_offset & 0x1000000) >> 24);
18641 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
18642 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
18643
18644 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
18645 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18646
18647 bfd_vma patched_inst = 0xf0009000
18648 | s << 26 /* S. */
18649 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
18650 | j1 << 13 /* J1. */
18651 | j2 << 11 /* J2. */
18652 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
18653
18654 return patched_inst;
18655 }
18656
18657 static inline bfd_vma
18658 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
18659 {
18660 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18661 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18662 bfd_vma patched_inst = 0xe8900000
18663 | (/*W=*/wback << 21)
18664 | (base_reg << 16)
18665 | (reg_mask & 0x0000ffff);
18666
18667 return patched_inst;
18668 }
18669
18670 static inline bfd_vma
18671 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
18672 {
18673 /* A8.8.60 LDMDB/LDMEA (A8-402)
18674 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18675 bfd_vma patched_inst = 0xe9100000
18676 | (/*W=*/wback << 21)
18677 | (base_reg << 16)
18678 | (reg_mask & 0x0000ffff);
18679
18680 return patched_inst;
18681 }
18682
18683 static inline bfd_vma
18684 create_instruction_mov (int target_reg, int source_reg)
18685 {
18686 /* A8.8.103 MOV (register) (A8-486)
18687 MOV Rd, Rm (Encoding T1). */
18688 bfd_vma patched_inst = 0x4600
18689 | (target_reg & 0x7)
18690 | ((target_reg & 0x8) >> 3) << 7
18691 | (source_reg << 3);
18692
18693 return patched_inst;
18694 }
18695
18696 static inline bfd_vma
18697 create_instruction_sub (int target_reg, int source_reg, int value)
18698 {
18699 /* A8.8.221 SUB (immediate) (A8-708)
18700 SUB Rd, Rn, #value (Encoding T3). */
18701 bfd_vma patched_inst = 0xf1a00000
18702 | (target_reg << 8)
18703 | (source_reg << 16)
18704 | (/*S=*/0 << 20)
18705 | ((value & 0x800) >> 11) << 26
18706 | ((value & 0x700) >> 8) << 12
18707 | (value & 0x0ff);
18708
18709 return patched_inst;
18710 }
18711
18712 static inline bfd_vma
18713 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
18714 int first_reg)
18715 {
18716 /* A8.8.332 VLDM (A8-922)
18717 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18718 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
18719 | (/*W=*/wback << 21)
18720 | (base_reg << 16)
18721 | (num_words & 0x000000ff)
18722 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
18723 | (first_reg & 0x00000001) << 22;
18724
18725 return patched_inst;
18726 }
18727
18728 static inline bfd_vma
18729 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
18730 int first_reg)
18731 {
18732 /* A8.8.332 VLDM (A8-922)
18733 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18734 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
18735 | (base_reg << 16)
18736 | (num_words & 0x000000ff)
18737 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
18738 | (first_reg & 0x00000001) << 22;
18739
18740 return patched_inst;
18741 }
18742
18743 static inline bfd_vma
18744 create_instruction_udf_w (int value)
18745 {
18746 /* A8.8.247 UDF (A8-758)
18747 Undefined (Encoding T2). */
18748 bfd_vma patched_inst = 0xf7f0a000
18749 | (value & 0x00000fff)
18750 | (value & 0x000f0000) << 16;
18751
18752 return patched_inst;
18753 }
18754
18755 static inline bfd_vma
18756 create_instruction_udf (int value)
18757 {
18758 /* A8.8.247 UDF (A8-758)
18759 Undefined (Encoding T1). */
18760 bfd_vma patched_inst = 0xde00
18761 | (value & 0xff);
18762
18763 return patched_inst;
18764 }
18765
18766 /* Functions writing an instruction in memory, returning the next
18767 memory position to write to. */
18768
18769 static inline bfd_byte *
18770 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
18771 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18772 {
18773 put_thumb2_insn (htab, output_bfd, insn, pt);
18774 return pt + 4;
18775 }
18776
18777 static inline bfd_byte *
18778 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
18779 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18780 {
18781 put_thumb_insn (htab, output_bfd, insn, pt);
18782 return pt + 2;
18783 }
18784
18785 /* Function filling up a region in memory with T1 and T2 UDFs taking
18786 care of alignment. */
18787
18788 static bfd_byte *
18789 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
18790 bfd * output_bfd,
18791 const bfd_byte * const base_stub_contents,
18792 bfd_byte * const from_stub_contents,
18793 const bfd_byte * const end_stub_contents)
18794 {
18795 bfd_byte *current_stub_contents = from_stub_contents;
18796
18797 /* Fill the remaining of the stub with deterministic contents : UDF
18798 instructions.
18799 Check if realignment is needed on modulo 4 frontier using T1, to
18800 further use T2. */
18801 if ((current_stub_contents < end_stub_contents)
18802 && !((current_stub_contents - base_stub_contents) % 2)
18803 && ((current_stub_contents - base_stub_contents) % 4))
18804 current_stub_contents =
18805 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18806 create_instruction_udf (0));
18807
18808 for (; current_stub_contents < end_stub_contents;)
18809 current_stub_contents =
18810 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18811 create_instruction_udf_w (0));
18812
18813 return current_stub_contents;
18814 }
18815
18816 /* Functions writing the stream of instructions equivalent to the
18817 derived sequence for ldmia, ldmdb, vldm respectively. */
18818
18819 static void
18820 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
18821 bfd * output_bfd,
18822 const insn32 initial_insn,
18823 const bfd_byte *const initial_insn_addr,
18824 bfd_byte *const base_stub_contents)
18825 {
18826 int wback = (initial_insn & 0x00200000) >> 21;
18827 int ri, rn = (initial_insn & 0x000F0000) >> 16;
18828 int insn_all_registers = initial_insn & 0x0000ffff;
18829 int insn_low_registers, insn_high_registers;
18830 int usable_register_mask;
18831 int nb_registers = elf32_arm_popcount (insn_all_registers);
18832 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18833 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18834 bfd_byte *current_stub_contents = base_stub_contents;
18835
18836 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
18837
18838 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18839 smaller than 8 registers load sequences that do not cause the
18840 hardware issue. */
18841 if (nb_registers <= 8)
18842 {
18843 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18844 current_stub_contents =
18845 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18846 initial_insn);
18847
18848 /* B initial_insn_addr+4. */
18849 if (!restore_pc)
18850 current_stub_contents =
18851 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18852 create_instruction_branch_absolute
18853 (initial_insn_addr - current_stub_contents));
18854
18855 /* Fill the remaining of the stub with deterministic contents. */
18856 current_stub_contents =
18857 stm32l4xx_fill_stub_udf (htab, output_bfd,
18858 base_stub_contents, current_stub_contents,
18859 base_stub_contents +
18860 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18861
18862 return;
18863 }
18864
18865 /* - reg_list[13] == 0. */
18866 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
18867
18868 /* - reg_list[14] & reg_list[15] != 1. */
18869 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18870
18871 /* - if (wback==1) reg_list[rn] == 0. */
18872 BFD_ASSERT (!wback || !restore_rn);
18873
18874 /* - nb_registers > 8. */
18875 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18876
18877 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18878
18879 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
18880 - One with the 7 lowest registers (register mask 0x007F)
18881 This LDM will finally contain between 2 and 7 registers
18882 - One with the 7 highest registers (register mask 0xDF80)
18883 This ldm will finally contain between 2 and 7 registers. */
18884 insn_low_registers = insn_all_registers & 0x007F;
18885 insn_high_registers = insn_all_registers & 0xDF80;
18886
18887 /* A spare register may be needed during this veneer to temporarily
18888 handle the base register. This register will be restored with the
18889 last LDM operation.
18890 The usable register may be any general purpose register (that
18891 excludes PC, SP, LR : register mask is 0x1FFF). */
18892 usable_register_mask = 0x1FFF;
18893
18894 /* Generate the stub function. */
18895 if (wback)
18896 {
18897 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
18898 current_stub_contents =
18899 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18900 create_instruction_ldmia
18901 (rn, /*wback=*/1, insn_low_registers));
18902
18903 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
18904 current_stub_contents =
18905 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18906 create_instruction_ldmia
18907 (rn, /*wback=*/1, insn_high_registers));
18908 if (!restore_pc)
18909 {
18910 /* B initial_insn_addr+4. */
18911 current_stub_contents =
18912 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18913 create_instruction_branch_absolute
18914 (initial_insn_addr - current_stub_contents));
18915 }
18916 }
18917 else /* if (!wback). */
18918 {
18919 ri = rn;
18920
18921 /* If Rn is not part of the high-register-list, move it there. */
18922 if (!(insn_high_registers & (1 << rn)))
18923 {
18924 /* Choose a Ri in the high-register-list that will be restored. */
18925 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18926
18927 /* MOV Ri, Rn. */
18928 current_stub_contents =
18929 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18930 create_instruction_mov (ri, rn));
18931 }
18932
18933 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18934 current_stub_contents =
18935 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18936 create_instruction_ldmia
18937 (ri, /*wback=*/1, insn_low_registers));
18938
18939 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18940 current_stub_contents =
18941 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18942 create_instruction_ldmia
18943 (ri, /*wback=*/0, insn_high_registers));
18944
18945 if (!restore_pc)
18946 {
18947 /* B initial_insn_addr+4. */
18948 current_stub_contents =
18949 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18950 create_instruction_branch_absolute
18951 (initial_insn_addr - current_stub_contents));
18952 }
18953 }
18954
18955 /* Fill the remaining of the stub with deterministic contents. */
18956 current_stub_contents =
18957 stm32l4xx_fill_stub_udf (htab, output_bfd,
18958 base_stub_contents, current_stub_contents,
18959 base_stub_contents +
18960 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18961 }
18962
18963 static void
18964 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
18965 bfd * output_bfd,
18966 const insn32 initial_insn,
18967 const bfd_byte *const initial_insn_addr,
18968 bfd_byte *const base_stub_contents)
18969 {
18970 int wback = (initial_insn & 0x00200000) >> 21;
18971 int ri, rn = (initial_insn & 0x000f0000) >> 16;
18972 int insn_all_registers = initial_insn & 0x0000ffff;
18973 int insn_low_registers, insn_high_registers;
18974 int usable_register_mask;
18975 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18976 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18977 int nb_registers = elf32_arm_popcount (insn_all_registers);
18978 bfd_byte *current_stub_contents = base_stub_contents;
18979
18980 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
18981
18982 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18983 smaller than 8 registers load sequences that do not cause the
18984 hardware issue. */
18985 if (nb_registers <= 8)
18986 {
18987 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18988 current_stub_contents =
18989 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18990 initial_insn);
18991
18992 /* B initial_insn_addr+4. */
18993 current_stub_contents =
18994 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18995 create_instruction_branch_absolute
18996 (initial_insn_addr - current_stub_contents));
18997
18998 /* Fill the remaining of the stub with deterministic contents. */
18999 current_stub_contents =
19000 stm32l4xx_fill_stub_udf (htab, output_bfd,
19001 base_stub_contents, current_stub_contents,
19002 base_stub_contents +
19003 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19004
19005 return;
19006 }
19007
19008 /* - reg_list[13] == 0. */
19009 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
19010
19011 /* - reg_list[14] & reg_list[15] != 1. */
19012 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
19013
19014 /* - if (wback==1) reg_list[rn] == 0. */
19015 BFD_ASSERT (!wback || !restore_rn);
19016
19017 /* - nb_registers > 8. */
19018 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
19019
19020 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
19021
19022 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
19023 - One with the 7 lowest registers (register mask 0x007F)
19024 This LDM will finally contain between 2 and 7 registers
19025 - One with the 7 highest registers (register mask 0xDF80)
19026 This ldm will finally contain between 2 and 7 registers. */
19027 insn_low_registers = insn_all_registers & 0x007F;
19028 insn_high_registers = insn_all_registers & 0xDF80;
19029
19030 /* A spare register may be needed during this veneer to temporarily
19031 handle the base register. This register will be restored with
19032 the last LDM operation.
19033 The usable register may be any general purpose register (that excludes
19034 PC, SP, LR : register mask is 0x1FFF). */
19035 usable_register_mask = 0x1FFF;
19036
19037 /* Generate the stub function. */
19038 if (!wback && !restore_pc && !restore_rn)
19039 {
19040 /* Choose a Ri in the low-register-list that will be restored. */
19041 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19042
19043 /* MOV Ri, Rn. */
19044 current_stub_contents =
19045 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19046 create_instruction_mov (ri, rn));
19047
19048 /* LDMDB Ri!, {R-high-register-list}. */
19049 current_stub_contents =
19050 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19051 create_instruction_ldmdb
19052 (ri, /*wback=*/1, insn_high_registers));
19053
19054 /* LDMDB Ri, {R-low-register-list}. */
19055 current_stub_contents =
19056 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19057 create_instruction_ldmdb
19058 (ri, /*wback=*/0, insn_low_registers));
19059
19060 /* B initial_insn_addr+4. */
19061 current_stub_contents =
19062 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19063 create_instruction_branch_absolute
19064 (initial_insn_addr - current_stub_contents));
19065 }
19066 else if (wback && !restore_pc && !restore_rn)
19067 {
19068 /* LDMDB Rn!, {R-high-register-list}. */
19069 current_stub_contents =
19070 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19071 create_instruction_ldmdb
19072 (rn, /*wback=*/1, insn_high_registers));
19073
19074 /* LDMDB Rn!, {R-low-register-list}. */
19075 current_stub_contents =
19076 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19077 create_instruction_ldmdb
19078 (rn, /*wback=*/1, insn_low_registers));
19079
19080 /* B initial_insn_addr+4. */
19081 current_stub_contents =
19082 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19083 create_instruction_branch_absolute
19084 (initial_insn_addr - current_stub_contents));
19085 }
19086 else if (!wback && restore_pc && !restore_rn)
19087 {
19088 /* Choose a Ri in the high-register-list that will be restored. */
19089 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19090
19091 /* SUB Ri, Rn, #(4*nb_registers). */
19092 current_stub_contents =
19093 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19094 create_instruction_sub (ri, rn, (4 * nb_registers)));
19095
19096 /* LDMIA Ri!, {R-low-register-list}. */
19097 current_stub_contents =
19098 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19099 create_instruction_ldmia
19100 (ri, /*wback=*/1, insn_low_registers));
19101
19102 /* LDMIA Ri, {R-high-register-list}. */
19103 current_stub_contents =
19104 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19105 create_instruction_ldmia
19106 (ri, /*wback=*/0, insn_high_registers));
19107 }
19108 else if (wback && restore_pc && !restore_rn)
19109 {
19110 /* Choose a Ri in the high-register-list that will be restored. */
19111 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19112
19113 /* SUB Rn, Rn, #(4*nb_registers) */
19114 current_stub_contents =
19115 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19116 create_instruction_sub (rn, rn, (4 * nb_registers)));
19117
19118 /* MOV Ri, Rn. */
19119 current_stub_contents =
19120 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19121 create_instruction_mov (ri, rn));
19122
19123 /* LDMIA Ri!, {R-low-register-list}. */
19124 current_stub_contents =
19125 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19126 create_instruction_ldmia
19127 (ri, /*wback=*/1, insn_low_registers));
19128
19129 /* LDMIA Ri, {R-high-register-list}. */
19130 current_stub_contents =
19131 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19132 create_instruction_ldmia
19133 (ri, /*wback=*/0, insn_high_registers));
19134 }
19135 else if (!wback && !restore_pc && restore_rn)
19136 {
19137 ri = rn;
19138 if (!(insn_low_registers & (1 << rn)))
19139 {
19140 /* Choose a Ri in the low-register-list that will be restored. */
19141 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19142
19143 /* MOV Ri, Rn. */
19144 current_stub_contents =
19145 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19146 create_instruction_mov (ri, rn));
19147 }
19148
19149 /* LDMDB Ri!, {R-high-register-list}. */
19150 current_stub_contents =
19151 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19152 create_instruction_ldmdb
19153 (ri, /*wback=*/1, insn_high_registers));
19154
19155 /* LDMDB Ri, {R-low-register-list}. */
19156 current_stub_contents =
19157 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19158 create_instruction_ldmdb
19159 (ri, /*wback=*/0, insn_low_registers));
19160
19161 /* B initial_insn_addr+4. */
19162 current_stub_contents =
19163 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19164 create_instruction_branch_absolute
19165 (initial_insn_addr - current_stub_contents));
19166 }
19167 else if (!wback && restore_pc && restore_rn)
19168 {
19169 ri = rn;
19170 if (!(insn_high_registers & (1 << rn)))
19171 {
19172 /* Choose a Ri in the high-register-list that will be restored. */
19173 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19174 }
19175
19176 /* SUB Ri, Rn, #(4*nb_registers). */
19177 current_stub_contents =
19178 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19179 create_instruction_sub (ri, rn, (4 * nb_registers)));
19180
19181 /* LDMIA Ri!, {R-low-register-list}. */
19182 current_stub_contents =
19183 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19184 create_instruction_ldmia
19185 (ri, /*wback=*/1, insn_low_registers));
19186
19187 /* LDMIA Ri, {R-high-register-list}. */
19188 current_stub_contents =
19189 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19190 create_instruction_ldmia
19191 (ri, /*wback=*/0, insn_high_registers));
19192 }
19193 else if (wback && restore_rn)
19194 {
19195 /* The assembler should not have accepted to encode this. */
19196 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19197 "undefined behavior.\n");
19198 }
19199
19200 /* Fill the remaining of the stub with deterministic contents. */
19201 current_stub_contents =
19202 stm32l4xx_fill_stub_udf (htab, output_bfd,
19203 base_stub_contents, current_stub_contents,
19204 base_stub_contents +
19205 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19206
19207 }
19208
19209 static void
19210 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
19211 bfd * output_bfd,
19212 const insn32 initial_insn,
19213 const bfd_byte *const initial_insn_addr,
19214 bfd_byte *const base_stub_contents)
19215 {
19216 int num_words = initial_insn & 0xff;
19217 bfd_byte *current_stub_contents = base_stub_contents;
19218
19219 BFD_ASSERT (is_thumb2_vldm (initial_insn));
19220
19221 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19222 smaller than 8 words load sequences that do not cause the
19223 hardware issue. */
19224 if (num_words <= 8)
19225 {
19226 /* Untouched instruction. */
19227 current_stub_contents =
19228 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19229 initial_insn);
19230
19231 /* B initial_insn_addr+4. */
19232 current_stub_contents =
19233 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19234 create_instruction_branch_absolute
19235 (initial_insn_addr - current_stub_contents));
19236 }
19237 else
19238 {
19239 bool is_dp = /* DP encoding. */
19240 (initial_insn & 0xfe100f00) == 0xec100b00;
19241 bool is_ia_nobang = /* (IA without !). */
19242 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
19243 bool is_ia_bang = /* (IA with !) - includes VPOP. */
19244 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
19245 bool is_db_bang = /* (DB with !). */
19246 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
19247 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
19248 /* d = UInt (Vd:D);. */
19249 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
19250 | (((unsigned int)initial_insn << 9) >> 31);
19251
19252 /* Compute the number of 8-words chunks needed to split. */
19253 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
19254 int chunk;
19255
19256 /* The test coverage has been done assuming the following
19257 hypothesis that exactly one of the previous is_ predicates is
19258 true. */
19259 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
19260 && !(is_ia_nobang & is_ia_bang & is_db_bang));
19261
19262 /* We treat the cutting of the words in one pass for all
19263 cases, then we emit the adjustments:
19264
19265 vldm rx, {...}
19266 -> vldm rx!, {8_words_or_less} for each needed 8_word
19267 -> sub rx, rx, #size (list)
19268
19269 vldm rx!, {...}
19270 -> vldm rx!, {8_words_or_less} for each needed 8_word
19271 This also handles vpop instruction (when rx is sp)
19272
19273 vldmd rx!, {...}
19274 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19275 for (chunk = 0; chunk < chunks; ++chunk)
19276 {
19277 bfd_vma new_insn = 0;
19278
19279 if (is_ia_nobang || is_ia_bang)
19280 {
19281 new_insn = create_instruction_vldmia
19282 (base_reg,
19283 is_dp,
19284 /*wback= . */1,
19285 chunks - (chunk + 1) ?
19286 8 : num_words - chunk * 8,
19287 first_reg + chunk * 8);
19288 }
19289 else if (is_db_bang)
19290 {
19291 new_insn = create_instruction_vldmdb
19292 (base_reg,
19293 is_dp,
19294 chunks - (chunk + 1) ?
19295 8 : num_words - chunk * 8,
19296 first_reg + chunk * 8);
19297 }
19298
19299 if (new_insn)
19300 current_stub_contents =
19301 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19302 new_insn);
19303 }
19304
19305 /* Only this case requires the base register compensation
19306 subtract. */
19307 if (is_ia_nobang)
19308 {
19309 current_stub_contents =
19310 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19311 create_instruction_sub
19312 (base_reg, base_reg, 4*num_words));
19313 }
19314
19315 /* B initial_insn_addr+4. */
19316 current_stub_contents =
19317 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19318 create_instruction_branch_absolute
19319 (initial_insn_addr - current_stub_contents));
19320 }
19321
19322 /* Fill the remaining of the stub with deterministic contents. */
19323 current_stub_contents =
19324 stm32l4xx_fill_stub_udf (htab, output_bfd,
19325 base_stub_contents, current_stub_contents,
19326 base_stub_contents +
19327 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
19328 }
19329
19330 static void
19331 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
19332 bfd * output_bfd,
19333 const insn32 wrong_insn,
19334 const bfd_byte *const wrong_insn_addr,
19335 bfd_byte *const stub_contents)
19336 {
19337 if (is_thumb2_ldmia (wrong_insn))
19338 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
19339 wrong_insn, wrong_insn_addr,
19340 stub_contents);
19341 else if (is_thumb2_ldmdb (wrong_insn))
19342 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
19343 wrong_insn, wrong_insn_addr,
19344 stub_contents);
19345 else if (is_thumb2_vldm (wrong_insn))
19346 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
19347 wrong_insn, wrong_insn_addr,
19348 stub_contents);
19349 }
19350
19351 /* End of stm32l4xx work-around. */
19352
19353
19354 /* Do code byteswapping. Return FALSE afterwards so that the section is
19355 written out as normal. */
19356
19357 static bool
19358 elf32_arm_write_section (bfd *output_bfd,
19359 struct bfd_link_info *link_info,
19360 asection *sec,
19361 bfd_byte *contents)
19362 {
19363 unsigned int mapcount, errcount;
19364 _arm_elf_section_data *arm_data;
19365 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
19366 elf32_arm_section_map *map;
19367 elf32_vfp11_erratum_list *errnode;
19368 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
19369 bfd_vma ptr;
19370 bfd_vma end;
19371 bfd_vma offset = sec->output_section->vma + sec->output_offset;
19372 bfd_byte tmp;
19373 unsigned int i;
19374
19375 if (globals == NULL)
19376 return false;
19377
19378 /* If this section has not been allocated an _arm_elf_section_data
19379 structure then we cannot record anything. */
19380 arm_data = get_arm_elf_section_data (sec);
19381 if (arm_data == NULL)
19382 return false;
19383
19384 mapcount = arm_data->mapcount;
19385 map = arm_data->map;
19386 errcount = arm_data->erratumcount;
19387
19388 if (errcount != 0)
19389 {
19390 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
19391
19392 for (errnode = arm_data->erratumlist; errnode != 0;
19393 errnode = errnode->next)
19394 {
19395 bfd_vma target = errnode->vma - offset;
19396
19397 switch (errnode->type)
19398 {
19399 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
19400 {
19401 bfd_vma branch_to_veneer;
19402 /* Original condition code of instruction, plus bit mask for
19403 ARM B instruction. */
19404 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
19405 | 0x0a000000;
19406
19407 /* The instruction is before the label. */
19408 target -= 4;
19409
19410 /* Above offset included in -4 below. */
19411 branch_to_veneer = errnode->u.b.veneer->vma
19412 - errnode->vma - 4;
19413
19414 if ((signed) branch_to_veneer < -(1 << 25)
19415 || (signed) branch_to_veneer >= (1 << 25))
19416 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19417 "range"), output_bfd);
19418
19419 insn |= (branch_to_veneer >> 2) & 0xffffff;
19420 contents[endianflip ^ target] = insn & 0xff;
19421 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19422 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19423 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19424 }
19425 break;
19426
19427 case VFP11_ERRATUM_ARM_VENEER:
19428 {
19429 bfd_vma branch_from_veneer;
19430 unsigned int insn;
19431
19432 /* Take size of veneer into account. */
19433 branch_from_veneer = errnode->u.v.branch->vma
19434 - errnode->vma - 12;
19435
19436 if ((signed) branch_from_veneer < -(1 << 25)
19437 || (signed) branch_from_veneer >= (1 << 25))
19438 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19439 "range"), output_bfd);
19440
19441 /* Original instruction. */
19442 insn = errnode->u.v.branch->u.b.vfp_insn;
19443 contents[endianflip ^ target] = insn & 0xff;
19444 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19445 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19446 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19447
19448 /* Branch back to insn after original insn. */
19449 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
19450 contents[endianflip ^ (target + 4)] = insn & 0xff;
19451 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
19452 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
19453 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
19454 }
19455 break;
19456
19457 default:
19458 abort ();
19459 }
19460 }
19461 }
19462
19463 if (arm_data->stm32l4xx_erratumcount != 0)
19464 {
19465 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
19466 stm32l4xx_errnode != 0;
19467 stm32l4xx_errnode = stm32l4xx_errnode->next)
19468 {
19469 bfd_vma target = stm32l4xx_errnode->vma - offset;
19470
19471 switch (stm32l4xx_errnode->type)
19472 {
19473 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
19474 {
19475 unsigned int insn;
19476 bfd_vma branch_to_veneer =
19477 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
19478
19479 if ((signed) branch_to_veneer < -(1 << 24)
19480 || (signed) branch_to_veneer >= (1 << 24))
19481 {
19482 bfd_vma out_of_range =
19483 ((signed) branch_to_veneer < -(1 << 24)) ?
19484 - branch_to_veneer - (1 << 24) :
19485 ((signed) branch_to_veneer >= (1 << 24)) ?
19486 branch_to_veneer - (1 << 24) : 0;
19487
19488 _bfd_error_handler
19489 (_("%pB(%#" PRIx64 "): error: "
19490 "cannot create STM32L4XX veneer; "
19491 "jump out of range by %" PRId64 " bytes; "
19492 "cannot encode branch instruction"),
19493 output_bfd,
19494 (uint64_t) (stm32l4xx_errnode->vma - 4),
19495 (int64_t) out_of_range);
19496 continue;
19497 }
19498
19499 insn = create_instruction_branch_absolute
19500 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
19501
19502 /* The instruction is before the label. */
19503 target -= 4;
19504
19505 put_thumb2_insn (globals, output_bfd,
19506 (bfd_vma) insn, contents + target);
19507 }
19508 break;
19509
19510 case STM32L4XX_ERRATUM_VENEER:
19511 {
19512 bfd_byte * veneer;
19513 bfd_byte * veneer_r;
19514 unsigned int insn;
19515
19516 veneer = contents + target;
19517 veneer_r = veneer
19518 + stm32l4xx_errnode->u.b.veneer->vma
19519 - stm32l4xx_errnode->vma - 4;
19520
19521 if ((signed) (veneer_r - veneer -
19522 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
19523 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
19524 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
19525 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
19526 || (signed) (veneer_r - veneer) >= (1 << 24))
19527 {
19528 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19529 "veneer"), output_bfd);
19530 continue;
19531 }
19532
19533 /* Original instruction. */
19534 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
19535
19536 stm32l4xx_create_replacing_stub
19537 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
19538 }
19539 break;
19540
19541 default:
19542 abort ();
19543 }
19544 }
19545 }
19546
19547 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
19548 {
19549 arm_unwind_table_edit *edit_node
19550 = arm_data->u.exidx.unwind_edit_list;
19551 /* Now, sec->size is the size of the section we will write. The original
19552 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19553 markers) was sec->rawsize. (This isn't the case if we perform no
19554 edits, then rawsize will be zero and we should use size). */
19555 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
19556 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
19557 unsigned int in_index, out_index;
19558 bfd_vma add_to_offsets = 0;
19559
19560 if (edited_contents == NULL)
19561 return false;
19562 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
19563 {
19564 if (edit_node)
19565 {
19566 unsigned int edit_index = edit_node->index;
19567
19568 if (in_index < edit_index && in_index * 8 < input_size)
19569 {
19570 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19571 contents + in_index * 8, add_to_offsets);
19572 out_index++;
19573 in_index++;
19574 }
19575 else if (in_index == edit_index
19576 || (in_index * 8 >= input_size
19577 && edit_index == UINT_MAX))
19578 {
19579 switch (edit_node->type)
19580 {
19581 case DELETE_EXIDX_ENTRY:
19582 in_index++;
19583 add_to_offsets += 8;
19584 break;
19585
19586 case INSERT_EXIDX_CANTUNWIND_AT_END:
19587 {
19588 asection *text_sec = edit_node->linked_section;
19589 bfd_vma text_offset = text_sec->output_section->vma
19590 + text_sec->output_offset
19591 + text_sec->size;
19592 bfd_vma exidx_offset = offset + out_index * 8;
19593 unsigned long prel31_offset;
19594
19595 /* Note: this is meant to be equivalent to an
19596 R_ARM_PREL31 relocation. These synthetic
19597 EXIDX_CANTUNWIND markers are not relocated by the
19598 usual BFD method. */
19599 prel31_offset = (text_offset - exidx_offset)
19600 & 0x7ffffffful;
19601 if (bfd_link_relocatable (link_info))
19602 {
19603 /* Here relocation for new EXIDX_CANTUNWIND is
19604 created, so there is no need to
19605 adjust offset by hand. */
19606 prel31_offset = text_sec->output_offset
19607 + text_sec->size;
19608 }
19609
19610 /* First address we can't unwind. */
19611 bfd_put_32 (output_bfd, prel31_offset,
19612 &edited_contents[out_index * 8]);
19613
19614 /* Code for EXIDX_CANTUNWIND. */
19615 bfd_put_32 (output_bfd, 0x1,
19616 &edited_contents[out_index * 8 + 4]);
19617
19618 out_index++;
19619 add_to_offsets -= 8;
19620 }
19621 break;
19622 }
19623
19624 edit_node = edit_node->next;
19625 }
19626 }
19627 else
19628 {
19629 /* No more edits, copy remaining entries verbatim. */
19630 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19631 contents + in_index * 8, add_to_offsets);
19632 out_index++;
19633 in_index++;
19634 }
19635 }
19636
19637 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
19638 bfd_set_section_contents (output_bfd, sec->output_section,
19639 edited_contents,
19640 (file_ptr) sec->output_offset, sec->size);
19641
19642 return true;
19643 }
19644
19645 /* Fix code to point to Cortex-A8 erratum stubs. */
19646 if (globals->fix_cortex_a8)
19647 {
19648 struct a8_branch_to_stub_data data;
19649
19650 data.writing_section = sec;
19651 data.contents = contents;
19652
19653 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
19654 & data);
19655 }
19656
19657 if (mapcount == 0)
19658 return false;
19659
19660 if (globals->byteswap_code)
19661 {
19662 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
19663
19664 ptr = map[0].vma;
19665 for (i = 0; i < mapcount; i++)
19666 {
19667 if (i == mapcount - 1)
19668 end = sec->size;
19669 else
19670 end = map[i + 1].vma;
19671
19672 switch (map[i].type)
19673 {
19674 case 'a':
19675 /* Byte swap code words. */
19676 while (ptr + 3 < end)
19677 {
19678 tmp = contents[ptr];
19679 contents[ptr] = contents[ptr + 3];
19680 contents[ptr + 3] = tmp;
19681 tmp = contents[ptr + 1];
19682 contents[ptr + 1] = contents[ptr + 2];
19683 contents[ptr + 2] = tmp;
19684 ptr += 4;
19685 }
19686 break;
19687
19688 case 't':
19689 /* Byte swap code halfwords. */
19690 while (ptr + 1 < end)
19691 {
19692 tmp = contents[ptr];
19693 contents[ptr] = contents[ptr + 1];
19694 contents[ptr + 1] = tmp;
19695 ptr += 2;
19696 }
19697 break;
19698
19699 case 'd':
19700 /* Leave data alone. */
19701 break;
19702 }
19703 ptr = end;
19704 }
19705 }
19706
19707 free (map);
19708 arm_data->mapcount = -1;
19709 arm_data->mapsize = 0;
19710 arm_data->map = NULL;
19711
19712 return false;
19713 }
19714
19715 /* Mangle thumb function symbols as we read them in. */
19716
19717 static bool
19718 elf32_arm_swap_symbol_in (bfd * abfd,
19719 const void *psrc,
19720 const void *pshn,
19721 Elf_Internal_Sym *dst)
19722 {
19723 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
19724 return false;
19725 dst->st_target_internal = 0;
19726
19727 /* New EABI objects mark thumb function symbols by setting the low bit of
19728 the address. */
19729 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
19730 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
19731 {
19732 if (dst->st_value & 1)
19733 {
19734 dst->st_value &= ~(bfd_vma) 1;
19735 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
19736 ST_BRANCH_TO_THUMB);
19737 }
19738 else
19739 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
19740 }
19741 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
19742 {
19743 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
19744 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
19745 }
19746 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
19747 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
19748 else
19749 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
19750
19751 return true;
19752 }
19753
19754
19755 /* Mangle thumb function symbols as we write them out. */
19756
19757 static void
19758 elf32_arm_swap_symbol_out (bfd *abfd,
19759 const Elf_Internal_Sym *src,
19760 void *cdst,
19761 void *shndx)
19762 {
19763 Elf_Internal_Sym newsym;
19764
19765 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19766 of the address set, as per the new EABI. We do this unconditionally
19767 because objcopy does not set the elf header flags until after
19768 it writes out the symbol table. */
19769 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
19770 {
19771 newsym = *src;
19772 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
19773 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
19774 if (newsym.st_shndx != SHN_UNDEF)
19775 {
19776 /* Do this only for defined symbols. At link type, the static
19777 linker will simulate the work of dynamic linker of resolving
19778 symbols and will carry over the thumbness of found symbols to
19779 the output symbol table. It's not clear how it happens, but
19780 the thumbness of undefined symbols can well be different at
19781 runtime, and writing '1' for them will be confusing for users
19782 and possibly for dynamic linker itself.
19783 */
19784 newsym.st_value |= 1;
19785 }
19786
19787 src = &newsym;
19788 }
19789 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
19790 }
19791
19792 /* Add the PT_ARM_EXIDX program header. */
19793
19794 static bool
19795 elf32_arm_modify_segment_map (bfd *abfd,
19796 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19797 {
19798 struct elf_segment_map *m;
19799 asection *sec;
19800
19801 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19802 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19803 {
19804 /* If there is already a PT_ARM_EXIDX header, then we do not
19805 want to add another one. This situation arises when running
19806 "strip"; the input binary already has the header. */
19807 m = elf_seg_map (abfd);
19808 while (m && m->p_type != PT_ARM_EXIDX)
19809 m = m->next;
19810 if (!m)
19811 {
19812 m = (struct elf_segment_map *)
19813 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
19814 if (m == NULL)
19815 return false;
19816 m->p_type = PT_ARM_EXIDX;
19817 m->count = 1;
19818 m->sections[0] = sec;
19819
19820 m->next = elf_seg_map (abfd);
19821 elf_seg_map (abfd) = m;
19822 }
19823 }
19824
19825 return true;
19826 }
19827
19828 /* We may add a PT_ARM_EXIDX program header. */
19829
19830 static int
19831 elf32_arm_additional_program_headers (bfd *abfd,
19832 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19833 {
19834 asection *sec;
19835
19836 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19837 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19838 return 1;
19839 else
19840 return 0;
19841 }
19842
19843 /* Hook called by the linker routine which adds symbols from an object
19844 file. */
19845
19846 static bool
19847 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
19848 Elf_Internal_Sym *sym, const char **namep,
19849 flagword *flagsp, asection **secp, bfd_vma *valp)
19850 {
19851 if (elf32_arm_hash_table (info) == NULL)
19852 return false;
19853
19854 if (elf32_arm_hash_table (info)->root.target_os == is_vxworks
19855 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
19856 flagsp, secp, valp))
19857 return false;
19858
19859 return true;
19860 }
19861
19862 /* We use this to override swap_symbol_in and swap_symbol_out. */
19863 const struct elf_size_info elf32_arm_size_info =
19864 {
19865 sizeof (Elf32_External_Ehdr),
19866 sizeof (Elf32_External_Phdr),
19867 sizeof (Elf32_External_Shdr),
19868 sizeof (Elf32_External_Rel),
19869 sizeof (Elf32_External_Rela),
19870 sizeof (Elf32_External_Sym),
19871 sizeof (Elf32_External_Dyn),
19872 sizeof (Elf_External_Note),
19873 4,
19874 1,
19875 32, 2,
19876 ELFCLASS32, EV_CURRENT,
19877 bfd_elf32_write_out_phdrs,
19878 bfd_elf32_write_shdrs_and_ehdr,
19879 bfd_elf32_checksum_contents,
19880 bfd_elf32_write_relocs,
19881 elf32_arm_swap_symbol_in,
19882 elf32_arm_swap_symbol_out,
19883 bfd_elf32_slurp_reloc_table,
19884 bfd_elf32_slurp_symbol_table,
19885 bfd_elf32_swap_dyn_in,
19886 bfd_elf32_swap_dyn_out,
19887 bfd_elf32_swap_reloc_in,
19888 bfd_elf32_swap_reloc_out,
19889 bfd_elf32_swap_reloca_in,
19890 bfd_elf32_swap_reloca_out
19891 };
19892
19893 static bfd_vma
19894 read_code32 (const bfd *abfd, const bfd_byte *addr)
19895 {
19896 /* V7 BE8 code is always little endian. */
19897 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19898 return bfd_getl32 (addr);
19899
19900 return bfd_get_32 (abfd, addr);
19901 }
19902
19903 static bfd_vma
19904 read_code16 (const bfd *abfd, const bfd_byte *addr)
19905 {
19906 /* V7 BE8 code is always little endian. */
19907 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19908 return bfd_getl16 (addr);
19909
19910 return bfd_get_16 (abfd, addr);
19911 }
19912
19913 /* Return size of plt0 entry starting at ADDR
19914 or (bfd_vma) -1 if size can not be determined. */
19915
19916 static bfd_vma
19917 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19918 {
19919 bfd_vma first_word;
19920 bfd_vma plt0_size;
19921
19922 first_word = read_code32 (abfd, addr);
19923
19924 if (first_word == elf32_arm_plt0_entry[0])
19925 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19926 else if (first_word == elf32_thumb2_plt0_entry[0])
19927 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19928 else
19929 /* We don't yet handle this PLT format. */
19930 return (bfd_vma) -1;
19931
19932 return plt0_size;
19933 }
19934
19935 /* Return size of plt entry starting at offset OFFSET
19936 of plt section located at address START
19937 or (bfd_vma) -1 if size can not be determined. */
19938
19939 static bfd_vma
19940 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19941 {
19942 bfd_vma first_insn;
19943 bfd_vma plt_size = 0;
19944 const bfd_byte *addr = start + offset;
19945
19946 /* PLT entry size if fixed on Thumb-only platforms. */
19947 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19948 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19949
19950 /* Respect Thumb stub if necessary. */
19951 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
19952 {
19953 plt_size += 2 * ARRAY_SIZE (elf32_arm_plt_thumb_stub);
19954 }
19955
19956 /* Strip immediate from first add. */
19957 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19958
19959 #ifdef FOUR_WORD_PLT
19960 if (first_insn == elf32_arm_plt_entry[0])
19961 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19962 #else
19963 if (first_insn == elf32_arm_plt_entry_long[0])
19964 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19965 else if (first_insn == elf32_arm_plt_entry_short[0])
19966 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19967 #endif
19968 else
19969 /* We don't yet handle this PLT format. */
19970 return (bfd_vma) -1;
19971
19972 return plt_size;
19973 }
19974
19975 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19976
19977 static long
19978 elf32_arm_get_synthetic_symtab (bfd *abfd,
19979 long symcount ATTRIBUTE_UNUSED,
19980 asymbol **syms ATTRIBUTE_UNUSED,
19981 long dynsymcount,
19982 asymbol **dynsyms,
19983 asymbol **ret)
19984 {
19985 asection *relplt;
19986 asymbol *s;
19987 arelent *p;
19988 long count, i, n;
19989 size_t size;
19990 Elf_Internal_Shdr *hdr;
19991 char *names;
19992 asection *plt;
19993 bfd_vma offset;
19994 bfd_byte *data;
19995
19996 *ret = NULL;
19997
19998 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
19999 return 0;
20000
20001 if (dynsymcount <= 0)
20002 return 0;
20003
20004 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
20005 if (relplt == NULL)
20006 return 0;
20007
20008 hdr = &elf_section_data (relplt)->this_hdr;
20009 if (hdr->sh_link != elf_dynsymtab (abfd)
20010 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
20011 return 0;
20012
20013 plt = bfd_get_section_by_name (abfd, ".plt");
20014 if (plt == NULL)
20015 return 0;
20016
20017 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, true))
20018 return -1;
20019
20020 data = plt->contents;
20021 if (data == NULL)
20022 {
20023 if (!bfd_get_full_section_contents (abfd, (asection *) plt, &data) || data == NULL)
20024 return -1;
20025 bfd_cache_section_contents ((asection *) plt, data);
20026 }
20027
20028 count = relplt->size / hdr->sh_entsize;
20029 size = count * sizeof (asymbol);
20030 p = relplt->relocation;
20031 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
20032 {
20033 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
20034 if (p->addend != 0)
20035 size += sizeof ("+0x") - 1 + 8;
20036 }
20037
20038 s = *ret = (asymbol *) bfd_malloc (size);
20039 if (s == NULL)
20040 return -1;
20041
20042 offset = elf32_arm_plt0_size (abfd, data);
20043 if (offset == (bfd_vma) -1)
20044 return -1;
20045
20046 names = (char *) (s + count);
20047 p = relplt->relocation;
20048 n = 0;
20049 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
20050 {
20051 size_t len;
20052
20053 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
20054 if (plt_size == (bfd_vma) -1)
20055 break;
20056
20057 *s = **p->sym_ptr_ptr;
20058 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
20059 we are defining a symbol, ensure one of them is set. */
20060 if ((s->flags & BSF_LOCAL) == 0)
20061 s->flags |= BSF_GLOBAL;
20062 s->flags |= BSF_SYNTHETIC;
20063 s->section = plt;
20064 s->value = offset;
20065 s->name = names;
20066 s->udata.p = NULL;
20067 len = strlen ((*p->sym_ptr_ptr)->name);
20068 memcpy (names, (*p->sym_ptr_ptr)->name, len);
20069 names += len;
20070 if (p->addend != 0)
20071 {
20072 char buf[30], *a;
20073
20074 memcpy (names, "+0x", sizeof ("+0x") - 1);
20075 names += sizeof ("+0x") - 1;
20076 bfd_sprintf_vma (abfd, buf, p->addend);
20077 for (a = buf; *a == '0'; ++a)
20078 ;
20079 len = strlen (a);
20080 memcpy (names, a, len);
20081 names += len;
20082 }
20083 memcpy (names, "@plt", sizeof ("@plt"));
20084 names += sizeof ("@plt");
20085 ++s, ++n;
20086 offset += plt_size;
20087 }
20088
20089 return n;
20090 }
20091
20092 static bool
20093 elf32_arm_section_flags (const Elf_Internal_Shdr *hdr)
20094 {
20095 if (hdr->sh_flags & SHF_ARM_PURECODE)
20096 hdr->bfd_section->flags |= SEC_ELF_PURECODE;
20097 return true;
20098 }
20099
20100 static flagword
20101 elf32_arm_lookup_section_flags (char *flag_name)
20102 {
20103 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
20104 return SHF_ARM_PURECODE;
20105
20106 return SEC_NO_FLAGS;
20107 }
20108
20109 static unsigned int
20110 elf32_arm_count_additional_relocs (asection *sec)
20111 {
20112 struct _arm_elf_section_data *arm_data;
20113 arm_data = get_arm_elf_section_data (sec);
20114
20115 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
20116 }
20117
20118 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
20119 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
20120 FALSE otherwise. ISECTION is the best guess matching section from the
20121 input bfd IBFD, but it might be NULL. */
20122
20123 static bool
20124 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
20125 bfd *obfd ATTRIBUTE_UNUSED,
20126 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
20127 Elf_Internal_Shdr *osection)
20128 {
20129 switch (osection->sh_type)
20130 {
20131 case SHT_ARM_EXIDX:
20132 {
20133 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
20134 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
20135 unsigned i = 0;
20136
20137 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
20138 osection->sh_info = 0;
20139
20140 /* The sh_link field must be set to the text section associated with
20141 this index section. Unfortunately the ARM EHABI does not specify
20142 exactly how to determine this association. Our caller does try
20143 to match up OSECTION with its corresponding input section however
20144 so that is a good first guess. */
20145 if (isection != NULL
20146 && osection->bfd_section != NULL
20147 && isection->bfd_section != NULL
20148 && isection->bfd_section->output_section != NULL
20149 && isection->bfd_section->output_section == osection->bfd_section
20150 && iheaders != NULL
20151 && isection->sh_link > 0
20152 && isection->sh_link < elf_numsections (ibfd)
20153 && iheaders[isection->sh_link]->bfd_section != NULL
20154 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
20155 )
20156 {
20157 for (i = elf_numsections (obfd); i-- > 0;)
20158 if (oheaders[i]->bfd_section
20159 == iheaders[isection->sh_link]->bfd_section->output_section)
20160 break;
20161 }
20162
20163 if (i == 0)
20164 {
20165 /* Failing that we have to find a matching section ourselves. If
20166 we had the output section name available we could compare that
20167 with input section names. Unfortunately we don't. So instead
20168 we use a simple heuristic and look for the nearest executable
20169 section before this one. */
20170 for (i = elf_numsections (obfd); i-- > 0;)
20171 if (oheaders[i] == osection)
20172 break;
20173 if (i == 0)
20174 break;
20175
20176 while (i-- > 0)
20177 if (oheaders[i]->sh_type == SHT_PROGBITS
20178 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
20179 == (SHF_ALLOC | SHF_EXECINSTR))
20180 break;
20181 }
20182
20183 if (i)
20184 {
20185 osection->sh_link = i;
20186 /* If the text section was part of a group
20187 then the index section should be too. */
20188 if (oheaders[i]->sh_flags & SHF_GROUP)
20189 osection->sh_flags |= SHF_GROUP;
20190 return true;
20191 }
20192 }
20193 break;
20194
20195 case SHT_ARM_PREEMPTMAP:
20196 osection->sh_flags = SHF_ALLOC;
20197 break;
20198
20199 case SHT_ARM_ATTRIBUTES:
20200 case SHT_ARM_DEBUGOVERLAY:
20201 case SHT_ARM_OVERLAYSECTION:
20202 default:
20203 break;
20204 }
20205
20206 return false;
20207 }
20208
20209 /* Returns TRUE if NAME is an ARM mapping symbol.
20210 Traditionally the symbols $a, $d and $t have been used.
20211 The ARM ELF standard also defines $x (for A64 code). It also allows a
20212 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20213 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20214 not support them here. $t.x indicates the start of ThumbEE instructions. */
20215
20216 static bool
20217 is_arm_mapping_symbol (const char * name)
20218 {
20219 return name != NULL /* Paranoia. */
20220 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20221 the mapping symbols could have acquired a prefix.
20222 We do not support this here, since such symbols no
20223 longer conform to the ARM ELF ABI. */
20224 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
20225 && (name[2] == 0 || name[2] == '.');
20226 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20227 any characters that follow the period are legal characters for the body
20228 of a symbol's name. For now we just assume that this is the case. */
20229 }
20230
20231 /* Make sure that mapping symbols in object files are not removed via the
20232 "strip --strip-unneeded" tool. These symbols are needed in order to
20233 correctly generate interworking veneers, and for byte swapping code
20234 regions. Once an object file has been linked, it is safe to remove the
20235 symbols as they will no longer be needed. */
20236
20237 static void
20238 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
20239 {
20240 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
20241 && sym->section != bfd_abs_section_ptr
20242 && is_arm_mapping_symbol (sym->name))
20243 sym->flags |= BSF_KEEP;
20244 }
20245
20246 #undef elf_backend_copy_special_section_fields
20247 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20248
20249 #define ELF_ARCH bfd_arch_arm
20250 #define ELF_TARGET_ID ARM_ELF_DATA
20251 #define ELF_MACHINE_CODE EM_ARM
20252 #ifdef __QNXTARGET__
20253 #define ELF_MAXPAGESIZE 0x1000
20254 #else
20255 #define ELF_MAXPAGESIZE 0x10000
20256 #endif
20257 #define ELF_COMMONPAGESIZE 0x1000
20258
20259 #define bfd_elf32_mkobject elf32_arm_mkobject
20260
20261 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20262 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20263 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20264 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20265 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20266 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20267 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20268 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20269 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20270 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20271 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20272 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20273
20274 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20275 #define elf_backend_maybe_function_sym elf32_arm_maybe_function_sym
20276 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20277 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20278 #define elf_backend_check_relocs elf32_arm_check_relocs
20279 #define elf_backend_update_relocs elf32_arm_update_relocs
20280 #define elf_backend_relocate_section elf32_arm_relocate_section
20281 #define elf_backend_write_section elf32_arm_write_section
20282 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20283 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20284 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20285 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20286 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20287 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20288 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20289 #define elf_backend_init_file_header elf32_arm_init_file_header
20290 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20291 #define elf_backend_object_p elf32_arm_object_p
20292 #define elf_backend_fake_sections elf32_arm_fake_sections
20293 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20294 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20295 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20296 #define elf_backend_size_info elf32_arm_size_info
20297 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20298 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20299 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20300 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20301 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20302 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20303 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20304 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20305
20306 #define elf_backend_can_refcount 1
20307 #define elf_backend_can_gc_sections 1
20308 #define elf_backend_plt_readonly 1
20309 #define elf_backend_want_got_plt 1
20310 #define elf_backend_want_plt_sym 0
20311 #define elf_backend_want_dynrelro 1
20312 #define elf_backend_may_use_rel_p 1
20313 #define elf_backend_may_use_rela_p 0
20314 #define elf_backend_default_use_rela_p 0
20315 #define elf_backend_dtrel_excludes_plt 1
20316
20317 #define elf_backend_got_header_size 12
20318 #define elf_backend_extern_protected_data 1
20319
20320 #undef elf_backend_obj_attrs_vendor
20321 #define elf_backend_obj_attrs_vendor "aeabi"
20322 #undef elf_backend_obj_attrs_section
20323 #define elf_backend_obj_attrs_section ".ARM.attributes"
20324 #undef elf_backend_obj_attrs_arg_type
20325 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20326 #undef elf_backend_obj_attrs_section_type
20327 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20328 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20329 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20330
20331 #undef elf_backend_section_flags
20332 #define elf_backend_section_flags elf32_arm_section_flags
20333 #undef elf_backend_lookup_section_flags_hook
20334 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20335
20336 #define elf_backend_linux_prpsinfo32_ugid16 true
20337
20338 #include "elf32-target.h"
20339
20340 /* Native Client targets. */
20341
20342 #undef TARGET_LITTLE_SYM
20343 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20344 #undef TARGET_LITTLE_NAME
20345 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20346 #undef TARGET_BIG_SYM
20347 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20348 #undef TARGET_BIG_NAME
20349 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20350
20351 /* Like elf32_arm_link_hash_table_create -- but overrides
20352 appropriately for NaCl. */
20353
20354 static struct bfd_link_hash_table *
20355 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
20356 {
20357 struct bfd_link_hash_table *ret;
20358
20359 ret = elf32_arm_link_hash_table_create (abfd);
20360 if (ret)
20361 {
20362 struct elf32_arm_link_hash_table *htab
20363 = (struct elf32_arm_link_hash_table *) ret;
20364
20365 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
20366 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
20367 }
20368 return ret;
20369 }
20370
20371 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20372 really need to use elf32_arm_modify_segment_map. But we do it
20373 anyway just to reduce gratuitous differences with the stock ARM backend. */
20374
20375 static bool
20376 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
20377 {
20378 return (elf32_arm_modify_segment_map (abfd, info)
20379 && nacl_modify_segment_map (abfd, info));
20380 }
20381
20382 static bool
20383 elf32_arm_nacl_final_write_processing (bfd *abfd)
20384 {
20385 arm_final_write_processing (abfd);
20386 return nacl_final_write_processing (abfd);
20387 }
20388
20389 static bfd_vma
20390 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
20391 const arelent *rel ATTRIBUTE_UNUSED)
20392 {
20393 return plt->vma
20394 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
20395 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
20396 }
20397
20398 #undef elf32_bed
20399 #define elf32_bed elf32_arm_nacl_bed
20400 #undef bfd_elf32_bfd_link_hash_table_create
20401 #define bfd_elf32_bfd_link_hash_table_create \
20402 elf32_arm_nacl_link_hash_table_create
20403 #undef elf_backend_plt_alignment
20404 #define elf_backend_plt_alignment 4
20405 #undef elf_backend_modify_segment_map
20406 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20407 #undef elf_backend_modify_headers
20408 #define elf_backend_modify_headers nacl_modify_headers
20409 #undef elf_backend_final_write_processing
20410 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20411 #undef bfd_elf32_get_synthetic_symtab
20412 #undef elf_backend_plt_sym_val
20413 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20414 #undef elf_backend_copy_special_section_fields
20415
20416 #undef ELF_MINPAGESIZE
20417 #undef ELF_COMMONPAGESIZE
20418
20419 #undef ELF_TARGET_OS
20420 #define ELF_TARGET_OS is_nacl
20421
20422 #include "elf32-target.h"
20423
20424 /* Reset to defaults. */
20425 #undef elf_backend_plt_alignment
20426 #undef elf_backend_modify_segment_map
20427 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20428 #undef elf_backend_modify_headers
20429 #undef elf_backend_final_write_processing
20430 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20431 #undef ELF_MINPAGESIZE
20432 #undef ELF_COMMONPAGESIZE
20433 #define ELF_COMMONPAGESIZE 0x1000
20434
20435
20436 /* FDPIC Targets. */
20437
20438 #undef TARGET_LITTLE_SYM
20439 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20440 #undef TARGET_LITTLE_NAME
20441 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20442 #undef TARGET_BIG_SYM
20443 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20444 #undef TARGET_BIG_NAME
20445 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20446 #undef elf_match_priority
20447 #define elf_match_priority 128
20448 #undef ELF_OSABI
20449 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20450
20451 /* Like elf32_arm_link_hash_table_create -- but overrides
20452 appropriately for FDPIC. */
20453
20454 static struct bfd_link_hash_table *
20455 elf32_arm_fdpic_link_hash_table_create (bfd *abfd)
20456 {
20457 struct bfd_link_hash_table *ret;
20458
20459 ret = elf32_arm_link_hash_table_create (abfd);
20460 if (ret)
20461 {
20462 struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret;
20463
20464 htab->fdpic_p = 1;
20465 }
20466 return ret;
20467 }
20468
20469 /* We need dynamic symbols for every section, since segments can
20470 relocate independently. */
20471 static bool
20472 elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED,
20473 struct bfd_link_info *info
20474 ATTRIBUTE_UNUSED,
20475 asection *p ATTRIBUTE_UNUSED)
20476 {
20477 switch (elf_section_data (p)->this_hdr.sh_type)
20478 {
20479 case SHT_PROGBITS:
20480 case SHT_NOBITS:
20481 /* If sh_type is yet undecided, assume it could be
20482 SHT_PROGBITS/SHT_NOBITS. */
20483 case SHT_NULL:
20484 return false;
20485
20486 /* There shouldn't be section relative relocations
20487 against any other section. */
20488 default:
20489 return true;
20490 }
20491 }
20492
20493 #undef elf32_bed
20494 #define elf32_bed elf32_arm_fdpic_bed
20495
20496 #undef bfd_elf32_bfd_link_hash_table_create
20497 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20498
20499 #undef elf_backend_omit_section_dynsym
20500 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20501
20502 #undef ELF_TARGET_OS
20503
20504 #include "elf32-target.h"
20505
20506 #undef elf_match_priority
20507 #undef ELF_OSABI
20508 #undef elf_backend_omit_section_dynsym
20509
20510 /* VxWorks Targets. */
20511
20512 #undef TARGET_LITTLE_SYM
20513 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20514 #undef TARGET_LITTLE_NAME
20515 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20516 #undef TARGET_BIG_SYM
20517 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20518 #undef TARGET_BIG_NAME
20519 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20520
20521 /* Like elf32_arm_link_hash_table_create -- but overrides
20522 appropriately for VxWorks. */
20523
20524 static struct bfd_link_hash_table *
20525 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
20526 {
20527 struct bfd_link_hash_table *ret;
20528
20529 ret = elf32_arm_link_hash_table_create (abfd);
20530 if (ret)
20531 {
20532 struct elf32_arm_link_hash_table *htab
20533 = (struct elf32_arm_link_hash_table *) ret;
20534 htab->use_rel = 0;
20535 }
20536 return ret;
20537 }
20538
20539 static bool
20540 elf32_arm_vxworks_final_write_processing (bfd *abfd)
20541 {
20542 arm_final_write_processing (abfd);
20543 return elf_vxworks_final_write_processing (abfd);
20544 }
20545
20546 #undef elf32_bed
20547 #define elf32_bed elf32_arm_vxworks_bed
20548
20549 #undef bfd_elf32_bfd_link_hash_table_create
20550 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20551 #undef elf_backend_final_write_processing
20552 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20553 #undef elf_backend_emit_relocs
20554 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20555
20556 #undef elf_backend_may_use_rel_p
20557 #define elf_backend_may_use_rel_p 0
20558 #undef elf_backend_may_use_rela_p
20559 #define elf_backend_may_use_rela_p 1
20560 #undef elf_backend_default_use_rela_p
20561 #define elf_backend_default_use_rela_p 1
20562 #undef elf_backend_want_plt_sym
20563 #define elf_backend_want_plt_sym 1
20564 #undef ELF_MAXPAGESIZE
20565 #define ELF_MAXPAGESIZE 0x1000
20566 #undef ELF_TARGET_OS
20567 #define ELF_TARGET_OS is_vxworks
20568
20569 #include "elf32-target.h"
20570
20571
20572 /* Merge backend specific data from an object file to the output
20573 object file when linking. */
20574
20575 static bool
20576 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
20577 {
20578 bfd *obfd = info->output_bfd;
20579 flagword out_flags;
20580 flagword in_flags;
20581 bool flags_compatible = true;
20582 asection *sec;
20583
20584 /* Check if we have the same endianness. */
20585 if (! _bfd_generic_verify_endian_match (ibfd, info))
20586 return false;
20587
20588 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
20589 return true;
20590
20591 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
20592 return false;
20593
20594 /* The input BFD must have had its flags initialised. */
20595 /* The following seems bogus to me -- The flags are initialized in
20596 the assembler but I don't think an elf_flags_init field is
20597 written into the object. */
20598 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20599
20600 in_flags = elf_elfheader (ibfd)->e_flags;
20601 out_flags = elf_elfheader (obfd)->e_flags;
20602
20603 /* In theory there is no reason why we couldn't handle this. However
20604 in practice it isn't even close to working and there is no real
20605 reason to want it. */
20606 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
20607 && !(ibfd->flags & DYNAMIC)
20608 && (in_flags & EF_ARM_BE8))
20609 {
20610 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20611 ibfd);
20612 return false;
20613 }
20614
20615 if (!elf_flags_init (obfd))
20616 {
20617 /* If the input is the default architecture and had the default
20618 flags then do not bother setting the flags for the output
20619 architecture, instead allow future merges to do this. If no
20620 future merges ever set these flags then they will retain their
20621 uninitialised values, which surprise surprise, correspond
20622 to the default values. */
20623 if (bfd_get_arch_info (ibfd)->the_default
20624 && elf_elfheader (ibfd)->e_flags == 0)
20625 return true;
20626
20627 elf_flags_init (obfd) = true;
20628 elf_elfheader (obfd)->e_flags = in_flags;
20629
20630 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
20631 && bfd_get_arch_info (obfd)->the_default)
20632 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
20633
20634 return true;
20635 }
20636
20637 /* Determine what should happen if the input ARM architecture
20638 does not match the output ARM architecture. */
20639 if (! bfd_arm_merge_machines (ibfd, obfd))
20640 return false;
20641
20642 /* Identical flags must be compatible. */
20643 if (in_flags == out_flags)
20644 return true;
20645
20646 /* Check to see if the input BFD actually contains any sections. If
20647 not, its flags may not have been initialised either, but it
20648 cannot actually cause any incompatiblity. Do not short-circuit
20649 dynamic objects; their section list may be emptied by
20650 elf_link_add_object_symbols.
20651
20652 Also check to see if there are no code sections in the input.
20653 In this case there is no need to check for code specific flags.
20654 XXX - do we need to worry about floating-point format compatability
20655 in data sections ? */
20656 if (!(ibfd->flags & DYNAMIC))
20657 {
20658 bool null_input_bfd = true;
20659 bool only_data_sections = true;
20660
20661 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
20662 {
20663 /* Ignore synthetic glue sections. */
20664 if (strcmp (sec->name, ".glue_7")
20665 && strcmp (sec->name, ".glue_7t"))
20666 {
20667 if ((bfd_section_flags (sec)
20668 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20669 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20670 only_data_sections = false;
20671
20672 null_input_bfd = false;
20673 break;
20674 }
20675 }
20676
20677 if (null_input_bfd || only_data_sections)
20678 return true;
20679 }
20680
20681 /* Complain about various flag mismatches. */
20682 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
20683 EF_ARM_EABI_VERSION (out_flags)))
20684 {
20685 _bfd_error_handler
20686 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20687 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
20688 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
20689 return false;
20690 }
20691
20692 /* Not sure what needs to be checked for EABI versions >= 1. */
20693 /* VxWorks libraries do not use these flags. */
20694 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
20695 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
20696 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
20697 {
20698 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
20699 {
20700 _bfd_error_handler
20701 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20702 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
20703 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
20704 flags_compatible = false;
20705 }
20706
20707 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
20708 {
20709 if (in_flags & EF_ARM_APCS_FLOAT)
20710 _bfd_error_handler
20711 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20712 ibfd, obfd);
20713 else
20714 _bfd_error_handler
20715 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20716 ibfd, obfd);
20717
20718 flags_compatible = false;
20719 }
20720
20721 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
20722 {
20723 if (in_flags & EF_ARM_VFP_FLOAT)
20724 _bfd_error_handler
20725 (_("error: %pB uses %s instructions, whereas %pB does not"),
20726 ibfd, "VFP", obfd);
20727 else
20728 _bfd_error_handler
20729 (_("error: %pB uses %s instructions, whereas %pB does not"),
20730 ibfd, "FPA", obfd);
20731
20732 flags_compatible = false;
20733 }
20734
20735 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
20736 {
20737 if (in_flags & EF_ARM_MAVERICK_FLOAT)
20738 _bfd_error_handler
20739 (_("error: %pB uses %s instructions, whereas %pB does not"),
20740 ibfd, "Maverick", obfd);
20741 else
20742 _bfd_error_handler
20743 (_("error: %pB does not use %s instructions, whereas %pB does"),
20744 ibfd, "Maverick", obfd);
20745
20746 flags_compatible = false;
20747 }
20748
20749 #ifdef EF_ARM_SOFT_FLOAT
20750 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
20751 {
20752 /* We can allow interworking between code that is VFP format
20753 layout, and uses either soft float or integer regs for
20754 passing floating point arguments and results. We already
20755 know that the APCS_FLOAT flags match; similarly for VFP
20756 flags. */
20757 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
20758 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
20759 {
20760 if (in_flags & EF_ARM_SOFT_FLOAT)
20761 _bfd_error_handler
20762 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20763 ibfd, obfd);
20764 else
20765 _bfd_error_handler
20766 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20767 ibfd, obfd);
20768
20769 flags_compatible = false;
20770 }
20771 }
20772 #endif
20773
20774 /* Interworking mismatch is only a warning. */
20775 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
20776 {
20777 if (in_flags & EF_ARM_INTERWORK)
20778 {
20779 _bfd_error_handler
20780 (_("warning: %pB supports interworking, whereas %pB does not"),
20781 ibfd, obfd);
20782 }
20783 else
20784 {
20785 _bfd_error_handler
20786 (_("warning: %pB does not support interworking, whereas %pB does"),
20787 ibfd, obfd);
20788 }
20789 }
20790 }
20791
20792 return flags_compatible;
20793 }
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