board/a3000/a3000.c

   1 /*
   2  * (C) Copyright 2001
   3  * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
   4  *
   5  * Modified during 2003 by
   6  * Ken Chou, kchou@ieee.org
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #include <common.h>
  12 #include <mpc824x.h>
  13 #include <pci.h>
  14 #include <netdev.h>
  15
  16 int checkboard (void)
  17 {
  18         ulong busfreq  = get_bus_freq(0);
  19         char  buf[32];
  20
  21         printf("Board: A3000 Local Bus at %s MHz\n", strmhz(buf, busfreq));
  22         return 0;
  23
  24 }
  25
  26 phys_size_t initdram (int board_type)
  27 {
  28         long size;
  29         long new_bank0_end;
  30         long mear1;
  31         long emear1;
  32
  33         size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
  34
  35         new_bank0_end = size - 1;
  36         mear1 = mpc824x_mpc107_getreg(MEAR1);
  37         emear1 = mpc824x_mpc107_getreg(EMEAR1);
  38         mear1 = (mear1  & 0xFFFFFF00) |
  39                 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
  40         emear1 = (emear1 & 0xFFFFFF00) |
  41                 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
  42         mpc824x_mpc107_setreg(MEAR1, mear1);
  43         mpc824x_mpc107_setreg(EMEAR1, emear1);
  44
  45         return (size);
  46 }
  47
  48 /*
  49  * Initialize PCI Devices
  50  */
  51 #ifndef CONFIG_PCI_PNP
  52 static struct pci_config_table pci_a3000_config_table[] = {
  53         /* vendor, device, class */
  54         /* bus, dev, func */
  55         { PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_83815, PCI_ANY_ID,
  56           PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,   /* dp83815 eth0 divice */
  57           pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
  58                                        PCI_ENET0_MEMADDR,
  59                                        PCI_COMMAND_IO |
  60                                        PCI_COMMAND_MEMORY |
  61                                        PCI_COMMAND_MASTER }},
  62         { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  63           PCI_ANY_ID, 0x14, PCI_ANY_ID,         /* PCI slot1 */
  64           pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
  65                                        PCI_ENET1_MEMADDR,
  66                                        PCI_COMMAND_IO |
  67                                        PCI_COMMAND_MEMORY |
  68                                        PCI_COMMAND_MASTER }},
  69         { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  70           PCI_ANY_ID, 0x15, PCI_ANY_ID,         /* PCI slot2 */
  71           pci_cfgfunc_config_device, { PCI_ENET2_IOADDR,
  72                                        PCI_ENET2_MEMADDR,
  73                                        PCI_COMMAND_IO |
  74                                        PCI_COMMAND_MEMORY |
  75                                        PCI_COMMAND_MASTER }},
  76         { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  77           PCI_ANY_ID, 0x16, PCI_ANY_ID,         /* PCI slot3 */
  78           pci_cfgfunc_config_device, { PCI_ENET3_IOADDR,
  79                                        PCI_ENET3_MEMADDR,
  80                                        PCI_COMMAND_IO |
  81                                        PCI_COMMAND_MEMORY |
  82                                        PCI_COMMAND_MASTER }},
  83         { }
  84 };
  85 #endif
  86
  87 struct pci_controller hose = {
  88 #ifndef CONFIG_PCI_PNP
  89         config_table: pci_a3000_config_table,
  90 #endif
  91 };
  92
  93 void pci_init_board(void)
  94 {
  95         pci_mpc824x_init(&hose);
  96 }
  97
  98 int board_eth_init(bd_t *bis)
  99 {
 100         return pci_eth_init(bis);
 101 }