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[people/ms/u-boot.git] / board / a3000 / a3000.c
1 /*
2 * (C) Copyright 2001
3 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
4 *
5 * Modified during 2003 by
6 * Ken Chou, kchou@ieee.org
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27 #include <common.h>
28 #include <mpc824x.h>
29 #include <pci.h>
30 #include <netdev.h>
31
32 int checkboard (void)
33 {
34 ulong busfreq = get_bus_freq(0);
35 char buf[32];
36
37 printf("Board: A3000 Local Bus at %s MHz\n", strmhz(buf, busfreq));
38 return 0;
39
40 }
41
42 phys_size_t initdram (int board_type)
43 {
44 long size;
45 long new_bank0_end;
46 long mear1;
47 long emear1;
48
49 size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
50
51 new_bank0_end = size - 1;
52 mear1 = mpc824x_mpc107_getreg(MEAR1);
53 emear1 = mpc824x_mpc107_getreg(EMEAR1);
54 mear1 = (mear1 & 0xFFFFFF00) |
55 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
56 emear1 = (emear1 & 0xFFFFFF00) |
57 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
58 mpc824x_mpc107_setreg(MEAR1, mear1);
59 mpc824x_mpc107_setreg(EMEAR1, emear1);
60
61 return (size);
62 }
63
64 /*
65 * Initialize PCI Devices
66 */
67 #ifndef CONFIG_PCI_PNP
68 static struct pci_config_table pci_a3000_config_table[] = {
69 /* vendor, device, class */
70 /* bus, dev, func */
71 { PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_83815, PCI_ANY_ID,
72 PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, /* dp83815 eth0 divice */
73 pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
74 PCI_ENET0_MEMADDR,
75 PCI_COMMAND_IO |
76 PCI_COMMAND_MEMORY |
77 PCI_COMMAND_MASTER }},
78 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
79 PCI_ANY_ID, 0x14, PCI_ANY_ID, /* PCI slot1 */
80 pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
81 PCI_ENET1_MEMADDR,
82 PCI_COMMAND_IO |
83 PCI_COMMAND_MEMORY |
84 PCI_COMMAND_MASTER }},
85 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
86 PCI_ANY_ID, 0x15, PCI_ANY_ID, /* PCI slot2 */
87 pci_cfgfunc_config_device, { PCI_ENET2_IOADDR,
88 PCI_ENET2_MEMADDR,
89 PCI_COMMAND_IO |
90 PCI_COMMAND_MEMORY |
91 PCI_COMMAND_MASTER }},
92 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
93 PCI_ANY_ID, 0x16, PCI_ANY_ID, /* PCI slot3 */
94 pci_cfgfunc_config_device, { PCI_ENET3_IOADDR,
95 PCI_ENET3_MEMADDR,
96 PCI_COMMAND_IO |
97 PCI_COMMAND_MEMORY |
98 PCI_COMMAND_MASTER }},
99 { }
100 };
101 #endif
102
103 struct pci_controller hose = {
104 #ifndef CONFIG_PCI_PNP
105 config_table: pci_a3000_config_table,
106 #endif
107 };
108
109 void pci_init_board(void)
110 {
111 pci_mpc824x_init(&hose);
112 }
113
114 int board_eth_init(bd_t *bis)
115 {
116 return pci_eth_init(bis);
117 }
118