3 * Michael Schwingen, michael@schwingen.org
6 * Stefan Roese, DENX Software Engineering, sr@denx.de.
9 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
12 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
13 * Marius Groeger <mgroeger@sysgo.de>
15 * SPDX-License-Identifier: GPL-2.0+
21 #include <asm/arch/ixp425.h>
26 #include <asm/arch/ixp425pci.h>
29 #include "actux1_hw.h"
31 DECLARE_GLOBAL_DATA_PTR
;
33 int board_early_init_f(void)
36 writel(0x9d520003, IXP425_EXP_CS5
);
38 writel(0x81860001, IXP425_EXP_CS6
);
40 writel(0x80900003, IXP425_EXP_CS7
);
46 /* adress of boot parameters */
47 gd
->bd
->bi_boot_params
= 0x00000100;
49 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST
);
50 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST
);
52 /* Setup GPIOs for PCI INTA */
53 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI1_INTA
);
54 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI1_INTA
);
56 /* Setup GPIOs for 33MHz clock output */
57 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK
);
58 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK
);
59 writel(0x011001FF, IXP425_GPIO_GPCLKR
);
62 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST
);
72 ACTUX1_HS(ACTUX1_HS_DCD
);
78 * Check Board Identity
83 int i
= getenv_f("serial#", buf
, sizeof(buf
));
85 puts("Board: AcTux-1 rev.");
86 putc(ACTUX1_BOARDREL
+ 'A' - 1);
97 /*************************************************************************
98 * get_board_rev() - setup to pass kernel board revision information
102 *************************************************************************/
103 u32
get_board_rev(void)
105 return ACTUX1_BOARDREL
;
110 gd
->ram_size
= get_ram_size(CONFIG_SYS_SDRAM_BASE
, 128<<20);
116 struct pci_controller hose
;
118 void pci_init_board(void)
128 /* initialize the PHY */
129 miiphy_reset("NPE0", CONFIG_PHY_ADDR
);
131 miiphy_read("NPE0", CONFIG_PHY_ADDR
, MII_PHYSID1
, &id1
);
132 miiphy_read("NPE0", CONFIG_PHY_ADDR
, MII_PHYSID2
, &id2
);
134 id2
&= 0xFFF0; /* mask out revision bits */
136 if (id1
== 0x13 && id2
== 0x78e0) {
138 * LXT971/LXT972 PHY: set LED outputs:
139 * LED1(green) = Link/ACT,
140 * LED2 (unused) = LINK,
143 miiphy_write("NPE0", CONFIG_PHY_ADDR
, 20, 0xD432);
144 } else if (id1
== 0x143 && id2
== 0xbc30) {
145 /* BCM5241: default values are OK */
147 printf("unknown ethernet PHY ID: %x %x\n", id1
, id2
);