2 * (C) Copyright 2000, 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * ehnus: change pll frequency.
27 * Wed Sep 5 11:45:17 CST 2007
37 #ifdef CONFIG_CMD_EEPROM
39 #define EEPROM_CONF_OFFSET 0
40 #define EEPROM_TEST_OFFSET 16
41 #define EEPROM_SDSTP_PARAM 16
43 #define PLL_NAME_MAX 12
46 /* eeprom_wirtes 8Byte per op. */
47 #define EEPROM_ALTER_FREQ(freq) \
50 for (__i = 0; __i < 2; __i++) \
51 eeprom_write (CONFIG_SYS_I2C_EEPROM_ADDR, \
52 EEPROM_CONF_OFFSET + __i*BUF_STEP, \
54 BUF_STEP + __i*BUF_STEP); \
59 #define PLL_DEBUG pll_debug(EEPROM_CONF_OFFSET)
71 PLL_666
, /* For now, kilauea can't support */
78 pll_name
[][PLL_NAME_MAX
] = {
95 pll_select
[][EEPROM_SDSTP_PARAM
] = {
96 /* 0: CPU 333MHz EBC 20MHz, for test only */
98 0x8c, 0x12, 0xec, 0x12, 0x88, 0x00, 0x0a, 0x00,
99 0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
104 0x8c, 0x12, 0xec, 0x12, 0x98, 0x00, 0x0a, 0x00,
105 0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
110 0x8e, 0x0e, 0xe8, 0x13, 0x98, 0x00, 0x0a, 0x00,
111 0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
116 0x8e, 0x0e, 0xe8, 0x12, 0x98, 0x00, 0x0a, 0x00,
117 0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
122 0x8e, 0x43, 0x60, 0x13, 0x98, 0x00, 0x0a, 0x00,
123 0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
128 0x8d, 0x02, 0x34, 0x13, 0x98, 0x00, 0x0a, 0x00,
129 0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
134 0x8d, 0x03, 0x78, 0x13, 0x98, 0x00, 0x0a, 0x00,
135 0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
142 testbuf
[EEPROM_SDSTP_PARAM
] = {
143 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77,
144 0x88, 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff
151 uchar buffer
[EEPROM_SDSTP_PARAM
];
153 memset(buffer
, 0, sizeof(buffer
));
154 eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR
, off
,
155 buffer
, EEPROM_SDSTP_PARAM
);
157 printf("Debug: SDSTP[0-3] at offset \"0x%02x\" lists as follows: \n", off
);
158 for (i
= 0; i
< EEPROM_SDSTP_PARAM
; i
++)
159 printf("%02x ", buffer
[i
]);
166 printf("Debug: test eeprom_write ... ");
169 * Write twice, 8 bytes per write
171 eeprom_write (CONFIG_SYS_I2C_EEPROM_ADDR
, EEPROM_TEST_OFFSET
,
173 eeprom_write (CONFIG_SYS_I2C_EEPROM_ADDR
, EEPROM_TEST_OFFSET
+8,
177 pll_debug(EEPROM_TEST_OFFSET
);
181 do_pll_alter (cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
186 printf("Usage: \n%s\n", cmdtp
->usage
);
190 for (pll_freq
= PLL_ebc20
; pll_freq
< PLL_TOTAL
; pll_freq
++)
191 if (!strcmp(pll_name
[pll_freq
], argv
[1]))
201 EEPROM_ALTER_FREQ(pll_freq
);
204 case PLL_666
: /* not support */
205 printf("Choose this option will result in a boot failure."
206 "\nContinue? (Y/N): ");
208 c
= getc(); putc('\n');
210 if ((c
== 'y') || (c
== 'Y')) {
211 EEPROM_ALTER_FREQ(pll_freq
);
217 pll_debug(EEPROM_CONF_OFFSET
);
220 printf("DEBUG: write test\n");
225 printf("Invalid options"
226 "\n\nUsage: \n%s\n", cmdtp
->usage
);
230 printf("PLL set to %s, "
231 "reset the board to take effect\n", pll_name
[pll_freq
]);
239 pllalter
, CONFIG_SYS_MAXARGS
, 1, do_pll_alter
,
240 "pllalter- change pll frequence \n",
241 "pllalter <selection> - change pll frequence \n\n\
242 ** New freq take effect after reset. ** \n\
243 ----------------------------------------------\n\
244 PLL_ebc20: Board: AMCC 405EX(r) Evaluation Board\n\
245 \t Same as PLL_333 \n\
248 ----------------------------------------------\n\
249 PLL_333: Board: AMCC 405EX(r) Evaluation Board\n\
255 ------------------------------------------------\n\
256 PLL_400@1: Board: AMCC 405EX(r) Evaluation Board\n\
262 ------------------------------------------------\n\
263 PLL_400@2: Board: AMCC 405EX(r) Evaluation Board\n\
269 ----------------------------------------------\n\
270 PLL_533: Board: AMCC 405EX(r) Evaluation Board\n\
276 ----------------------------------------------\n\
277 PLL_600: Board: AMCC 405EX(r) Evaluation Board\n\
283 ----------------------------------------------\n\
284 PLL_666: Board: AMCC 405EX(r) Evaluation Board\n\
290 -----------------------------------------------\n\
291 RCONF: Read current eeprom configuration. \n\
292 -----------------------------------------------\n\
293 WTEST: Test EEPROM write with predefined values\n\
294 -----------------------------------------------\n"
297 #endif /* CONFIG_CMD_EEPROM */