board/cpc45/flash.c

   1 /*
   2  * (C) Copyright 2001-2003
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <mpc824x.h>
  26 #include <asm/processor.h>
  27
  28 #if defined(CONFIG_ENV_IS_IN_FLASH)
  29 # ifndef  CFG_ENV_ADDR
  30 #  define CFG_ENV_ADDR  (CFG_FLASH_BASE + CFG_ENV_OFFSET)
  31 # endif
  32 # ifndef  CFG_ENV_SIZE
  33 #  define CFG_ENV_SIZE  CFG_ENV_SECT_SIZE
  34 # endif
  35 # ifndef  CFG_ENV_SECT_SIZE
  36 #  define CFG_ENV_SECT_SIZE  CFG_ENV_SIZE
  37 # endif
  38 #endif
  39
  40 #define FLASH_BANK_SIZE 0x800000
  41 #define MAIN_SECT_SIZE  0x40000
  42 #define PARAM_SECT_SIZE 0x8000
  43
  44 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
  45
  46 static int write_data (flash_info_t * info, ulong dest, ulong * data);
  47 static void write_via_fpu (vu_long * addr, ulong * data);
  48 static __inline__ unsigned long get_msr (void);
  49 static __inline__ void set_msr (unsigned long msr);
  50
  51 /*---------------------------------------------------------------------*/
  52 #undef  DEBUG_FLASH
  53
  54 /*---------------------------------------------------------------------*/
  55 #ifdef DEBUG_FLASH
  56 #define DEBUGF(fmt,args...) printf(fmt ,##args)
  57 #else
  58 #define DEBUGF(fmt,args...)
  59 #endif
  60 /*---------------------------------------------------------------------*/
  61
  62 /*-----------------------------------------------------------------------
  63  */
  64
  65 unsigned long flash_init (void)
  66 {
  67         int i, j;
  68         ulong size = 0;
  69         uchar tempChar;
  70         vu_long *tmpaddr;
  71
  72         /* Enable flash writes on CPC45 */
  73
  74         tempChar = BOARD_CTRL;
  75
  76         tempChar |= (B_CTRL_FWPT_1 | B_CTRL_FWRE_1);
  77
  78         tempChar &= ~(B_CTRL_FWPT_0 | B_CTRL_FWRE_0);
  79
  80         BOARD_CTRL = tempChar;
  81
  82         __asm__ volatile ("sync\n eieio");
  83
  84         for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
  85                 vu_long *addr = (vu_long *) (CFG_FLASH_BASE + i * FLASH_BANK_SIZE);
  86
  87                 addr[0] = 0x00900090;
  88
  89                 __asm__ volatile ("sync\n eieio");
  90
  91                 udelay (100);
  92
  93                 DEBUGF ("Flash bank # %d:\n"
  94                         "\tManuf. ID @ 0x%08lX: 0x%08lX\n"
  95                         "\tDevice ID @ 0x%08lX: 0x%08lX\n",
  96                         i,
  97                         (ulong) (&addr[0]), addr[0],
  98                         (ulong) (&addr[2]), addr[2]);
  99
 100
 101                 if ((addr[0] == addr[1]) && (addr[0] == INTEL_MANUFACT) &&
 102                     (addr[2] == addr[3]) && (addr[2] == INTEL_ID_28F160F3T)) {
 103
 104                         flash_info[i].flash_id =
 105                                 (FLASH_MAN_INTEL & FLASH_VENDMASK) |
 106                                 (INTEL_ID_28F160F3T & FLASH_TYPEMASK);
 107
 108                 } else if ((addr[0] == addr[1]) && (addr[0] == INTEL_MANUFACT)
 109                          && (addr[2] == addr[3])
 110                          && (addr[2] == INTEL_ID_28F160C3T)) {
 111
 112                         flash_info[i].flash_id =
 113                                 (FLASH_MAN_INTEL & FLASH_VENDMASK) |
 114                                 (INTEL_ID_28F160C3T & FLASH_TYPEMASK);
 115
 116                 } else {
 117                         flash_info[i].flash_id = FLASH_UNKNOWN;
 118                         addr[0] = 0xFFFFFFFF;
 119                         goto Done;
 120                 }
 121
 122                 DEBUGF ("flash_id = 0x%08lX\n", flash_info[i].flash_id);
 123
 124                 addr[0] = 0xFFFFFFFF;
 125
 126                 flash_info[i].size = FLASH_BANK_SIZE;
 127                 flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
 128                 memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
 129                 for (j = 0; j < flash_info[i].sector_count; j++) {
 130                         if (j > 30) {
 131                                 flash_info[i].start[j] = CFG_FLASH_BASE +
 132                                         i * FLASH_BANK_SIZE +
 133                                         (MAIN_SECT_SIZE * 31) + (j -
 134                                                                  31) *
 135                                         PARAM_SECT_SIZE;
 136                         } else {
 137                                 flash_info[i].start[j] = CFG_FLASH_BASE +
 138                                         i * FLASH_BANK_SIZE +
 139                                         j * MAIN_SECT_SIZE;
 140                         }
 141                 }
 142
 143                 /* unlock sectors, if 160C3T */
 144
 145                 for (j = 0; j < flash_info[i].sector_count; j++) {
 146                         tmpaddr = (vu_long *) flash_info[i].start[j];
 147
 148                         if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
 149                             (INTEL_ID_28F160C3T & FLASH_TYPEMASK)) {
 150                                 tmpaddr[0] = 0x00600060;
 151                                 tmpaddr[0] = 0x00D000D0;
 152                                 tmpaddr[1] = 0x00600060;
 153                                 tmpaddr[1] = 0x00D000D0;
 154                         }
 155                 }
 156
 157                 size += flash_info[i].size;
 158
 159                 addr[0] = 0x00FF00FF;
 160                 addr[1] = 0x00FF00FF;
 161         }
 162
 163         /* Protect monitor and environment sectors
 164          */
 165 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE + FLASH_BANK_SIZE
 166         flash_protect (FLAG_PROTECT_SET,
 167                        CFG_MONITOR_BASE,
 168                        CFG_MONITOR_BASE + monitor_flash_len - 1,
 169                        &flash_info[1]);
 170 #else
 171         flash_protect (FLAG_PROTECT_SET,
 172                        CFG_MONITOR_BASE,
 173                        CFG_MONITOR_BASE + monitor_flash_len - 1,
 174                        &flash_info[0]);
 175 #endif
 176
 177 #if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CFG_ENV_ADDR)
 178 #if CFG_ENV_ADDR >= CFG_FLASH_BASE + FLASH_BANK_SIZE
 179         flash_protect (FLAG_PROTECT_SET,
 180                        CFG_ENV_ADDR,
 181                        CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[1]);
 182 #else
 183         flash_protect (FLAG_PROTECT_SET,
 184                        CFG_ENV_ADDR,
 185                        CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
 186 #endif
 187 #endif
 188
 189 Done:
 190         return size;
 191 }
 192
 193 /*-----------------------------------------------------------------------
 194  */
 195 void flash_print_info (flash_info_t * info)
 196 {
 197         int i;
 198
 199         switch ((i = info->flash_id & FLASH_VENDMASK)) {
 200         case (FLASH_MAN_INTEL & FLASH_VENDMASK):
 201                 printf ("Intel: ");
 202                 break;
 203         default:
 204                 printf ("Unknown Vendor 0x%04x ", i);
 205                 break;
 206         }
 207
 208         switch ((i = info->flash_id & FLASH_TYPEMASK)) {
 209         case (INTEL_ID_28F160F3T & FLASH_TYPEMASK):
 210                 printf ("28F160F3T (16Mbit)\n");
 211                 break;
 212
 213         case (INTEL_ID_28F160C3T & FLASH_TYPEMASK):
 214                 printf ("28F160C3T (16Mbit)\n");
 215                 break;
 216
 217         default:
 218                 printf ("Unknown Chip Type 0x%04x\n", i);
 219                 goto Done;
 220                 break;
 221         }
 222
 223         printf ("  Size: %ld MB in %d Sectors\n",
 224                 info->size >> 20, info->sector_count);
 225
 226         printf ("  Sector Start Addresses:");
 227         for (i = 0; i < info->sector_count; i++) {
 228                 if ((i % 5) == 0) {
 229                         printf ("\n   ");
 230                 }
 231                 printf (" %08lX%s", info->start[i],
 232                         info->protect[i] ? " (RO)" : "     ");
 233         }
 234         printf ("\n");
 235
 236 Done:
 237         return;
 238 }
 239
 240 /*-----------------------------------------------------------------------
 241  */
 242
 243 int flash_erase (flash_info_t * info, int s_first, int s_last)
 244 {
 245         int flag, prot, sect;
 246         ulong start, now, last;
 247
 248         DEBUGF ("Erase flash bank %d sect %d ... %d\n",
 249                 info - &flash_info[0], s_first, s_last);
 250
 251         if ((s_first < 0) || (s_first > s_last)) {
 252                 if (info->flash_id == FLASH_UNKNOWN) {
 253                         printf ("- missing\n");
 254                 } else {
 255                         printf ("- no sectors to erase\n");
 256                 }
 257                 return 1;
 258         }
 259
 260         if ((info->flash_id & FLASH_VENDMASK) !=
 261             (FLASH_MAN_INTEL & FLASH_VENDMASK)) {
 262                 printf ("Can erase only Intel flash types - aborted\n");
 263                 return 1;
 264         }
 265
 266         prot = 0;
 267         for (sect = s_first; sect <= s_last; ++sect) {
 268                 if (info->protect[sect]) {
 269                         prot++;
 270                 }
 271         }
 272
 273         if (prot) {
 274                 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
 275         } else {
 276                 printf ("\n");
 277         }
 278
 279         start = get_timer (0);
 280         last = start;
 281         /* Start erase on unprotected sectors */
 282         for (sect = s_first; sect <= s_last; sect++) {
 283                 if (info->protect[sect] == 0) { /* not protected */
 284                         vu_long *addr = (vu_long *) (info->start[sect]);
 285
 286                         DEBUGF ("Erase sect %d @ 0x%08lX\n",
 287                                 sect, (ulong) addr);
 288
 289                         /* Disable interrupts which might cause a timeout
 290                          * here.
 291                          */
 292                         flag = disable_interrupts ();
 293
 294                         addr[0] = 0x00500050;   /* clear status register */
 295                         addr[0] = 0x00200020;   /* erase setup */
 296                         addr[0] = 0x00D000D0;   /* erase confirm */
 297
 298                         addr[1] = 0x00500050;   /* clear status register */
 299                         addr[1] = 0x00200020;   /* erase setup */
 300                         addr[1] = 0x00D000D0;   /* erase confirm */
 301
 302                         /* re-enable interrupts if necessary */
 303                         if (flag)
 304                                 enable_interrupts ();
 305
 306                         /* wait at least 80us - let's wait 1 ms */
 307                         udelay (1000);
 308
 309                         while (((addr[0] & 0x00800080) != 0x00800080) ||
 310                                ((addr[1] & 0x00800080) != 0x00800080)) {
 311                                 if ((now = get_timer (start)) >
 312                                     CFG_FLASH_ERASE_TOUT) {
 313                                         printf ("Timeout\n");
 314                                         addr[0] = 0x00B000B0;   /* suspend erase */
 315                                         addr[0] = 0x00FF00FF;   /* to read mode  */
 316                                         return 1;
 317                                 }
 318
 319                                 /* show that we're waiting */
 320                                 if ((now - last) > 1000) {      /* every second  */
 321                                         putc ('.');
 322                                         last = now;
 323                                 }
 324                         }
 325
 326                         addr[0] = 0x00FF00FF;
 327                 }
 328         }
 329         printf (" done\n");
 330         return 0;
 331 }
 332
 333 /*-----------------------------------------------------------------------
 334  * Copy memory to flash, returns:
 335  * 0 - OK
 336  * 1 - write timeout
 337  * 2 - Flash not erased
 338  * 4 - Flash not identified
 339  */
 340
 341 #define FLASH_WIDTH     8       /* flash bus width in bytes */
 342
 343 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 344 {
 345         ulong wp, cp, msr;
 346         int l, rc, i;
 347         ulong data[2];
 348         ulong *datah = &data[0];
 349         ulong *datal = &data[1];
 350
 351         DEBUGF ("Flash write_buff: @ 0x%08lx, src 0x%08lx len %ld\n",
 352                 addr, (ulong) src, cnt);
 353
 354         if (info->flash_id == FLASH_UNKNOWN) {
 355                 return 4;
 356         }
 357
 358         msr = get_msr ();
 359         set_msr (msr | MSR_FP);
 360
 361         wp = (addr & ~(FLASH_WIDTH - 1));       /* get lower aligned address */
 362
 363         /*
 364          * handle unaligned start bytes
 365          */
 366         if ((l = addr - wp) != 0) {
 367                 *datah = *datal = 0;
 368
 369                 for (i = 0, cp = wp; i < l; i++, cp++) {
 370                         if (i >= 4) {
 371                                 *datah = (*datah << 8) |
 372                                         ((*datal & 0xFF000000) >> 24);
 373                         }
 374
 375                         *datal = (*datal << 8) | (*(uchar *) cp);
 376                 }
 377                 for (; i < FLASH_WIDTH && cnt > 0; ++i) {
 378                         char tmp = *src++;
 379
 380                         if (i >= 4) {
 381                                 *datah = (*datah << 8) |
 382                                         ((*datal & 0xFF000000) >> 24);
 383                         }
 384
 385                         *datal = (*datal << 8) | tmp;
 386                         --cnt;
 387                         ++cp;
 388                 }
 389
 390                 for (; cnt == 0 && i < FLASH_WIDTH; ++i, ++cp) {
 391                         if (i >= 4) {
 392                                 *datah = (*datah << 8) |
 393                                         ((*datal & 0xFF000000) >> 24);
 394                         }
 395
 396                         *datal = (*datah << 8) | (*(uchar *) cp);
 397                 }
 398
 399                 if ((rc = write_data (info, wp, data)) != 0) {
 400                         set_msr (msr);
 401                         return (rc);
 402                 }
 403
 404                 wp += FLASH_WIDTH;
 405         }
 406
 407         /*
 408          * handle FLASH_WIDTH aligned part
 409          */
 410         while (cnt >= FLASH_WIDTH) {
 411                 *datah = *(ulong *) src;
 412                 *datal = *(ulong *) (src + 4);
 413                 if ((rc = write_data (info, wp, data)) != 0) {
 414                         set_msr (msr);
 415                         return (rc);
 416                 }
 417                 wp += FLASH_WIDTH;
 418                 cnt -= FLASH_WIDTH;
 419                 src += FLASH_WIDTH;
 420         }
 421
 422         if (cnt == 0) {
 423                 set_msr (msr);
 424                 return (0);
 425         }
 426
 427         /*
 428          * handle unaligned tail bytes
 429          */
 430         *datah = *datal = 0;
 431         for (i = 0, cp = wp; i < FLASH_WIDTH && cnt > 0; ++i, ++cp) {
 432                 char tmp = *src++;
 433
 434                 if (i >= 4) {
 435                         *datah = (*datah << 8) | ((*datal & 0xFF000000) >>
 436                                                   24);
 437                 }
 438
 439                 *datal = (*datal << 8) | tmp;
 440                 --cnt;
 441         }
 442
 443         for (; i < FLASH_WIDTH; ++i, ++cp) {
 444                 if (i >= 4) {
 445                         *datah = (*datah << 8) | ((*datal & 0xFF000000) >>
 446                                                   24);
 447                 }
 448
 449                 *datal = (*datal << 8) | (*(uchar *) cp);
 450         }
 451
 452         rc = write_data (info, wp, data);
 453         set_msr (msr);
 454
 455         return (rc);
 456 }
 457
 458 /*-----------------------------------------------------------------------
 459  * Write a word to Flash, returns:
 460  * 0 - OK
 461  * 1 - write timeout
 462  * 2 - Flash not erased
 463  */
 464 static int write_data (flash_info_t * info, ulong dest, ulong * data)
 465 {
 466         vu_long *addr = (vu_long *) dest;
 467         ulong start;
 468         int flag;
 469
 470         /* Check if Flash is (sufficiently) erased */
 471         if (((addr[0] & data[0]) != data[0]) ||
 472             ((addr[1] & data[1]) != data[1])) {
 473                 return (2);
 474         }
 475         /* Disable interrupts which might cause a timeout here */
 476         flag = disable_interrupts ();
 477
 478         addr[0] = 0x00400040;   /* write setup */
 479         write_via_fpu (addr, data);
 480
 481         /* re-enable interrupts if necessary */
 482         if (flag)
 483                 enable_interrupts ();
 484
 485         start = get_timer (0);
 486
 487         while (((addr[0] & 0x00800080) != 0x00800080) ||
 488                ((addr[1] & 0x00800080) != 0x00800080)) {
 489                 if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
 490                         addr[0] = 0x00FF00FF;   /* restore read mode */
 491                         return (1);
 492                 }
 493         }
 494
 495         addr[0] = 0x00FF00FF;   /* restore read mode */
 496
 497         return (0);
 498 }
 499
 500 /*-----------------------------------------------------------------------
 501  */
 502 static void write_via_fpu (vu_long * addr, ulong * data)
 503 {
 504         __asm__ __volatile__ ("lfd  1, 0(%0)"::"r" (data));
 505         __asm__ __volatile__ ("stfd 1, 0(%0)"::"r" (addr));
 506 }
 507
 508 /*-----------------------------------------------------------------------
 509  */
 510 static __inline__ unsigned long get_msr (void)
 511 {
 512         unsigned long msr;
 513
 514         __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
 515
 516         return msr;
 517 }
 518
 519 static __inline__ void set_msr (unsigned long msr)
 520 {
 521         __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
 522 }