2 * (C) Copyright 2009 Wolfgang Denk <wd@denx.de>
3 * (C) Copyright 2009 Dave Srl www.dave.eu
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/bitops.h>
29 #include <asm/processor.h>
30 #include <asm/mpc512x.h>
31 #include <fdt_support.h>
32 #ifdef CONFIG_MISC_INIT_R
36 DECLARE_GLOBAL_DATA_PTR
;
39 #define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \
40 CLOCK_SCCR1_LPC_EN | \
41 CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \
42 CLOCK_SCCR1_PSCFIFO_EN | \
43 CLOCK_SCCR1_DDR_EN | \
44 CLOCK_SCCR1_FEC_EN | \
45 CLOCK_SCCR1_NFC_EN | \
46 CLOCK_SCCR1_PATA_EN | \
47 CLOCK_SCCR1_PCI_EN | \
50 #define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \
51 CLOCK_SCCR2_SPDIF_EN | \
52 CLOCK_SCCR2_DIU_EN | \
55 int board_early_init_f(void)
57 volatile immap_t
*im
= (immap_t
*)CONFIG_SYS_IMMR
;
61 * Initialize Local Window for the On Board FPGA access
63 out_be32(&im
->sysconf
.lpcs2aw
,
64 CSAW_START(CONFIG_SYS_ARIA_FPGA_BASE
) |
65 CSAW_STOP(CONFIG_SYS_ARIA_FPGA_BASE
, CONFIG_SYS_ARIA_FPGA_SIZE
)
67 out_be32(&im
->lpc
.cs_cfg
[2], CONFIG_SYS_CS2_CFG
);
68 sync_law(&im
->sysconf
.lpcs2aw
);
71 * Initialize Local Window for the On Board SRAM access
73 out_be32(&im
->sysconf
.lpcs6aw
,
74 CSAW_START(CONFIG_SYS_ARIA_SRAM_BASE
) |
75 CSAW_STOP(CONFIG_SYS_ARIA_SRAM_BASE
, CONFIG_SYS_ARIA_SRAM_SIZE
)
77 out_be32(&im
->lpc
.cs_cfg
[6], CONFIG_SYS_CS6_CFG
);
78 sync_law(&im
->sysconf
.lpcs6aw
);
81 * Configure Flash Speed
83 out_be32(&im
->lpc
.cs_cfg
[0], CONFIG_SYS_CS0_CFG
);
85 spridr
= in_be32(&im
->sysconf
.spridr
);
87 if (SVR_MJREV(spridr
) >= 2)
88 out_be32(&im
->lpc
.altr
, CONFIG_SYS_CS_ALETIMING
);
93 out_be32(&im
->clk
.sccr
[0], SCCR1_CLOCKS_EN
);
94 out_be32(&im
->clk
.sccr
[1], SCCR2_CLOCKS_EN
);
95 #if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE)
96 setbits_be32(&im
->clk
.sccr
[1], CLOCK_SCCR2_IIM_EN
);
102 phys_size_t
initdram (int board_type
)
104 return fixed_sdram(NULL
, NULL
, 0);
107 int misc_init_r(void)
111 /* we use I2C-2 for on-board eeprom */
114 tmp
= in_be32((u32
*)CONFIG_SYS_ARIA_FPGA_BASE
);
115 printf("FPGA: %u-%u.%u.%u\n",
116 (tmp
& 0xFF000000) >> 24,
117 (tmp
& 0x00FF0000) >> 16,
118 (tmp
& 0x0000FF00) >> 8,
125 static iopin_t ioregs_init
[] = {
132 offsetof(struct ioctrl512x
, io_control_psc0_0
), 5, 0,
133 IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
134 IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
137 offsetof(struct ioctrl512x
, io_control_psc1_0
), 10, 0,
138 IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
139 IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
142 offsetof(struct ioctrl512x
, io_control_spdif_txclk
), 3, 0,
143 IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
144 IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
152 offsetof(struct ioctrl512x
, io_control_psc6_0
), 1, 0,
153 IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
154 IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
156 /* FUNC2=DIU_HSYNC */
158 offsetof(struct ioctrl512x
, io_control_psc6_1
), 1, 0,
159 IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
160 IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
162 /* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */
164 offsetof(struct ioctrl512x
, io_control_psc6_4
), 26, 0,
165 IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
166 IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
173 offsetof(struct ioctrl512x
, io_control_j1850_rx
), 1, 0,
174 IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
175 IO_PIN_PUE(1) | IO_PIN_ST(1) | IO_PIN_DS(3)
179 int checkboard (void)
181 puts("Board: ARIA\n");
183 /* initialize function mux & slew rate IO inter alia on IO Pins */
185 iopin_initialize(ioregs_init
, ARRAY_SIZE(ioregs_init
));
190 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
191 void ft_board_setup(void *blob
, bd_t
*bd
)
193 ft_cpu_setup(blob
, bd
);
195 #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */