board/davinci/da8xxevm/omapl138_lcdk.c

   1 /*
   2  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * Based on da850evm.c. Original Copyrights follow:
   5  *
   6  * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
   7  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  */
  23
  24 #include <common.h>
  25 #include <i2c.h>
  26 #include <net.h>
  27 #include <netdev.h>
  28 #include <spi.h>
  29 #include <spi_flash.h>
  30 #include <asm/arch/hardware.h>
  31 #include <asm/ti-common/davinci_nand.h>
  32 #include <asm/io.h>
  33 #include <asm/errno.h>
  34 #include <asm/arch/davinci_misc.h>
  35 #ifdef CONFIG_DAVINCI_MMC
  36 #include <mmc.h>
  37 #include <asm/arch/sdmmc_defs.h>
  38 #endif
  39
  40 DECLARE_GLOBAL_DATA_PTR;
  41
  42 #define pinmux(x)       (&davinci_syscfg_regs->pinmux[x])
  43
  44 #ifdef CONFIG_DAVINCI_MMC
  45 /* MMC0 pin muxer settings */
  46 const struct pinmux_config mmc0_pins[] = {
  47         /* GP0[11] is required for SD to work on Rev 3 EVMs */
  48         { pinmux(0),  8, 4 },   /* GP0[11] */
  49         { pinmux(10), 2, 0 },   /* MMCSD0_CLK */
  50         { pinmux(10), 2, 1 },   /* MMCSD0_CMD */
  51         { pinmux(10), 2, 2 },   /* MMCSD0_DAT_0 */
  52         { pinmux(10), 2, 3 },   /* MMCSD0_DAT_1 */
  53         { pinmux(10), 2, 4 },   /* MMCSD0_DAT_2 */
  54         { pinmux(10), 2, 5 },   /* MMCSD0_DAT_3 */
  55         /* LCDK supports only 4-bit mode, remaining pins are not configured */
  56 };
  57 #endif
  58
  59 /* UART pin muxer settings */
  60 static const struct pinmux_config uart_pins[] = {
  61         { pinmux(0), 4, 6 },
  62         { pinmux(0), 4, 7 },
  63         { pinmux(4), 2, 4 },
  64         { pinmux(4), 2, 5 }
  65 };
  66
  67 #ifdef CONFIG_DRIVER_TI_EMAC
  68 static const struct pinmux_config emac_pins[] = {
  69         { pinmux(2), 8, 1 },
  70         { pinmux(2), 8, 2 },
  71         { pinmux(2), 8, 3 },
  72         { pinmux(2), 8, 4 },
  73         { pinmux(2), 8, 5 },
  74         { pinmux(2), 8, 6 },
  75         { pinmux(2), 8, 7 },
  76         { pinmux(3), 8, 0 },
  77         { pinmux(3), 8, 1 },
  78         { pinmux(3), 8, 2 },
  79         { pinmux(3), 8, 3 },
  80         { pinmux(3), 8, 4 },
  81         { pinmux(3), 8, 5 },
  82         { pinmux(3), 8, 6 },
  83         { pinmux(3), 8, 7 },
  84         { pinmux(4), 8, 0 },
  85         { pinmux(4), 8, 1 }
  86 };
  87 #endif /* CONFIG_DRIVER_TI_EMAC */
  88
  89 /* I2C pin muxer settings */
  90 static const struct pinmux_config i2c_pins[] = {
  91         { pinmux(4), 2, 2 },
  92         { pinmux(4), 2, 3 }
  93 };
  94
  95 #ifdef CONFIG_NAND_DAVINCI
  96 const struct pinmux_config nand_pins[] = {
  97         { pinmux(7), 1, 1 },
  98         { pinmux(7), 1, 2 },
  99         { pinmux(7), 1, 4 },
 100         { pinmux(7), 1, 5 },
 101         { pinmux(8), 1, 0 },
 102         { pinmux(8), 1, 1 },
 103         { pinmux(8), 1, 2 },
 104         { pinmux(8), 1, 3 },
 105         { pinmux(8), 1, 4 },
 106         { pinmux(8), 1, 5 },
 107         { pinmux(8), 1, 6 },
 108         { pinmux(8), 1, 7 },
 109         { pinmux(9), 1, 0 },
 110         { pinmux(9), 1, 1 },
 111         { pinmux(9), 1, 2 },
 112         { pinmux(9), 1, 3 },
 113         { pinmux(9), 1, 4 },
 114         { pinmux(9), 1, 5 },
 115         { pinmux(9), 1, 6 },
 116         { pinmux(9), 1, 7 },
 117         { pinmux(12), 1, 5 },
 118         { pinmux(12), 1, 6 }
 119 };
 120
 121 #endif
 122
 123 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
 124 #define HAS_RMII 1
 125 #else
 126 #define HAS_RMII 0
 127 #endif
 128
 129 const struct pinmux_resource pinmuxes[] = {
 130         PINMUX_ITEM(uart_pins),
 131         PINMUX_ITEM(i2c_pins),
 132 #ifdef CONFIG_NAND_DAVINCI
 133         PINMUX_ITEM(nand_pins),
 134 #endif
 135 };
 136
 137 const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
 138
 139 const struct lpsc_resource lpsc[] = {
 140         { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
 141         { DAVINCI_LPSC_SPI1 },  /* Serial Flash */
 142         { DAVINCI_LPSC_EMAC },  /* image download */
 143         { DAVINCI_LPSC_UART2 }, /* console */
 144         { DAVINCI_LPSC_GPIO },
 145 #ifdef CONFIG_DAVINCI_MMC
 146         { DAVINCI_LPSC_MMC_SD },
 147 #endif
 148 };
 149
 150 const int lpsc_size = ARRAY_SIZE(lpsc);
 151
 152 #ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
 153 #define CONFIG_DA850_EVM_MAX_CPU_CLK    456000000
 154 #endif
 155
 156 /*
 157  * get_board_rev() - setup to pass kernel board revision information
 158  * Returns:
 159  * bit[0-3]     Maximum cpu clock rate supported by onboard SoC
 160  *              0000b - 300 MHz
 161  *              0001b - 372 MHz
 162  *              0010b - 408 MHz
 163  *              0011b - 456 MHz
 164  */
 165 u32 get_board_rev(void)
 166 {
 167         return 0;
 168 }
 169
 170 int board_early_init_f(void)
 171 {
 172         /*
 173          * Power on required peripherals
 174          * ARM does not have access by default to PSC0 and PSC1
 175          * assuming here that the DSP bootloader has set the IOPU
 176          * such that PSC access is available to ARM
 177          */
 178         if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
 179                 return 1;
 180
 181         return 0;
 182 }
 183
 184 int board_init(void)
 185 {
 186 #ifndef CONFIG_USE_IRQ
 187         irq_init();
 188 #endif
 189
 190         /* arch number of the board */
 191         gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_LCDK;
 192
 193         /* address of boot parameters */
 194         gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
 195
 196
 197         /* setup the SUSPSRC for ARM to control emulation suspend */
 198         writel(readl(&davinci_syscfg_regs->suspsrc) &
 199                ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
 200                  DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
 201                  DAVINCI_SYSCFG_SUSPSRC_UART2),
 202                &davinci_syscfg_regs->suspsrc);
 203
 204         /* configure pinmux settings */
 205         if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
 206                 return 1;
 207
 208 #ifdef CONFIG_NAND_DAVINCI
 209         /*
 210          * NAND CS setup - cycle counts based on da850evm NAND timings in the
 211          * Linux kernel @ 25MHz EMIFA
 212          */
 213         writel((DAVINCI_ABCR_WSETUP(15) |
 214                 DAVINCI_ABCR_WSTROBE(63) |
 215                 DAVINCI_ABCR_WHOLD(7) |
 216                 DAVINCI_ABCR_RSETUP(15) |
 217                 DAVINCI_ABCR_RSTROBE(63) |
 218                 DAVINCI_ABCR_RHOLD(7) |
 219                 DAVINCI_ABCR_TA(3) |
 220                 DAVINCI_ABCR_ASIZE_16BIT),
 221                &davinci_emif_regs->ab2cr); /* CS3 */
 222 #endif
 223
 224
 225 #ifdef CONFIG_DAVINCI_MMC
 226         if (davinci_configure_pin_mux(mmc0_pins, ARRAY_SIZE(mmc0_pins)) != 0)
 227                 return 1;
 228 #endif
 229
 230 #ifdef CONFIG_DRIVER_TI_EMAC
 231         if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
 232                 return 1;
 233         davinci_emac_mii_mode_sel(HAS_RMII);
 234 #endif /* CONFIG_DRIVER_TI_EMAC */
 235
 236         /* enable the console UART */
 237         writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
 238                 DAVINCI_UART_PWREMU_MGMT_UTRST),
 239                &davinci_uart2_ctrl_regs->pwremu_mgmt);
 240
 241         return 0;
 242 }
 243
 244 #ifdef CONFIG_DRIVER_TI_EMAC
 245
 246 /*
 247  * Initializes on-board ethernet controllers.
 248  */
 249 int board_eth_init(bd_t *bis)
 250 {
 251         if (!davinci_emac_initialize()) {
 252                 printf("Error: Ethernet init failed!\n");
 253                 return -1;
 254         }
 255
 256         return 0;
 257 }
 258
 259 #endif /* CONFIG_DRIVER_TI_EMAC */
 260
 261 #define CFG_MAC_ADDR_SPI_BUS    0
 262 #define CFG_MAC_ADDR_SPI_CS     0
 263 #define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
 264 #define CFG_MAC_ADDR_SPI_MODE   SPI_MODE_3
 265
 266 #define CFG_MAC_ADDR_OFFSET     (flash->size - SZ_64K)
 267
 268 static int  get_mac_addr(u8 *addr)
 269 {
 270         /* Need to find a way to get MAC ADDRESS */
 271         return 0;
 272 }
 273
 274 void dsp_lpsc_on(unsigned domain, unsigned int id)
 275 {
 276         dv_reg_p mdstat, mdctl, ptstat, ptcmd;
 277         struct davinci_psc_regs *psc_regs;
 278
 279         psc_regs = davinci_psc0_regs;
 280         mdstat = &psc_regs->psc0.mdstat[id];
 281         mdctl = &psc_regs->psc0.mdctl[id];
 282         ptstat = &psc_regs->ptstat;
 283         ptcmd = &psc_regs->ptcmd;
 284
 285         while (*ptstat & (0x1 << domain))
 286                 ;
 287
 288         if ((*mdstat & 0x1f) == 0x03)
 289                 return;                 /* Already on and enabled */
 290
 291         *mdctl |= 0x03;
 292
 293         *ptcmd = 0x1 << domain;
 294
 295         while (*ptstat & (0x1 << domain))
 296                 ;
 297         while ((*mdstat & 0x1f) != 0x03)
 298                 ;               /* Probably an overkill... */
 299 }
 300
 301 static void dspwake(void)
 302 {
 303         unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;
 304
 305         /* if the device is ARM only, return */
 306         if ((REG(CHIP_REV_ID_REG) & 0x3f) == 0x10)
 307                 return;
 308
 309         if (!strcmp(getenv("dspwake"), "no"))
 310                 return;
 311
 312         *resetvect++ = 0x1E000; /* DSP Idle */
 313         /* clear out the next 10 words as NOP */
 314         memset(resetvect, 0, sizeof(unsigned) * 10);
 315
 316         /* setup the DSP reset vector */
 317         REG(HOST1CFG) = DAVINCI_L3CBARAM_BASE;
 318
 319         dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
 320         REG(PSC0_MDCTL + (15 * 4)) |= 0x100;
 321 }
 322
 323 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
 324 /**
 325  * rmii_hw_init
 326  *
 327  */
 328 int rmii_hw_init(void)
 329 {
 330         return 0;
 331 }
 332 #endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
 333
 334 int misc_init_r(void)
 335 {
 336         uint8_t tmp[20], addr[10];
 337
 338
 339         if (getenv("ethaddr") == NULL) {
 340                 /* Read Ethernet MAC address from EEPROM */
 341                 if (dvevm_read_mac_address(addr)) {
 342                         /* Set Ethernet MAC address from EEPROM */
 343                         davinci_sync_env_enetaddr(addr);
 344                 } else {
 345                         get_mac_addr(addr);
 346                 }
 347
 348                 if (is_multicast_ethaddr(addr) || is_zero_ethaddr(addr)) {
 349                         printf("Invalid MAC address read.\n");
 350                         return -EINVAL;
 351                 }
 352                 sprintf((char *)tmp, "%02x:%02x:%02x:%02x:%02x:%02x", addr[0],
 353                                 addr[1], addr[2], addr[3], addr[4], addr[5]);
 354
 355                 setenv("ethaddr", (char *)tmp);
 356         }
 357 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
 358         /* Select RMII fucntion through the expander */
 359         if (rmii_hw_init())
 360                 printf("RMII hardware init failed!!!\n");
 361 #endif
 362
 363         dspwake();
 364
 365         return 0;
 366 }
 367
 368 #ifdef CONFIG_DAVINCI_MMC
 369 static struct davinci_mmc mmc_sd0 = {
 370         .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
 371         .host_caps = MMC_MODE_4BIT,     /* DA850 supports only 4-bit SD/MMC */
 372         .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
 373         .version = MMC_CTLR_VERSION_2,
 374 };
 375
 376 int board_mmc_init(bd_t *bis)
 377 {
 378         mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);
 379
 380         /* Add slot-0 to mmc subsystem */
 381         return davinci_mmc_init(bis, &mmc_sd0);
 382 }
 383 #endif